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Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301/*
2 * POWERNV cpufreq driver for the IBM POWER processors
3 *
4 * (C) Copyright IBM 2014
5 *
6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#define pr_fmt(fmt) "powernv-cpufreq: " fmt
21
22#include <linux/kernel.h>
23#include <linux/sysfs.h>
24#include <linux/cpumask.h>
25#include <linux/module.h>
26#include <linux/cpufreq.h>
27#include <linux/smp.h>
28#include <linux/of.h>
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +020029#include <linux/reboot.h>
Shilpasri G Bhat053819e2015-07-16 13:34:18 +053030#include <linux/slab.h>
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +053031#include <linux/cpu.h>
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +053032#include <trace/events/power.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053033
34#include <asm/cputhreads.h>
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +053035#include <asm/firmware.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053036#include <asm/reg.h>
Srivatsa S. Bhatf3cae352014-04-16 11:35:38 +053037#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +053038#include <asm/opal.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053039
40#define POWERNV_MAX_PSTATES 256
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +053041#define PMSR_PSAFE_ENABLE (1UL << 30)
42#define PMSR_SPR_EM_DISABLE (1UL << 31)
43#define PMSR_MAX(x) ((x >> 32) & 0xFF)
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053044
45static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +053046static bool rebooting, throttled, occ_reset;
Shilpasri G Bhat96c47262016-02-03 01:11:39 +053047static unsigned int *core_to_chip_map;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053048
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +053049static const char * const throttle_reason[] = {
50 "No throttling",
51 "Power Cap",
52 "Processor Over Temperature",
53 "Power Supply Failure",
54 "Over Current",
55 "OCC Reset"
56};
57
Shilpasri G Bhat053819e2015-07-16 13:34:18 +053058static struct chip {
59 unsigned int id;
60 bool throttled;
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +053061 bool restore;
62 u8 throttle_reason;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +053063 cpumask_t mask;
64 struct work_struct throttle;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +053065} *chips;
66
67static int nr_chips;
68
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053069/*
70 * Note: The set of pstates consists of contiguous integers, the
71 * smallest of which is indicated by powernv_pstate_info.min, the
72 * largest of which is indicated by powernv_pstate_info.max.
73 *
74 * The nominal pstate is the highest non-turbo pstate in this
75 * platform. This is indicated by powernv_pstate_info.nominal.
76 */
77static struct powernv_pstate_info {
78 int min;
79 int max;
80 int nominal;
81 int nr_pstates;
82} powernv_pstate_info;
83
84/*
85 * Initialize the freq table based on data obtained
86 * from the firmware passed via device-tree
87 */
88static int init_powernv_pstates(void)
89{
90 struct device_node *power_mgt;
91 int i, pstate_min, pstate_max, pstate_nominal, nr_pstates = 0;
92 const __be32 *pstate_ids, *pstate_freqs;
93 u32 len_ids, len_freqs;
94
95 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
96 if (!power_mgt) {
97 pr_warn("power-mgt node not found\n");
98 return -ENODEV;
99 }
100
101 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
102 pr_warn("ibm,pstate-min node not found\n");
103 return -ENODEV;
104 }
105
106 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
107 pr_warn("ibm,pstate-max node not found\n");
108 return -ENODEV;
109 }
110
111 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
112 &pstate_nominal)) {
113 pr_warn("ibm,pstate-nominal not found\n");
114 return -ENODEV;
115 }
116 pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
117 pstate_nominal, pstate_max);
118
119 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
120 if (!pstate_ids) {
121 pr_warn("ibm,pstate-ids not found\n");
122 return -ENODEV;
123 }
124
125 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
126 &len_freqs);
127 if (!pstate_freqs) {
128 pr_warn("ibm,pstate-frequencies-mhz not found\n");
129 return -ENODEV;
130 }
131
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530132 if (len_ids != len_freqs) {
133 pr_warn("Entries in ibm,pstate-ids and "
134 "ibm,pstate-frequencies-mhz does not match\n");
135 }
136
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530137 nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
138 if (!nr_pstates) {
139 pr_warn("No PStates found\n");
140 return -ENODEV;
141 }
142
143 pr_debug("NR PStates %d\n", nr_pstates);
144 for (i = 0; i < nr_pstates; i++) {
145 u32 id = be32_to_cpu(pstate_ids[i]);
146 u32 freq = be32_to_cpu(pstate_freqs[i]);
147
148 pr_debug("PState id %d freq %d MHz\n", id, freq);
149 powernv_freqs[i].frequency = freq * 1000; /* kHz */
Gautham R. Shenoy0692c692014-04-01 12:43:27 +0530150 powernv_freqs[i].driver_data = id;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530151 }
152 /* End of list marker entry */
153 powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
154
155 powernv_pstate_info.min = pstate_min;
156 powernv_pstate_info.max = pstate_max;
157 powernv_pstate_info.nominal = pstate_nominal;
158 powernv_pstate_info.nr_pstates = nr_pstates;
159
160 return 0;
161}
162
163/* Returns the CPU frequency corresponding to the pstate_id. */
164static unsigned int pstate_id_to_freq(int pstate_id)
165{
166 int i;
167
168 i = powernv_pstate_info.max - pstate_id;
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530169 if (i >= powernv_pstate_info.nr_pstates || i < 0) {
170 pr_warn("PState id %d outside of PState table, "
171 "reporting nominal id %d instead\n",
172 pstate_id, powernv_pstate_info.nominal);
173 i = powernv_pstate_info.max - powernv_pstate_info.nominal;
174 }
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530175
176 return powernv_freqs[i].frequency;
177}
178
179/*
180 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
181 * the firmware
182 */
183static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
184 char *buf)
185{
186 return sprintf(buf, "%u\n",
187 pstate_id_to_freq(powernv_pstate_info.nominal));
188}
189
190struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
191 __ATTR_RO(cpuinfo_nominal_freq);
192
193static struct freq_attr *powernv_cpu_freq_attr[] = {
194 &cpufreq_freq_attr_scaling_available_freqs,
195 &cpufreq_freq_attr_cpuinfo_nominal_freq,
196 NULL,
197};
198
199/* Helper routines */
200
201/* Access helpers to power mgt SPR */
202
203static inline unsigned long get_pmspr(unsigned long sprn)
204{
205 switch (sprn) {
206 case SPRN_PMCR:
207 return mfspr(SPRN_PMCR);
208
209 case SPRN_PMICR:
210 return mfspr(SPRN_PMICR);
211
212 case SPRN_PMSR:
213 return mfspr(SPRN_PMSR);
214 }
215 BUG();
216}
217
218static inline void set_pmspr(unsigned long sprn, unsigned long val)
219{
220 switch (sprn) {
221 case SPRN_PMCR:
222 mtspr(SPRN_PMCR, val);
223 return;
224
225 case SPRN_PMICR:
226 mtspr(SPRN_PMICR, val);
227 return;
228 }
229 BUG();
230}
231
232/*
233 * Use objects of this type to query/update
234 * pstates on a remote CPU via smp_call_function.
235 */
236struct powernv_smp_call_data {
237 unsigned int freq;
238 int pstate_id;
239};
240
241/*
242 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
243 *
244 * Called via smp_call_function.
245 *
246 * Note: The caller of the smp_call_function should pass an argument of
247 * the type 'struct powernv_smp_call_data *' along with this function.
248 *
249 * The current frequency on this CPU will be returned via
250 * ((struct powernv_smp_call_data *)arg)->freq;
251 */
252static void powernv_read_cpu_freq(void *arg)
253{
254 unsigned long pmspr_val;
255 s8 local_pstate_id;
256 struct powernv_smp_call_data *freq_data = arg;
257
258 pmspr_val = get_pmspr(SPRN_PMSR);
259
260 /*
261 * The local pstate id corresponds bits 48..55 in the PMSR.
262 * Note: Watch out for the sign!
263 */
264 local_pstate_id = (pmspr_val >> 48) & 0xFF;
265 freq_data->pstate_id = local_pstate_id;
266 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
267
268 pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
269 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
270 freq_data->freq);
271}
272
273/*
274 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
275 * firmware for CPU 'cpu'. This value is reported through the sysfs
276 * file cpuinfo_cur_freq.
277 */
Brian Norris60d1ea42014-05-11 00:51:20 -0700278static unsigned int powernv_cpufreq_get(unsigned int cpu)
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530279{
280 struct powernv_smp_call_data freq_data;
281
282 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
283 &freq_data, 1);
284
285 return freq_data.freq;
286}
287
288/*
289 * set_pstate: Sets the pstate on this CPU.
290 *
291 * This is called via an smp_call_function.
292 *
293 * The caller must ensure that freq_data is of the type
294 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
295 * on this CPU should be present in freq_data->pstate_id.
296 */
297static void set_pstate(void *freq_data)
298{
299 unsigned long val;
300 unsigned long pstate_ul =
301 ((struct powernv_smp_call_data *) freq_data)->pstate_id;
302
303 val = get_pmspr(SPRN_PMCR);
304 val = val & 0x0000FFFFFFFFFFFFULL;
305
306 pstate_ul = pstate_ul & 0xFF;
307
308 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
309 val = val | (pstate_ul << 56) | (pstate_ul << 48);
310
311 pr_debug("Setting cpu %d pmcr to %016lX\n",
312 raw_smp_processor_id(), val);
313 set_pmspr(SPRN_PMCR, val);
314}
315
316/*
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200317 * get_nominal_index: Returns the index corresponding to the nominal
318 * pstate in the cpufreq table
319 */
320static inline unsigned int get_nominal_index(void)
321{
322 return powernv_pstate_info.max - powernv_pstate_info.nominal;
323}
324
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530325static void powernv_cpufreq_throttle_check(void *data)
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530326{
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530327 unsigned int cpu = smp_processor_id();
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530328 unsigned int chip_id = core_to_chip_map[cpu_core_index_of_thread(cpu)];
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530329 unsigned long pmsr;
Shilpasri G Bhat3dd3ebe2015-07-16 13:34:22 +0530330 int pmsr_pmax, i;
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530331
332 pmsr = get_pmspr(SPRN_PMSR);
333
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530334 for (i = 0; i < nr_chips; i++)
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530335 if (chips[i].id == chip_id)
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530336 break;
337
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530338 /* Check for Pmax Capping */
339 pmsr_pmax = (s8)PMSR_MAX(pmsr);
340 if (pmsr_pmax != powernv_pstate_info.max) {
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530341 if (chips[i].throttled)
342 goto next;
343 chips[i].throttled = true;
Shilpasri G Bhatd43b1b62015-09-14 14:01:47 +0530344 if (pmsr_pmax < powernv_pstate_info.nominal)
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530345 pr_warn_once("CPU %d on Chip %u has Pmax reduced below nominal frequency (%d < %d)\n",
346 cpu, chips[i].id, pmsr_pmax,
347 powernv_pstate_info.nominal);
348 trace_powernv_throttle(chips[i].id,
349 throttle_reason[chips[i].throttle_reason],
350 pmsr_pmax);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530351 } else if (chips[i].throttled) {
352 chips[i].throttled = false;
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530353 trace_powernv_throttle(chips[i].id,
354 throttle_reason[chips[i].throttle_reason],
355 pmsr_pmax);
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530356 }
357
Shilpasri G Bhat3dd3ebe2015-07-16 13:34:22 +0530358 /* Check if Psafe_mode_active is set in PMSR. */
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530359next:
Shilpasri G Bhat3dd3ebe2015-07-16 13:34:22 +0530360 if (pmsr & PMSR_PSAFE_ENABLE) {
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530361 throttled = true;
362 pr_info("Pstate set to safe frequency\n");
363 }
364
365 /* Check if SPR_EM_DISABLE is set in PMSR */
366 if (pmsr & PMSR_SPR_EM_DISABLE) {
367 throttled = true;
368 pr_info("Frequency Control disabled from OS\n");
369 }
370
371 if (throttled) {
372 pr_info("PMSR = %16lx\n", pmsr);
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530373 pr_warn("CPU Frequency could be throttled\n");
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530374 }
375}
376
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200377/*
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530378 * powernv_cpufreq_target_index: Sets the frequency corresponding to
379 * the cpufreq table entry indexed by new_index on the cpus in the
380 * mask policy->cpus
381 */
382static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
383 unsigned int new_index)
384{
385 struct powernv_smp_call_data freq_data;
386
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200387 if (unlikely(rebooting) && new_index != get_nominal_index())
388 return 0;
389
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530390 if (!throttled)
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530391 powernv_cpufreq_throttle_check(NULL);
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530392
Gautham R. Shenoy0692c692014-04-01 12:43:27 +0530393 freq_data.pstate_id = powernv_freqs[new_index].driver_data;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530394
395 /*
396 * Use smp_call_function to send IPI and execute the
397 * mtspr on target CPU. We could do that without IPI
398 * if current CPU is within policy->cpus (core)
399 */
400 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
401
402 return 0;
403}
404
405static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
406{
407 int base, i;
408
409 base = cpu_first_thread_sibling(policy->cpu);
410
411 for (i = 0; i < threads_per_core; i++)
412 cpumask_set_cpu(base + i, policy->cpus);
413
414 return cpufreq_table_validate_and_show(policy, powernv_freqs);
415}
416
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200417static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
418 unsigned long action, void *unused)
419{
420 int cpu;
421 struct cpufreq_policy cpu_policy;
422
423 rebooting = true;
424 for_each_online_cpu(cpu) {
425 cpufreq_get_policy(&cpu_policy, cpu);
426 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
427 }
428
429 return NOTIFY_DONE;
430}
431
432static struct notifier_block powernv_cpufreq_reboot_nb = {
433 .notifier_call = powernv_cpufreq_reboot_notifier,
434};
435
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530436void powernv_cpufreq_work_fn(struct work_struct *work)
437{
438 struct chip *chip = container_of(work, struct chip, throttle);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530439 unsigned int cpu;
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530440 cpumask_t mask;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530441
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530442 get_online_cpus();
443 cpumask_and(&mask, &chip->mask, cpu_online_mask);
444 smp_call_function_any(&mask,
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530445 powernv_cpufreq_throttle_check, NULL, 0);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530446
447 if (!chip->restore)
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530448 goto out;
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530449
450 chip->restore = false;
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530451 for_each_cpu(cpu, &mask) {
452 int index;
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530453 struct cpufreq_policy policy;
454
455 cpufreq_get_policy(&policy, cpu);
456 cpufreq_frequency_table_target(&policy, policy.freq_table,
457 policy.cur,
458 CPUFREQ_RELATION_C, &index);
459 powernv_cpufreq_target_index(&policy, index);
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530460 cpumask_andnot(&mask, &mask, policy.cpus);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530461 }
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530462out:
463 put_online_cpus();
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530464}
465
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530466static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
467 unsigned long msg_type, void *_msg)
468{
469 struct opal_msg *msg = _msg;
470 struct opal_occ_msg omsg;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530471 int i;
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530472
473 if (msg_type != OPAL_MSG_OCC)
474 return 0;
475
476 omsg.type = be64_to_cpu(msg->params[0]);
477
478 switch (omsg.type) {
479 case OCC_RESET:
480 occ_reset = true;
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530481 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530482 /*
483 * powernv_cpufreq_throttle_check() is called in
484 * target() callback which can detect the throttle state
485 * for governors like ondemand.
486 * But static governors will not call target() often thus
487 * report throttling here.
488 */
489 if (!throttled) {
490 throttled = true;
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530491 pr_warn("CPU frequency is throttled for duration\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530492 }
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530493
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530494 break;
495 case OCC_LOAD:
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530496 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530497 break;
498 case OCC_THROTTLE:
499 omsg.chip = be64_to_cpu(msg->params[1]);
500 omsg.throttle_status = be64_to_cpu(msg->params[2]);
501
502 if (occ_reset) {
503 occ_reset = false;
504 throttled = false;
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530505 pr_info("OCC Active, CPU frequency is no longer throttled\n");
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530506
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530507 for (i = 0; i < nr_chips; i++) {
508 chips[i].restore = true;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530509 schedule_work(&chips[i].throttle);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530510 }
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530511
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530512 return 0;
513 }
514
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530515 for (i = 0; i < nr_chips; i++)
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530516 if (chips[i].id == omsg.chip)
517 break;
518
519 if (omsg.throttle_status >= 0 &&
520 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS)
521 chips[i].throttle_reason = omsg.throttle_status;
522
523 if (!omsg.throttle_status)
524 chips[i].restore = true;
525
526 schedule_work(&chips[i].throttle);
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530527 }
528 return 0;
529}
530
531static struct notifier_block powernv_cpufreq_opal_nb = {
532 .notifier_call = powernv_cpufreq_occ_msg,
533 .next = NULL,
534 .priority = 0,
535};
536
Preeti U Murthyb1203392014-09-29 15:47:53 +0200537static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
538{
539 struct powernv_smp_call_data freq_data;
540
541 freq_data.pstate_id = powernv_pstate_info.min;
542 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
543}
544
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530545static struct cpufreq_driver powernv_cpufreq_driver = {
546 .name = "powernv-cpufreq",
547 .flags = CPUFREQ_CONST_LOOPS,
548 .init = powernv_cpufreq_cpu_init,
549 .verify = cpufreq_generic_frequency_table_verify,
550 .target_index = powernv_cpufreq_target_index,
551 .get = powernv_cpufreq_get,
Preeti U Murthyb1203392014-09-29 15:47:53 +0200552 .stop_cpu = powernv_cpufreq_stop_cpu,
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530553 .attr = powernv_cpu_freq_attr,
554};
555
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530556static int init_chip_info(void)
557{
558 unsigned int chip[256];
559 unsigned int cpu, i;
560 unsigned int prev_chip_id = UINT_MAX;
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530561 cpumask_t cpu_mask;
562 int ret = -ENOMEM;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530563
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530564 core_to_chip_map = kcalloc(cpu_nr_cores(), sizeof(unsigned int),
565 GFP_KERNEL);
566 if (!core_to_chip_map)
567 goto out;
568
569 cpumask_copy(&cpu_mask, cpu_possible_mask);
570 for_each_cpu(cpu, &cpu_mask) {
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530571 unsigned int id = cpu_to_chip_id(cpu);
572
573 if (prev_chip_id != id) {
574 prev_chip_id = id;
575 chip[nr_chips++] = id;
576 }
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530577 core_to_chip_map[cpu_core_index_of_thread(cpu)] = id;
578 cpumask_andnot(&cpu_mask, &cpu_mask, cpu_sibling_mask(cpu));
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530579 }
580
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530581 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530582 if (!chips)
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530583 goto free_chip_map;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530584
585 for (i = 0; i < nr_chips; i++) {
586 chips[i].id = chip[i];
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530587 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
588 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530589 }
590
591 return 0;
Shilpasri G Bhat96c47262016-02-03 01:11:39 +0530592free_chip_map:
593 kfree(core_to_chip_map);
594out:
595 return ret;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530596}
597
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +0530598static inline void clean_chip_info(void)
599{
600 kfree(chips);
601 kfree(core_to_chip_map);
602}
603
604static inline void unregister_all_notifiers(void)
605{
606 opal_message_notifier_unregister(OPAL_MSG_OCC,
607 &powernv_cpufreq_opal_nb);
608 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
609}
610
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530611static int __init powernv_cpufreq_init(void)
612{
613 int rc = 0;
614
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530615 /* Don't probe on pseries (guest) platforms */
Stewart Smithe4d54f72015-12-09 17:18:20 +1100616 if (!firmware_has_feature(FW_FEATURE_OPAL))
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530617 return -ENODEV;
618
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530619 /* Discover pstates from device tree and init */
620 rc = init_powernv_pstates();
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +0530621 if (rc)
622 goto out;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530623
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530624 /* Populate chip info */
625 rc = init_chip_info();
626 if (rc)
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +0530627 goto out;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530628
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200629 register_reboot_notifier(&powernv_cpufreq_reboot_nb);
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530630 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +0530631
632 rc = cpufreq_register_driver(&powernv_cpufreq_driver);
633 if (!rc)
634 return 0;
635
636 pr_info("Failed to register the cpufreq driver (%d)\n", rc);
637 unregister_all_notifiers();
638 clean_chip_info();
639out:
640 pr_info("Platform driver disabled. System does not support PState control\n");
641 return rc;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530642}
643module_init(powernv_cpufreq_init);
644
645static void __exit powernv_cpufreq_exit(void)
646{
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530647 cpufreq_unregister_driver(&powernv_cpufreq_driver);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +0530648 unregister_all_notifiers();
649 clean_chip_info();
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530650}
651module_exit(powernv_cpufreq_exit);
652
653MODULE_LICENSE("GPL");
654MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");