Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright IBM Corp. 2007 |
| 16 | * |
| 17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> |
| 18 | */ |
| 19 | |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/string.h> |
Jerone Young | 31711f2 | 2008-07-14 14:00:03 +0200 | [diff] [blame] | 22 | #include <linux/kvm.h> |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 23 | #include <linux/kvm_host.h> |
| 24 | #include <linux/highmem.h> |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 25 | |
| 26 | #include <asm/tlbflush.h> |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 27 | #include <asm/mmu-44x.h> |
| 28 | #include <asm/kvm_ppc.h> |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 29 | #include <asm/kvm_44x.h> |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 30 | |
| 31 | #include "44x_tlb.h" |
| 32 | |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 33 | #ifndef PPC44x_TLBE_SIZE |
| 34 | #define PPC44x_TLBE_SIZE PPC44x_TLB_4K |
| 35 | #endif |
| 36 | |
| 37 | #define PAGE_SIZE_4K (1<<12) |
| 38 | #define PAGE_MASK_4K (~(PAGE_SIZE_4K - 1)) |
| 39 | |
Hollis Blanchard | df9b856 | 2008-11-10 14:57:35 -0600 | [diff] [blame] | 40 | #define PPC44x_TLB_UATTR_MASK \ |
| 41 | (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 42 | #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW) |
| 43 | #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW) |
| 44 | |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 45 | #ifdef DEBUG |
| 46 | void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu) |
| 47 | { |
| 48 | struct kvmppc_44x_tlbe *tlbe; |
| 49 | int i; |
| 50 | |
| 51 | printk("vcpu %d TLB dump:\n", vcpu->vcpu_id); |
| 52 | printk("| %2s | %3s | %8s | %8s | %8s |\n", |
| 53 | "nr", "tid", "word0", "word1", "word2"); |
| 54 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 55 | for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 56 | tlbe = &vcpu_44x->guest_tlb[i]; |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 57 | if (tlbe->word0 & PPC44x_TLB_VALID) |
| 58 | printk(" G%2d | %02X | %08X | %08X | %08X |\n", |
| 59 | i, tlbe->tid, tlbe->word0, tlbe->word1, |
| 60 | tlbe->word2); |
| 61 | } |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 62 | } |
| 63 | #endif |
| 64 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 65 | static inline void kvmppc_44x_tlbie(unsigned int index) |
| 66 | { |
| 67 | /* 0 <= index < 64, so the V bit is clear and we can use the index as |
| 68 | * word0. */ |
| 69 | asm volatile( |
| 70 | "tlbwe %[index], %[index], 0\n" |
| 71 | : |
| 72 | : [index] "r"(index) |
| 73 | ); |
| 74 | } |
| 75 | |
Hollis Blanchard | c5fbdff | 2008-12-02 15:51:56 -0600 | [diff] [blame^] | 76 | static inline void kvmppc_44x_tlbre(unsigned int index, |
| 77 | struct kvmppc_44x_tlbe *tlbe) |
| 78 | { |
| 79 | asm volatile( |
| 80 | "tlbre %[word0], %[index], 0\n" |
| 81 | "mfspr %[tid], %[sprn_mmucr]\n" |
| 82 | "andi. %[tid], %[tid], 0xff\n" |
| 83 | "tlbre %[word1], %[index], 1\n" |
| 84 | "tlbre %[word2], %[index], 2\n" |
| 85 | : [word0] "=r"(tlbe->word0), |
| 86 | [word1] "=r"(tlbe->word1), |
| 87 | [word2] "=r"(tlbe->word2), |
| 88 | [tid] "=r"(tlbe->tid) |
| 89 | : [index] "r"(index), |
| 90 | [sprn_mmucr] "i"(SPRN_MMUCR) |
| 91 | : "cc" |
| 92 | ); |
| 93 | } |
| 94 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 95 | static inline void kvmppc_44x_tlbwe(unsigned int index, |
| 96 | struct kvmppc_44x_tlbe *stlbe) |
| 97 | { |
| 98 | unsigned long tmp; |
| 99 | |
| 100 | asm volatile( |
| 101 | "mfspr %[tmp], %[sprn_mmucr]\n" |
| 102 | "rlwimi %[tmp], %[tid], 0, 0xff\n" |
| 103 | "mtspr %[sprn_mmucr], %[tmp]\n" |
| 104 | "tlbwe %[word0], %[index], 0\n" |
| 105 | "tlbwe %[word1], %[index], 1\n" |
| 106 | "tlbwe %[word2], %[index], 2\n" |
| 107 | : [tmp] "=&r"(tmp) |
| 108 | : [word0] "r"(stlbe->word0), |
| 109 | [word1] "r"(stlbe->word1), |
| 110 | [word2] "r"(stlbe->word2), |
| 111 | [tid] "r"(stlbe->tid), |
| 112 | [index] "r"(index), |
| 113 | [sprn_mmucr] "i"(SPRN_MMUCR) |
| 114 | ); |
| 115 | } |
| 116 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 117 | static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode) |
| 118 | { |
Hollis Blanchard | df9b856 | 2008-11-10 14:57:35 -0600 | [diff] [blame] | 119 | /* We only care about the guest's permission and user bits. */ |
| 120 | attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 121 | |
| 122 | if (!usermode) { |
| 123 | /* Guest is in supervisor mode, so we need to translate guest |
| 124 | * supervisor permissions into user permissions. */ |
| 125 | attrib &= ~PPC44x_TLB_USER_PERM_MASK; |
| 126 | attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3; |
| 127 | } |
| 128 | |
| 129 | /* Make sure host can always access this memory. */ |
| 130 | attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW; |
| 131 | |
Hollis Blanchard | df9b856 | 2008-11-10 14:57:35 -0600 | [diff] [blame] | 132 | /* WIMGE = 0b00100 */ |
| 133 | attrib |= PPC44x_TLB_M; |
| 134 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 135 | return attrib; |
| 136 | } |
| 137 | |
Hollis Blanchard | c5fbdff | 2008-12-02 15:51:56 -0600 | [diff] [blame^] | 138 | /* Load shadow TLB back into hardware. */ |
| 139 | void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu) |
| 140 | { |
| 141 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
| 142 | int i; |
| 143 | |
| 144 | for (i = 0; i <= tlb_44x_hwater; i++) { |
| 145 | struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i]; |
| 146 | |
| 147 | if (get_tlb_v(stlbe) && get_tlb_ts(stlbe)) |
| 148 | kvmppc_44x_tlbwe(i, stlbe); |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | static void kvmppc_44x_tlbe_set_modified(struct kvmppc_vcpu_44x *vcpu_44x, |
| 153 | unsigned int i) |
| 154 | { |
| 155 | vcpu_44x->shadow_tlb_mod[i] = 1; |
| 156 | } |
| 157 | |
| 158 | /* Save hardware TLB to the vcpu, and invalidate all guest mappings. */ |
| 159 | void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu) |
| 160 | { |
| 161 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
| 162 | int i; |
| 163 | |
| 164 | for (i = 0; i <= tlb_44x_hwater; i++) { |
| 165 | struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i]; |
| 166 | |
| 167 | if (vcpu_44x->shadow_tlb_mod[i]) |
| 168 | kvmppc_44x_tlbre(i, stlbe); |
| 169 | |
| 170 | if (get_tlb_v(stlbe) && get_tlb_ts(stlbe)) |
| 171 | kvmppc_44x_tlbie(i); |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 176 | /* Search the guest TLB for a matching entry. */ |
| 177 | int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid, |
| 178 | unsigned int as) |
| 179 | { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 180 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 181 | int i; |
| 182 | |
| 183 | /* XXX Replace loop with fancy data structures. */ |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 184 | for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 185 | struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i]; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 186 | unsigned int tid; |
| 187 | |
| 188 | if (eaddr < get_tlb_eaddr(tlbe)) |
| 189 | continue; |
| 190 | |
| 191 | if (eaddr > get_tlb_end(tlbe)) |
| 192 | continue; |
| 193 | |
| 194 | tid = get_tlb_tid(tlbe); |
| 195 | if (tid && (tid != pid)) |
| 196 | continue; |
| 197 | |
| 198 | if (!get_tlb_v(tlbe)) |
| 199 | continue; |
| 200 | |
| 201 | if (get_tlb_ts(tlbe) != as) |
| 202 | continue; |
| 203 | |
| 204 | return i; |
| 205 | } |
| 206 | |
| 207 | return -1; |
| 208 | } |
| 209 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 210 | int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 211 | { |
| 212 | unsigned int as = !!(vcpu->arch.msr & MSR_IS); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 213 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 214 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 215 | } |
| 216 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 217 | int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 218 | { |
| 219 | unsigned int as = !!(vcpu->arch.msr & MSR_DS); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 220 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 221 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 222 | } |
| 223 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 224 | static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x, |
| 225 | unsigned int stlb_index) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 226 | { |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 227 | struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[stlb_index]; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 228 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 229 | if (!ref->page) |
| 230 | return; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 231 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 232 | /* Discard from the TLB. */ |
| 233 | /* Note: we could actually invalidate a host mapping, if the host overwrote |
| 234 | * this TLB entry since we inserted a guest mapping. */ |
| 235 | kvmppc_44x_tlbie(stlb_index); |
| 236 | |
| 237 | /* Now release the page. */ |
| 238 | if (ref->writeable) |
| 239 | kvm_release_page_dirty(ref->page); |
| 240 | else |
| 241 | kvm_release_page_clean(ref->page); |
| 242 | |
| 243 | ref->page = NULL; |
| 244 | |
| 245 | /* XXX set tlb_44x_index to stlb_index? */ |
| 246 | |
| 247 | KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 248 | } |
| 249 | |
Hollis Blanchard | c30f8a6 | 2008-11-24 11:37:38 -0600 | [diff] [blame] | 250 | void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu) |
| 251 | { |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 252 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | c30f8a6 | 2008-11-24 11:37:38 -0600 | [diff] [blame] | 253 | int i; |
| 254 | |
| 255 | for (i = 0; i <= tlb_44x_hwater; i++) |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 256 | kvmppc_44x_shadow_release(vcpu_44x, i); |
Hollis Blanchard | 83aae4a | 2008-07-25 13:54:52 -0500 | [diff] [blame] | 257 | } |
| 258 | |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 259 | /** |
| 260 | * kvmppc_mmu_map -- create a host mapping for guest memory |
| 261 | * |
| 262 | * If the guest wanted a larger page than the host supports, only the first |
| 263 | * host page is mapped here and the rest are demand faulted. |
| 264 | * |
| 265 | * If the guest wanted a smaller page than the host page size, we map only the |
| 266 | * guest-size page (i.e. not a full host page mapping). |
| 267 | * |
| 268 | * Caller must ensure that the specified guest TLB entry is safe to insert into |
| 269 | * the shadow TLB. |
| 270 | */ |
| 271 | void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid, |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 272 | u32 flags, u32 max_bytes, unsigned int gtlb_index) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 273 | { |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 274 | struct kvmppc_44x_tlbe stlbe; |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 275 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 276 | struct kvmppc_44x_shadow_ref *ref; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 277 | struct page *new_page; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 278 | hpa_t hpaddr; |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 279 | gfn_t gfn; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 280 | unsigned int victim; |
| 281 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 282 | /* Select TLB entry to clobber. Indirectly guard against races with the TLB |
| 283 | * miss handler by disabling interrupts. */ |
| 284 | local_irq_disable(); |
| 285 | victim = ++tlb_44x_index; |
| 286 | if (victim > tlb_44x_hwater) |
| 287 | victim = 0; |
| 288 | tlb_44x_index = victim; |
| 289 | local_irq_enable(); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 290 | |
| 291 | /* Get reference to new page. */ |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 292 | gfn = gpaddr >> PAGE_SHIFT; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 293 | new_page = gfn_to_page(vcpu->kvm, gfn); |
| 294 | if (is_error_page(new_page)) { |
Hollis Blanchard | 9dcb40e | 2008-05-21 18:22:55 -0500 | [diff] [blame] | 295 | printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 296 | kvm_release_page_clean(new_page); |
| 297 | return; |
| 298 | } |
| 299 | hpaddr = page_to_phys(new_page); |
| 300 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 301 | /* Invalidate any previous shadow mappings. */ |
| 302 | kvmppc_44x_shadow_release(vcpu_44x, victim); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 303 | |
| 304 | /* XXX Make sure (va, size) doesn't overlap any other |
| 305 | * entries. 440x6 user manual says the result would be |
| 306 | * "undefined." */ |
| 307 | |
| 308 | /* XXX what about AS? */ |
| 309 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 310 | /* Force TS=1 for all guest mappings. */ |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 311 | stlbe.word0 = PPC44x_TLB_VALID | PPC44x_TLB_TS; |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 312 | |
| 313 | if (max_bytes >= PAGE_SIZE) { |
| 314 | /* Guest mapping is larger than or equal to host page size. We can use |
| 315 | * a "native" host mapping. */ |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 316 | stlbe.word0 |= (gvaddr & PAGE_MASK) | PPC44x_TLBE_SIZE; |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 317 | } else { |
| 318 | /* Guest mapping is smaller than host page size. We must restrict the |
| 319 | * size of the mapping to be at most the smaller of the two, but for |
| 320 | * simplicity we fall back to a 4K mapping (this is probably what the |
| 321 | * guest is using anyways). */ |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 322 | stlbe.word0 |= (gvaddr & PAGE_MASK_4K) | PPC44x_TLB_4K; |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 323 | |
| 324 | /* 'hpaddr' is a host page, which is larger than the mapping we're |
| 325 | * inserting here. To compensate, we must add the in-page offset to the |
| 326 | * sub-page. */ |
| 327 | hpaddr |= gpaddr & (PAGE_MASK ^ PAGE_MASK_4K); |
| 328 | } |
| 329 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 330 | stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf); |
| 331 | stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags, |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 332 | vcpu->arch.msr & MSR_PR); |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 333 | stlbe.tid = !(asid & 0xff); |
Jerone Young | 31711f2 | 2008-07-14 14:00:03 +0200 | [diff] [blame] | 334 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 335 | /* Keep track of the reference so we can properly release it later. */ |
| 336 | ref = &vcpu_44x->shadow_refs[victim]; |
| 337 | ref->page = new_page; |
| 338 | ref->gtlb_index = gtlb_index; |
| 339 | ref->writeable = !!(stlbe.word2 & PPC44x_TLB_UW); |
| 340 | ref->tid = stlbe.tid; |
| 341 | |
| 342 | /* Insert shadow mapping into hardware TLB. */ |
Hollis Blanchard | c5fbdff | 2008-12-02 15:51:56 -0600 | [diff] [blame^] | 343 | kvmppc_44x_tlbe_set_modified(vcpu_44x, victim); |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 344 | kvmppc_44x_tlbwe(victim, &stlbe); |
| 345 | KVMTRACE_5D(STLB_WRITE, vcpu, victim, stlbe.tid, stlbe.word0, stlbe.word1, |
| 346 | stlbe.word2, handler); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 347 | } |
| 348 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 349 | /* For a particular guest TLB entry, invalidate the corresponding host TLB |
| 350 | * mappings and release the host pages. */ |
| 351 | static void kvmppc_44x_invalidate(struct kvm_vcpu *vcpu, |
| 352 | unsigned int gtlb_index) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 353 | { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 354 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 355 | int i; |
| 356 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 357 | for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) { |
| 358 | struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i]; |
| 359 | if (ref->gtlb_index == gtlb_index) |
| 360 | kvmppc_44x_shadow_release(vcpu_44x, i); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 361 | } |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 362 | } |
| 363 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 364 | void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode) |
| 365 | { |
Hollis Blanchard | fe4e771 | 2008-11-10 14:57:36 -0600 | [diff] [blame] | 366 | vcpu->arch.shadow_pid = !usermode; |
| 367 | } |
| 368 | |
| 369 | void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid) |
| 370 | { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 371 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 372 | int i; |
| 373 | |
Hollis Blanchard | fe4e771 | 2008-11-10 14:57:36 -0600 | [diff] [blame] | 374 | if (unlikely(vcpu->arch.pid == new_pid)) |
| 375 | return; |
Jerone Young | 31711f2 | 2008-07-14 14:00:03 +0200 | [diff] [blame] | 376 | |
Hollis Blanchard | fe4e771 | 2008-11-10 14:57:36 -0600 | [diff] [blame] | 377 | vcpu->arch.pid = new_pid; |
| 378 | |
| 379 | /* Guest userspace runs with TID=0 mappings and PID=0, to make sure it |
| 380 | * can't access guest kernel mappings (TID=1). When we switch to a new |
| 381 | * guest PID, which will also use host PID=0, we must discard the old guest |
| 382 | * userspace mappings. */ |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 383 | for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) { |
| 384 | struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i]; |
Hollis Blanchard | fe4e771 | 2008-11-10 14:57:36 -0600 | [diff] [blame] | 385 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 386 | if (ref->tid == 0) |
| 387 | kvmppc_44x_shadow_release(vcpu_44x, i); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 388 | } |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 389 | } |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 390 | |
| 391 | static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu, |
Hollis Blanchard | 0f55dc4 | 2008-11-05 09:36:12 -0600 | [diff] [blame] | 392 | const struct kvmppc_44x_tlbe *tlbe) |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 393 | { |
| 394 | gpa_t gpa; |
| 395 | |
| 396 | if (!get_tlb_v(tlbe)) |
| 397 | return 0; |
| 398 | |
| 399 | /* Does it match current guest AS? */ |
| 400 | /* XXX what about IS != DS? */ |
| 401 | if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS)) |
| 402 | return 0; |
| 403 | |
| 404 | gpa = get_tlb_raddr(tlbe); |
| 405 | if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT)) |
| 406 | /* Mapping is not for RAM. */ |
| 407 | return 0; |
| 408 | |
| 409 | return 1; |
| 410 | } |
| 411 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 412 | int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws) |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 413 | { |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 414 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
Hollis Blanchard | 0f55dc4 | 2008-11-05 09:36:12 -0600 | [diff] [blame] | 415 | struct kvmppc_44x_tlbe *tlbe; |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 416 | unsigned int gtlb_index; |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 417 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 418 | gtlb_index = vcpu->arch.gpr[ra]; |
| 419 | if (gtlb_index > KVM44x_GUEST_TLB_SIZE) { |
| 420 | printk("%s: index %d\n", __func__, gtlb_index); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 421 | kvmppc_dump_vcpu(vcpu); |
| 422 | return EMULATE_FAIL; |
| 423 | } |
| 424 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 425 | tlbe = &vcpu_44x->guest_tlb[gtlb_index]; |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 426 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 427 | /* Invalidate shadow mappings for the about-to-be-clobbered TLB entry. */ |
| 428 | if (tlbe->word0 & PPC44x_TLB_VALID) |
| 429 | kvmppc_44x_invalidate(vcpu, gtlb_index); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 430 | |
| 431 | switch (ws) { |
| 432 | case PPC44x_TLB_PAGEID: |
Hollis Blanchard | bf5d402 | 2008-11-10 14:57:34 -0600 | [diff] [blame] | 433 | tlbe->tid = get_mmucr_stid(vcpu); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 434 | tlbe->word0 = vcpu->arch.gpr[rs]; |
| 435 | break; |
| 436 | |
| 437 | case PPC44x_TLB_XLAT: |
| 438 | tlbe->word1 = vcpu->arch.gpr[rs]; |
| 439 | break; |
| 440 | |
| 441 | case PPC44x_TLB_ATTRIB: |
| 442 | tlbe->word2 = vcpu->arch.gpr[rs]; |
| 443 | break; |
| 444 | |
| 445 | default: |
| 446 | return EMULATE_FAIL; |
| 447 | } |
| 448 | |
| 449 | if (tlbe_is_host_safe(vcpu, tlbe)) { |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 450 | u64 asid; |
| 451 | gva_t eaddr; |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 452 | gpa_t gpaddr; |
| 453 | u32 flags; |
| 454 | u32 bytes; |
| 455 | |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 456 | eaddr = get_tlb_eaddr(tlbe); |
Hollis Blanchard | 8916861 | 2008-12-02 15:51:53 -0600 | [diff] [blame] | 457 | gpaddr = get_tlb_raddr(tlbe); |
| 458 | |
| 459 | /* Use the advertised page size to mask effective and real addrs. */ |
| 460 | bytes = get_tlb_bytes(tlbe); |
| 461 | eaddr &= ~(bytes - 1); |
| 462 | gpaddr &= ~(bytes - 1); |
| 463 | |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 464 | asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid; |
| 465 | flags = tlbe->word2 & 0xffff; |
| 466 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 467 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 468 | } |
| 469 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 470 | KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0, |
| 471 | tlbe->word1, tlbe->word2, handler); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 472 | |
| 473 | return EMULATE_DONE; |
| 474 | } |
| 475 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 476 | int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc) |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 477 | { |
| 478 | u32 ea; |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 479 | int gtlb_index; |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 480 | unsigned int as = get_mmucr_sts(vcpu); |
| 481 | unsigned int pid = get_mmucr_stid(vcpu); |
| 482 | |
| 483 | ea = vcpu->arch.gpr[rb]; |
| 484 | if (ra) |
| 485 | ea += vcpu->arch.gpr[ra]; |
| 486 | |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 487 | gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as); |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 488 | if (rc) { |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 489 | if (gtlb_index < 0) |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 490 | vcpu->arch.cr &= ~0x20000000; |
| 491 | else |
| 492 | vcpu->arch.cr |= 0x20000000; |
| 493 | } |
Hollis Blanchard | 7924bd4 | 2008-12-02 15:51:55 -0600 | [diff] [blame] | 494 | vcpu->arch.gpr[rt] = gtlb_index; |
Hollis Blanchard | a0d7b9f | 2008-11-05 09:36:11 -0600 | [diff] [blame] | 495 | |
| 496 | return EMULATE_DONE; |
| 497 | } |