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Taku Izumi8cdc3f62015-08-21 17:29:18 +09001/*
2 * FUJITSU Extended Socket Network Device driver
3 * Copyright (c) 2015 FUJITSU LIMITED
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, see <http://www.gnu.org/licenses/>.
16 *
17 * The full GNU General Public License is included in this distribution in
18 * the file called "COPYING".
19 *
20 */
21
22#include "fjes_hw.h"
23#include "fjes.h"
24
Taku Izumi785f28e2015-08-21 17:29:35 +090025static void fjes_hw_update_zone_task(struct work_struct *);
Taku Izumib5a91522015-08-21 17:29:36 +090026static void fjes_hw_epstop_task(struct work_struct *);
Taku Izumi785f28e2015-08-21 17:29:35 +090027
Taku Izumi8cdc3f62015-08-21 17:29:18 +090028/* supported MTU list */
29const u32 fjes_support_mtu[] = {
30 FJES_MTU_DEFINE(8 * 1024),
31 FJES_MTU_DEFINE(16 * 1024),
32 FJES_MTU_DEFINE(32 * 1024),
33 FJES_MTU_DEFINE(64 * 1024),
34 0
35};
36
37u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
38{
39 u8 *base = hw->base;
40 u32 value = 0;
41
42 value = readl(&base[reg]);
43
44 return value;
45}
46
47static u8 *fjes_hw_iomap(struct fjes_hw *hw)
48{
49 u8 *base;
50
51 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
52 fjes_driver_name)) {
53 pr_err("request_mem_region failed\n");
54 return NULL;
55 }
56
57 base = (u8 *)ioremap_nocache(hw->hw_res.start, hw->hw_res.size);
58
59 return base;
60}
61
Taku Izumia18aaec2015-08-21 17:29:19 +090062static void fjes_hw_iounmap(struct fjes_hw *hw)
63{
64 iounmap(hw->base);
65 release_mem_region(hw->hw_res.start, hw->hw_res.size);
66}
67
Taku Izumi8cdc3f62015-08-21 17:29:18 +090068int fjes_hw_reset(struct fjes_hw *hw)
69{
70 union REG_DCTL dctl;
71 int timeout;
72
73 dctl.reg = 0;
74 dctl.bits.reset = 1;
75 wr32(XSCT_DCTL, dctl.reg);
76
77 timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
78 dctl.reg = rd32(XSCT_DCTL);
79 while ((dctl.bits.reset == 1) && (timeout > 0)) {
80 msleep(1000);
81 dctl.reg = rd32(XSCT_DCTL);
82 timeout -= 1000;
83 }
84
85 return timeout > 0 ? 0 : -EIO;
86}
87
88static int fjes_hw_get_max_epid(struct fjes_hw *hw)
89{
90 union REG_MAX_EP info;
91
92 info.reg = rd32(XSCT_MAX_EP);
93
94 return info.bits.maxep;
95}
96
97static int fjes_hw_get_my_epid(struct fjes_hw *hw)
98{
99 union REG_OWNER_EPID info;
100
101 info.reg = rd32(XSCT_OWNER_EPID);
102
103 return info.bits.epid;
104}
105
106static int fjes_hw_alloc_shared_status_region(struct fjes_hw *hw)
107{
108 size_t size;
109
110 size = sizeof(struct fjes_device_shared_info) +
111 (sizeof(u8) * hw->max_epid);
112 hw->hw_info.share = kzalloc(size, GFP_KERNEL);
113 if (!hw->hw_info.share)
114 return -ENOMEM;
115
116 hw->hw_info.share->epnum = hw->max_epid;
117
118 return 0;
119}
120
Taku Izumia18aaec2015-08-21 17:29:19 +0900121static void fjes_hw_free_shared_status_region(struct fjes_hw *hw)
122{
123 kfree(hw->hw_info.share);
124 hw->hw_info.share = NULL;
125}
126
Taku Izumi8cdc3f62015-08-21 17:29:18 +0900127static int fjes_hw_alloc_epbuf(struct epbuf_handler *epbh)
128{
129 void *mem;
130
131 mem = vzalloc(EP_BUFFER_SIZE);
132 if (!mem)
133 return -ENOMEM;
134
135 epbh->buffer = mem;
136 epbh->size = EP_BUFFER_SIZE;
137
138 epbh->info = (union ep_buffer_info *)mem;
139 epbh->ring = (u8 *)(mem + sizeof(union ep_buffer_info));
140
141 return 0;
142}
143
Taku Izumia18aaec2015-08-21 17:29:19 +0900144static void fjes_hw_free_epbuf(struct epbuf_handler *epbh)
145{
146 if (epbh->buffer)
147 vfree(epbh->buffer);
148
149 epbh->buffer = NULL;
150 epbh->size = 0;
151
152 epbh->info = NULL;
153 epbh->ring = NULL;
154}
155
Taku Izumi8cdc3f62015-08-21 17:29:18 +0900156void fjes_hw_setup_epbuf(struct epbuf_handler *epbh, u8 *mac_addr, u32 mtu)
157{
158 union ep_buffer_info *info = epbh->info;
159 u16 vlan_id[EP_BUFFER_SUPPORT_VLAN_MAX];
160 int i;
161
162 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
163 vlan_id[i] = info->v1i.vlan_id[i];
164
165 memset(info, 0, sizeof(union ep_buffer_info));
166
167 info->v1i.version = 0; /* version 0 */
168
169 for (i = 0; i < ETH_ALEN; i++)
170 info->v1i.mac_addr[i] = mac_addr[i];
171
172 info->v1i.head = 0;
173 info->v1i.tail = 1;
174
175 info->v1i.info_size = sizeof(union ep_buffer_info);
176 info->v1i.buffer_size = epbh->size - info->v1i.info_size;
177
178 info->v1i.frame_max = FJES_MTU_TO_FRAME_SIZE(mtu);
179 info->v1i.count_max =
180 EP_RING_NUM(info->v1i.buffer_size, info->v1i.frame_max);
181
182 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
183 info->v1i.vlan_id[i] = vlan_id[i];
184}
185
186void
187fjes_hw_init_command_registers(struct fjes_hw *hw,
188 struct fjes_device_command_param *param)
189{
190 /* Request Buffer length */
191 wr32(XSCT_REQBL, (__le32)(param->req_len));
192 /* Response Buffer Length */
193 wr32(XSCT_RESPBL, (__le32)(param->res_len));
194
195 /* Request Buffer Address */
196 wr32(XSCT_REQBAL,
197 (__le32)(param->req_start & GENMASK_ULL(31, 0)));
198 wr32(XSCT_REQBAH,
199 (__le32)((param->req_start & GENMASK_ULL(63, 32)) >> 32));
200
201 /* Response Buffer Address */
202 wr32(XSCT_RESPBAL,
203 (__le32)(param->res_start & GENMASK_ULL(31, 0)));
204 wr32(XSCT_RESPBAH,
205 (__le32)((param->res_start & GENMASK_ULL(63, 32)) >> 32));
206
207 /* Share status address */
208 wr32(XSCT_SHSTSAL,
209 (__le32)(param->share_start & GENMASK_ULL(31, 0)));
210 wr32(XSCT_SHSTSAH,
211 (__le32)((param->share_start & GENMASK_ULL(63, 32)) >> 32));
212}
213
214static int fjes_hw_setup(struct fjes_hw *hw)
215{
216 u8 mac[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
217 struct fjes_device_command_param param;
218 struct ep_share_mem_info *buf_pair;
219 size_t mem_size;
220 int result;
221 int epidx;
222 void *buf;
223
224 hw->hw_info.max_epid = &hw->max_epid;
225 hw->hw_info.my_epid = &hw->my_epid;
226
227 buf = kcalloc(hw->max_epid, sizeof(struct ep_share_mem_info),
228 GFP_KERNEL);
229 if (!buf)
230 return -ENOMEM;
231
232 hw->ep_shm_info = (struct ep_share_mem_info *)buf;
233
234 mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
235 hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
236 if (!(hw->hw_info.req_buf))
237 return -ENOMEM;
238
239 hw->hw_info.req_buf_size = mem_size;
240
241 mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
242 hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
243 if (!(hw->hw_info.res_buf))
244 return -ENOMEM;
245
246 hw->hw_info.res_buf_size = mem_size;
247
248 result = fjes_hw_alloc_shared_status_region(hw);
249 if (result)
250 return result;
251
252 hw->hw_info.buffer_share_bit = 0;
253 hw->hw_info.buffer_unshare_reserve_bit = 0;
254
255 for (epidx = 0; epidx < hw->max_epid; epidx++) {
256 if (epidx != hw->my_epid) {
257 buf_pair = &hw->ep_shm_info[epidx];
258
259 result = fjes_hw_alloc_epbuf(&buf_pair->tx);
260 if (result)
261 return result;
262
263 result = fjes_hw_alloc_epbuf(&buf_pair->rx);
264 if (result)
265 return result;
266
267 fjes_hw_setup_epbuf(&buf_pair->tx, mac,
268 fjes_support_mtu[0]);
269 fjes_hw_setup_epbuf(&buf_pair->rx, mac,
270 fjes_support_mtu[0]);
271 }
272 }
273
274 memset(&param, 0, sizeof(param));
275
276 param.req_len = hw->hw_info.req_buf_size;
277 param.req_start = __pa(hw->hw_info.req_buf);
278 param.res_len = hw->hw_info.res_buf_size;
279 param.res_start = __pa(hw->hw_info.res_buf);
280
281 param.share_start = __pa(hw->hw_info.share->ep_status);
282
283 fjes_hw_init_command_registers(hw, &param);
284
285 return 0;
286}
287
Taku Izumia18aaec2015-08-21 17:29:19 +0900288static void fjes_hw_cleanup(struct fjes_hw *hw)
289{
290 int epidx;
291
292 if (!hw->ep_shm_info)
293 return;
294
295 fjes_hw_free_shared_status_region(hw);
296
297 kfree(hw->hw_info.req_buf);
298 hw->hw_info.req_buf = NULL;
299
300 kfree(hw->hw_info.res_buf);
301 hw->hw_info.res_buf = NULL;
302
303 for (epidx = 0; epidx < hw->max_epid ; epidx++) {
304 if (epidx == hw->my_epid)
305 continue;
306 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
307 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
308 }
309
310 kfree(hw->ep_shm_info);
311 hw->ep_shm_info = NULL;
312}
313
Taku Izumi8cdc3f62015-08-21 17:29:18 +0900314int fjes_hw_init(struct fjes_hw *hw)
315{
316 int ret;
317
318 hw->base = fjes_hw_iomap(hw);
319 if (!hw->base)
320 return -EIO;
321
322 ret = fjes_hw_reset(hw);
323 if (ret)
324 return ret;
325
326 fjes_hw_set_irqmask(hw, REG_ICTL_MASK_ALL, true);
327
Taku Izumi785f28e2015-08-21 17:29:35 +0900328 INIT_WORK(&hw->update_zone_task, fjes_hw_update_zone_task);
Taku Izumib5a91522015-08-21 17:29:36 +0900329 INIT_WORK(&hw->epstop_task, fjes_hw_epstop_task);
Taku Izumi785f28e2015-08-21 17:29:35 +0900330
Taku Izumi8cdc3f62015-08-21 17:29:18 +0900331 mutex_init(&hw->hw_info.lock);
332
333 hw->max_epid = fjes_hw_get_max_epid(hw);
334 hw->my_epid = fjes_hw_get_my_epid(hw);
335
336 if ((hw->max_epid == 0) || (hw->my_epid >= hw->max_epid))
337 return -ENXIO;
338
339 ret = fjes_hw_setup(hw);
340
341 return ret;
342}
343
Taku Izumia18aaec2015-08-21 17:29:19 +0900344void fjes_hw_exit(struct fjes_hw *hw)
345{
346 int ret;
347
348 if (hw->base) {
349 ret = fjes_hw_reset(hw);
350 if (ret)
351 pr_err("%s: reset error", __func__);
352
353 fjes_hw_iounmap(hw);
354 hw->base = NULL;
355 }
356
357 fjes_hw_cleanup(hw);
Taku Izumi785f28e2015-08-21 17:29:35 +0900358
359 cancel_work_sync(&hw->update_zone_task);
Taku Izumib5a91522015-08-21 17:29:36 +0900360 cancel_work_sync(&hw->epstop_task);
Taku Izumia18aaec2015-08-21 17:29:19 +0900361}
362
Taku Izumi3bb025d2015-08-21 17:29:21 +0900363static enum fjes_dev_command_response_e
364fjes_hw_issue_request_command(struct fjes_hw *hw,
365 enum fjes_dev_command_request_type type)
366{
367 enum fjes_dev_command_response_e ret = FJES_CMD_STATUS_UNKNOWN;
368 union REG_CR cr;
369 union REG_CS cs;
370 int timeout;
371
372 cr.reg = 0;
373 cr.bits.req_start = 1;
374 cr.bits.req_code = type;
375 wr32(XSCT_CR, cr.reg);
376 cr.reg = rd32(XSCT_CR);
377
378 if (cr.bits.error == 0) {
379 timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
380 cs.reg = rd32(XSCT_CS);
381
382 while ((cs.bits.complete != 1) && timeout > 0) {
383 msleep(1000);
384 cs.reg = rd32(XSCT_CS);
385 timeout -= 1000;
386 }
387
388 if (cs.bits.complete == 1)
389 ret = FJES_CMD_STATUS_NORMAL;
390 else if (timeout <= 0)
391 ret = FJES_CMD_STATUS_TIMEOUT;
392
393 } else {
394 switch (cr.bits.err_info) {
395 case FJES_CMD_REQ_ERR_INFO_PARAM:
396 ret = FJES_CMD_STATUS_ERROR_PARAM;
397 break;
398 case FJES_CMD_REQ_ERR_INFO_STATUS:
399 ret = FJES_CMD_STATUS_ERROR_STATUS;
400 break;
401 default:
402 ret = FJES_CMD_STATUS_UNKNOWN;
403 break;
404 }
405 }
406
407 return ret;
408}
409
410int fjes_hw_request_info(struct fjes_hw *hw)
411{
412 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
413 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
414 enum fjes_dev_command_response_e ret;
415 int result;
416
417 memset(req_buf, 0, hw->hw_info.req_buf_size);
418 memset(res_buf, 0, hw->hw_info.res_buf_size);
419
420 req_buf->info.length = FJES_DEV_COMMAND_INFO_REQ_LEN;
421
422 res_buf->info.length = 0;
423 res_buf->info.code = 0;
424
425 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_INFO);
426
427 result = 0;
428
429 if (FJES_DEV_COMMAND_INFO_RES_LEN((*hw->hw_info.max_epid)) !=
430 res_buf->info.length) {
431 result = -ENOMSG;
432 } else if (ret == FJES_CMD_STATUS_NORMAL) {
433 switch (res_buf->info.code) {
434 case FJES_CMD_REQ_RES_CODE_NORMAL:
435 result = 0;
436 break;
437 default:
438 result = -EPERM;
439 break;
440 }
441 } else {
442 switch (ret) {
443 case FJES_CMD_STATUS_UNKNOWN:
444 result = -EPERM;
445 break;
446 case FJES_CMD_STATUS_TIMEOUT:
447 result = -EBUSY;
448 break;
449 case FJES_CMD_STATUS_ERROR_PARAM:
450 result = -EPERM;
451 break;
452 case FJES_CMD_STATUS_ERROR_STATUS:
453 result = -EPERM;
454 break;
455 default:
456 result = -EPERM;
457 break;
458 }
459 }
460
461 return result;
462}
463
Taku Izumi7950e6c2015-08-21 17:29:22 +0900464int fjes_hw_register_buff_addr(struct fjes_hw *hw, int dest_epid,
465 struct ep_share_mem_info *buf_pair)
466{
467 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
468 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
469 enum fjes_dev_command_response_e ret;
470 int page_count;
471 int timeout;
472 int i, idx;
473 void *addr;
474 int result;
475
476 if (test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
477 return 0;
478
479 memset(req_buf, 0, hw->hw_info.req_buf_size);
480 memset(res_buf, 0, hw->hw_info.res_buf_size);
481
482 req_buf->share_buffer.length = FJES_DEV_COMMAND_SHARE_BUFFER_REQ_LEN(
483 buf_pair->tx.size,
484 buf_pair->rx.size);
485 req_buf->share_buffer.epid = dest_epid;
486
487 idx = 0;
488 req_buf->share_buffer.buffer[idx++] = buf_pair->tx.size;
489 page_count = buf_pair->tx.size / EP_BUFFER_INFO_SIZE;
490 for (i = 0; i < page_count; i++) {
491 addr = ((u8 *)(buf_pair->tx.buffer)) +
492 (i * EP_BUFFER_INFO_SIZE);
493 req_buf->share_buffer.buffer[idx++] =
494 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
495 offset_in_page(addr));
496 }
497
498 req_buf->share_buffer.buffer[idx++] = buf_pair->rx.size;
499 page_count = buf_pair->rx.size / EP_BUFFER_INFO_SIZE;
500 for (i = 0; i < page_count; i++) {
501 addr = ((u8 *)(buf_pair->rx.buffer)) +
502 (i * EP_BUFFER_INFO_SIZE);
503 req_buf->share_buffer.buffer[idx++] =
504 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
505 offset_in_page(addr));
506 }
507
508 res_buf->share_buffer.length = 0;
509 res_buf->share_buffer.code = 0;
510
511 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_SHARE_BUFFER);
512
513 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
514 while ((ret == FJES_CMD_STATUS_NORMAL) &&
515 (res_buf->share_buffer.length ==
516 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) &&
517 (res_buf->share_buffer.code == FJES_CMD_REQ_RES_CODE_BUSY) &&
518 (timeout > 0)) {
519 msleep(200 + hw->my_epid * 20);
520 timeout -= (200 + hw->my_epid * 20);
521
522 res_buf->share_buffer.length = 0;
523 res_buf->share_buffer.code = 0;
524
525 ret = fjes_hw_issue_request_command(
526 hw, FJES_CMD_REQ_SHARE_BUFFER);
527 }
528
529 result = 0;
530
531 if (res_buf->share_buffer.length !=
532 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN)
533 result = -ENOMSG;
534 else if (ret == FJES_CMD_STATUS_NORMAL) {
535 switch (res_buf->share_buffer.code) {
536 case FJES_CMD_REQ_RES_CODE_NORMAL:
537 result = 0;
538 set_bit(dest_epid, &hw->hw_info.buffer_share_bit);
539 break;
540 case FJES_CMD_REQ_RES_CODE_BUSY:
541 result = -EBUSY;
542 break;
543 default:
544 result = -EPERM;
545 break;
546 }
547 } else {
548 switch (ret) {
549 case FJES_CMD_STATUS_UNKNOWN:
550 result = -EPERM;
551 break;
552 case FJES_CMD_STATUS_TIMEOUT:
553 result = -EBUSY;
554 break;
555 case FJES_CMD_STATUS_ERROR_PARAM:
556 case FJES_CMD_STATUS_ERROR_STATUS:
557 default:
558 result = -EPERM;
559 break;
560 }
561 }
562
563 return result;
564}
565
566int fjes_hw_unregister_buff_addr(struct fjes_hw *hw, int dest_epid)
567{
568 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
569 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
570 struct fjes_device_shared_info *share = hw->hw_info.share;
571 enum fjes_dev_command_response_e ret;
572 int timeout;
573 int result;
574
575 if (!hw->base)
576 return -EPERM;
577
578 if (!req_buf || !res_buf || !share)
579 return -EPERM;
580
581 if (!test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
582 return 0;
583
584 memset(req_buf, 0, hw->hw_info.req_buf_size);
585 memset(res_buf, 0, hw->hw_info.res_buf_size);
586
587 req_buf->unshare_buffer.length =
588 FJES_DEV_COMMAND_UNSHARE_BUFFER_REQ_LEN;
589 req_buf->unshare_buffer.epid = dest_epid;
590
591 res_buf->unshare_buffer.length = 0;
592 res_buf->unshare_buffer.code = 0;
593
594 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
595
596 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
597 while ((ret == FJES_CMD_STATUS_NORMAL) &&
598 (res_buf->unshare_buffer.length ==
599 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) &&
600 (res_buf->unshare_buffer.code ==
601 FJES_CMD_REQ_RES_CODE_BUSY) &&
602 (timeout > 0)) {
603 msleep(200 + hw->my_epid * 20);
604 timeout -= (200 + hw->my_epid * 20);
605
606 res_buf->unshare_buffer.length = 0;
607 res_buf->unshare_buffer.code = 0;
608
609 ret =
610 fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
611 }
612
613 result = 0;
614
615 if (res_buf->unshare_buffer.length !=
616 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) {
617 result = -ENOMSG;
618 } else if (ret == FJES_CMD_STATUS_NORMAL) {
619 switch (res_buf->unshare_buffer.code) {
620 case FJES_CMD_REQ_RES_CODE_NORMAL:
621 result = 0;
622 clear_bit(dest_epid, &hw->hw_info.buffer_share_bit);
623 break;
624 case FJES_CMD_REQ_RES_CODE_BUSY:
625 result = -EBUSY;
626 break;
627 default:
628 result = -EPERM;
629 break;
630 }
631 } else {
632 switch (ret) {
633 case FJES_CMD_STATUS_UNKNOWN:
634 result = -EPERM;
635 break;
636 case FJES_CMD_STATUS_TIMEOUT:
637 result = -EBUSY;
638 break;
639 case FJES_CMD_STATUS_ERROR_PARAM:
640 case FJES_CMD_STATUS_ERROR_STATUS:
641 default:
642 result = -EPERM;
643 break;
644 }
645 }
646
647 return result;
648}
649
Taku Izumie5d486d2015-08-21 17:29:23 +0900650int fjes_hw_raise_interrupt(struct fjes_hw *hw, int dest_epid,
651 enum REG_ICTL_MASK mask)
652{
653 u32 ig = mask | dest_epid;
654
655 wr32(XSCT_IG, cpu_to_le32(ig));
656
657 return 0;
658}
659
660u32 fjes_hw_capture_interrupt_status(struct fjes_hw *hw)
661{
662 u32 cur_is;
663
664 cur_is = rd32(XSCT_IS);
665
666 return cur_is;
667}
668
Taku Izumi8cdc3f62015-08-21 17:29:18 +0900669void fjes_hw_set_irqmask(struct fjes_hw *hw,
670 enum REG_ICTL_MASK intr_mask, bool mask)
671{
672 if (mask)
673 wr32(XSCT_IMS, intr_mask);
674 else
675 wr32(XSCT_IMC, intr_mask);
676}
Taku Izumie5d486d2015-08-21 17:29:23 +0900677
678bool fjes_hw_epid_is_same_zone(struct fjes_hw *hw, int epid)
679{
680 if (epid >= hw->max_epid)
681 return false;
682
683 if ((hw->ep_shm_info[epid].es_status !=
684 FJES_ZONING_STATUS_ENABLE) ||
685 (hw->ep_shm_info[hw->my_epid].zone ==
686 FJES_ZONING_ZONE_TYPE_NONE))
687 return false;
688 else
689 return (hw->ep_shm_info[epid].zone ==
690 hw->ep_shm_info[hw->my_epid].zone);
691}
692
693int fjes_hw_epid_is_shared(struct fjes_device_shared_info *share,
694 int dest_epid)
695{
696 int value = false;
697
698 if (dest_epid < share->epnum)
699 value = share->ep_status[dest_epid];
700
701 return value;
702}
703
704static bool fjes_hw_epid_is_stop_requested(struct fjes_hw *hw, int src_epid)
705{
706 return test_bit(src_epid, &hw->txrx_stop_req_bit);
707}
708
709static bool fjes_hw_epid_is_stop_process_done(struct fjes_hw *hw, int src_epid)
710{
711 return (hw->ep_shm_info[src_epid].tx.info->v1i.rx_status &
712 FJES_RX_STOP_REQ_DONE);
713}
714
715enum ep_partner_status
716fjes_hw_get_partner_ep_status(struct fjes_hw *hw, int epid)
717{
718 enum ep_partner_status status;
719
720 if (fjes_hw_epid_is_shared(hw->hw_info.share, epid)) {
721 if (fjes_hw_epid_is_stop_requested(hw, epid)) {
722 status = EP_PARTNER_WAITING;
723 } else {
724 if (fjes_hw_epid_is_stop_process_done(hw, epid))
725 status = EP_PARTNER_COMPLETE;
726 else
727 status = EP_PARTNER_SHARED;
728 }
729 } else {
730 status = EP_PARTNER_UNSHARE;
731 }
732
733 return status;
734}
735
736void fjes_hw_raise_epstop(struct fjes_hw *hw)
737{
738 enum ep_partner_status status;
739 int epidx;
740
741 for (epidx = 0; epidx < hw->max_epid; epidx++) {
742 if (epidx == hw->my_epid)
743 continue;
744
745 status = fjes_hw_get_partner_ep_status(hw, epidx);
746 switch (status) {
747 case EP_PARTNER_SHARED:
748 fjes_hw_raise_interrupt(hw, epidx,
749 REG_ICTL_MASK_TXRX_STOP_REQ);
750 break;
751 default:
752 break;
753 }
754
755 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
756 set_bit(epidx, &hw->txrx_stop_req_bit);
757
758 hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
759 FJES_RX_STOP_REQ_REQUEST;
760 }
761}
762
763int fjes_hw_wait_epstop(struct fjes_hw *hw)
764{
765 enum ep_partner_status status;
766 union ep_buffer_info *info;
767 int wait_time = 0;
768 int epidx;
769
770 while (hw->hw_info.buffer_unshare_reserve_bit &&
771 (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)) {
772 for (epidx = 0; epidx < hw->max_epid; epidx++) {
773 if (epidx == hw->my_epid)
774 continue;
775 status = fjes_hw_epid_is_shared(hw->hw_info.share,
776 epidx);
777 info = hw->ep_shm_info[epidx].rx.info;
778 if ((!status ||
779 (info->v1i.rx_status &
780 FJES_RX_STOP_REQ_DONE)) &&
781 test_bit(epidx,
782 &hw->hw_info.buffer_unshare_reserve_bit)) {
783 clear_bit(epidx,
784 &hw->hw_info.buffer_unshare_reserve_bit);
785 }
786 }
787
788 msleep(100);
789 wait_time += 100;
790 }
791
792 for (epidx = 0; epidx < hw->max_epid; epidx++) {
793 if (epidx == hw->my_epid)
794 continue;
795 if (test_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit))
796 clear_bit(epidx,
797 &hw->hw_info.buffer_unshare_reserve_bit);
798 }
799
800 return (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)
801 ? 0 : -EBUSY;
802}
Taku Izumi9acf51c2015-08-21 17:29:24 +0900803
804bool fjes_hw_check_epbuf_version(struct epbuf_handler *epbh, u32 version)
805{
806 union ep_buffer_info *info = epbh->info;
807
808 return (info->common.version == version);
809}
810
811bool fjes_hw_check_mtu(struct epbuf_handler *epbh, u32 mtu)
812{
813 union ep_buffer_info *info = epbh->info;
814
815 return (info->v1i.frame_max == FJES_MTU_TO_FRAME_SIZE(mtu));
816}
817
818bool fjes_hw_check_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
819{
820 union ep_buffer_info *info = epbh->info;
821 bool ret = false;
822 int i;
823
824 if (vlan_id == 0) {
825 ret = true;
826 } else {
827 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
828 if (vlan_id == info->v1i.vlan_id[i]) {
829 ret = true;
830 break;
831 }
832 }
833 }
834 return ret;
835}
836
Taku Izumi3e3fedd2015-08-21 17:29:31 +0900837bool fjes_hw_set_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
838{
839 union ep_buffer_info *info = epbh->info;
840 int i;
841
842 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
843 if (info->v1i.vlan_id[i] == 0) {
844 info->v1i.vlan_id[i] = vlan_id;
845 return true;
846 }
847 }
848 return false;
849}
850
851void fjes_hw_del_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
852{
853 union ep_buffer_info *info = epbh->info;
854 int i;
855
856 if (0 != vlan_id) {
857 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
858 if (vlan_id == info->v1i.vlan_id[i])
859 info->v1i.vlan_id[i] = 0;
860 }
861 }
862}
863
Taku Izumi26585932015-08-21 17:29:27 +0900864bool fjes_hw_epbuf_rx_is_empty(struct epbuf_handler *epbh)
865{
866 union ep_buffer_info *info = epbh->info;
867
868 if (info->v1i.count_max == 0)
869 return true;
870
871 return EP_RING_EMPTY(info->v1i.head, info->v1i.tail,
872 info->v1i.count_max);
873}
874
875void *fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler *epbh,
876 size_t *psize)
877{
878 union ep_buffer_info *info = epbh->info;
879 struct esmem_frame *ring_frame;
880 void *frame;
881
882 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
883 (info->v1i.head,
884 info->v1i.count_max) *
885 info->v1i.frame_max]);
886
887 *psize = (size_t)ring_frame->frame_size;
888
889 frame = ring_frame->frame_data;
890
891 return frame;
892}
893
894void fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler *epbh)
895{
896 union ep_buffer_info *info = epbh->info;
897
898 if (fjes_hw_epbuf_rx_is_empty(epbh))
899 return;
900
901 EP_RING_INDEX_INC(epbh->info->v1i.head, info->v1i.count_max);
902}
903
Taku Izumi9acf51c2015-08-21 17:29:24 +0900904int fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler *epbh,
905 void *frame, size_t size)
906{
907 union ep_buffer_info *info = epbh->info;
908 struct esmem_frame *ring_frame;
909
910 if (EP_RING_FULL(info->v1i.head, info->v1i.tail, info->v1i.count_max))
911 return -ENOBUFS;
912
913 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
914 (info->v1i.tail - 1,
915 info->v1i.count_max) *
916 info->v1i.frame_max]);
917
918 ring_frame->frame_size = size;
919 memcpy((void *)(ring_frame->frame_data), (void *)frame, size);
920
921 EP_RING_INDEX_INC(epbh->info->v1i.tail, info->v1i.count_max);
922
923 return 0;
924}
Taku Izumi785f28e2015-08-21 17:29:35 +0900925
926static void fjes_hw_update_zone_task(struct work_struct *work)
927{
928 struct fjes_hw *hw = container_of(work,
929 struct fjes_hw, update_zone_task);
930
931 struct my_s {u8 es_status; u8 zone; } *info;
932 union fjes_device_command_res *res_buf;
933 enum ep_partner_status pstatus;
934
935 struct fjes_adapter *adapter;
936 struct net_device *netdev;
937
938 ulong unshare_bit = 0;
939 ulong share_bit = 0;
940 ulong irq_bit = 0;
941
942 int epidx;
943 int ret;
944
945 adapter = (struct fjes_adapter *)hw->back;
946 netdev = adapter->netdev;
947 res_buf = hw->hw_info.res_buf;
948 info = (struct my_s *)&res_buf->info.info;
949
950 mutex_lock(&hw->hw_info.lock);
951
952 ret = fjes_hw_request_info(hw);
953 switch (ret) {
954 case -ENOMSG:
955 case -EBUSY:
956 default:
957 if (!work_pending(&adapter->force_close_task)) {
958 adapter->force_reset = true;
959 schedule_work(&adapter->force_close_task);
960 }
961 break;
962
963 case 0:
964
965 for (epidx = 0; epidx < hw->max_epid; epidx++) {
966 if (epidx == hw->my_epid) {
967 hw->ep_shm_info[epidx].es_status =
968 info[epidx].es_status;
969 hw->ep_shm_info[epidx].zone =
970 info[epidx].zone;
971 continue;
972 }
973
974 pstatus = fjes_hw_get_partner_ep_status(hw, epidx);
975 switch (pstatus) {
976 case EP_PARTNER_UNSHARE:
977 default:
978 if ((info[epidx].zone !=
979 FJES_ZONING_ZONE_TYPE_NONE) &&
980 (info[epidx].es_status ==
981 FJES_ZONING_STATUS_ENABLE) &&
982 (info[epidx].zone ==
983 info[hw->my_epid].zone))
984 set_bit(epidx, &share_bit);
985 else
986 set_bit(epidx, &unshare_bit);
987 break;
988
989 case EP_PARTNER_COMPLETE:
990 case EP_PARTNER_WAITING:
991 if ((info[epidx].zone ==
992 FJES_ZONING_ZONE_TYPE_NONE) ||
993 (info[epidx].es_status !=
994 FJES_ZONING_STATUS_ENABLE) ||
995 (info[epidx].zone !=
996 info[hw->my_epid].zone)) {
997 set_bit(epidx,
998 &adapter->unshare_watch_bitmask);
999 set_bit(epidx,
1000 &hw->hw_info.buffer_unshare_reserve_bit);
1001 }
1002 break;
1003
1004 case EP_PARTNER_SHARED:
1005 if ((info[epidx].zone ==
1006 FJES_ZONING_ZONE_TYPE_NONE) ||
1007 (info[epidx].es_status !=
1008 FJES_ZONING_STATUS_ENABLE) ||
1009 (info[epidx].zone !=
1010 info[hw->my_epid].zone))
1011 set_bit(epidx, &irq_bit);
1012 break;
1013 }
1014 }
1015
1016 hw->ep_shm_info[epidx].es_status = info[epidx].es_status;
1017 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1018
1019 break;
1020 }
1021
1022 mutex_unlock(&hw->hw_info.lock);
1023
1024 for (epidx = 0; epidx < hw->max_epid; epidx++) {
1025 if (epidx == hw->my_epid)
1026 continue;
1027
1028 if (test_bit(epidx, &share_bit)) {
1029 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1030 netdev->dev_addr, netdev->mtu);
1031
1032 mutex_lock(&hw->hw_info.lock);
1033
1034 ret = fjes_hw_register_buff_addr(
1035 hw, epidx, &hw->ep_shm_info[epidx]);
1036
1037 switch (ret) {
1038 case 0:
1039 break;
1040 case -ENOMSG:
1041 case -EBUSY:
1042 default:
1043 if (!work_pending(&adapter->force_close_task)) {
1044 adapter->force_reset = true;
1045 schedule_work(
1046 &adapter->force_close_task);
1047 }
1048 break;
1049 }
1050 mutex_unlock(&hw->hw_info.lock);
1051 }
1052
1053 if (test_bit(epidx, &unshare_bit)) {
1054 mutex_lock(&hw->hw_info.lock);
1055
1056 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1057
1058 switch (ret) {
1059 case 0:
1060 break;
1061 case -ENOMSG:
1062 case -EBUSY:
1063 default:
1064 if (!work_pending(&adapter->force_close_task)) {
1065 adapter->force_reset = true;
1066 schedule_work(
1067 &adapter->force_close_task);
1068 }
1069 break;
1070 }
1071
1072 mutex_unlock(&hw->hw_info.lock);
1073
1074 if (ret == 0)
1075 fjes_hw_setup_epbuf(
1076 &hw->ep_shm_info[epidx].tx,
1077 netdev->dev_addr, netdev->mtu);
1078 }
1079
1080 if (test_bit(epidx, &irq_bit)) {
1081 fjes_hw_raise_interrupt(hw, epidx,
1082 REG_ICTL_MASK_TXRX_STOP_REQ);
1083
1084 set_bit(epidx, &hw->txrx_stop_req_bit);
1085 hw->ep_shm_info[epidx].tx.
1086 info->v1i.rx_status |=
1087 FJES_RX_STOP_REQ_REQUEST;
1088 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1089 }
1090 }
1091
1092 if (irq_bit || adapter->unshare_watch_bitmask) {
1093 if (!work_pending(&adapter->unshare_watch_task))
1094 queue_work(adapter->control_wq,
1095 &adapter->unshare_watch_task);
1096 }
1097}
Taku Izumib5a91522015-08-21 17:29:36 +09001098
1099static void fjes_hw_epstop_task(struct work_struct *work)
1100{
1101 struct fjes_hw *hw = container_of(work, struct fjes_hw, epstop_task);
1102 struct fjes_adapter *adapter = (struct fjes_adapter *)hw->back;
1103
1104 ulong remain_bit;
1105 int epid_bit;
1106
1107 while ((remain_bit = hw->epstop_req_bit)) {
1108 for (epid_bit = 0; remain_bit; remain_bit >>= 1, epid_bit++) {
1109 if (remain_bit & 1) {
1110 hw->ep_shm_info[epid_bit].
1111 tx.info->v1i.rx_status |=
1112 FJES_RX_STOP_REQ_DONE;
1113
1114 clear_bit(epid_bit, &hw->epstop_req_bit);
1115 set_bit(epid_bit,
1116 &adapter->unshare_watch_bitmask);
1117
1118 if (!work_pending(&adapter->unshare_watch_task))
1119 queue_work(
1120 adapter->control_wq,
1121 &adapter->unshare_watch_task);
1122 }
1123 }
1124 }
1125}