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Naidu Tellapati93937662015-01-06 10:19:34 -03001/*
2 * Imagination Technologies PowerDown Controller Watchdog Timer.
3 *
4 * Copyright (c) 2014 Imagination Technologies Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 *
10 * Based on drivers/watchdog/sunxi_wdt.c Copyright (c) 2013 Carlo Caione
11 * 2012 Henrik Nordstrom
12 */
13
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/log2.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
Andrew Brestickerc631f202015-04-03 10:05:22 -070019#include <linux/reboot.h>
Naidu Tellapati93937662015-01-06 10:19:34 -030020#include <linux/slab.h>
21#include <linux/watchdog.h>
22
23/* registers */
24#define PDC_WDT_SOFT_RESET 0x00
25#define PDC_WDT_CONFIG 0x04
26 #define PDC_WDT_CONFIG_ENABLE BIT(31)
27 #define PDC_WDT_CONFIG_DELAY_MASK 0x1f
28
29#define PDC_WDT_TICKLE1 0x08
30#define PDC_WDT_TICKLE1_MAGIC 0xabcd1234
31#define PDC_WDT_TICKLE2 0x0c
32#define PDC_WDT_TICKLE2_MAGIC 0x4321dcba
33
34#define PDC_WDT_TICKLE_STATUS_MASK 0x7
35#define PDC_WDT_TICKLE_STATUS_SHIFT 0
36#define PDC_WDT_TICKLE_STATUS_HRESET 0x0 /* Hard reset */
37#define PDC_WDT_TICKLE_STATUS_TIMEOUT 0x1 /* Timeout */
38#define PDC_WDT_TICKLE_STATUS_TICKLE 0x2 /* Tickled incorrectly */
39#define PDC_WDT_TICKLE_STATUS_SRESET 0x3 /* Soft reset */
40#define PDC_WDT_TICKLE_STATUS_USER 0x4 /* User reset */
41
42/* Timeout values are in seconds */
43#define PDC_WDT_MIN_TIMEOUT 1
44#define PDC_WDT_DEF_TIMEOUT 64
45
Andrew Bresticker7094e1d2015-04-03 10:05:20 -070046static int heartbeat;
Naidu Tellapati93937662015-01-06 10:19:34 -030047module_param(heartbeat, int, 0);
James Hoganae6ee2f2015-02-20 23:45:45 +000048MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds "
49 "(default=" __MODULE_STRING(PDC_WDT_DEF_TIMEOUT) ")");
Naidu Tellapati93937662015-01-06 10:19:34 -030050
51static bool nowayout = WATCHDOG_NOWAYOUT;
52module_param(nowayout, bool, 0);
53MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
54 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
55
56struct pdc_wdt_dev {
57 struct watchdog_device wdt_dev;
58 struct clk *wdt_clk;
59 struct clk *sys_clk;
60 void __iomem *base;
Andrew Brestickerc631f202015-04-03 10:05:22 -070061 struct notifier_block restart_handler;
Naidu Tellapati93937662015-01-06 10:19:34 -030062};
63
64static int pdc_wdt_keepalive(struct watchdog_device *wdt_dev)
65{
66 struct pdc_wdt_dev *wdt = watchdog_get_drvdata(wdt_dev);
67
68 writel(PDC_WDT_TICKLE1_MAGIC, wdt->base + PDC_WDT_TICKLE1);
69 writel(PDC_WDT_TICKLE2_MAGIC, wdt->base + PDC_WDT_TICKLE2);
70
71 return 0;
72}
73
74static int pdc_wdt_stop(struct watchdog_device *wdt_dev)
75{
76 unsigned int val;
77 struct pdc_wdt_dev *wdt = watchdog_get_drvdata(wdt_dev);
78
79 val = readl(wdt->base + PDC_WDT_CONFIG);
80 val &= ~PDC_WDT_CONFIG_ENABLE;
81 writel(val, wdt->base + PDC_WDT_CONFIG);
82
83 /* Must tickle to finish the stop */
84 pdc_wdt_keepalive(wdt_dev);
85
86 return 0;
87}
88
Andrew Bresticker8aa453a2015-04-03 10:05:21 -070089static void __pdc_wdt_set_timeout(struct pdc_wdt_dev *wdt)
90{
91 unsigned long clk_rate = clk_get_rate(wdt->wdt_clk);
92 unsigned int val;
93
94 val = readl(wdt->base + PDC_WDT_CONFIG) & ~PDC_WDT_CONFIG_DELAY_MASK;
95 val |= order_base_2(wdt->wdt_dev.timeout * clk_rate) - 1;
96 writel(val, wdt->base + PDC_WDT_CONFIG);
97}
98
Naidu Tellapati93937662015-01-06 10:19:34 -030099static int pdc_wdt_set_timeout(struct watchdog_device *wdt_dev,
100 unsigned int new_timeout)
101{
Naidu Tellapati93937662015-01-06 10:19:34 -0300102 struct pdc_wdt_dev *wdt = watchdog_get_drvdata(wdt_dev);
Naidu Tellapati93937662015-01-06 10:19:34 -0300103
104 wdt->wdt_dev.timeout = new_timeout;
105
Andrew Bresticker8aa453a2015-04-03 10:05:21 -0700106 __pdc_wdt_set_timeout(wdt);
Naidu Tellapati93937662015-01-06 10:19:34 -0300107
108 return 0;
109}
110
111/* Start the watchdog timer (delay should already be set) */
112static int pdc_wdt_start(struct watchdog_device *wdt_dev)
113{
114 unsigned int val;
115 struct pdc_wdt_dev *wdt = watchdog_get_drvdata(wdt_dev);
116
Andrew Bresticker8aa453a2015-04-03 10:05:21 -0700117 __pdc_wdt_set_timeout(wdt);
118
Naidu Tellapati93937662015-01-06 10:19:34 -0300119 val = readl(wdt->base + PDC_WDT_CONFIG);
120 val |= PDC_WDT_CONFIG_ENABLE;
121 writel(val, wdt->base + PDC_WDT_CONFIG);
122
123 return 0;
124}
125
126static struct watchdog_info pdc_wdt_info = {
127 .identity = "IMG PDC Watchdog",
128 .options = WDIOF_SETTIMEOUT |
129 WDIOF_KEEPALIVEPING |
130 WDIOF_MAGICCLOSE,
131};
132
133static const struct watchdog_ops pdc_wdt_ops = {
134 .owner = THIS_MODULE,
135 .start = pdc_wdt_start,
136 .stop = pdc_wdt_stop,
137 .ping = pdc_wdt_keepalive,
138 .set_timeout = pdc_wdt_set_timeout,
139};
140
Andrew Brestickerc631f202015-04-03 10:05:22 -0700141static int pdc_wdt_restart(struct notifier_block *this, unsigned long mode,
142 void *cmd)
143{
144 struct pdc_wdt_dev *wdt = container_of(this, struct pdc_wdt_dev,
145 restart_handler);
146
147 /* Assert SOFT_RESET */
148 writel(0x1, wdt->base + PDC_WDT_SOFT_RESET);
149
150 return NOTIFY_OK;
151}
152
Naidu Tellapati93937662015-01-06 10:19:34 -0300153static int pdc_wdt_probe(struct platform_device *pdev)
154{
155 int ret, val;
156 unsigned long clk_rate;
157 struct resource *res;
158 struct pdc_wdt_dev *pdc_wdt;
159
160 pdc_wdt = devm_kzalloc(&pdev->dev, sizeof(*pdc_wdt), GFP_KERNEL);
161 if (!pdc_wdt)
162 return -ENOMEM;
163
164 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
165 pdc_wdt->base = devm_ioremap_resource(&pdev->dev, res);
166 if (IS_ERR(pdc_wdt->base))
167 return PTR_ERR(pdc_wdt->base);
168
169 pdc_wdt->sys_clk = devm_clk_get(&pdev->dev, "sys");
170 if (IS_ERR(pdc_wdt->sys_clk)) {
171 dev_err(&pdev->dev, "failed to get the sys clock\n");
172 return PTR_ERR(pdc_wdt->sys_clk);
173 }
174
175 pdc_wdt->wdt_clk = devm_clk_get(&pdev->dev, "wdt");
176 if (IS_ERR(pdc_wdt->wdt_clk)) {
177 dev_err(&pdev->dev, "failed to get the wdt clock\n");
178 return PTR_ERR(pdc_wdt->wdt_clk);
179 }
180
181 ret = clk_prepare_enable(pdc_wdt->sys_clk);
182 if (ret) {
183 dev_err(&pdev->dev, "could not prepare or enable sys clock\n");
184 return ret;
185 }
186
187 ret = clk_prepare_enable(pdc_wdt->wdt_clk);
188 if (ret) {
189 dev_err(&pdev->dev, "could not prepare or enable wdt clock\n");
190 goto disable_sys_clk;
191 }
192
193 /* We use the clock rate to calculate the max timeout */
194 clk_rate = clk_get_rate(pdc_wdt->wdt_clk);
195 if (clk_rate == 0) {
196 dev_err(&pdev->dev, "failed to get clock rate\n");
197 ret = -EINVAL;
198 goto disable_wdt_clk;
199 }
200
201 if (order_base_2(clk_rate) > PDC_WDT_CONFIG_DELAY_MASK + 1) {
202 dev_err(&pdev->dev, "invalid clock rate\n");
203 ret = -EINVAL;
204 goto disable_wdt_clk;
205 }
206
207 if (order_base_2(clk_rate) == 0)
208 pdc_wdt->wdt_dev.min_timeout = PDC_WDT_MIN_TIMEOUT + 1;
209 else
210 pdc_wdt->wdt_dev.min_timeout = PDC_WDT_MIN_TIMEOUT;
211
212 pdc_wdt->wdt_dev.info = &pdc_wdt_info;
213 pdc_wdt->wdt_dev.ops = &pdc_wdt_ops;
214 pdc_wdt->wdt_dev.max_timeout = 1 << PDC_WDT_CONFIG_DELAY_MASK;
Andrew Bresticker7094e1d2015-04-03 10:05:20 -0700215 pdc_wdt->wdt_dev.timeout = PDC_WDT_DEF_TIMEOUT;
Naidu Tellapati93937662015-01-06 10:19:34 -0300216 pdc_wdt->wdt_dev.parent = &pdev->dev;
James Hogana629c082015-02-20 23:45:44 +0000217 watchdog_set_drvdata(&pdc_wdt->wdt_dev, pdc_wdt);
Naidu Tellapati93937662015-01-06 10:19:34 -0300218
Andrew Bresticker7094e1d2015-04-03 10:05:20 -0700219 watchdog_init_timeout(&pdc_wdt->wdt_dev, heartbeat, &pdev->dev);
Naidu Tellapati93937662015-01-06 10:19:34 -0300220
221 pdc_wdt_stop(&pdc_wdt->wdt_dev);
222
223 /* Find what caused the last reset */
224 val = readl(pdc_wdt->base + PDC_WDT_TICKLE1);
225 val = (val & PDC_WDT_TICKLE_STATUS_MASK) >> PDC_WDT_TICKLE_STATUS_SHIFT;
226 switch (val) {
227 case PDC_WDT_TICKLE_STATUS_TICKLE:
228 case PDC_WDT_TICKLE_STATUS_TIMEOUT:
229 pdc_wdt->wdt_dev.bootstatus |= WDIOF_CARDRESET;
230 dev_info(&pdev->dev,
231 "watchdog module last reset due to timeout\n");
232 break;
233 case PDC_WDT_TICKLE_STATUS_HRESET:
234 dev_info(&pdev->dev,
235 "watchdog module last reset due to hard reset\n");
236 break;
237 case PDC_WDT_TICKLE_STATUS_SRESET:
238 dev_info(&pdev->dev,
239 "watchdog module last reset due to soft reset\n");
240 break;
241 case PDC_WDT_TICKLE_STATUS_USER:
242 dev_info(&pdev->dev,
243 "watchdog module last reset due to user reset\n");
244 break;
245 default:
246 dev_info(&pdev->dev,
247 "contains an illegal status code (%08x)\n", val);
248 break;
249 }
250
251 watchdog_set_nowayout(&pdc_wdt->wdt_dev, nowayout);
252
253 platform_set_drvdata(pdev, pdc_wdt);
Naidu Tellapati93937662015-01-06 10:19:34 -0300254
255 ret = watchdog_register_device(&pdc_wdt->wdt_dev);
256 if (ret)
257 goto disable_wdt_clk;
258
Andrew Brestickerc631f202015-04-03 10:05:22 -0700259 pdc_wdt->restart_handler.notifier_call = pdc_wdt_restart;
260 pdc_wdt->restart_handler.priority = 128;
261 ret = register_restart_handler(&pdc_wdt->restart_handler);
262 if (ret)
263 dev_warn(&pdev->dev, "failed to register restart handler: %d\n",
264 ret);
265
Naidu Tellapati93937662015-01-06 10:19:34 -0300266 return 0;
267
268disable_wdt_clk:
269 clk_disable_unprepare(pdc_wdt->wdt_clk);
270disable_sys_clk:
271 clk_disable_unprepare(pdc_wdt->sys_clk);
272 return ret;
273}
274
275static void pdc_wdt_shutdown(struct platform_device *pdev)
276{
277 struct pdc_wdt_dev *pdc_wdt = platform_get_drvdata(pdev);
278
279 pdc_wdt_stop(&pdc_wdt->wdt_dev);
280}
281
282static int pdc_wdt_remove(struct platform_device *pdev)
283{
284 struct pdc_wdt_dev *pdc_wdt = platform_get_drvdata(pdev);
285
286 pdc_wdt_stop(&pdc_wdt->wdt_dev);
287 watchdog_unregister_device(&pdc_wdt->wdt_dev);
288 clk_disable_unprepare(pdc_wdt->wdt_clk);
289 clk_disable_unprepare(pdc_wdt->sys_clk);
290
291 return 0;
292}
293
294static const struct of_device_id pdc_wdt_match[] = {
295 { .compatible = "img,pdc-wdt" },
296 {}
297};
298MODULE_DEVICE_TABLE(of, pdc_wdt_match);
299
300static struct platform_driver pdc_wdt_driver = {
301 .driver = {
302 .name = "imgpdc-wdt",
303 .of_match_table = pdc_wdt_match,
304 },
305 .probe = pdc_wdt_probe,
306 .remove = pdc_wdt_remove,
307 .shutdown = pdc_wdt_shutdown,
308};
309module_platform_driver(pdc_wdt_driver);
310
311MODULE_AUTHOR("Jude Abraham <Jude.Abraham@imgtec.com>");
312MODULE_AUTHOR("Naidu Tellapati <Naidu.Tellapati@imgtec.com>");
313MODULE_DESCRIPTION("Imagination Technologies PDC Watchdog Timer Driver");
314MODULE_LICENSE("GPL v2");