Kalle Valo | 2f01a1f | 2009-04-29 23:33:31 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of wl12xx |
| 3 | * |
| 4 | * Copyright (C) 2008 Nokia Corporation |
| 5 | * |
| 6 | * Contact: Kalle Valo <kalle.valo@nokia.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * version 2 as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but |
| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 20 | * 02110-1301 USA |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/crc7.h> |
| 26 | #include <linux/spi/spi.h> |
| 27 | |
| 28 | #include "wl12xx.h" |
| 29 | #include "wl12xx_80211.h" |
| 30 | #include "reg.h" |
| 31 | #include "spi.h" |
| 32 | #include "ps.h" |
| 33 | |
| 34 | static int wl12xx_translate_reg_addr(struct wl12xx *wl, int addr) |
| 35 | { |
| 36 | /* If the address is lower than REGISTERS_BASE, it means that this is |
| 37 | * a chip-specific register address, so look it up in the registers |
| 38 | * table */ |
| 39 | if (addr < REGISTERS_BASE) { |
| 40 | /* Make sure we don't go over the table */ |
| 41 | if (addr >= ACX_REG_TABLE_LEN) { |
| 42 | wl12xx_error("address out of range (%d)", addr); |
| 43 | return -EINVAL; |
| 44 | } |
| 45 | addr = wl->chip.acx_reg_table[addr]; |
| 46 | } |
| 47 | |
| 48 | return addr - wl->physical_reg_addr + wl->virtual_reg_addr; |
| 49 | } |
| 50 | |
| 51 | static int wl12xx_translate_mem_addr(struct wl12xx *wl, int addr) |
| 52 | { |
| 53 | return addr - wl->physical_mem_addr + wl->virtual_mem_addr; |
| 54 | } |
| 55 | |
| 56 | |
| 57 | void wl12xx_spi_reset(struct wl12xx *wl) |
| 58 | { |
| 59 | u8 *cmd; |
| 60 | struct spi_transfer t; |
| 61 | struct spi_message m; |
| 62 | |
| 63 | cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL); |
| 64 | if (!cmd) { |
| 65 | wl12xx_error("could not allocate cmd for spi reset"); |
| 66 | return; |
| 67 | } |
| 68 | |
| 69 | memset(&t, 0, sizeof(t)); |
| 70 | spi_message_init(&m); |
| 71 | |
| 72 | memset(cmd, 0xff, WSPI_INIT_CMD_LEN); |
| 73 | |
| 74 | t.tx_buf = cmd; |
| 75 | t.len = WSPI_INIT_CMD_LEN; |
| 76 | spi_message_add_tail(&t, &m); |
| 77 | |
| 78 | spi_sync(wl->spi, &m); |
| 79 | |
| 80 | wl12xx_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN); |
| 81 | } |
| 82 | |
| 83 | void wl12xx_spi_init(struct wl12xx *wl) |
| 84 | { |
| 85 | u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd; |
| 86 | struct spi_transfer t; |
| 87 | struct spi_message m; |
| 88 | |
| 89 | cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL); |
| 90 | if (!cmd) { |
| 91 | wl12xx_error("could not allocate cmd for spi init"); |
| 92 | return; |
| 93 | } |
| 94 | |
| 95 | memset(crc, 0, sizeof(crc)); |
| 96 | memset(&t, 0, sizeof(t)); |
| 97 | spi_message_init(&m); |
| 98 | |
| 99 | /* |
| 100 | * Set WSPI_INIT_COMMAND |
| 101 | * the data is being send from the MSB to LSB |
| 102 | */ |
| 103 | cmd[2] = 0xff; |
| 104 | cmd[3] = 0xff; |
| 105 | cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX; |
| 106 | cmd[0] = 0; |
| 107 | cmd[7] = 0; |
| 108 | cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3; |
| 109 | cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN; |
| 110 | |
| 111 | if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0) |
| 112 | cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY; |
| 113 | else |
| 114 | cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY; |
| 115 | |
| 116 | cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS |
| 117 | | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS; |
| 118 | |
| 119 | crc[0] = cmd[1]; |
| 120 | crc[1] = cmd[0]; |
| 121 | crc[2] = cmd[7]; |
| 122 | crc[3] = cmd[6]; |
| 123 | crc[4] = cmd[5]; |
| 124 | |
| 125 | cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1; |
| 126 | cmd[4] |= WSPI_INIT_CMD_END; |
| 127 | |
| 128 | t.tx_buf = cmd; |
| 129 | t.len = WSPI_INIT_CMD_LEN; |
| 130 | spi_message_add_tail(&t, &m); |
| 131 | |
| 132 | spi_sync(wl->spi, &m); |
| 133 | |
| 134 | wl12xx_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN); |
| 135 | } |
| 136 | |
| 137 | /* Set the SPI partitions to access the chip addresses |
| 138 | * |
| 139 | * There are two VIRTUAL (SPI) partitions (the memory partition and the |
| 140 | * registers partition), which are mapped to two different areas of the |
| 141 | * PHYSICAL (hardware) memory. This function also makes other checks to |
| 142 | * ensure that the partitions are not overlapping. In the diagram below, the |
| 143 | * memory partition comes before the register partition, but the opposite is |
| 144 | * also supported. |
| 145 | * |
| 146 | * PHYSICAL address |
| 147 | * space |
| 148 | * |
| 149 | * | | |
| 150 | * ...+----+--> mem_start |
| 151 | * VIRTUAL address ... | | |
| 152 | * space ... | | [PART_0] |
| 153 | * ... | | |
| 154 | * 0x00000000 <--+----+... ...+----+--> mem_start + mem_size |
| 155 | * | | ... | | |
| 156 | * |MEM | ... | | |
| 157 | * | | ... | | |
| 158 | * part_size <--+----+... | | {unused area) |
| 159 | * | | ... | | |
| 160 | * |REG | ... | | |
| 161 | * part_size | | ... | | |
| 162 | * + <--+----+... ...+----+--> reg_start |
| 163 | * reg_size ... | | |
| 164 | * ... | | [PART_1] |
| 165 | * ... | | |
| 166 | * ...+----+--> reg_start + reg_size |
| 167 | * | | |
| 168 | * |
| 169 | */ |
| 170 | void wl12xx_set_partition(struct wl12xx *wl, |
| 171 | u32 mem_start, u32 mem_size, |
| 172 | u32 reg_start, u32 reg_size) |
| 173 | { |
| 174 | u8 tx_buf[sizeof(u32) + 2 * sizeof(struct wl12xx_partition)]; |
| 175 | struct wl12xx_partition *partition; |
| 176 | struct spi_transfer t; |
| 177 | struct spi_message m; |
| 178 | u32 *cmd; |
| 179 | size_t len; |
| 180 | int addr; |
| 181 | |
| 182 | spi_message_init(&m); |
| 183 | memset(&t, 0, sizeof(t)); |
| 184 | memset(tx_buf, 0, sizeof(tx_buf)); |
| 185 | |
| 186 | cmd = (u32 *) tx_buf; |
| 187 | partition = (struct wl12xx_partition *) (tx_buf + sizeof(u32)); |
| 188 | addr = HW_ACCESS_PART0_SIZE_ADDR; |
| 189 | len = 2 * sizeof(struct wl12xx_partition); |
| 190 | |
| 191 | *cmd |= WSPI_CMD_WRITE; |
| 192 | *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH; |
| 193 | *cmd |= addr & WSPI_CMD_BYTE_ADDR; |
| 194 | |
| 195 | wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", |
| 196 | mem_start, mem_size); |
| 197 | wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X", |
| 198 | reg_start, reg_size); |
| 199 | |
| 200 | /* Make sure that the two partitions together don't exceed the |
| 201 | * address range */ |
| 202 | if ((mem_size + reg_size) > HW_ACCESS_MEMORY_MAX_RANGE) { |
| 203 | wl12xx_debug(DEBUG_SPI, "Total size exceeds maximum virtual" |
| 204 | " address range. Truncating partition[0]."); |
| 205 | mem_size = HW_ACCESS_MEMORY_MAX_RANGE - reg_size; |
| 206 | wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", |
| 207 | mem_start, mem_size); |
| 208 | wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X", |
| 209 | reg_start, reg_size); |
| 210 | } |
| 211 | |
| 212 | if ((mem_start < reg_start) && |
| 213 | ((mem_start + mem_size) > reg_start)) { |
| 214 | /* Guarantee that the memory partition doesn't overlap the |
| 215 | * registers partition */ |
| 216 | wl12xx_debug(DEBUG_SPI, "End of partition[0] is " |
| 217 | "overlapping partition[1]. Adjusted."); |
| 218 | mem_size = reg_start - mem_start; |
| 219 | wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", |
| 220 | mem_start, mem_size); |
| 221 | wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X", |
| 222 | reg_start, reg_size); |
| 223 | } else if ((reg_start < mem_start) && |
| 224 | ((reg_start + reg_size) > mem_start)) { |
| 225 | /* Guarantee that the register partition doesn't overlap the |
| 226 | * memory partition */ |
| 227 | wl12xx_debug(DEBUG_SPI, "End of partition[1] is" |
| 228 | " overlapping partition[0]. Adjusted."); |
| 229 | reg_size = mem_start - reg_start; |
| 230 | wl12xx_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", |
| 231 | mem_start, mem_size); |
| 232 | wl12xx_debug(DEBUG_SPI, "reg_start %08X reg_size %08X", |
| 233 | reg_start, reg_size); |
| 234 | } |
| 235 | |
| 236 | partition[0].start = mem_start; |
| 237 | partition[0].size = mem_size; |
| 238 | partition[1].start = reg_start; |
| 239 | partition[1].size = reg_size; |
| 240 | |
| 241 | wl->physical_mem_addr = mem_start; |
| 242 | wl->physical_reg_addr = reg_start; |
| 243 | |
| 244 | wl->virtual_mem_addr = 0; |
| 245 | wl->virtual_reg_addr = mem_size; |
| 246 | |
| 247 | t.tx_buf = tx_buf; |
| 248 | t.len = sizeof(tx_buf); |
| 249 | spi_message_add_tail(&t, &m); |
| 250 | |
| 251 | spi_sync(wl->spi, &m); |
| 252 | } |
| 253 | |
| 254 | void wl12xx_spi_read(struct wl12xx *wl, int addr, void *buf, |
| 255 | size_t len) |
| 256 | { |
| 257 | struct spi_transfer t[3]; |
| 258 | struct spi_message m; |
| 259 | char busy_buf[TNETWIF_READ_OFFSET_BYTES]; |
| 260 | u32 cmd; |
| 261 | |
| 262 | cmd = 0; |
| 263 | cmd |= WSPI_CMD_READ; |
| 264 | cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH; |
| 265 | cmd |= addr & WSPI_CMD_BYTE_ADDR; |
| 266 | |
| 267 | spi_message_init(&m); |
| 268 | memset(t, 0, sizeof(t)); |
| 269 | |
| 270 | t[0].tx_buf = &cmd; |
| 271 | t[0].len = 4; |
| 272 | spi_message_add_tail(&t[0], &m); |
| 273 | |
| 274 | /* Busy and non busy words read */ |
| 275 | t[1].rx_buf = busy_buf; |
| 276 | t[1].len = TNETWIF_READ_OFFSET_BYTES; |
| 277 | spi_message_add_tail(&t[1], &m); |
| 278 | |
| 279 | t[2].rx_buf = buf; |
| 280 | t[2].len = len; |
| 281 | spi_message_add_tail(&t[2], &m); |
| 282 | |
| 283 | spi_sync(wl->spi, &m); |
| 284 | |
| 285 | /* FIXME: check busy words */ |
| 286 | |
| 287 | wl12xx_dump(DEBUG_SPI, "spi_read cmd -> ", &cmd, sizeof(cmd)); |
| 288 | wl12xx_dump(DEBUG_SPI, "spi_read buf <- ", buf, len); |
| 289 | } |
| 290 | |
| 291 | void wl12xx_spi_write(struct wl12xx *wl, int addr, void *buf, |
| 292 | size_t len) |
| 293 | { |
| 294 | struct spi_transfer t[2]; |
| 295 | struct spi_message m; |
| 296 | u32 cmd; |
| 297 | |
| 298 | cmd = 0; |
| 299 | cmd |= WSPI_CMD_WRITE; |
| 300 | cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH; |
| 301 | cmd |= addr & WSPI_CMD_BYTE_ADDR; |
| 302 | |
| 303 | spi_message_init(&m); |
| 304 | memset(t, 0, sizeof(t)); |
| 305 | |
| 306 | t[0].tx_buf = &cmd; |
| 307 | t[0].len = sizeof(cmd); |
| 308 | spi_message_add_tail(&t[0], &m); |
| 309 | |
| 310 | t[1].tx_buf = buf; |
| 311 | t[1].len = len; |
| 312 | spi_message_add_tail(&t[1], &m); |
| 313 | |
| 314 | spi_sync(wl->spi, &m); |
| 315 | |
| 316 | wl12xx_dump(DEBUG_SPI, "spi_write cmd -> ", &cmd, sizeof(cmd)); |
| 317 | wl12xx_dump(DEBUG_SPI, "spi_write buf -> ", buf, len); |
| 318 | } |
| 319 | |
| 320 | void wl12xx_spi_mem_read(struct wl12xx *wl, int addr, void *buf, |
| 321 | size_t len) |
| 322 | { |
| 323 | int physical; |
| 324 | |
| 325 | physical = wl12xx_translate_mem_addr(wl, addr); |
| 326 | |
| 327 | wl12xx_spi_read(wl, physical, buf, len); |
| 328 | } |
| 329 | |
| 330 | void wl12xx_spi_mem_write(struct wl12xx *wl, int addr, void *buf, |
| 331 | size_t len) |
| 332 | { |
| 333 | int physical; |
| 334 | |
| 335 | physical = wl12xx_translate_mem_addr(wl, addr); |
| 336 | |
| 337 | wl12xx_spi_write(wl, physical, buf, len); |
| 338 | } |
| 339 | |
| 340 | u32 wl12xx_mem_read32(struct wl12xx *wl, int addr) |
| 341 | { |
| 342 | return wl12xx_read32(wl, wl12xx_translate_mem_addr(wl, addr)); |
| 343 | } |
| 344 | |
| 345 | void wl12xx_mem_write32(struct wl12xx *wl, int addr, u32 val) |
| 346 | { |
| 347 | wl12xx_write32(wl, wl12xx_translate_mem_addr(wl, addr), val); |
| 348 | } |
| 349 | |
| 350 | u32 wl12xx_reg_read32(struct wl12xx *wl, int addr) |
| 351 | { |
| 352 | return wl12xx_read32(wl, wl12xx_translate_reg_addr(wl, addr)); |
| 353 | } |
| 354 | |
| 355 | void wl12xx_reg_write32(struct wl12xx *wl, int addr, u32 val) |
| 356 | { |
| 357 | wl12xx_write32(wl, wl12xx_translate_reg_addr(wl, addr), val); |
| 358 | } |