| Lennert Buytenhek | c680b77 | 2006-09-18 23:24:52 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-iop33x/iq80332.c |
| 3 | * |
| 4 | * Board support code for the Intel IQ80332 platform. |
| 5 | * |
| 6 | * Author: Dave Jiang <dave.jiang@intel.com> |
| 7 | * Copyright (C) 2004 Intel Corp. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/mm.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/pci.h> |
| 19 | #include <linux/string.h> |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/serial_core.h> |
| 22 | #include <linux/serial_8250.h> |
| 23 | #include <linux/mtd/physmap.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <asm/hardware.h> |
| 26 | #include <asm/io.h> |
| 27 | #include <asm/irq.h> |
| 28 | #include <asm/mach/arch.h> |
| 29 | #include <asm/mach/map.h> |
| 30 | #include <asm/mach/pci.h> |
| 31 | #include <asm/mach/time.h> |
| 32 | #include <asm/mach-types.h> |
| 33 | #include <asm/page.h> |
| 34 | #include <asm/pgtable.h> |
| 35 | |
| 36 | /* |
| 37 | * IQ80332 timer tick configuration. |
| 38 | */ |
| 39 | static void __init iq80332_timer_init(void) |
| 40 | { |
| 41 | /* D-Step parts and the iop333 run at a higher internal bus frequency */ |
| 42 | if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374) |
| 43 | iop3xx_init_time(333000000); |
| 44 | else |
| 45 | iop3xx_init_time(266000000); |
| 46 | } |
| 47 | |
| 48 | static struct sys_timer iq80332_timer = { |
| 49 | .init = iq80332_timer_init, |
| 50 | .offset = iop3xx_gettimeoffset, |
| 51 | }; |
| 52 | |
| 53 | |
| 54 | /* |
| 55 | * IQ80332 PCI. |
| 56 | */ |
| 57 | static inline int __init |
| 58 | iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 59 | { |
| 60 | int irq; |
| 61 | |
| 62 | if (slot == 4 && pin == 1) { |
| 63 | /* PCI-X Slot INTA */ |
| 64 | irq = IRQ_IOP331_XINT0; |
| 65 | } else if (slot == 4 && pin == 2) { |
| 66 | /* PCI-X Slot INTB */ |
| 67 | irq = IRQ_IOP331_XINT1; |
| 68 | } else if (slot == 4 && pin == 3) { |
| 69 | /* PCI-X Slot INTC */ |
| 70 | irq = IRQ_IOP331_XINT2; |
| 71 | } else if (slot == 4 && pin == 4) { |
| 72 | /* PCI-X Slot INTD */ |
| 73 | irq = IRQ_IOP331_XINT3; |
| 74 | } else if (slot == 6) { |
| 75 | /* GigE */ |
| 76 | irq = IRQ_IOP331_XINT2; |
| 77 | } else { |
| 78 | printk(KERN_ERR "iq80332_pci_map_irq() called for unknown " |
| 79 | "device PCI:%d:%d:%d\n", dev->bus->number, |
| 80 | PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); |
| 81 | irq = -1; |
| 82 | } |
| 83 | |
| 84 | return irq; |
| 85 | } |
| 86 | |
| 87 | static struct hw_pci iq80332_pci __initdata = { |
| 88 | .swizzle = pci_std_swizzle, |
| 89 | .nr_controllers = 1, |
| 90 | .setup = iop3xx_pci_setup, |
| 91 | .preinit = iop3xx_pci_preinit, |
| 92 | .scan = iop3xx_pci_scan_bus, |
| 93 | .map_irq = iq80332_pci_map_irq, |
| 94 | }; |
| 95 | |
| 96 | static int __init iq80332_pci_init(void) |
| 97 | { |
| 98 | if (machine_is_iq80332()) |
| 99 | pci_common_init(&iq80332_pci); |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | subsys_initcall(iq80332_pci_init); |
| 105 | |
| 106 | |
| 107 | /* |
| 108 | * IQ80332 machine initialisation. |
| 109 | */ |
| 110 | static struct physmap_flash_data iq80332_flash_data = { |
| 111 | .width = 1, |
| 112 | }; |
| 113 | |
| 114 | static struct resource iq80332_flash_resource = { |
| 115 | .start = 0xc0000000, |
| 116 | .end = 0xc07fffff, |
| 117 | .flags = IORESOURCE_MEM, |
| 118 | }; |
| 119 | |
| 120 | static struct platform_device iq80332_flash_device = { |
| 121 | .name = "physmap-flash", |
| 122 | .id = 0, |
| 123 | .dev = { |
| 124 | .platform_data = &iq80332_flash_data, |
| 125 | }, |
| 126 | .num_resources = 1, |
| 127 | .resource = &iq80332_flash_resource, |
| 128 | }; |
| 129 | |
| 130 | static void __init iq80332_init_machine(void) |
| 131 | { |
| 132 | platform_device_register(&iop3xx_i2c0_device); |
| 133 | platform_device_register(&iop3xx_i2c1_device); |
| 134 | platform_device_register(&iop33x_uart0_device); |
| 135 | platform_device_register(&iop33x_uart1_device); |
| 136 | platform_device_register(&iq80332_flash_device); |
| 137 | } |
| 138 | |
| 139 | MACHINE_START(IQ80332, "Intel IQ80332") |
| 140 | /* Maintainer: Intel Corp. */ |
| 141 | .phys_io = 0xfefff000, |
| 142 | .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, |
| 143 | .boot_params = 0x00000100, |
| 144 | .map_io = iop3xx_map_io, |
| 145 | .init_irq = iop331_init_irq, |
| 146 | .timer = &iq80332_timer, |
| 147 | .init_machine = iq80332_init_machine, |
| 148 | MACHINE_END |