Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010 Broadcom Corporation |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY |
| 11 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION |
| 13 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN |
| 14 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #include <linux/pci_ids.h> |
| 18 | #include <linux/if_ether.h> |
| 19 | #include <net/mac80211.h> |
| 20 | #include <brcm_hw_ids.h> |
| 21 | #include <aiutils.h> |
| 22 | #include <chipcommon.h> |
| 23 | #include "rate.h" |
| 24 | #include "scb.h" |
| 25 | #include "phy/phy_hal.h" |
| 26 | #include "channel.h" |
| 27 | #include "antsel.h" |
| 28 | #include "stf.h" |
| 29 | #include "ampdu.h" |
| 30 | #include "mac80211_if.h" |
| 31 | #include "ucode_loader.h" |
| 32 | #include "main.h" |
Alwin Beukers | 2303821 | 2011-10-18 14:02:58 +0200 | [diff] [blame] | 33 | #include "soc.h" |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 34 | |
| 35 | /* |
| 36 | * Indication for txflowcontrol that all priority bits in |
| 37 | * TXQ_STOP_FOR_PRIOFC_MASK are to be considered. |
| 38 | */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 39 | #define ALLPRIO -1 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 40 | |
| 41 | /* watchdog timer, in unit of ms */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 42 | #define TIMER_INTERVAL_WATCHDOG 1000 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 43 | /* radio monitor timer, in unit of ms */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 44 | #define TIMER_INTERVAL_RADIOCHK 800 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 45 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 46 | /* beacon interval, in unit of 1024TU */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 47 | #define BEACON_INTERVAL_DEFAULT 100 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 48 | |
| 49 | /* n-mode support capability */ |
| 50 | /* 2x2 includes both 1x1 & 2x2 devices |
| 51 | * reserved #define 2 for future when we want to separate 1x1 & 2x2 and |
| 52 | * control it independently |
| 53 | */ |
| 54 | #define WL_11N_2x2 1 |
| 55 | #define WL_11N_3x3 3 |
| 56 | #define WL_11N_4x4 4 |
| 57 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 58 | #define EDCF_ACI_MASK 0x60 |
| 59 | #define EDCF_ACI_SHIFT 5 |
| 60 | #define EDCF_ECWMIN_MASK 0x0f |
| 61 | #define EDCF_ECWMAX_SHIFT 4 |
| 62 | #define EDCF_AIFSN_MASK 0x0f |
| 63 | #define EDCF_AIFSN_MAX 15 |
| 64 | #define EDCF_ECWMAX_MASK 0xf0 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 65 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 66 | #define EDCF_AC_BE_TXOP_STA 0x0000 |
| 67 | #define EDCF_AC_BK_TXOP_STA 0x0000 |
| 68 | #define EDCF_AC_VO_ACI_STA 0x62 |
| 69 | #define EDCF_AC_VO_ECW_STA 0x32 |
| 70 | #define EDCF_AC_VI_ACI_STA 0x42 |
| 71 | #define EDCF_AC_VI_ECW_STA 0x43 |
| 72 | #define EDCF_AC_BK_ECW_STA 0xA4 |
| 73 | #define EDCF_AC_VI_TXOP_STA 0x005e |
| 74 | #define EDCF_AC_VO_TXOP_STA 0x002f |
| 75 | #define EDCF_AC_BE_ACI_STA 0x03 |
| 76 | #define EDCF_AC_BE_ECW_STA 0xA4 |
| 77 | #define EDCF_AC_BK_ACI_STA 0x27 |
| 78 | #define EDCF_AC_VO_TXOP_AP 0x002f |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 79 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 80 | #define EDCF_TXOP2USEC(txop) ((txop) << 5) |
| 81 | #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 82 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 83 | #define APHY_SYMBOL_TIME 4 |
| 84 | #define APHY_PREAMBLE_TIME 16 |
| 85 | #define APHY_SIGNAL_TIME 4 |
| 86 | #define APHY_SIFS_TIME 16 |
| 87 | #define APHY_SERVICE_NBITS 16 |
| 88 | #define APHY_TAIL_NBITS 6 |
| 89 | #define BPHY_SIFS_TIME 10 |
| 90 | #define BPHY_PLCP_SHORT_TIME 96 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 91 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 92 | #define PREN_PREAMBLE 24 |
| 93 | #define PREN_MM_EXT 12 |
| 94 | #define PREN_PREAMBLE_EXT 4 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 95 | |
| 96 | #define DOT11_MAC_HDR_LEN 24 |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 97 | #define DOT11_ACK_LEN 10 |
| 98 | #define DOT11_BA_LEN 4 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 99 | #define DOT11_OFDM_SIGNAL_EXTENSION 6 |
| 100 | #define DOT11_MIN_FRAG_LEN 256 |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 101 | #define DOT11_RTS_LEN 16 |
| 102 | #define DOT11_CTS_LEN 10 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 103 | #define DOT11_BA_BITMAP_LEN 128 |
| 104 | #define DOT11_MIN_BEACON_PERIOD 1 |
| 105 | #define DOT11_MAX_BEACON_PERIOD 0xFFFF |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 106 | #define DOT11_MAXNUMFRAGS 16 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 107 | #define DOT11_MAX_FRAG_LEN 2346 |
| 108 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 109 | #define BPHY_PLCP_TIME 192 |
| 110 | #define RIFS_11N_TIME 2 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 111 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 112 | #define AC_BE 0 |
| 113 | #define AC_BK 1 |
| 114 | #define AC_VI 2 |
| 115 | #define AC_VO 3 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 116 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 117 | /* length of the BCN template area */ |
| 118 | #define BCN_TMPL_LEN 512 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 119 | |
| 120 | /* brcms_bss_info flag bit values */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 121 | #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 122 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 123 | /* chip rx buffer offset */ |
| 124 | #define BRCMS_HWRXOFF 38 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 125 | |
| 126 | /* rfdisable delay timer 500 ms, runs of ALP clock */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 127 | #define RFDISABLE_DEFAULT 10000000 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 128 | |
| 129 | #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */ |
| 130 | |
| 131 | /* precedences numbers for wlc queues. These are twice as may levels as |
| 132 | * 802.1D priorities. |
| 133 | * Odd numbers are used for HI priority traffic at same precedence levels |
| 134 | * These constants are used ONLY by wlc_prio2prec_map. Do not use them |
| 135 | * elsewhere. |
| 136 | */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 137 | #define _BRCMS_PREC_NONE 0 /* None = - */ |
| 138 | #define _BRCMS_PREC_BK 2 /* BK - Background */ |
| 139 | #define _BRCMS_PREC_BE 4 /* BE - Best-effort */ |
| 140 | #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */ |
| 141 | #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */ |
| 142 | #define _BRCMS_PREC_VI 10 /* Vi - Video */ |
| 143 | #define _BRCMS_PREC_VO 12 /* Vo - Voice */ |
| 144 | #define _BRCMS_PREC_NC 14 /* NC - Network Control */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 145 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 146 | /* synthpu_dly times in us */ |
| 147 | #define SYNTHPU_DLY_APHY_US 3700 |
| 148 | #define SYNTHPU_DLY_BPHY_US 1050 |
| 149 | #define SYNTHPU_DLY_NPHY_US 2048 |
| 150 | #define SYNTHPU_DLY_LPPHY_US 300 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 151 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 152 | #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 153 | |
| 154 | /* Per-AC retry limit register definitions; uses defs.h bitfield macros */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 155 | #define EDCF_SHORT_S 0 |
| 156 | #define EDCF_SFB_S 4 |
| 157 | #define EDCF_LONG_S 8 |
| 158 | #define EDCF_LFB_S 12 |
| 159 | #define EDCF_SHORT_M BITFIELD_MASK(4) |
| 160 | #define EDCF_SFB_M BITFIELD_MASK(4) |
| 161 | #define EDCF_LONG_M BITFIELD_MASK(4) |
| 162 | #define EDCF_LFB_M BITFIELD_MASK(4) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 163 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 164 | #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */ |
| 165 | #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */ |
| 166 | #define RETRY_LONG_DEF 4 /* Default Long retry count */ |
| 167 | #define RETRY_SHORT_FB 3 /* Short count for fb rate */ |
| 168 | #define RETRY_LONG_FB 2 /* Long count for fb rate */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 169 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 170 | #define APHY_CWMIN 15 |
| 171 | #define PHY_CWMAX 1023 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 172 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 173 | #define EDCF_AIFSN_MIN 1 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 174 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 175 | #define FRAGNUM_MASK 0xF |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 176 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 177 | #define APHY_SLOT_TIME 9 |
| 178 | #define BPHY_SLOT_TIME 20 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 179 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 180 | #define WL_SPURAVOID_OFF 0 |
| 181 | #define WL_SPURAVOID_ON1 1 |
| 182 | #define WL_SPURAVOID_ON2 2 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 183 | |
| 184 | /* invalid core flags, use the saved coreflags */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 185 | #define BRCMS_USE_COREFLAGS 0xffffffff |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 186 | |
| 187 | /* values for PLCPHdr_override */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 188 | #define BRCMS_PLCP_AUTO -1 |
| 189 | #define BRCMS_PLCP_SHORT 0 |
| 190 | #define BRCMS_PLCP_LONG 1 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 191 | |
| 192 | /* values for g_protection_override and n_protection_override */ |
| 193 | #define BRCMS_PROTECTION_AUTO -1 |
| 194 | #define BRCMS_PROTECTION_OFF 0 |
| 195 | #define BRCMS_PROTECTION_ON 1 |
| 196 | #define BRCMS_PROTECTION_MMHDR_ONLY 2 |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 197 | #define BRCMS_PROTECTION_CTS_ONLY 3 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 198 | |
| 199 | /* values for g_protection_control and n_protection_control */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 200 | #define BRCMS_PROTECTION_CTL_OFF 0 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 201 | #define BRCMS_PROTECTION_CTL_LOCAL 1 |
| 202 | #define BRCMS_PROTECTION_CTL_OVERLAP 2 |
| 203 | |
| 204 | /* values for n_protection */ |
| 205 | #define BRCMS_N_PROTECTION_OFF 0 |
| 206 | #define BRCMS_N_PROTECTION_OPTIONAL 1 |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 207 | #define BRCMS_N_PROTECTION_20IN40 2 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 208 | #define BRCMS_N_PROTECTION_MIXEDMODE 3 |
| 209 | |
| 210 | /* values for band specific 40MHz capabilities */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 211 | #define BRCMS_N_BW_20ALL 0 |
| 212 | #define BRCMS_N_BW_40ALL 1 |
| 213 | #define BRCMS_N_BW_20IN2G_40IN5G 2 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 214 | |
| 215 | /* bitflags for SGI support (sgi_rx iovar) */ |
| 216 | #define BRCMS_N_SGI_20 0x01 |
| 217 | #define BRCMS_N_SGI_40 0x02 |
| 218 | |
| 219 | /* defines used by the nrate iovar */ |
| 220 | /* MSC in use,indicates b0-6 holds an mcs */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 221 | #define NRATE_MCS_INUSE 0x00000080 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 222 | /* rate/mcs value */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 223 | #define NRATE_RATE_MASK 0x0000007f |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 224 | /* stf mode mask: siso, cdd, stbc, sdm */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 225 | #define NRATE_STF_MASK 0x0000ff00 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 226 | /* stf mode shift */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 227 | #define NRATE_STF_SHIFT 8 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 228 | /* bit indicate to override mcs only */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 229 | #define NRATE_OVERRIDE_MCS_ONLY 0x40000000 |
| 230 | #define NRATE_SGI_MASK 0x00800000 /* sgi mode */ |
| 231 | #define NRATE_SGI_SHIFT 23 /* sgi mode */ |
| 232 | #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */ |
| 233 | #define NRATE_LDPC_SHIFT 22 /* ldpc shift */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 234 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 235 | #define NRATE_STF_SISO 0 /* stf mode SISO */ |
| 236 | #define NRATE_STF_CDD 1 /* stf mode CDD */ |
| 237 | #define NRATE_STF_STBC 2 /* stf mode STBC */ |
| 238 | #define NRATE_STF_SDM 3 /* stf mode SDM */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 239 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 240 | #define MAX_DMA_SEGS 4 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 241 | |
| 242 | /* Max # of entries in Tx FIFO based on 4kb page size */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 243 | #define NTXD 256 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 244 | /* Max # of entries in Rx FIFO based on 4kb page size */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 245 | #define NRXD 256 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 246 | |
| 247 | /* try to keep this # rbufs posted to the chip */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 248 | #define NRXBUFPOST 32 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 249 | |
| 250 | /* data msg txq hiwat mark */ |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 251 | #define BRCMS_DATAHIWAT 50 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 252 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 253 | /* max # frames to process in brcms_c_recv() */ |
| 254 | #define RXBND 8 |
| 255 | /* max # tx status to process in wlc_txstatus() */ |
| 256 | #define TXSBND 8 |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 257 | |
Alwin Beukers | 4476065 | 2011-10-12 20:51:31 +0200 | [diff] [blame] | 258 | /* brcmu_format_flags() bit description structure */ |
| 259 | struct brcms_c_bit_desc { |
| 260 | u32 bit; |
| 261 | const char *name; |
| 262 | }; |
| 263 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 264 | /* |
| 265 | * The following table lists the buffer memory allocated to xmt fifos in HW. |
| 266 | * the size is in units of 256bytes(one block), total size is HW dependent |
| 267 | * ucode has default fifo partition, sw can overwrite if necessary |
| 268 | * |
| 269 | * This is documented in twiki under the topic UcodeTxFifo. Please ensure |
| 270 | * the twiki is updated before making changes. |
| 271 | */ |
| 272 | |
| 273 | /* Starting corerev for the fifo size table */ |
| 274 | #define XMTFIFOTBL_STARTREV 20 |
| 275 | |
| 276 | struct d11init { |
| 277 | __le16 addr; |
| 278 | __le16 size; |
| 279 | __le32 value; |
| 280 | }; |
| 281 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 282 | struct edcf_acparam { |
| 283 | u8 ACI; |
| 284 | u8 ECW; |
| 285 | u16 TXOP; |
| 286 | } __packed; |
| 287 | |
| 288 | const u8 prio2fifo[NUMPRIO] = { |
| 289 | TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ |
| 290 | TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ |
| 291 | TX_AC_BK_FIFO, /* 2 -- AC_BK Background */ |
| 292 | TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */ |
| 293 | TX_AC_VI_FIFO, /* 4 CL AC_VI Video */ |
| 294 | TX_AC_VI_FIFO, /* 5 VI AC_VI Video */ |
| 295 | TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */ |
| 296 | TX_AC_VO_FIFO /* 7 NC AC_VO Voice */ |
| 297 | }; |
| 298 | |
| 299 | /* debug/trace */ |
| 300 | uint brcm_msg_level = |
| 301 | #if defined(BCMDBG) |
| 302 | LOG_ERROR_VAL; |
| 303 | #else |
| 304 | 0; |
| 305 | #endif /* BCMDBG */ |
| 306 | |
| 307 | /* TX FIFO number to WME/802.1E Access Category */ |
| 308 | static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; |
| 309 | |
| 310 | /* WME/802.1E Access Category to TX FIFO number */ |
| 311 | static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; |
| 312 | |
| 313 | /* 802.1D Priority to precedence queue mapping */ |
| 314 | const u8 wlc_prio2prec_map[] = { |
| 315 | _BRCMS_PREC_BE, /* 0 BE - Best-effort */ |
| 316 | _BRCMS_PREC_BK, /* 1 BK - Background */ |
| 317 | _BRCMS_PREC_NONE, /* 2 None = - */ |
| 318 | _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */ |
| 319 | _BRCMS_PREC_CL, /* 4 CL - Controlled Load */ |
| 320 | _BRCMS_PREC_VI, /* 5 Vi - Video */ |
| 321 | _BRCMS_PREC_VO, /* 6 Vo - Voice */ |
| 322 | _BRCMS_PREC_NC, /* 7 NC - Network Control */ |
| 323 | }; |
| 324 | |
| 325 | static const u16 xmtfifo_sz[][NFIFO] = { |
| 326 | /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */ |
| 327 | {20, 192, 192, 21, 17, 5}, |
| 328 | /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */ |
| 329 | {9, 58, 22, 14, 14, 5}, |
| 330 | /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */ |
| 331 | {20, 192, 192, 21, 17, 5}, |
| 332 | /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */ |
| 333 | {20, 192, 192, 21, 17, 5}, |
| 334 | /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ |
| 335 | {9, 58, 22, 14, 14, 5}, |
| 336 | }; |
| 337 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 338 | #ifdef BCMDBG |
| 339 | static const char * const fifo_names[] = { |
| 340 | "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; |
| 341 | #else |
| 342 | static const char fifo_names[6][0]; |
| 343 | #endif |
| 344 | |
| 345 | #ifdef BCMDBG |
| 346 | /* pointer to most recently allocated wl/wlc */ |
| 347 | static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL); |
| 348 | #endif |
| 349 | |
Alwin Beukers | 73ffc2f | 2011-10-18 14:02:57 +0200 | [diff] [blame] | 350 | /* Find basic rate for a given rate */ |
| 351 | static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec) |
| 352 | { |
| 353 | if (is_mcs_rate(rspec)) |
| 354 | return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK] |
| 355 | .leg_ofdm]; |
| 356 | return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK]; |
| 357 | } |
| 358 | |
| 359 | static u16 frametype(u32 rspec, u8 mimoframe) |
| 360 | { |
| 361 | if (is_mcs_rate(rspec)) |
| 362 | return mimoframe; |
| 363 | return is_cck_rate(rspec) ? FT_CCK : FT_OFDM; |
| 364 | } |
| 365 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 366 | /* currently the best mechanism for determining SIFS is the band in use */ |
| 367 | static u16 get_sifs(struct brcms_band *band) |
| 368 | { |
| 369 | return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME : |
| 370 | BPHY_SIFS_TIME; |
| 371 | } |
| 372 | |
| 373 | /* |
| 374 | * Detect Card removed. |
| 375 | * Even checking an sbconfig register read will not false trigger when the core |
| 376 | * is in reset it breaks CF address mechanism. Accessing gphy phyversion will |
| 377 | * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible |
| 378 | * reg with fixed 0/1 pattern (some platforms return all 0). |
| 379 | * If clocks are present, call the sb routine which will figure out if the |
| 380 | * device is removed. |
| 381 | */ |
| 382 | static bool brcms_deviceremoved(struct brcms_c_info *wlc) |
| 383 | { |
| 384 | if (!wlc->hw->clk) |
| 385 | return ai_deviceremoved(wlc->hw->sih); |
| 386 | return (R_REG(&wlc->hw->regs->maccontrol) & |
| 387 | (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN; |
| 388 | } |
| 389 | |
| 390 | /* sum the individual fifo tx pending packet counts */ |
| 391 | static s16 brcms_txpktpendtot(struct brcms_c_info *wlc) |
| 392 | { |
| 393 | return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] + |
| 394 | wlc->core->txpktpend[2] + wlc->core->txpktpend[3]; |
| 395 | } |
| 396 | |
| 397 | static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc) |
| 398 | { |
| 399 | return wlc->pub->_nbands > 1 && !wlc->bandlocked; |
| 400 | } |
| 401 | |
| 402 | static int brcms_chspec_bw(u16 chanspec) |
| 403 | { |
| 404 | if (CHSPEC_IS40(chanspec)) |
| 405 | return BRCMS_40_MHZ; |
| 406 | if (CHSPEC_IS20(chanspec)) |
| 407 | return BRCMS_20_MHZ; |
| 408 | |
| 409 | return BRCMS_10_MHZ; |
| 410 | } |
| 411 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 412 | static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg) |
| 413 | { |
| 414 | if (cfg == NULL) |
| 415 | return; |
| 416 | |
| 417 | kfree(cfg->current_bss); |
| 418 | kfree(cfg); |
| 419 | } |
| 420 | |
| 421 | static void brcms_c_detach_mfree(struct brcms_c_info *wlc) |
| 422 | { |
| 423 | if (wlc == NULL) |
| 424 | return; |
| 425 | |
| 426 | brcms_c_bsscfg_mfree(wlc->bsscfg); |
| 427 | kfree(wlc->pub); |
| 428 | kfree(wlc->modulecb); |
| 429 | kfree(wlc->default_bss); |
| 430 | kfree(wlc->protection); |
| 431 | kfree(wlc->stf); |
| 432 | kfree(wlc->bandstate[0]); |
| 433 | kfree(wlc->corestate->macstat_snapshot); |
| 434 | kfree(wlc->corestate); |
| 435 | kfree(wlc->hw->bandstate[0]); |
| 436 | kfree(wlc->hw); |
| 437 | |
| 438 | /* free the wlc */ |
| 439 | kfree(wlc); |
| 440 | wlc = NULL; |
| 441 | } |
| 442 | |
| 443 | static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit) |
| 444 | { |
| 445 | struct brcms_bss_cfg *cfg; |
| 446 | |
| 447 | cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC); |
| 448 | if (cfg == NULL) |
| 449 | goto fail; |
| 450 | |
| 451 | cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC); |
| 452 | if (cfg->current_bss == NULL) |
| 453 | goto fail; |
| 454 | |
| 455 | return cfg; |
| 456 | |
| 457 | fail: |
| 458 | brcms_c_bsscfg_mfree(cfg); |
| 459 | return NULL; |
| 460 | } |
| 461 | |
| 462 | static struct brcms_c_info * |
| 463 | brcms_c_attach_malloc(uint unit, uint *err, uint devid) |
| 464 | { |
| 465 | struct brcms_c_info *wlc; |
| 466 | |
| 467 | wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC); |
| 468 | if (wlc == NULL) { |
| 469 | *err = 1002; |
| 470 | goto fail; |
| 471 | } |
| 472 | |
| 473 | /* allocate struct brcms_c_pub state structure */ |
| 474 | wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC); |
| 475 | if (wlc->pub == NULL) { |
| 476 | *err = 1003; |
| 477 | goto fail; |
| 478 | } |
| 479 | wlc->pub->wlc = wlc; |
| 480 | |
| 481 | /* allocate struct brcms_hardware state structure */ |
| 482 | |
| 483 | wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC); |
| 484 | if (wlc->hw == NULL) { |
| 485 | *err = 1005; |
| 486 | goto fail; |
| 487 | } |
| 488 | wlc->hw->wlc = wlc; |
| 489 | |
| 490 | wlc->hw->bandstate[0] = |
| 491 | kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC); |
| 492 | if (wlc->hw->bandstate[0] == NULL) { |
| 493 | *err = 1006; |
| 494 | goto fail; |
| 495 | } else { |
| 496 | int i; |
| 497 | |
| 498 | for (i = 1; i < MAXBANDS; i++) |
| 499 | wlc->hw->bandstate[i] = (struct brcms_hw_band *) |
| 500 | ((unsigned long)wlc->hw->bandstate[0] + |
| 501 | (sizeof(struct brcms_hw_band) * i)); |
| 502 | } |
| 503 | |
| 504 | wlc->modulecb = |
| 505 | kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC); |
| 506 | if (wlc->modulecb == NULL) { |
| 507 | *err = 1009; |
| 508 | goto fail; |
| 509 | } |
| 510 | |
| 511 | wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC); |
| 512 | if (wlc->default_bss == NULL) { |
| 513 | *err = 1010; |
| 514 | goto fail; |
| 515 | } |
| 516 | |
| 517 | wlc->bsscfg = brcms_c_bsscfg_malloc(unit); |
| 518 | if (wlc->bsscfg == NULL) { |
| 519 | *err = 1011; |
| 520 | goto fail; |
| 521 | } |
| 522 | |
| 523 | wlc->protection = kzalloc(sizeof(struct brcms_protection), |
| 524 | GFP_ATOMIC); |
| 525 | if (wlc->protection == NULL) { |
| 526 | *err = 1016; |
| 527 | goto fail; |
| 528 | } |
| 529 | |
| 530 | wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC); |
| 531 | if (wlc->stf == NULL) { |
| 532 | *err = 1017; |
| 533 | goto fail; |
| 534 | } |
| 535 | |
| 536 | wlc->bandstate[0] = |
| 537 | kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC); |
| 538 | if (wlc->bandstate[0] == NULL) { |
| 539 | *err = 1025; |
| 540 | goto fail; |
| 541 | } else { |
| 542 | int i; |
| 543 | |
| 544 | for (i = 1; i < MAXBANDS; i++) |
| 545 | wlc->bandstate[i] = (struct brcms_band *) |
| 546 | ((unsigned long)wlc->bandstate[0] |
| 547 | + (sizeof(struct brcms_band)*i)); |
| 548 | } |
| 549 | |
| 550 | wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC); |
| 551 | if (wlc->corestate == NULL) { |
| 552 | *err = 1026; |
| 553 | goto fail; |
| 554 | } |
| 555 | |
| 556 | wlc->corestate->macstat_snapshot = |
| 557 | kzalloc(sizeof(struct macstat), GFP_ATOMIC); |
| 558 | if (wlc->corestate->macstat_snapshot == NULL) { |
| 559 | *err = 1027; |
| 560 | goto fail; |
| 561 | } |
| 562 | |
| 563 | return wlc; |
| 564 | |
| 565 | fail: |
| 566 | brcms_c_detach_mfree(wlc); |
| 567 | return NULL; |
| 568 | } |
| 569 | |
| 570 | /* |
| 571 | * Update the slot timing for standard 11b/g (20us slots) |
| 572 | * or shortslot 11g (9us slots) |
| 573 | * The PSM needs to be suspended for this call. |
| 574 | */ |
| 575 | static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw, |
| 576 | bool shortslot) |
| 577 | { |
| 578 | struct d11regs __iomem *regs; |
| 579 | |
| 580 | regs = wlc_hw->regs; |
| 581 | |
| 582 | if (shortslot) { |
| 583 | /* 11g short slot: 11a timing */ |
| 584 | W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ |
| 585 | brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); |
| 586 | } else { |
| 587 | /* 11g long slot: 11b timing */ |
| 588 | W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ |
| 589 | brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); |
| 590 | } |
| 591 | } |
| 592 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 593 | /* |
| 594 | * calculate frame duration of a given rate and length, return |
| 595 | * time in usec unit |
| 596 | */ |
Arend van Spriel | 094b199 | 2011-10-18 14:03:07 +0200 | [diff] [blame] | 597 | static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec, |
| 598 | u8 preamble_type, uint mac_len) |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 599 | { |
| 600 | uint nsyms, dur = 0, Ndps, kNdps; |
| 601 | uint rate = rspec2rate(ratespec); |
| 602 | |
| 603 | if (rate == 0) { |
| 604 | wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n", |
| 605 | wlc->pub->unit); |
| 606 | rate = BRCM_RATE_1M; |
| 607 | } |
| 608 | |
| 609 | BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n", |
| 610 | wlc->pub->unit, ratespec, preamble_type, mac_len); |
| 611 | |
| 612 | if (is_mcs_rate(ratespec)) { |
| 613 | uint mcs = ratespec & RSPEC_RATE_MASK; |
| 614 | int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec); |
| 615 | |
| 616 | dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); |
| 617 | if (preamble_type == BRCMS_MM_PREAMBLE) |
| 618 | dur += PREN_MM_EXT; |
| 619 | /* 1000Ndbps = kbps * 4 */ |
| 620 | kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec), |
| 621 | rspec_issgi(ratespec)) * 4; |
| 622 | |
| 623 | if (rspec_stc(ratespec) == 0) |
| 624 | nsyms = |
| 625 | CEIL((APHY_SERVICE_NBITS + 8 * mac_len + |
| 626 | APHY_TAIL_NBITS) * 1000, kNdps); |
| 627 | else |
| 628 | /* STBC needs to have even number of symbols */ |
| 629 | nsyms = |
| 630 | 2 * |
| 631 | CEIL((APHY_SERVICE_NBITS + 8 * mac_len + |
| 632 | APHY_TAIL_NBITS) * 1000, 2 * kNdps); |
| 633 | |
| 634 | dur += APHY_SYMBOL_TIME * nsyms; |
| 635 | if (wlc->band->bandtype == BRCM_BAND_2G) |
| 636 | dur += DOT11_OFDM_SIGNAL_EXTENSION; |
| 637 | } else if (is_ofdm_rate(rate)) { |
| 638 | dur = APHY_PREAMBLE_TIME; |
| 639 | dur += APHY_SIGNAL_TIME; |
| 640 | /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ |
| 641 | Ndps = rate * 2; |
| 642 | /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */ |
| 643 | nsyms = |
| 644 | CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS), |
| 645 | Ndps); |
| 646 | dur += APHY_SYMBOL_TIME * nsyms; |
| 647 | if (wlc->band->bandtype == BRCM_BAND_2G) |
| 648 | dur += DOT11_OFDM_SIGNAL_EXTENSION; |
| 649 | } else { |
| 650 | /* |
| 651 | * calc # bits * 2 so factor of 2 in rate (1/2 mbps) |
| 652 | * will divide out |
| 653 | */ |
| 654 | mac_len = mac_len * 8 * 2; |
| 655 | /* calc ceiling of bits/rate = microseconds of air time */ |
| 656 | dur = (mac_len + rate - 1) / rate; |
| 657 | if (preamble_type & BRCMS_SHORT_PREAMBLE) |
| 658 | dur += BPHY_PLCP_SHORT_TIME; |
| 659 | else |
| 660 | dur += BPHY_PLCP_TIME; |
| 661 | } |
| 662 | return dur; |
| 663 | } |
| 664 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 665 | static void brcms_c_write_inits(struct brcms_hardware *wlc_hw, |
| 666 | const struct d11init *inits) |
| 667 | { |
| 668 | int i; |
| 669 | u8 __iomem *base; |
| 670 | u8 __iomem *addr; |
| 671 | u16 size; |
| 672 | u32 value; |
| 673 | |
| 674 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 675 | |
| 676 | base = (u8 __iomem *)wlc_hw->regs; |
| 677 | |
| 678 | for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) { |
| 679 | size = le16_to_cpu(inits[i].size); |
| 680 | addr = base + le16_to_cpu(inits[i].addr); |
| 681 | value = le32_to_cpu(inits[i].value); |
| 682 | if (size == 2) |
| 683 | W_REG((u16 __iomem *)addr, value); |
| 684 | else if (size == 4) |
| 685 | W_REG((u32 __iomem *)addr, value); |
| 686 | else |
| 687 | break; |
| 688 | } |
| 689 | } |
| 690 | |
| 691 | static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs) |
| 692 | { |
| 693 | u8 idx; |
| 694 | u16 addr[] = { |
| 695 | M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, |
| 696 | M_HOST_FLAGS5 |
| 697 | }; |
| 698 | |
| 699 | for (idx = 0; idx < MHFMAX; idx++) |
| 700 | brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]); |
| 701 | } |
| 702 | |
| 703 | static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw) |
| 704 | { |
| 705 | struct wiphy *wiphy = wlc_hw->wlc->wiphy; |
| 706 | struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; |
| 707 | |
| 708 | /* init microcode host flags */ |
| 709 | brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs); |
| 710 | |
| 711 | /* do band-specific ucode IHR, SHM, and SCR inits */ |
| 712 | if (D11REV_IS(wlc_hw->corerev, 23)) { |
| 713 | if (BRCMS_ISNPHY(wlc_hw->band)) |
| 714 | brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16); |
| 715 | else |
| 716 | wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" |
| 717 | " %d\n", __func__, wlc_hw->unit, |
| 718 | wlc_hw->corerev); |
| 719 | } else { |
| 720 | if (D11REV_IS(wlc_hw->corerev, 24)) { |
| 721 | if (BRCMS_ISLCNPHY(wlc_hw->band)) |
| 722 | brcms_c_write_inits(wlc_hw, |
| 723 | ucode->d11lcn0bsinitvals24); |
| 724 | else |
| 725 | wiphy_err(wiphy, "%s: wl%d: unsupported phy in" |
| 726 | " core rev %d\n", __func__, |
| 727 | wlc_hw->unit, wlc_hw->corerev); |
| 728 | } else { |
| 729 | wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", |
| 730 | __func__, wlc_hw->unit, wlc_hw->corerev); |
| 731 | } |
| 732 | } |
| 733 | } |
| 734 | |
| 735 | static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk) |
| 736 | { |
| 737 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); |
| 738 | |
| 739 | wlc_hw->phyclk = clk; |
| 740 | |
| 741 | if (OFF == clk) { /* clear gmode bit, put phy into reset */ |
| 742 | |
| 743 | ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE), |
| 744 | (SICF_PRST | SICF_FGC)); |
| 745 | udelay(1); |
| 746 | ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST); |
| 747 | udelay(1); |
| 748 | |
| 749 | } else { /* take phy out of reset */ |
| 750 | |
| 751 | ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC); |
| 752 | udelay(1); |
| 753 | ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0); |
| 754 | udelay(1); |
| 755 | |
| 756 | } |
| 757 | } |
| 758 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 759 | /* low-level band switch utility routine */ |
| 760 | static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit) |
| 761 | { |
| 762 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, |
| 763 | bandunit); |
| 764 | |
| 765 | wlc_hw->band = wlc_hw->bandstate[bandunit]; |
| 766 | |
| 767 | /* |
| 768 | * BMAC_NOTE: |
| 769 | * until we eliminate need for wlc->band refs in low level code |
| 770 | */ |
| 771 | wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit]; |
| 772 | |
| 773 | /* set gmode core flag */ |
| 774 | if (wlc_hw->sbclk && !wlc_hw->noreset) |
| 775 | ai_core_cflags(wlc_hw->sih, SICF_GMODE, |
| 776 | ((bandunit == 0) ? SICF_GMODE : 0)); |
| 777 | } |
| 778 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 779 | /* switch to new band but leave it inactive */ |
| 780 | static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit) |
| 781 | { |
| 782 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 783 | u32 macintmask; |
| 784 | |
| 785 | BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 786 | |
| 787 | WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); |
| 788 | |
| 789 | /* disable interrupts */ |
| 790 | macintmask = brcms_intrsoff(wlc->wl); |
| 791 | |
| 792 | /* radio off */ |
| 793 | wlc_phy_switch_radio(wlc_hw->band->pi, OFF); |
| 794 | |
| 795 | brcms_b_core_phy_clk(wlc_hw, OFF); |
| 796 | |
| 797 | brcms_c_setxband(wlc_hw, bandunit); |
| 798 | |
| 799 | return macintmask; |
| 800 | } |
| 801 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 802 | /* process an individual struct tx_status */ |
| 803 | static bool |
| 804 | brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs) |
| 805 | { |
| 806 | struct sk_buff *p; |
| 807 | uint queue; |
| 808 | struct d11txh *txh; |
| 809 | struct scb *scb = NULL; |
| 810 | bool free_pdu; |
| 811 | int tx_rts, tx_frame_count, tx_rts_count; |
| 812 | uint totlen, supr_status; |
| 813 | bool lastframe; |
| 814 | struct ieee80211_hdr *h; |
| 815 | u16 mcl; |
| 816 | struct ieee80211_tx_info *tx_info; |
| 817 | struct ieee80211_tx_rate *txrate; |
| 818 | int i; |
| 819 | |
| 820 | /* discard intermediate indications for ucode with one legitimate case: |
| 821 | * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, |
| 822 | * but the subsequent tx of DATA failed. so it will start rts/cts |
| 823 | * from the beginning (resetting the rts transmission count) |
| 824 | */ |
| 825 | if (!(txs->status & TX_STATUS_AMPDU) |
| 826 | && (txs->status & TX_STATUS_INTERMEDIATE)) { |
| 827 | wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n", |
| 828 | __func__); |
| 829 | return false; |
| 830 | } |
| 831 | |
| 832 | queue = txs->frameid & TXFID_QUEUE_MASK; |
| 833 | if (queue >= NFIFO) { |
| 834 | p = NULL; |
| 835 | goto fatal; |
| 836 | } |
| 837 | |
| 838 | p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED); |
| 839 | if (p == NULL) |
| 840 | goto fatal; |
| 841 | |
| 842 | txh = (struct d11txh *) (p->data); |
| 843 | mcl = le16_to_cpu(txh->MacTxControlLow); |
| 844 | |
| 845 | if (txs->phyerr) { |
| 846 | if (brcm_msg_level & LOG_ERROR_VAL) { |
| 847 | wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n", |
| 848 | txs->phyerr, txh->MainRates); |
| 849 | brcms_c_print_txdesc(txh); |
| 850 | } |
| 851 | brcms_c_print_txstatus(txs); |
| 852 | } |
| 853 | |
| 854 | if (txs->frameid != le16_to_cpu(txh->TxFrameID)) |
| 855 | goto fatal; |
| 856 | tx_info = IEEE80211_SKB_CB(p); |
| 857 | h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); |
| 858 | |
| 859 | if (tx_info->control.sta) |
| 860 | scb = &wlc->pri_scb; |
| 861 | |
| 862 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { |
| 863 | brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs); |
| 864 | return false; |
| 865 | } |
| 866 | |
| 867 | supr_status = txs->status & TX_STATUS_SUPR_MASK; |
| 868 | if (supr_status == TX_STATUS_SUPR_BADCH) |
| 869 | BCMMSG(wlc->wiphy, |
| 870 | "%s: Pkt tx suppressed, possibly channel %d\n", |
| 871 | __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec)); |
| 872 | |
| 873 | tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS; |
| 874 | tx_frame_count = |
| 875 | (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT; |
| 876 | tx_rts_count = |
| 877 | (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT; |
| 878 | |
| 879 | lastframe = !ieee80211_has_morefrags(h->frame_control); |
| 880 | |
| 881 | if (!lastframe) { |
| 882 | wiphy_err(wlc->wiphy, "Not last frame!\n"); |
| 883 | } else { |
| 884 | /* |
| 885 | * Set information to be consumed by Minstrel ht. |
| 886 | * |
| 887 | * The "fallback limit" is the number of tx attempts a given |
| 888 | * MPDU is sent at the "primary" rate. Tx attempts beyond that |
| 889 | * limit are sent at the "secondary" rate. |
| 890 | * A 'short frame' does not exceed RTS treshold. |
| 891 | */ |
| 892 | u16 sfbl, /* Short Frame Rate Fallback Limit */ |
| 893 | lfbl, /* Long Frame Rate Fallback Limit */ |
| 894 | fbl; |
| 895 | |
| 896 | if (queue < AC_COUNT) { |
| 897 | sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]], |
| 898 | EDCF_SFB); |
| 899 | lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]], |
| 900 | EDCF_LFB); |
| 901 | } else { |
| 902 | sfbl = wlc->SFBL; |
| 903 | lfbl = wlc->LFBL; |
| 904 | } |
| 905 | |
| 906 | txrate = tx_info->status.rates; |
| 907 | if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) |
| 908 | fbl = lfbl; |
| 909 | else |
| 910 | fbl = sfbl; |
| 911 | |
| 912 | ieee80211_tx_info_clear_status(tx_info); |
| 913 | |
| 914 | if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) { |
| 915 | /* |
| 916 | * rate selection requested a fallback rate |
| 917 | * and we used it |
| 918 | */ |
| 919 | txrate[0].count = fbl; |
| 920 | txrate[1].count = tx_frame_count - fbl; |
| 921 | } else { |
| 922 | /* |
| 923 | * rate selection did not request fallback rate, or |
| 924 | * we didn't need it |
| 925 | */ |
| 926 | txrate[0].count = tx_frame_count; |
| 927 | /* |
| 928 | * rc80211_minstrel.c:minstrel_tx_status() expects |
| 929 | * unused rates to be marked with idx = -1 |
| 930 | */ |
| 931 | txrate[1].idx = -1; |
| 932 | txrate[1].count = 0; |
| 933 | } |
| 934 | |
| 935 | /* clear the rest of the rates */ |
| 936 | for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) { |
| 937 | txrate[i].idx = -1; |
| 938 | txrate[i].count = 0; |
| 939 | } |
| 940 | |
| 941 | if (txs->status & TX_STATUS_ACK_RCV) |
| 942 | tx_info->flags |= IEEE80211_TX_STAT_ACK; |
| 943 | } |
| 944 | |
| 945 | totlen = brcmu_pkttotlen(p); |
| 946 | free_pdu = true; |
| 947 | |
| 948 | brcms_c_txfifo_complete(wlc, queue, 1); |
| 949 | |
| 950 | if (lastframe) { |
| 951 | p->next = NULL; |
| 952 | p->prev = NULL; |
| 953 | /* remove PLCP & Broadcom tx descriptor header */ |
| 954 | skb_pull(p, D11_PHY_HDR_LEN); |
| 955 | skb_pull(p, D11_TXH_LEN); |
| 956 | ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p); |
| 957 | } else { |
| 958 | wiphy_err(wlc->wiphy, "%s: Not last frame => not calling " |
| 959 | "tx_status\n", __func__); |
| 960 | } |
| 961 | |
| 962 | return false; |
| 963 | |
| 964 | fatal: |
| 965 | if (p) |
| 966 | brcmu_pkt_buf_free_skb(p); |
| 967 | |
| 968 | return true; |
| 969 | |
| 970 | } |
| 971 | |
| 972 | /* process tx completion events in BMAC |
| 973 | * Return true if more tx status need to be processed. false otherwise. |
| 974 | */ |
| 975 | static bool |
| 976 | brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal) |
| 977 | { |
| 978 | bool morepending = false; |
| 979 | struct brcms_c_info *wlc = wlc_hw->wlc; |
| 980 | struct d11regs __iomem *regs; |
| 981 | struct tx_status txstatus, *txs; |
| 982 | u32 s1, s2; |
| 983 | uint n = 0; |
| 984 | /* |
| 985 | * Param 'max_tx_num' indicates max. # tx status to process before |
| 986 | * break out. |
| 987 | */ |
| 988 | uint max_tx_num = bound ? TXSBND : -1; |
| 989 | |
| 990 | BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 991 | |
| 992 | txs = &txstatus; |
| 993 | regs = wlc_hw->regs; |
| 994 | *fatal = false; |
| 995 | while (!(*fatal) |
| 996 | && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) { |
| 997 | |
| 998 | if (s1 == 0xffffffff) { |
| 999 | wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", |
| 1000 | wlc_hw->unit, __func__); |
| 1001 | return morepending; |
| 1002 | } |
| 1003 | |
| 1004 | s2 = R_REG(®s->frmtxstatus2); |
| 1005 | |
| 1006 | txs->status = s1 & TXS_STATUS_MASK; |
| 1007 | txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT; |
| 1008 | txs->sequence = s2 & TXS_SEQ_MASK; |
| 1009 | txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; |
| 1010 | txs->lasttxtime = 0; |
| 1011 | |
| 1012 | *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs); |
| 1013 | |
| 1014 | /* !give others some time to run! */ |
| 1015 | if (++n >= max_tx_num) |
| 1016 | break; |
| 1017 | } |
| 1018 | |
| 1019 | if (*fatal) |
| 1020 | return 0; |
| 1021 | |
| 1022 | if (n >= max_tx_num) |
| 1023 | morepending = true; |
| 1024 | |
| 1025 | if (!pktq_empty(&wlc->pkt_queue->q)) |
| 1026 | brcms_c_send_q(wlc); |
| 1027 | |
| 1028 | return morepending; |
| 1029 | } |
| 1030 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 1031 | static void brcms_c_tbtt(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 1032 | { |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 1033 | if (!wlc->bsscfg->BSS) |
| 1034 | /* |
| 1035 | * DirFrmQ is now valid...defer setting until end |
| 1036 | * of ATIM window |
| 1037 | */ |
| 1038 | wlc->qvalid |= MCMD_DIRFRMQVAL; |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 1039 | } |
| 1040 | |
| 1041 | /* set initial host flags value */ |
| 1042 | static void |
| 1043 | brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init) |
| 1044 | { |
| 1045 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 1046 | |
| 1047 | memset(mhfs, 0, MHFMAX * sizeof(u16)); |
| 1048 | |
| 1049 | mhfs[MHF2] |= mhf2_init; |
| 1050 | |
| 1051 | /* prohibit use of slowclock on multifunction boards */ |
| 1052 | if (wlc_hw->boardflags & BFL_NOPLLDOWN) |
| 1053 | mhfs[MHF1] |= MHF1_FORCEFASTCLK; |
| 1054 | |
| 1055 | if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { |
| 1056 | mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; |
| 1057 | mhfs[MHF1] |= MHF1_IQSWAP_WAR; |
| 1058 | } |
| 1059 | } |
| 1060 | |
| 1061 | static struct dma64regs __iomem * |
| 1062 | dmareg(struct brcms_hardware *hw, uint direction, uint fifonum) |
| 1063 | { |
| 1064 | if (direction == DMA_TX) |
| 1065 | return &(hw->regs->fifo64regs[fifonum].dmaxmt); |
| 1066 | return &(hw->regs->fifo64regs[fifonum].dmarcv); |
| 1067 | } |
| 1068 | |
| 1069 | static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme) |
| 1070 | { |
| 1071 | uint i; |
| 1072 | char name[8]; |
| 1073 | /* |
| 1074 | * ucode host flag 2 needed for pio mode, independent of band and fifo |
| 1075 | */ |
| 1076 | u16 pio_mhf2 = 0; |
| 1077 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 1078 | uint unit = wlc_hw->unit; |
| 1079 | struct wiphy *wiphy = wlc->wiphy; |
| 1080 | |
| 1081 | /* name and offsets for dma_attach */ |
| 1082 | snprintf(name, sizeof(name), "wl%d", unit); |
| 1083 | |
| 1084 | if (wlc_hw->di[0] == NULL) { /* Init FIFOs */ |
| 1085 | int dma_attach_err = 0; |
| 1086 | |
| 1087 | /* |
| 1088 | * FIFO 0 |
| 1089 | * TX: TX_AC_BK_FIFO (TX AC Background data packets) |
| 1090 | * RX: RX_FIFO (RX data packets) |
| 1091 | */ |
| 1092 | wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, |
| 1093 | (wme ? dmareg(wlc_hw, DMA_TX, 0) : |
| 1094 | NULL), dmareg(wlc_hw, DMA_RX, 0), |
| 1095 | (wme ? NTXD : 0), NRXD, |
| 1096 | RXBUFSZ, -1, NRXBUFPOST, |
| 1097 | BRCMS_HWRXOFF, &brcm_msg_level); |
| 1098 | dma_attach_err |= (NULL == wlc_hw->di[0]); |
| 1099 | |
| 1100 | /* |
| 1101 | * FIFO 1 |
| 1102 | * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets) |
| 1103 | * (legacy) TX_DATA_FIFO (TX data packets) |
| 1104 | * RX: UNUSED |
| 1105 | */ |
| 1106 | wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, |
| 1107 | dmareg(wlc_hw, DMA_TX, 1), NULL, |
| 1108 | NTXD, 0, 0, -1, 0, 0, |
| 1109 | &brcm_msg_level); |
| 1110 | dma_attach_err |= (NULL == wlc_hw->di[1]); |
| 1111 | |
| 1112 | /* |
| 1113 | * FIFO 2 |
| 1114 | * TX: TX_AC_VI_FIFO (TX AC Video data packets) |
| 1115 | * RX: UNUSED |
| 1116 | */ |
| 1117 | wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, |
| 1118 | dmareg(wlc_hw, DMA_TX, 2), NULL, |
| 1119 | NTXD, 0, 0, -1, 0, 0, |
| 1120 | &brcm_msg_level); |
| 1121 | dma_attach_err |= (NULL == wlc_hw->di[2]); |
| 1122 | /* |
| 1123 | * FIFO 3 |
| 1124 | * TX: TX_AC_VO_FIFO (TX AC Voice data packets) |
| 1125 | * (legacy) TX_CTL_FIFO (TX control & mgmt packets) |
| 1126 | */ |
| 1127 | wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, |
| 1128 | dmareg(wlc_hw, DMA_TX, 3), |
| 1129 | NULL, NTXD, 0, 0, -1, |
| 1130 | 0, 0, &brcm_msg_level); |
| 1131 | dma_attach_err |= (NULL == wlc_hw->di[3]); |
| 1132 | /* Cleaner to leave this as if with AP defined */ |
| 1133 | |
| 1134 | if (dma_attach_err) { |
| 1135 | wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed" |
| 1136 | "\n", unit); |
| 1137 | return false; |
| 1138 | } |
| 1139 | |
| 1140 | /* get pointer to dma engine tx flow control variable */ |
| 1141 | for (i = 0; i < NFIFO; i++) |
| 1142 | if (wlc_hw->di[i]) |
| 1143 | wlc_hw->txavail[i] = |
| 1144 | (uint *) dma_getvar(wlc_hw->di[i], |
| 1145 | "&txavail"); |
| 1146 | } |
| 1147 | |
| 1148 | /* initial ucode host flags */ |
| 1149 | brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); |
| 1150 | |
| 1151 | return true; |
| 1152 | } |
| 1153 | |
| 1154 | static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw) |
| 1155 | { |
| 1156 | uint j; |
| 1157 | |
| 1158 | for (j = 0; j < NFIFO; j++) { |
| 1159 | if (wlc_hw->di[j]) { |
| 1160 | dma_detach(wlc_hw->di[j]); |
| 1161 | wlc_hw->di[j] = NULL; |
| 1162 | } |
| 1163 | } |
| 1164 | } |
| 1165 | |
| 1166 | /* |
| 1167 | * Initialize brcms_c_info default values ... |
| 1168 | * may get overrides later in this function |
| 1169 | * BMAC_NOTES, move low out and resolve the dangling ones |
| 1170 | */ |
| 1171 | static void brcms_b_info_init(struct brcms_hardware *wlc_hw) |
| 1172 | { |
| 1173 | struct brcms_c_info *wlc = wlc_hw->wlc; |
| 1174 | |
| 1175 | /* set default sw macintmask value */ |
| 1176 | wlc->defmacintmask = DEF_MACINTMASK; |
| 1177 | |
| 1178 | /* various 802.11g modes */ |
| 1179 | wlc_hw->shortslot = false; |
| 1180 | |
| 1181 | wlc_hw->SFBL = RETRY_SHORT_FB; |
| 1182 | wlc_hw->LFBL = RETRY_LONG_FB; |
| 1183 | |
| 1184 | /* default mac retry limits */ |
| 1185 | wlc_hw->SRL = RETRY_SHORT_DEF; |
| 1186 | wlc_hw->LRL = RETRY_LONG_DEF; |
| 1187 | wlc_hw->chanspec = ch20mhz_chspec(1); |
| 1188 | } |
| 1189 | |
| 1190 | static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw) |
| 1191 | { |
| 1192 | /* delay before first read of ucode state */ |
| 1193 | udelay(40); |
| 1194 | |
| 1195 | /* wait until ucode is no longer asleep */ |
| 1196 | SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) == |
| 1197 | DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); |
| 1198 | } |
| 1199 | |
| 1200 | /* control chip clock to save power, enable dynamic clock or force fast clock */ |
| 1201 | static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode) |
| 1202 | { |
| 1203 | if (wlc_hw->sih->cccaps & CC_CAP_PMU) { |
| 1204 | /* new chips with PMU, CCS_FORCEHT will distribute the HT clock |
| 1205 | * on backplane, but mac core will still run on ALP(not HT) when |
| 1206 | * it enters powersave mode, which means the FCA bit may not be |
| 1207 | * set. Should wakeup mac if driver wants it to run on HT. |
| 1208 | */ |
| 1209 | |
| 1210 | if (wlc_hw->clk) { |
| 1211 | if (mode == CLK_FAST) { |
| 1212 | OR_REG(&wlc_hw->regs->clk_ctl_st, |
| 1213 | CCS_FORCEHT); |
| 1214 | |
| 1215 | udelay(64); |
| 1216 | |
| 1217 | SPINWAIT(((R_REG |
| 1218 | (&wlc_hw->regs-> |
| 1219 | clk_ctl_st) & CCS_HTAVAIL) == 0), |
| 1220 | PMU_MAX_TRANSITION_DLY); |
| 1221 | WARN_ON(!(R_REG |
| 1222 | (&wlc_hw->regs-> |
| 1223 | clk_ctl_st) & CCS_HTAVAIL)); |
| 1224 | } else { |
| 1225 | if ((wlc_hw->sih->pmurev == 0) && |
| 1226 | (R_REG |
| 1227 | (&wlc_hw->regs-> |
| 1228 | clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ))) |
| 1229 | SPINWAIT(((R_REG |
| 1230 | (&wlc_hw->regs-> |
| 1231 | clk_ctl_st) & CCS_HTAVAIL) |
| 1232 | == 0), |
| 1233 | PMU_MAX_TRANSITION_DLY); |
| 1234 | AND_REG(&wlc_hw->regs->clk_ctl_st, |
| 1235 | ~CCS_FORCEHT); |
| 1236 | } |
| 1237 | } |
| 1238 | wlc_hw->forcefastclk = (mode == CLK_FAST); |
| 1239 | } else { |
| 1240 | |
| 1241 | /* old chips w/o PMU, force HT through cc, |
| 1242 | * then use FCA to verify mac is running fast clock |
| 1243 | */ |
| 1244 | |
| 1245 | wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode); |
| 1246 | |
| 1247 | /* check fast clock is available (if core is not in reset) */ |
| 1248 | if (wlc_hw->forcefastclk && wlc_hw->clk) |
| 1249 | WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) & |
| 1250 | SISF_FCLKA)); |
| 1251 | |
| 1252 | /* |
| 1253 | * keep the ucode wake bit on if forcefastclk is on since we |
| 1254 | * do not want ucode to put us back to slow clock when it dozes |
| 1255 | * for PM mode. Code below matches the wake override bit with |
| 1256 | * current forcefastclk state. Only setting bit in wake_override |
| 1257 | * instead of waking ucode immediately since old code had this |
| 1258 | * behavior. Older code set wlc->forcefastclk but only had the |
| 1259 | * wake happen if the wakup_ucode work (protected by an up |
| 1260 | * check) was executed just below. |
| 1261 | */ |
| 1262 | if (wlc_hw->forcefastclk) |
| 1263 | mboolset(wlc_hw->wake_override, |
| 1264 | BRCMS_WAKE_OVERRIDE_FORCEFAST); |
| 1265 | else |
| 1266 | mboolclr(wlc_hw->wake_override, |
| 1267 | BRCMS_WAKE_OVERRIDE_FORCEFAST); |
| 1268 | } |
| 1269 | } |
| 1270 | |
| 1271 | /* set or clear ucode host flag bits |
| 1272 | * it has an optimization for no-change write |
| 1273 | * it only writes through shared memory when the core has clock; |
| 1274 | * pre-CLK changes should use wlc_write_mhf to get around the optimization |
| 1275 | * |
| 1276 | * |
| 1277 | * bands values are: BRCM_BAND_AUTO <--- Current band only |
| 1278 | * BRCM_BAND_5G <--- 5G band only |
| 1279 | * BRCM_BAND_2G <--- 2G band only |
| 1280 | * BRCM_BAND_ALL <--- All bands |
| 1281 | */ |
| 1282 | void |
| 1283 | brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val, |
| 1284 | int bands) |
| 1285 | { |
| 1286 | u16 save; |
| 1287 | u16 addr[MHFMAX] = { |
| 1288 | M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, |
| 1289 | M_HOST_FLAGS5 |
| 1290 | }; |
| 1291 | struct brcms_hw_band *band; |
| 1292 | |
| 1293 | if ((val & ~mask) || idx >= MHFMAX) |
| 1294 | return; /* error condition */ |
| 1295 | |
| 1296 | switch (bands) { |
| 1297 | /* Current band only or all bands, |
| 1298 | * then set the band to current band |
| 1299 | */ |
| 1300 | case BRCM_BAND_AUTO: |
| 1301 | case BRCM_BAND_ALL: |
| 1302 | band = wlc_hw->band; |
| 1303 | break; |
| 1304 | case BRCM_BAND_5G: |
| 1305 | band = wlc_hw->bandstate[BAND_5G_INDEX]; |
| 1306 | break; |
| 1307 | case BRCM_BAND_2G: |
| 1308 | band = wlc_hw->bandstate[BAND_2G_INDEX]; |
| 1309 | break; |
| 1310 | default: |
| 1311 | band = NULL; /* error condition */ |
| 1312 | } |
| 1313 | |
| 1314 | if (band) { |
| 1315 | save = band->mhfs[idx]; |
| 1316 | band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val; |
| 1317 | |
| 1318 | /* optimization: only write through if changed, and |
| 1319 | * changed band is the current band |
| 1320 | */ |
| 1321 | if (wlc_hw->clk && (band->mhfs[idx] != save) |
| 1322 | && (band == wlc_hw->band)) |
| 1323 | brcms_b_write_shm(wlc_hw, addr[idx], |
| 1324 | (u16) band->mhfs[idx]); |
| 1325 | } |
| 1326 | |
| 1327 | if (bands == BRCM_BAND_ALL) { |
| 1328 | wlc_hw->bandstate[0]->mhfs[idx] = |
| 1329 | (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; |
| 1330 | wlc_hw->bandstate[1]->mhfs[idx] = |
| 1331 | (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val; |
| 1332 | } |
| 1333 | } |
| 1334 | |
| 1335 | /* set the maccontrol register to desired reset state and |
| 1336 | * initialize the sw cache of the register |
| 1337 | */ |
| 1338 | static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw) |
| 1339 | { |
| 1340 | /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ |
| 1341 | wlc_hw->maccontrol = 0; |
| 1342 | wlc_hw->suspended_fifos = 0; |
| 1343 | wlc_hw->wake_override = 0; |
| 1344 | wlc_hw->mute_override = 0; |
| 1345 | brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); |
| 1346 | } |
| 1347 | |
| 1348 | /* |
| 1349 | * write the software state of maccontrol and |
| 1350 | * overrides to the maccontrol register |
| 1351 | */ |
| 1352 | static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw) |
| 1353 | { |
| 1354 | u32 maccontrol = wlc_hw->maccontrol; |
| 1355 | |
| 1356 | /* OR in the wake bit if overridden */ |
| 1357 | if (wlc_hw->wake_override) |
| 1358 | maccontrol |= MCTL_WAKE; |
| 1359 | |
| 1360 | /* set AP and INFRA bits for mute if needed */ |
| 1361 | if (wlc_hw->mute_override) { |
| 1362 | maccontrol &= ~(MCTL_AP); |
| 1363 | maccontrol |= MCTL_INFRA; |
| 1364 | } |
| 1365 | |
| 1366 | W_REG(&wlc_hw->regs->maccontrol, maccontrol); |
| 1367 | } |
| 1368 | |
| 1369 | /* set or clear maccontrol bits */ |
| 1370 | void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val) |
| 1371 | { |
| 1372 | u32 maccontrol; |
| 1373 | u32 new_maccontrol; |
| 1374 | |
| 1375 | if (val & ~mask) |
| 1376 | return; /* error condition */ |
| 1377 | maccontrol = wlc_hw->maccontrol; |
| 1378 | new_maccontrol = (maccontrol & ~mask) | val; |
| 1379 | |
| 1380 | /* if the new maccontrol value is the same as the old, nothing to do */ |
| 1381 | if (new_maccontrol == maccontrol) |
| 1382 | return; |
| 1383 | |
| 1384 | /* something changed, cache the new value */ |
| 1385 | wlc_hw->maccontrol = new_maccontrol; |
| 1386 | |
| 1387 | /* write the new values with overrides applied */ |
| 1388 | brcms_c_mctrl_write(wlc_hw); |
| 1389 | } |
| 1390 | |
| 1391 | void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw, |
| 1392 | u32 override_bit) |
| 1393 | { |
| 1394 | if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { |
| 1395 | mboolset(wlc_hw->wake_override, override_bit); |
| 1396 | return; |
| 1397 | } |
| 1398 | |
| 1399 | mboolset(wlc_hw->wake_override, override_bit); |
| 1400 | |
| 1401 | brcms_c_mctrl_write(wlc_hw); |
| 1402 | brcms_b_wait_for_wake(wlc_hw); |
| 1403 | } |
| 1404 | |
| 1405 | void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw, |
| 1406 | u32 override_bit) |
| 1407 | { |
| 1408 | mboolclr(wlc_hw->wake_override, override_bit); |
| 1409 | |
| 1410 | if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) |
| 1411 | return; |
| 1412 | |
| 1413 | brcms_c_mctrl_write(wlc_hw); |
| 1414 | } |
| 1415 | |
| 1416 | /* When driver needs ucode to stop beaconing, it has to make sure that |
| 1417 | * MCTL_AP is clear and MCTL_INFRA is set |
| 1418 | * Mode MCTL_AP MCTL_INFRA |
| 1419 | * AP 1 1 |
| 1420 | * STA 0 1 <--- This will ensure no beacons |
| 1421 | * IBSS 0 0 |
| 1422 | */ |
| 1423 | static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw) |
| 1424 | { |
| 1425 | wlc_hw->mute_override = 1; |
| 1426 | |
| 1427 | /* if maccontrol already has AP == 0 and INFRA == 1 without this |
| 1428 | * override, then there is no change to write |
| 1429 | */ |
| 1430 | if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) |
| 1431 | return; |
| 1432 | |
| 1433 | brcms_c_mctrl_write(wlc_hw); |
| 1434 | } |
| 1435 | |
| 1436 | /* Clear the override on AP and INFRA bits */ |
| 1437 | static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw) |
| 1438 | { |
| 1439 | if (wlc_hw->mute_override == 0) |
| 1440 | return; |
| 1441 | |
| 1442 | wlc_hw->mute_override = 0; |
| 1443 | |
| 1444 | /* if maccontrol already has AP == 0 and INFRA == 1 without this |
| 1445 | * override, then there is no change to write |
| 1446 | */ |
| 1447 | if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) |
| 1448 | return; |
| 1449 | |
| 1450 | brcms_c_mctrl_write(wlc_hw); |
| 1451 | } |
| 1452 | |
| 1453 | /* |
| 1454 | * Write a MAC address to the given match reg offset in the RXE match engine. |
| 1455 | */ |
| 1456 | static void |
| 1457 | brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset, |
| 1458 | const u8 *addr) |
| 1459 | { |
| 1460 | struct d11regs __iomem *regs; |
| 1461 | u16 mac_l; |
| 1462 | u16 mac_m; |
| 1463 | u16 mac_h; |
| 1464 | |
| 1465 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n", |
| 1466 | wlc_hw->unit); |
| 1467 | |
| 1468 | regs = wlc_hw->regs; |
| 1469 | mac_l = addr[0] | (addr[1] << 8); |
| 1470 | mac_m = addr[2] | (addr[3] << 8); |
| 1471 | mac_h = addr[4] | (addr[5] << 8); |
| 1472 | |
| 1473 | /* enter the MAC addr into the RXE match registers */ |
| 1474 | W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset); |
| 1475 | W_REG(®s->rcm_mat_data, mac_l); |
| 1476 | W_REG(®s->rcm_mat_data, mac_m); |
| 1477 | W_REG(®s->rcm_mat_data, mac_h); |
| 1478 | |
| 1479 | } |
| 1480 | |
| 1481 | void |
| 1482 | brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len, |
| 1483 | void *buf) |
| 1484 | { |
| 1485 | struct d11regs __iomem *regs; |
| 1486 | u32 word; |
| 1487 | __le32 word_le; |
| 1488 | __be32 word_be; |
| 1489 | bool be_bit; |
| 1490 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 1491 | |
| 1492 | regs = wlc_hw->regs; |
| 1493 | W_REG(®s->tplatewrptr, offset); |
| 1494 | |
| 1495 | /* if MCTL_BIGEND bit set in mac control register, |
| 1496 | * the chip swaps data in fifo, as well as data in |
| 1497 | * template ram |
| 1498 | */ |
| 1499 | be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0; |
| 1500 | |
| 1501 | while (len > 0) { |
| 1502 | memcpy(&word, buf, sizeof(u32)); |
| 1503 | |
| 1504 | if (be_bit) { |
| 1505 | word_be = cpu_to_be32(word); |
| 1506 | word = *(u32 *)&word_be; |
| 1507 | } else { |
| 1508 | word_le = cpu_to_le32(word); |
| 1509 | word = *(u32 *)&word_le; |
| 1510 | } |
| 1511 | |
| 1512 | W_REG(®s->tplatewrdata, word); |
| 1513 | |
| 1514 | buf = (u8 *) buf + sizeof(u32); |
| 1515 | len -= sizeof(u32); |
| 1516 | } |
| 1517 | } |
| 1518 | |
| 1519 | static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin) |
| 1520 | { |
| 1521 | wlc_hw->band->CWmin = newmin; |
| 1522 | |
| 1523 | W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN); |
| 1524 | (void)R_REG(&wlc_hw->regs->objaddr); |
| 1525 | W_REG(&wlc_hw->regs->objdata, newmin); |
| 1526 | } |
| 1527 | |
| 1528 | static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax) |
| 1529 | { |
| 1530 | wlc_hw->band->CWmax = newmax; |
| 1531 | |
| 1532 | W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX); |
| 1533 | (void)R_REG(&wlc_hw->regs->objaddr); |
| 1534 | W_REG(&wlc_hw->regs->objdata, newmax); |
| 1535 | } |
| 1536 | |
| 1537 | void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw) |
| 1538 | { |
| 1539 | bool fastclk; |
| 1540 | |
| 1541 | /* request FAST clock if not on */ |
| 1542 | fastclk = wlc_hw->forcefastclk; |
| 1543 | if (!fastclk) |
| 1544 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 1545 | |
| 1546 | wlc_phy_bw_state_set(wlc_hw->band->pi, bw); |
| 1547 | |
| 1548 | brcms_b_phy_reset(wlc_hw); |
| 1549 | wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); |
| 1550 | |
| 1551 | /* restore the clk */ |
| 1552 | if (!fastclk) |
| 1553 | brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); |
| 1554 | } |
| 1555 | |
| 1556 | static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw) |
| 1557 | { |
| 1558 | u16 v; |
| 1559 | struct brcms_c_info *wlc = wlc_hw->wlc; |
| 1560 | /* update SYNTHPU_DLY */ |
| 1561 | |
| 1562 | if (BRCMS_ISLCNPHY(wlc->band)) |
| 1563 | v = SYNTHPU_DLY_LPPHY_US; |
| 1564 | else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) |
| 1565 | v = SYNTHPU_DLY_NPHY_US; |
| 1566 | else |
| 1567 | v = SYNTHPU_DLY_BPHY_US; |
| 1568 | |
| 1569 | brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v); |
| 1570 | } |
| 1571 | |
| 1572 | static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw) |
| 1573 | { |
| 1574 | u16 phyctl; |
| 1575 | u16 phytxant = wlc_hw->bmac_phytxant; |
| 1576 | u16 mask = PHY_TXC_ANT_MASK; |
| 1577 | |
| 1578 | /* set the Probe Response frame phy control word */ |
| 1579 | phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); |
| 1580 | phyctl = (phyctl & ~mask) | phytxant; |
| 1581 | brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); |
| 1582 | |
| 1583 | /* set the Response (ACK/CTS) frame phy control word */ |
| 1584 | phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD); |
| 1585 | phyctl = (phyctl & ~mask) | phytxant; |
| 1586 | brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); |
| 1587 | } |
| 1588 | |
| 1589 | static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw, |
| 1590 | u8 rate) |
| 1591 | { |
| 1592 | uint i; |
| 1593 | u8 plcp_rate = 0; |
| 1594 | struct plcp_signal_rate_lookup { |
| 1595 | u8 rate; |
| 1596 | u8 signal_rate; |
| 1597 | }; |
| 1598 | /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ |
| 1599 | const struct plcp_signal_rate_lookup rate_lookup[] = { |
| 1600 | {BRCM_RATE_6M, 0xB}, |
| 1601 | {BRCM_RATE_9M, 0xF}, |
| 1602 | {BRCM_RATE_12M, 0xA}, |
| 1603 | {BRCM_RATE_18M, 0xE}, |
| 1604 | {BRCM_RATE_24M, 0x9}, |
| 1605 | {BRCM_RATE_36M, 0xD}, |
| 1606 | {BRCM_RATE_48M, 0x8}, |
| 1607 | {BRCM_RATE_54M, 0xC} |
| 1608 | }; |
| 1609 | |
| 1610 | for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { |
| 1611 | if (rate == rate_lookup[i].rate) { |
| 1612 | plcp_rate = rate_lookup[i].signal_rate; |
| 1613 | break; |
| 1614 | } |
| 1615 | } |
| 1616 | |
| 1617 | /* Find the SHM pointer to the rate table entry by looking in the |
| 1618 | * Direct-map Table |
| 1619 | */ |
| 1620 | return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); |
| 1621 | } |
| 1622 | |
| 1623 | static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw) |
| 1624 | { |
| 1625 | u8 rate; |
| 1626 | u8 rates[8] = { |
| 1627 | BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M, |
| 1628 | BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M |
| 1629 | }; |
| 1630 | u16 entry_ptr; |
| 1631 | u16 pctl1; |
| 1632 | uint i; |
| 1633 | |
| 1634 | if (!BRCMS_PHY_11N_CAP(wlc_hw->band)) |
| 1635 | return; |
| 1636 | |
| 1637 | /* walk the phy rate table and update the entries */ |
| 1638 | for (i = 0; i < ARRAY_SIZE(rates); i++) { |
| 1639 | rate = rates[i]; |
| 1640 | |
| 1641 | entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate); |
| 1642 | |
| 1643 | /* read the SHM Rate Table entry OFDM PCTL1 values */ |
| 1644 | pctl1 = |
| 1645 | brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); |
| 1646 | |
| 1647 | /* modify the value */ |
| 1648 | pctl1 &= ~PHY_TXC1_MODE_MASK; |
| 1649 | pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); |
| 1650 | |
| 1651 | /* Update the SHM Rate Table entry OFDM PCTL1 values */ |
| 1652 | brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, |
| 1653 | pctl1); |
| 1654 | } |
| 1655 | } |
| 1656 | |
| 1657 | /* band-specific init */ |
| 1658 | static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec) |
| 1659 | { |
| 1660 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 1661 | |
| 1662 | BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, |
| 1663 | wlc_hw->band->bandunit); |
| 1664 | |
| 1665 | brcms_c_ucode_bsinit(wlc_hw); |
| 1666 | |
| 1667 | wlc_phy_init(wlc_hw->band->pi, chanspec); |
| 1668 | |
| 1669 | brcms_c_ucode_txant_set(wlc_hw); |
| 1670 | |
| 1671 | /* |
| 1672 | * cwmin is band-specific, update hardware |
| 1673 | * with value for current band |
| 1674 | */ |
| 1675 | brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin); |
| 1676 | brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax); |
| 1677 | |
| 1678 | brcms_b_update_slot_timing(wlc_hw, |
| 1679 | wlc_hw->band->bandtype == BRCM_BAND_5G ? |
| 1680 | true : wlc_hw->shortslot); |
| 1681 | |
| 1682 | /* write phytype and phyvers */ |
| 1683 | brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); |
| 1684 | brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); |
| 1685 | |
| 1686 | /* |
| 1687 | * initialize the txphyctl1 rate table since |
| 1688 | * shmem is shared between bands |
| 1689 | */ |
| 1690 | brcms_upd_ofdm_pctl1_table(wlc_hw); |
| 1691 | |
| 1692 | brcms_b_upd_synthpu(wlc_hw); |
| 1693 | } |
| 1694 | |
| 1695 | /* Perform a soft reset of the PHY PLL */ |
| 1696 | void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw) |
| 1697 | { |
| 1698 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 1699 | |
| 1700 | ai_corereg(wlc_hw->sih, SI_CC_IDX, |
| 1701 | offsetof(struct chipcregs, chipcontrol_addr), ~0, 0); |
| 1702 | udelay(1); |
| 1703 | ai_corereg(wlc_hw->sih, SI_CC_IDX, |
| 1704 | offsetof(struct chipcregs, chipcontrol_data), 0x4, 0); |
| 1705 | udelay(1); |
| 1706 | ai_corereg(wlc_hw->sih, SI_CC_IDX, |
| 1707 | offsetof(struct chipcregs, chipcontrol_data), 0x4, 4); |
| 1708 | udelay(1); |
| 1709 | ai_corereg(wlc_hw->sih, SI_CC_IDX, |
| 1710 | offsetof(struct chipcregs, chipcontrol_data), 0x4, 0); |
| 1711 | udelay(1); |
| 1712 | } |
| 1713 | |
| 1714 | /* light way to turn on phy clock without reset for NPHY only |
| 1715 | * refer to brcms_b_core_phy_clk for full version |
| 1716 | */ |
| 1717 | void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk) |
| 1718 | { |
| 1719 | /* support(necessary for NPHY and HYPHY) only */ |
| 1720 | if (!BRCMS_ISNPHY(wlc_hw->band)) |
| 1721 | return; |
| 1722 | |
| 1723 | if (ON == clk) |
| 1724 | ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC); |
| 1725 | else |
| 1726 | ai_core_cflags(wlc_hw->sih, SICF_FGC, 0); |
| 1727 | |
| 1728 | } |
| 1729 | |
| 1730 | void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk) |
| 1731 | { |
| 1732 | if (ON == clk) |
| 1733 | ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); |
| 1734 | else |
| 1735 | ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); |
| 1736 | } |
| 1737 | |
| 1738 | void brcms_b_phy_reset(struct brcms_hardware *wlc_hw) |
| 1739 | { |
| 1740 | struct brcms_phy_pub *pih = wlc_hw->band->pi; |
| 1741 | u32 phy_bw_clkbits; |
| 1742 | bool phy_in_reset = false; |
| 1743 | |
| 1744 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 1745 | |
| 1746 | if (pih == NULL) |
| 1747 | return; |
| 1748 | |
| 1749 | phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); |
| 1750 | |
| 1751 | /* Specific reset sequence required for NPHY rev 3 and 4 */ |
| 1752 | if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && |
| 1753 | NREV_LE(wlc_hw->band->phyrev, 4)) { |
| 1754 | /* Set the PHY bandwidth */ |
| 1755 | ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); |
| 1756 | |
| 1757 | udelay(1); |
| 1758 | |
| 1759 | /* Perform a soft reset of the PHY PLL */ |
| 1760 | brcms_b_core_phypll_reset(wlc_hw); |
| 1761 | |
| 1762 | /* reset the PHY */ |
| 1763 | ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), |
| 1764 | (SICF_PRST | SICF_PCLKE)); |
| 1765 | phy_in_reset = true; |
| 1766 | } else { |
| 1767 | ai_core_cflags(wlc_hw->sih, |
| 1768 | (SICF_PRST | SICF_PCLKE | SICF_BWMASK), |
| 1769 | (SICF_PRST | SICF_PCLKE | phy_bw_clkbits)); |
| 1770 | } |
| 1771 | |
| 1772 | udelay(2); |
| 1773 | brcms_b_core_phy_clk(wlc_hw, ON); |
| 1774 | |
| 1775 | if (pih) |
| 1776 | wlc_phy_anacore(pih, ON); |
| 1777 | } |
| 1778 | |
| 1779 | /* switch to and initialize new band */ |
| 1780 | static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit, |
| 1781 | u16 chanspec) { |
| 1782 | struct brcms_c_info *wlc = wlc_hw->wlc; |
| 1783 | u32 macintmask; |
| 1784 | |
| 1785 | /* Enable the d11 core before accessing it */ |
| 1786 | if (!ai_iscoreup(wlc_hw->sih)) { |
| 1787 | ai_core_reset(wlc_hw->sih, 0, 0); |
| 1788 | brcms_c_mctrl_reset(wlc_hw); |
| 1789 | } |
| 1790 | |
| 1791 | macintmask = brcms_c_setband_inact(wlc, bandunit); |
| 1792 | |
| 1793 | if (!wlc_hw->up) |
| 1794 | return; |
| 1795 | |
| 1796 | brcms_b_core_phy_clk(wlc_hw, ON); |
| 1797 | |
| 1798 | /* band-specific initializations */ |
| 1799 | brcms_b_bsinit(wlc, chanspec); |
| 1800 | |
| 1801 | /* |
| 1802 | * If there are any pending software interrupt bits, |
| 1803 | * then replace these with a harmless nonzero value |
| 1804 | * so brcms_c_dpc() will re-enable interrupts when done. |
| 1805 | */ |
| 1806 | if (wlc->macintstatus) |
| 1807 | wlc->macintstatus = MI_DMAINT; |
| 1808 | |
| 1809 | /* restore macintmask */ |
| 1810 | brcms_intrsrestore(wlc->wl, macintmask); |
| 1811 | |
| 1812 | /* ucode should still be suspended.. */ |
| 1813 | WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); |
| 1814 | } |
| 1815 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 1816 | static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw) |
| 1817 | { |
| 1818 | |
| 1819 | /* reject unsupported corerev */ |
| 1820 | if (!CONF_HAS(D11CONF, wlc_hw->corerev)) { |
| 1821 | wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n", |
| 1822 | wlc_hw->corerev); |
| 1823 | return false; |
| 1824 | } |
| 1825 | |
| 1826 | return true; |
| 1827 | } |
| 1828 | |
| 1829 | /* Validate some board info parameters */ |
| 1830 | static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw) |
| 1831 | { |
| 1832 | uint boardrev = wlc_hw->boardrev; |
| 1833 | |
| 1834 | /* 4 bits each for board type, major, minor, and tiny version */ |
| 1835 | uint brt = (boardrev & 0xf000) >> 12; |
| 1836 | uint b0 = (boardrev & 0xf00) >> 8; |
| 1837 | uint b1 = (boardrev & 0xf0) >> 4; |
| 1838 | uint b2 = boardrev & 0xf; |
| 1839 | |
| 1840 | /* voards from other vendors are always considered valid */ |
| 1841 | if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) |
| 1842 | return true; |
| 1843 | |
| 1844 | /* do some boardrev sanity checks when boardvendor is Broadcom */ |
| 1845 | if (boardrev == 0) |
| 1846 | return false; |
| 1847 | |
| 1848 | if (boardrev <= 0xff) |
| 1849 | return true; |
| 1850 | |
| 1851 | if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) |
| 1852 | || (b2 > 9)) |
| 1853 | return false; |
| 1854 | |
| 1855 | return true; |
| 1856 | } |
| 1857 | |
| 1858 | static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw) |
| 1859 | { |
| 1860 | enum brcms_srom_id var_id = BRCMS_SROM_MACADDR; |
| 1861 | char *macaddr; |
| 1862 | |
| 1863 | /* If macaddr exists, use it (Sromrev4, CIS, ...). */ |
| 1864 | macaddr = getvar(wlc_hw->sih, var_id); |
| 1865 | if (macaddr != NULL) |
| 1866 | return macaddr; |
| 1867 | |
| 1868 | if (wlc_hw->_nbands > 1) |
| 1869 | var_id = BRCMS_SROM_ET1MACADDR; |
| 1870 | else |
| 1871 | var_id = BRCMS_SROM_IL0MACADDR; |
| 1872 | |
| 1873 | macaddr = getvar(wlc_hw->sih, var_id); |
| 1874 | if (macaddr == NULL) |
| 1875 | wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " |
| 1876 | "getvar(%d) not found\n", wlc_hw->unit, var_id); |
| 1877 | |
| 1878 | return macaddr; |
| 1879 | } |
| 1880 | |
| 1881 | /* power both the pll and external oscillator on/off */ |
| 1882 | static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want) |
| 1883 | { |
| 1884 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); |
| 1885 | |
| 1886 | /* |
| 1887 | * dont power down if plldown is false or |
| 1888 | * we must poll hw radio disable |
| 1889 | */ |
| 1890 | if (!want && wlc_hw->pllreq) |
| 1891 | return; |
| 1892 | |
| 1893 | if (wlc_hw->sih) |
| 1894 | ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); |
| 1895 | |
| 1896 | wlc_hw->sbclk = want; |
| 1897 | if (!wlc_hw->sbclk) { |
| 1898 | wlc_hw->clk = false; |
| 1899 | if (wlc_hw->band && wlc_hw->band->pi) |
| 1900 | wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); |
| 1901 | } |
| 1902 | } |
| 1903 | |
| 1904 | /* |
| 1905 | * Return true if radio is disabled, otherwise false. |
| 1906 | * hw radio disable signal is an external pin, users activate it asynchronously |
| 1907 | * this function could be called when driver is down and w/o clock |
| 1908 | * it operates on different registers depending on corerev and boardflag. |
| 1909 | */ |
| 1910 | static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw) |
| 1911 | { |
| 1912 | bool v, clk, xtal; |
| 1913 | u32 resetbits = 0, flags = 0; |
| 1914 | |
| 1915 | xtal = wlc_hw->sbclk; |
| 1916 | if (!xtal) |
| 1917 | brcms_b_xtal(wlc_hw, ON); |
| 1918 | |
| 1919 | /* may need to take core out of reset first */ |
| 1920 | clk = wlc_hw->clk; |
| 1921 | if (!clk) { |
| 1922 | /* |
| 1923 | * mac no longer enables phyclk automatically when driver |
| 1924 | * accesses phyreg throughput mac. This can be skipped since |
| 1925 | * only mac reg is accessed below |
| 1926 | */ |
| 1927 | flags |= SICF_PCLKE; |
| 1928 | |
| 1929 | /* |
| 1930 | * AI chip doesn't restore bar0win2 on |
| 1931 | * hibernation/resume, need sw fixup |
| 1932 | */ |
| 1933 | if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || |
| 1934 | (wlc_hw->sih->chip == BCM43225_CHIP_ID)) |
| 1935 | wlc_hw->regs = (struct d11regs __iomem *) |
| 1936 | ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); |
| 1937 | ai_core_reset(wlc_hw->sih, flags, resetbits); |
| 1938 | brcms_c_mctrl_reset(wlc_hw); |
| 1939 | } |
| 1940 | |
| 1941 | v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); |
| 1942 | |
| 1943 | /* put core back into reset */ |
| 1944 | if (!clk) |
| 1945 | ai_core_disable(wlc_hw->sih, 0); |
| 1946 | |
| 1947 | if (!xtal) |
| 1948 | brcms_b_xtal(wlc_hw, OFF); |
| 1949 | |
| 1950 | return v; |
| 1951 | } |
| 1952 | |
| 1953 | static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo) |
| 1954 | { |
| 1955 | struct dma_pub *di = wlc_hw->di[fifo]; |
| 1956 | return dma_rxreset(di); |
| 1957 | } |
| 1958 | |
| 1959 | /* d11 core reset |
| 1960 | * ensure fask clock during reset |
| 1961 | * reset dma |
| 1962 | * reset d11(out of reset) |
| 1963 | * reset phy(out of reset) |
| 1964 | * clear software macintstatus for fresh new start |
| 1965 | * one testing hack wlc_hw->noreset will bypass the d11/phy reset |
| 1966 | */ |
| 1967 | void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags) |
| 1968 | { |
| 1969 | struct d11regs __iomem *regs; |
| 1970 | uint i; |
| 1971 | bool fastclk; |
| 1972 | u32 resetbits = 0; |
| 1973 | |
| 1974 | if (flags == BRCMS_USE_COREFLAGS) |
| 1975 | flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); |
| 1976 | |
| 1977 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 1978 | |
| 1979 | regs = wlc_hw->regs; |
| 1980 | |
| 1981 | /* request FAST clock if not on */ |
| 1982 | fastclk = wlc_hw->forcefastclk; |
| 1983 | if (!fastclk) |
| 1984 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 1985 | |
| 1986 | /* reset the dma engines except first time thru */ |
| 1987 | if (ai_iscoreup(wlc_hw->sih)) { |
| 1988 | for (i = 0; i < NFIFO; i++) |
| 1989 | if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i]))) |
| 1990 | wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: " |
| 1991 | "dma_txreset[%d]: cannot stop dma\n", |
| 1992 | wlc_hw->unit, __func__, i); |
| 1993 | |
| 1994 | if ((wlc_hw->di[RX_FIFO]) |
| 1995 | && (!wlc_dma_rxreset(wlc_hw, RX_FIFO))) |
| 1996 | wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset" |
| 1997 | "[%d]: cannot stop dma\n", |
| 1998 | wlc_hw->unit, __func__, RX_FIFO); |
| 1999 | } |
| 2000 | /* if noreset, just stop the psm and return */ |
| 2001 | if (wlc_hw->noreset) { |
| 2002 | wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ |
| 2003 | brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); |
| 2004 | return; |
| 2005 | } |
| 2006 | |
| 2007 | /* |
| 2008 | * mac no longer enables phyclk automatically when driver accesses |
| 2009 | * phyreg throughput mac, AND phy_reset is skipped at early stage when |
| 2010 | * band->pi is invalid. need to enable PHY CLK |
| 2011 | */ |
| 2012 | flags |= SICF_PCLKE; |
| 2013 | |
| 2014 | /* |
| 2015 | * reset the core |
| 2016 | * In chips with PMU, the fastclk request goes through d11 core |
| 2017 | * reg 0x1e0, which is cleared by the core_reset. have to re-request it. |
| 2018 | * |
| 2019 | * This adds some delay and we can optimize it by also requesting |
| 2020 | * fastclk through chipcommon during this period if necessary. But |
| 2021 | * that has to work coordinate with other driver like mips/arm since |
| 2022 | * they may touch chipcommon as well. |
| 2023 | */ |
| 2024 | wlc_hw->clk = false; |
| 2025 | ai_core_reset(wlc_hw->sih, flags, resetbits); |
| 2026 | wlc_hw->clk = true; |
| 2027 | if (wlc_hw->band && wlc_hw->band->pi) |
| 2028 | wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); |
| 2029 | |
| 2030 | brcms_c_mctrl_reset(wlc_hw); |
| 2031 | |
| 2032 | if (wlc_hw->sih->cccaps & CC_CAP_PMU) |
| 2033 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 2034 | |
| 2035 | brcms_b_phy_reset(wlc_hw); |
| 2036 | |
| 2037 | /* turn on PHY_PLL */ |
| 2038 | brcms_b_core_phypll_ctl(wlc_hw, true); |
| 2039 | |
| 2040 | /* clear sw intstatus */ |
| 2041 | wlc_hw->wlc->macintstatus = 0; |
| 2042 | |
| 2043 | /* restore the clk setting */ |
| 2044 | if (!fastclk) |
| 2045 | brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); |
| 2046 | } |
| 2047 | |
| 2048 | /* txfifo sizes needs to be modified(increased) since the newer cores |
| 2049 | * have more memory. |
| 2050 | */ |
| 2051 | static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw) |
| 2052 | { |
| 2053 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2054 | u16 fifo_nu; |
| 2055 | u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk; |
| 2056 | u16 txfifo_def, txfifo_def1; |
| 2057 | u16 txfifo_cmd; |
| 2058 | |
| 2059 | /* tx fifos start at TXFIFO_START_BLK from the Base address */ |
| 2060 | txfifo_startblk = TXFIFO_START_BLK; |
| 2061 | |
| 2062 | /* sequence of operations: reset fifo, set fifo size, reset fifo */ |
| 2063 | for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) { |
| 2064 | |
| 2065 | txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu]; |
| 2066 | txfifo_def = (txfifo_startblk & 0xff) | |
| 2067 | (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT); |
| 2068 | txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) | |
| 2069 | ((((txfifo_endblk - |
| 2070 | 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT); |
| 2071 | txfifo_cmd = |
| 2072 | TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT); |
| 2073 | |
| 2074 | W_REG(®s->xmtfifocmd, txfifo_cmd); |
| 2075 | W_REG(®s->xmtfifodef, txfifo_def); |
| 2076 | W_REG(®s->xmtfifodef1, txfifo_def1); |
| 2077 | |
| 2078 | W_REG(®s->xmtfifocmd, txfifo_cmd); |
| 2079 | |
| 2080 | txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu]; |
| 2081 | } |
| 2082 | /* |
| 2083 | * need to propagate to shm location to be in sync since ucode/hw won't |
| 2084 | * do this |
| 2085 | */ |
| 2086 | brcms_b_write_shm(wlc_hw, M_FIFOSIZE0, |
| 2087 | wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); |
| 2088 | brcms_b_write_shm(wlc_hw, M_FIFOSIZE1, |
| 2089 | wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); |
| 2090 | brcms_b_write_shm(wlc_hw, M_FIFOSIZE2, |
| 2091 | ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> |
| 2092 | xmtfifo_sz[TX_AC_BK_FIFO])); |
| 2093 | brcms_b_write_shm(wlc_hw, M_FIFOSIZE3, |
| 2094 | ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> |
| 2095 | xmtfifo_sz[TX_BCMC_FIFO])); |
| 2096 | } |
| 2097 | |
| 2098 | /* This function is used for changing the tsf frac register |
| 2099 | * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz |
| 2100 | * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz |
| 2101 | * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz |
| 2102 | * HTPHY Formula is 2^26/freq(MHz) e.g. |
| 2103 | * For spuron2 - 126MHz -> 2^26/126 = 532610.0 |
| 2104 | * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082 |
| 2105 | * For spuron: 123MHz -> 2^26/123 = 545600.5 |
| 2106 | * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341 |
| 2107 | * For spur off: 120MHz -> 2^26/120 = 559240.5 |
| 2108 | * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 |
| 2109 | */ |
| 2110 | |
| 2111 | void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode) |
| 2112 | { |
| 2113 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2114 | |
| 2115 | if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || |
| 2116 | (wlc_hw->sih->chip == BCM43225_CHIP_ID)) { |
| 2117 | if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */ |
| 2118 | W_REG(®s->tsf_clk_frac_l, 0x2082); |
| 2119 | W_REG(®s->tsf_clk_frac_h, 0x8); |
| 2120 | } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */ |
| 2121 | W_REG(®s->tsf_clk_frac_l, 0x5341); |
| 2122 | W_REG(®s->tsf_clk_frac_h, 0x8); |
| 2123 | } else { /* 120Mhz */ |
| 2124 | W_REG(®s->tsf_clk_frac_l, 0x8889); |
| 2125 | W_REG(®s->tsf_clk_frac_h, 0x8); |
| 2126 | } |
| 2127 | } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { |
| 2128 | if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ |
| 2129 | W_REG(®s->tsf_clk_frac_l, 0x7CE0); |
| 2130 | W_REG(®s->tsf_clk_frac_h, 0xC); |
| 2131 | } else { /* 80Mhz */ |
| 2132 | W_REG(®s->tsf_clk_frac_l, 0xCCCD); |
| 2133 | W_REG(®s->tsf_clk_frac_h, 0xC); |
| 2134 | } |
| 2135 | } |
| 2136 | } |
| 2137 | |
| 2138 | /* Initialize GPIOs that are controlled by D11 core */ |
| 2139 | static void brcms_c_gpio_init(struct brcms_c_info *wlc) |
| 2140 | { |
| 2141 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2142 | struct d11regs __iomem *regs; |
| 2143 | u32 gc, gm; |
| 2144 | |
| 2145 | regs = wlc_hw->regs; |
| 2146 | |
| 2147 | /* use GPIO select 0 to get all gpio signals from the gpio out reg */ |
| 2148 | brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); |
| 2149 | |
| 2150 | /* |
| 2151 | * Common GPIO setup: |
| 2152 | * G0 = LED 0 = WLAN Activity |
| 2153 | * G1 = LED 1 = WLAN 2.4 GHz Radio State |
| 2154 | * G2 = LED 2 = WLAN 5 GHz Radio State |
| 2155 | * G4 = radio disable input (HI enabled, LO disabled) |
| 2156 | */ |
| 2157 | |
| 2158 | gc = gm = 0; |
| 2159 | |
| 2160 | /* Allocate GPIOs for mimo antenna diversity feature */ |
| 2161 | if (wlc_hw->antsel_type == ANTSEL_2x3) { |
| 2162 | /* Enable antenna diversity, use 2x3 mode */ |
| 2163 | brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, |
| 2164 | MHF3_ANTSEL_EN, BRCM_BAND_ALL); |
| 2165 | brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, |
| 2166 | MHF3_ANTSEL_MODE, BRCM_BAND_ALL); |
| 2167 | |
| 2168 | /* init superswitch control */ |
| 2169 | wlc_phy_antsel_init(wlc_hw->band->pi, false); |
| 2170 | |
| 2171 | } else if (wlc_hw->antsel_type == ANTSEL_2x4) { |
| 2172 | gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13); |
| 2173 | /* |
| 2174 | * The board itself is powered by these GPIOs |
| 2175 | * (when not sending pattern) so set them high |
| 2176 | */ |
| 2177 | OR_REG(®s->psm_gpio_oe, |
| 2178 | (BOARD_GPIO_12 | BOARD_GPIO_13)); |
| 2179 | OR_REG(®s->psm_gpio_out, |
| 2180 | (BOARD_GPIO_12 | BOARD_GPIO_13)); |
| 2181 | |
| 2182 | /* Enable antenna diversity, use 2x4 mode */ |
| 2183 | brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, |
| 2184 | MHF3_ANTSEL_EN, BRCM_BAND_ALL); |
| 2185 | brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, |
| 2186 | BRCM_BAND_ALL); |
| 2187 | |
| 2188 | /* Configure the desired clock to be 4Mhz */ |
| 2189 | brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV, |
| 2190 | ANTSEL_CLKDIV_4MHZ); |
| 2191 | } |
| 2192 | |
| 2193 | /* |
| 2194 | * gpio 9 controls the PA. ucode is responsible |
| 2195 | * for wiggling out and oe |
| 2196 | */ |
| 2197 | if (wlc_hw->boardflags & BFL_PACTRL) |
| 2198 | gm |= gc |= BOARD_GPIO_PACTRL; |
| 2199 | |
| 2200 | /* apply to gpiocontrol register */ |
| 2201 | ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); |
| 2202 | } |
| 2203 | |
| 2204 | static void brcms_ucode_write(struct brcms_hardware *wlc_hw, |
| 2205 | const __le32 ucode[], const size_t nbytes) |
| 2206 | { |
| 2207 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2208 | uint i; |
| 2209 | uint count; |
| 2210 | |
| 2211 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 2212 | |
| 2213 | count = (nbytes / sizeof(u32)); |
| 2214 | |
| 2215 | W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL)); |
| 2216 | (void)R_REG(®s->objaddr); |
| 2217 | for (i = 0; i < count; i++) |
| 2218 | W_REG(®s->objdata, le32_to_cpu(ucode[i])); |
| 2219 | |
| 2220 | } |
| 2221 | |
| 2222 | static void brcms_ucode_download(struct brcms_hardware *wlc_hw) |
| 2223 | { |
| 2224 | struct brcms_c_info *wlc; |
| 2225 | struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; |
| 2226 | |
| 2227 | wlc = wlc_hw->wlc; |
| 2228 | |
| 2229 | if (wlc_hw->ucode_loaded) |
| 2230 | return; |
| 2231 | |
| 2232 | if (D11REV_IS(wlc_hw->corerev, 23)) { |
| 2233 | if (BRCMS_ISNPHY(wlc_hw->band)) { |
| 2234 | brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo, |
| 2235 | ucode->bcm43xx_16_mimosz); |
| 2236 | wlc_hw->ucode_loaded = true; |
| 2237 | } else |
| 2238 | wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " |
| 2239 | "corerev %d\n", |
| 2240 | __func__, wlc_hw->unit, wlc_hw->corerev); |
| 2241 | } else if (D11REV_IS(wlc_hw->corerev, 24)) { |
| 2242 | if (BRCMS_ISLCNPHY(wlc_hw->band)) { |
| 2243 | brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn, |
| 2244 | ucode->bcm43xx_24_lcnsz); |
| 2245 | wlc_hw->ucode_loaded = true; |
| 2246 | } else { |
| 2247 | wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in " |
| 2248 | "corerev %d\n", |
| 2249 | __func__, wlc_hw->unit, wlc_hw->corerev); |
| 2250 | } |
| 2251 | } |
| 2252 | } |
| 2253 | |
| 2254 | void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant) |
| 2255 | { |
| 2256 | /* update sw state */ |
| 2257 | wlc_hw->bmac_phytxant = phytxant; |
| 2258 | |
| 2259 | /* push to ucode if up */ |
| 2260 | if (!wlc_hw->up) |
| 2261 | return; |
| 2262 | brcms_c_ucode_txant_set(wlc_hw); |
| 2263 | |
| 2264 | } |
| 2265 | |
| 2266 | u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw) |
| 2267 | { |
| 2268 | return (u16) wlc_hw->wlc->stf->txant; |
| 2269 | } |
| 2270 | |
| 2271 | void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type) |
| 2272 | { |
| 2273 | wlc_hw->antsel_type = antsel_type; |
| 2274 | |
| 2275 | /* Update the antsel type for phy module to use */ |
| 2276 | wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); |
| 2277 | } |
| 2278 | |
| 2279 | static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw) |
| 2280 | { |
| 2281 | bool fatal = false; |
| 2282 | uint unit; |
| 2283 | uint intstatus, idx; |
| 2284 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2285 | struct wiphy *wiphy = wlc_hw->wlc->wiphy; |
| 2286 | |
| 2287 | unit = wlc_hw->unit; |
| 2288 | |
| 2289 | for (idx = 0; idx < NFIFO; idx++) { |
| 2290 | /* read intstatus register and ignore any non-error bits */ |
| 2291 | intstatus = |
| 2292 | R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS; |
| 2293 | if (!intstatus) |
| 2294 | continue; |
| 2295 | |
| 2296 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n", |
| 2297 | unit, idx, intstatus); |
| 2298 | |
| 2299 | if (intstatus & I_RO) { |
| 2300 | wiphy_err(wiphy, "wl%d: fifo %d: receive fifo " |
| 2301 | "overflow\n", unit, idx); |
| 2302 | fatal = true; |
| 2303 | } |
| 2304 | |
| 2305 | if (intstatus & I_PC) { |
| 2306 | wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n", |
| 2307 | unit, idx); |
| 2308 | fatal = true; |
| 2309 | } |
| 2310 | |
| 2311 | if (intstatus & I_PD) { |
| 2312 | wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit, |
| 2313 | idx); |
| 2314 | fatal = true; |
| 2315 | } |
| 2316 | |
| 2317 | if (intstatus & I_DE) { |
| 2318 | wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol " |
| 2319 | "error\n", unit, idx); |
| 2320 | fatal = true; |
| 2321 | } |
| 2322 | |
| 2323 | if (intstatus & I_RU) |
| 2324 | wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor " |
| 2325 | "underflow\n", idx, unit); |
| 2326 | |
| 2327 | if (intstatus & I_XU) { |
| 2328 | wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo " |
| 2329 | "underflow\n", idx, unit); |
| 2330 | fatal = true; |
| 2331 | } |
| 2332 | |
| 2333 | if (fatal) { |
Roland Vossen | c261bdf | 2011-10-18 14:03:04 +0200 | [diff] [blame] | 2334 | brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */ |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2335 | break; |
| 2336 | } else |
| 2337 | W_REG(®s->intctrlregs[idx].intstatus, |
| 2338 | intstatus); |
| 2339 | } |
| 2340 | } |
| 2341 | |
| 2342 | void brcms_c_intrson(struct brcms_c_info *wlc) |
| 2343 | { |
| 2344 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2345 | wlc->macintmask = wlc->defmacintmask; |
| 2346 | W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); |
| 2347 | } |
| 2348 | |
| 2349 | /* |
| 2350 | * callback for siutils.c, which has only wlc handler, no wl they both check |
| 2351 | * up, not only because there is no need to off/restore d11 interrupt but also |
| 2352 | * because per-port code may require sync with valid interrupt. |
| 2353 | */ |
| 2354 | static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc) |
| 2355 | { |
| 2356 | if (!wlc->hw->up) |
| 2357 | return 0; |
| 2358 | |
| 2359 | return brcms_intrsoff(wlc->wl); |
| 2360 | } |
| 2361 | |
| 2362 | static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask) |
| 2363 | { |
| 2364 | if (!wlc->hw->up) |
| 2365 | return; |
| 2366 | |
| 2367 | brcms_intrsrestore(wlc->wl, macintmask); |
| 2368 | } |
| 2369 | |
| 2370 | u32 brcms_c_intrsoff(struct brcms_c_info *wlc) |
| 2371 | { |
| 2372 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2373 | u32 macintmask; |
| 2374 | |
| 2375 | if (!wlc_hw->clk) |
| 2376 | return 0; |
| 2377 | |
| 2378 | macintmask = wlc->macintmask; /* isr can still happen */ |
| 2379 | |
| 2380 | W_REG(&wlc_hw->regs->macintmask, 0); |
| 2381 | (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */ |
| 2382 | udelay(1); /* ensure int line is no longer driven */ |
| 2383 | wlc->macintmask = 0; |
| 2384 | |
| 2385 | /* return previous macintmask; resolve race between us and our isr */ |
| 2386 | return wlc->macintstatus ? 0 : macintmask; |
| 2387 | } |
| 2388 | |
| 2389 | void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask) |
| 2390 | { |
| 2391 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2392 | if (!wlc_hw->clk) |
| 2393 | return; |
| 2394 | |
| 2395 | wlc->macintmask = macintmask; |
| 2396 | W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); |
| 2397 | } |
| 2398 | |
| 2399 | static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw, |
| 2400 | uint tx_fifo) |
| 2401 | { |
| 2402 | u8 fifo = 1 << tx_fifo; |
| 2403 | |
| 2404 | /* Two clients of this code, 11h Quiet period and scanning. */ |
| 2405 | |
| 2406 | /* only suspend if not already suspended */ |
| 2407 | if ((wlc_hw->suspended_fifos & fifo) == fifo) |
| 2408 | return; |
| 2409 | |
| 2410 | /* force the core awake only if not already */ |
| 2411 | if (wlc_hw->suspended_fifos == 0) |
| 2412 | brcms_c_ucode_wake_override_set(wlc_hw, |
| 2413 | BRCMS_WAKE_OVERRIDE_TXFIFO); |
| 2414 | |
| 2415 | wlc_hw->suspended_fifos |= fifo; |
| 2416 | |
| 2417 | if (wlc_hw->di[tx_fifo]) { |
| 2418 | /* |
| 2419 | * Suspending AMPDU transmissions in the middle can cause |
| 2420 | * underflow which may result in mismatch between ucode and |
| 2421 | * driver so suspend the mac before suspending the FIFO |
| 2422 | */ |
| 2423 | if (BRCMS_PHY_11N_CAP(wlc_hw->band)) |
| 2424 | brcms_c_suspend_mac_and_wait(wlc_hw->wlc); |
| 2425 | |
| 2426 | dma_txsuspend(wlc_hw->di[tx_fifo]); |
| 2427 | |
| 2428 | if (BRCMS_PHY_11N_CAP(wlc_hw->band)) |
| 2429 | brcms_c_enable_mac(wlc_hw->wlc); |
| 2430 | } |
| 2431 | } |
| 2432 | |
| 2433 | static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw, |
| 2434 | uint tx_fifo) |
| 2435 | { |
| 2436 | /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case |
| 2437 | * but need to be done here for PIO otherwise the watchdog will catch |
| 2438 | * the inconsistency and fire |
| 2439 | */ |
| 2440 | /* Two clients of this code, 11h Quiet period and scanning. */ |
| 2441 | if (wlc_hw->di[tx_fifo]) |
| 2442 | dma_txresume(wlc_hw->di[tx_fifo]); |
| 2443 | |
| 2444 | /* allow core to sleep again */ |
| 2445 | if (wlc_hw->suspended_fifos == 0) |
| 2446 | return; |
| 2447 | else { |
| 2448 | wlc_hw->suspended_fifos &= ~(1 << tx_fifo); |
| 2449 | if (wlc_hw->suspended_fifos == 0) |
| 2450 | brcms_c_ucode_wake_override_clear(wlc_hw, |
| 2451 | BRCMS_WAKE_OVERRIDE_TXFIFO); |
| 2452 | } |
| 2453 | } |
| 2454 | |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 2455 | /* precondition: requires the mac core to be enabled */ |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 2456 | static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2457 | { |
| 2458 | static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; |
| 2459 | |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 2460 | if (mute_tx) { |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2461 | /* suspend tx fifos */ |
| 2462 | brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); |
| 2463 | brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); |
| 2464 | brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); |
| 2465 | brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); |
| 2466 | |
| 2467 | /* zero the address match register so we do not send ACKs */ |
| 2468 | brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, |
| 2469 | null_ether_addr); |
| 2470 | } else { |
| 2471 | /* resume tx fifos */ |
| 2472 | brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); |
| 2473 | brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); |
| 2474 | brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); |
| 2475 | brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); |
| 2476 | |
| 2477 | /* Restore address */ |
| 2478 | brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, |
| 2479 | wlc_hw->etheraddr); |
| 2480 | } |
| 2481 | |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 2482 | wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2483 | |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 2484 | if (mute_tx) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2485 | brcms_c_ucode_mute_override_set(wlc_hw); |
| 2486 | else |
| 2487 | brcms_c_ucode_mute_override_clear(wlc_hw); |
| 2488 | } |
| 2489 | |
| 2490 | /* |
| 2491 | * Read and clear macintmask and macintstatus and intstatus registers. |
| 2492 | * This routine should be called with interrupts off |
| 2493 | * Return: |
| 2494 | * -1 if brcms_deviceremoved(wlc) evaluates to true; |
| 2495 | * 0 if the interrupt is not for us, or we are in some special cases; |
| 2496 | * device interrupt status bits otherwise. |
| 2497 | */ |
| 2498 | static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr) |
| 2499 | { |
| 2500 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2501 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2502 | u32 macintstatus; |
| 2503 | |
| 2504 | /* macintstatus includes a DMA interrupt summary bit */ |
| 2505 | macintstatus = R_REG(®s->macintstatus); |
| 2506 | |
| 2507 | BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit, |
| 2508 | macintstatus); |
| 2509 | |
| 2510 | /* detect cardbus removed, in power down(suspend) and in reset */ |
| 2511 | if (brcms_deviceremoved(wlc)) |
| 2512 | return -1; |
| 2513 | |
| 2514 | /* brcms_deviceremoved() succeeds even when the core is still resetting, |
| 2515 | * handle that case here. |
| 2516 | */ |
| 2517 | if (macintstatus == 0xffffffff) |
| 2518 | return 0; |
| 2519 | |
| 2520 | /* defer unsolicited interrupts */ |
| 2521 | macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask); |
| 2522 | |
| 2523 | /* if not for us */ |
| 2524 | if (macintstatus == 0) |
| 2525 | return 0; |
| 2526 | |
| 2527 | /* interrupts are already turned off for CFE build |
| 2528 | * Caution: For CFE Turning off the interrupts again has some undesired |
| 2529 | * consequences |
| 2530 | */ |
| 2531 | /* turn off the interrupts */ |
| 2532 | W_REG(®s->macintmask, 0); |
| 2533 | (void)R_REG(®s->macintmask); /* sync readback */ |
| 2534 | wlc->macintmask = 0; |
| 2535 | |
| 2536 | /* clear device interrupts */ |
| 2537 | W_REG(®s->macintstatus, macintstatus); |
| 2538 | |
| 2539 | /* MI_DMAINT is indication of non-zero intstatus */ |
| 2540 | if (macintstatus & MI_DMAINT) |
| 2541 | /* |
| 2542 | * only fifo interrupt enabled is I_RI in |
| 2543 | * RX_FIFO. If MI_DMAINT is set, assume it |
| 2544 | * is set and clear the interrupt. |
| 2545 | */ |
| 2546 | W_REG(®s->intctrlregs[RX_FIFO].intstatus, |
| 2547 | DEF_RXINTMASK); |
| 2548 | |
| 2549 | return macintstatus; |
| 2550 | } |
| 2551 | |
| 2552 | /* Update wlc->macintstatus and wlc->intstatus[]. */ |
| 2553 | /* Return true if they are updated successfully. false otherwise */ |
| 2554 | bool brcms_c_intrsupd(struct brcms_c_info *wlc) |
| 2555 | { |
| 2556 | u32 macintstatus; |
| 2557 | |
| 2558 | /* read and clear macintstatus and intstatus registers */ |
| 2559 | macintstatus = wlc_intstatus(wlc, false); |
| 2560 | |
| 2561 | /* device is removed */ |
| 2562 | if (macintstatus == 0xffffffff) |
| 2563 | return false; |
| 2564 | |
| 2565 | /* update interrupt status in software */ |
| 2566 | wlc->macintstatus |= macintstatus; |
| 2567 | |
| 2568 | return true; |
| 2569 | } |
| 2570 | |
| 2571 | /* |
| 2572 | * First-level interrupt processing. |
| 2573 | * Return true if this was our interrupt, false otherwise. |
| 2574 | * *wantdpc will be set to true if further brcms_c_dpc() processing is required, |
| 2575 | * false otherwise. |
| 2576 | */ |
| 2577 | bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc) |
| 2578 | { |
| 2579 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2580 | u32 macintstatus; |
| 2581 | |
| 2582 | *wantdpc = false; |
| 2583 | |
| 2584 | if (!wlc_hw->up || !wlc->macintmask) |
| 2585 | return false; |
| 2586 | |
| 2587 | /* read and clear macintstatus and intstatus registers */ |
| 2588 | macintstatus = wlc_intstatus(wlc, true); |
| 2589 | |
| 2590 | if (macintstatus == 0xffffffff) |
| 2591 | wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code" |
| 2592 | " path\n"); |
| 2593 | |
| 2594 | /* it is not for us */ |
| 2595 | if (macintstatus == 0) |
| 2596 | return false; |
| 2597 | |
| 2598 | *wantdpc = true; |
| 2599 | |
| 2600 | /* save interrupt status bits */ |
| 2601 | wlc->macintstatus = macintstatus; |
| 2602 | |
| 2603 | return true; |
| 2604 | |
| 2605 | } |
| 2606 | |
| 2607 | void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc) |
| 2608 | { |
| 2609 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2610 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2611 | u32 mc, mi; |
| 2612 | struct wiphy *wiphy = wlc->wiphy; |
| 2613 | |
| 2614 | BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, |
| 2615 | wlc_hw->band->bandunit); |
| 2616 | |
| 2617 | /* |
| 2618 | * Track overlapping suspend requests |
| 2619 | */ |
| 2620 | wlc_hw->mac_suspend_depth++; |
| 2621 | if (wlc_hw->mac_suspend_depth > 1) |
| 2622 | return; |
| 2623 | |
| 2624 | /* force the core awake */ |
| 2625 | brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND); |
| 2626 | |
| 2627 | mc = R_REG(®s->maccontrol); |
| 2628 | |
| 2629 | if (mc == 0xffffffff) { |
| 2630 | wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, |
| 2631 | __func__); |
| 2632 | brcms_down(wlc->wl); |
| 2633 | return; |
| 2634 | } |
| 2635 | WARN_ON(mc & MCTL_PSM_JMP_0); |
| 2636 | WARN_ON(!(mc & MCTL_PSM_RUN)); |
| 2637 | WARN_ON(!(mc & MCTL_EN_MAC)); |
| 2638 | |
| 2639 | mi = R_REG(®s->macintstatus); |
| 2640 | if (mi == 0xffffffff) { |
| 2641 | wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, |
| 2642 | __func__); |
| 2643 | brcms_down(wlc->wl); |
| 2644 | return; |
| 2645 | } |
| 2646 | WARN_ON(mi & MI_MACSSPNDD); |
| 2647 | |
| 2648 | brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0); |
| 2649 | |
| 2650 | SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), |
| 2651 | BRCMS_MAX_MAC_SUSPEND); |
| 2652 | |
| 2653 | if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { |
| 2654 | wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" |
| 2655 | " and MI_MACSSPNDD is still not on.\n", |
| 2656 | wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND); |
| 2657 | wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " |
| 2658 | "psm_brc 0x%04x\n", wlc_hw->unit, |
| 2659 | R_REG(®s->psmdebug), |
| 2660 | R_REG(®s->phydebug), |
| 2661 | R_REG(®s->psm_brc)); |
| 2662 | } |
| 2663 | |
| 2664 | mc = R_REG(®s->maccontrol); |
| 2665 | if (mc == 0xffffffff) { |
| 2666 | wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, |
| 2667 | __func__); |
| 2668 | brcms_down(wlc->wl); |
| 2669 | return; |
| 2670 | } |
| 2671 | WARN_ON(mc & MCTL_PSM_JMP_0); |
| 2672 | WARN_ON(!(mc & MCTL_PSM_RUN)); |
| 2673 | WARN_ON(mc & MCTL_EN_MAC); |
| 2674 | } |
| 2675 | |
| 2676 | void brcms_c_enable_mac(struct brcms_c_info *wlc) |
| 2677 | { |
| 2678 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2679 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2680 | u32 mc, mi; |
| 2681 | |
| 2682 | BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, |
| 2683 | wlc->band->bandunit); |
| 2684 | |
| 2685 | /* |
| 2686 | * Track overlapping suspend requests |
| 2687 | */ |
| 2688 | wlc_hw->mac_suspend_depth--; |
| 2689 | if (wlc_hw->mac_suspend_depth > 0) |
| 2690 | return; |
| 2691 | |
| 2692 | mc = R_REG(®s->maccontrol); |
| 2693 | WARN_ON(mc & MCTL_PSM_JMP_0); |
| 2694 | WARN_ON(mc & MCTL_EN_MAC); |
| 2695 | WARN_ON(!(mc & MCTL_PSM_RUN)); |
| 2696 | |
| 2697 | brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); |
| 2698 | W_REG(®s->macintstatus, MI_MACSSPNDD); |
| 2699 | |
| 2700 | mc = R_REG(®s->maccontrol); |
| 2701 | WARN_ON(mc & MCTL_PSM_JMP_0); |
| 2702 | WARN_ON(!(mc & MCTL_EN_MAC)); |
| 2703 | WARN_ON(!(mc & MCTL_PSM_RUN)); |
| 2704 | |
| 2705 | mi = R_REG(®s->macintstatus); |
| 2706 | WARN_ON(mi & MI_MACSSPNDD); |
| 2707 | |
| 2708 | brcms_c_ucode_wake_override_clear(wlc_hw, |
| 2709 | BRCMS_WAKE_OVERRIDE_MACSUSPEND); |
| 2710 | } |
| 2711 | |
| 2712 | void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode) |
| 2713 | { |
| 2714 | wlc_hw->hw_stf_ss_opmode = stf_mode; |
| 2715 | |
| 2716 | if (wlc_hw->clk) |
| 2717 | brcms_upd_ofdm_pctl1_table(wlc_hw); |
| 2718 | } |
| 2719 | |
| 2720 | static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw) |
| 2721 | { |
| 2722 | struct d11regs __iomem *regs; |
| 2723 | u32 w, val; |
| 2724 | struct wiphy *wiphy = wlc_hw->wlc->wiphy; |
| 2725 | |
| 2726 | BCMMSG(wiphy, "wl%d\n", wlc_hw->unit); |
| 2727 | |
| 2728 | regs = wlc_hw->regs; |
| 2729 | |
| 2730 | /* Validate dchip register access */ |
| 2731 | |
| 2732 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2733 | (void)R_REG(®s->objaddr); |
| 2734 | w = R_REG(®s->objdata); |
| 2735 | |
| 2736 | /* Can we write and read back a 32bit register? */ |
| 2737 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2738 | (void)R_REG(®s->objaddr); |
| 2739 | W_REG(®s->objdata, (u32) 0xaa5555aa); |
| 2740 | |
| 2741 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2742 | (void)R_REG(®s->objaddr); |
| 2743 | val = R_REG(®s->objdata); |
| 2744 | if (val != (u32) 0xaa5555aa) { |
| 2745 | wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " |
| 2746 | "expected 0xaa5555aa\n", wlc_hw->unit, val); |
| 2747 | return false; |
| 2748 | } |
| 2749 | |
| 2750 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2751 | (void)R_REG(®s->objaddr); |
| 2752 | W_REG(®s->objdata, (u32) 0x55aaaa55); |
| 2753 | |
| 2754 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2755 | (void)R_REG(®s->objaddr); |
| 2756 | val = R_REG(®s->objdata); |
| 2757 | if (val != (u32) 0x55aaaa55) { |
| 2758 | wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, " |
| 2759 | "expected 0x55aaaa55\n", wlc_hw->unit, val); |
| 2760 | return false; |
| 2761 | } |
| 2762 | |
| 2763 | W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0); |
| 2764 | (void)R_REG(®s->objaddr); |
| 2765 | W_REG(®s->objdata, w); |
| 2766 | |
| 2767 | /* clear CFPStart */ |
| 2768 | W_REG(®s->tsf_cfpstart, 0); |
| 2769 | |
| 2770 | w = R_REG(®s->maccontrol); |
| 2771 | if ((w != (MCTL_IHR_EN | MCTL_WAKE)) && |
| 2772 | (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) { |
| 2773 | wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = " |
| 2774 | "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w, |
| 2775 | (MCTL_IHR_EN | MCTL_WAKE), |
| 2776 | (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE)); |
| 2777 | return false; |
| 2778 | } |
| 2779 | |
| 2780 | return true; |
| 2781 | } |
| 2782 | |
| 2783 | #define PHYPLL_WAIT_US 100000 |
| 2784 | |
| 2785 | void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on) |
| 2786 | { |
| 2787 | struct d11regs __iomem *regs; |
| 2788 | u32 tmp; |
| 2789 | |
| 2790 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 2791 | |
| 2792 | tmp = 0; |
| 2793 | regs = wlc_hw->regs; |
| 2794 | |
| 2795 | if (on) { |
| 2796 | if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) { |
| 2797 | OR_REG(®s->clk_ctl_st, |
| 2798 | (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL | |
| 2799 | CCS_ERSRC_REQ_PHYPLL)); |
| 2800 | SPINWAIT((R_REG(®s->clk_ctl_st) & |
| 2801 | (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT), |
| 2802 | PHYPLL_WAIT_US); |
| 2803 | |
| 2804 | tmp = R_REG(®s->clk_ctl_st); |
| 2805 | if ((tmp & (CCS_ERSRC_AVAIL_HT)) != |
| 2806 | (CCS_ERSRC_AVAIL_HT)) |
| 2807 | wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY" |
| 2808 | " PLL failed\n", __func__); |
| 2809 | } else { |
| 2810 | OR_REG(®s->clk_ctl_st, |
| 2811 | (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL)); |
| 2812 | SPINWAIT((R_REG(®s->clk_ctl_st) & |
| 2813 | (CCS_ERSRC_AVAIL_D11PLL | |
| 2814 | CCS_ERSRC_AVAIL_PHYPLL)) != |
| 2815 | (CCS_ERSRC_AVAIL_D11PLL | |
| 2816 | CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US); |
| 2817 | |
| 2818 | tmp = R_REG(®s->clk_ctl_st); |
| 2819 | if ((tmp & |
| 2820 | (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) |
| 2821 | != |
| 2822 | (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) |
| 2823 | wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on " |
| 2824 | "PHY PLL failed\n", __func__); |
| 2825 | } |
| 2826 | } else { |
| 2827 | /* |
| 2828 | * Since the PLL may be shared, other cores can still |
| 2829 | * be requesting it; so we'll deassert the request but |
| 2830 | * not wait for status to comply. |
| 2831 | */ |
| 2832 | AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL); |
| 2833 | tmp = R_REG(®s->clk_ctl_st); |
| 2834 | } |
| 2835 | } |
| 2836 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 2837 | static void brcms_c_coredisable(struct brcms_hardware *wlc_hw) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2838 | { |
| 2839 | bool dev_gone; |
| 2840 | |
| 2841 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 2842 | |
| 2843 | dev_gone = brcms_deviceremoved(wlc_hw->wlc); |
| 2844 | |
| 2845 | if (dev_gone) |
| 2846 | return; |
| 2847 | |
| 2848 | if (wlc_hw->noreset) |
| 2849 | return; |
| 2850 | |
| 2851 | /* radio off */ |
| 2852 | wlc_phy_switch_radio(wlc_hw->band->pi, OFF); |
| 2853 | |
| 2854 | /* turn off analog core */ |
| 2855 | wlc_phy_anacore(wlc_hw->band->pi, OFF); |
| 2856 | |
| 2857 | /* turn off PHYPLL to save power */ |
| 2858 | brcms_b_core_phypll_ctl(wlc_hw, false); |
| 2859 | |
| 2860 | wlc_hw->clk = false; |
| 2861 | ai_core_disable(wlc_hw->sih, 0); |
| 2862 | wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); |
| 2863 | } |
| 2864 | |
| 2865 | static void brcms_c_flushqueues(struct brcms_c_info *wlc) |
| 2866 | { |
| 2867 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 2868 | uint i; |
| 2869 | |
| 2870 | /* free any posted tx packets */ |
| 2871 | for (i = 0; i < NFIFO; i++) |
| 2872 | if (wlc_hw->di[i]) { |
| 2873 | dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); |
| 2874 | wlc->core->txpktpend[i] = 0; |
| 2875 | BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); |
| 2876 | } |
| 2877 | |
| 2878 | /* free any posted rx packets */ |
| 2879 | dma_rxreclaim(wlc_hw->di[RX_FIFO]); |
| 2880 | } |
| 2881 | |
| 2882 | static u16 |
| 2883 | brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel) |
| 2884 | { |
| 2885 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2886 | u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata; |
| 2887 | u16 __iomem *objdata_hi = objdata_lo + 1; |
| 2888 | u16 v; |
| 2889 | |
| 2890 | W_REG(®s->objaddr, sel | (offset >> 2)); |
| 2891 | (void)R_REG(®s->objaddr); |
| 2892 | if (offset & 2) |
| 2893 | v = R_REG(objdata_hi); |
| 2894 | else |
| 2895 | v = R_REG(objdata_lo); |
| 2896 | |
| 2897 | return v; |
| 2898 | } |
| 2899 | |
| 2900 | static void |
| 2901 | brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v, |
| 2902 | u32 sel) |
| 2903 | { |
| 2904 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 2905 | u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata; |
| 2906 | u16 __iomem *objdata_hi = objdata_lo + 1; |
| 2907 | |
| 2908 | W_REG(®s->objaddr, sel | (offset >> 2)); |
| 2909 | (void)R_REG(®s->objaddr); |
| 2910 | if (offset & 2) |
| 2911 | W_REG(objdata_hi, v); |
| 2912 | else |
| 2913 | W_REG(objdata_lo, v); |
| 2914 | } |
| 2915 | |
| 2916 | /* |
| 2917 | * Read a single u16 from shared memory. |
| 2918 | * SHM 'offset' needs to be an even address |
| 2919 | */ |
| 2920 | u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset) |
| 2921 | { |
| 2922 | return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); |
| 2923 | } |
| 2924 | |
| 2925 | /* |
| 2926 | * Write a single u16 to shared memory. |
| 2927 | * SHM 'offset' needs to be an even address |
| 2928 | */ |
| 2929 | void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v) |
| 2930 | { |
| 2931 | brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); |
| 2932 | } |
| 2933 | |
| 2934 | /* |
| 2935 | * Copy a buffer to shared memory of specified type . |
| 2936 | * SHM 'offset' needs to be an even address and |
| 2937 | * Buffer length 'len' must be an even number of bytes |
| 2938 | * 'sel' selects the type of memory |
| 2939 | */ |
| 2940 | void |
| 2941 | brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset, |
| 2942 | const void *buf, int len, u32 sel) |
| 2943 | { |
| 2944 | u16 v; |
| 2945 | const u8 *p = (const u8 *)buf; |
| 2946 | int i; |
| 2947 | |
| 2948 | if (len <= 0 || (offset & 1) || (len & 1)) |
| 2949 | return; |
| 2950 | |
| 2951 | for (i = 0; i < len; i += 2) { |
| 2952 | v = p[i] | (p[i + 1] << 8); |
| 2953 | brcms_b_write_objmem(wlc_hw, offset + i, v, sel); |
| 2954 | } |
| 2955 | } |
| 2956 | |
| 2957 | /* |
| 2958 | * Copy a piece of shared memory of specified type to a buffer . |
| 2959 | * SHM 'offset' needs to be an even address and |
| 2960 | * Buffer length 'len' must be an even number of bytes |
| 2961 | * 'sel' selects the type of memory |
| 2962 | */ |
| 2963 | void |
| 2964 | brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf, |
| 2965 | int len, u32 sel) |
| 2966 | { |
| 2967 | u16 v; |
| 2968 | u8 *p = (u8 *) buf; |
| 2969 | int i; |
| 2970 | |
| 2971 | if (len <= 0 || (offset & 1) || (len & 1)) |
| 2972 | return; |
| 2973 | |
| 2974 | for (i = 0; i < len; i += 2) { |
| 2975 | v = brcms_b_read_objmem(wlc_hw, offset + i, sel); |
| 2976 | p[i] = v & 0xFF; |
| 2977 | p[i + 1] = (v >> 8) & 0xFF; |
| 2978 | } |
| 2979 | } |
| 2980 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 2981 | /* Copy a buffer to shared memory. |
| 2982 | * SHM 'offset' needs to be an even address and |
| 2983 | * Buffer length 'len' must be an even number of bytes |
| 2984 | */ |
| 2985 | static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, |
| 2986 | const void *buf, int len) |
| 2987 | { |
| 2988 | brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL); |
| 2989 | } |
| 2990 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 2991 | static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw, |
| 2992 | u16 SRL, u16 LRL) |
| 2993 | { |
| 2994 | wlc_hw->SRL = SRL; |
| 2995 | wlc_hw->LRL = LRL; |
| 2996 | |
| 2997 | /* write retry limit to SCR, shouldn't need to suspend */ |
| 2998 | if (wlc_hw->up) { |
| 2999 | W_REG(&wlc_hw->regs->objaddr, |
| 3000 | OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); |
| 3001 | (void)R_REG(&wlc_hw->regs->objaddr); |
| 3002 | W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL); |
| 3003 | W_REG(&wlc_hw->regs->objaddr, |
| 3004 | OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); |
| 3005 | (void)R_REG(&wlc_hw->regs->objaddr); |
| 3006 | W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL); |
| 3007 | } |
| 3008 | } |
| 3009 | |
| 3010 | static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit) |
| 3011 | { |
| 3012 | if (set) { |
| 3013 | if (mboolisset(wlc_hw->pllreq, req_bit)) |
| 3014 | return; |
| 3015 | |
| 3016 | mboolset(wlc_hw->pllreq, req_bit); |
| 3017 | |
| 3018 | if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { |
| 3019 | if (!wlc_hw->sbclk) |
| 3020 | brcms_b_xtal(wlc_hw, ON); |
| 3021 | } |
| 3022 | } else { |
| 3023 | if (!mboolisset(wlc_hw->pllreq, req_bit)) |
| 3024 | return; |
| 3025 | |
| 3026 | mboolclr(wlc_hw->pllreq, req_bit); |
| 3027 | |
| 3028 | if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { |
| 3029 | if (wlc_hw->sbclk) |
| 3030 | brcms_b_xtal(wlc_hw, OFF); |
| 3031 | } |
| 3032 | } |
| 3033 | } |
| 3034 | |
| 3035 | static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail) |
| 3036 | { |
| 3037 | wlc_hw->antsel_avail = antsel_avail; |
| 3038 | } |
| 3039 | |
| 3040 | /* |
| 3041 | * conditions under which the PM bit should be set in outgoing frames |
| 3042 | * and STAY_AWAKE is meaningful |
| 3043 | */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3044 | static bool brcms_c_ps_allowed(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3045 | { |
| 3046 | struct brcms_bss_cfg *cfg = wlc->bsscfg; |
| 3047 | |
| 3048 | /* disallow PS when one of the following global conditions meets */ |
| 3049 | if (!wlc->pub->associated) |
| 3050 | return false; |
| 3051 | |
| 3052 | /* disallow PS when one of these meets when not scanning */ |
| 3053 | if (wlc->monitor) |
| 3054 | return false; |
| 3055 | |
| 3056 | if (cfg->associated) { |
| 3057 | /* |
| 3058 | * disallow PS when one of the following |
| 3059 | * bsscfg specific conditions meets |
| 3060 | */ |
| 3061 | if (!cfg->BSS) |
| 3062 | return false; |
| 3063 | |
| 3064 | return false; |
| 3065 | } |
| 3066 | |
| 3067 | return true; |
| 3068 | } |
| 3069 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3070 | static void brcms_c_statsupd(struct brcms_c_info *wlc) |
| 3071 | { |
| 3072 | int i; |
| 3073 | struct macstat macstats; |
| 3074 | #ifdef BCMDBG |
| 3075 | u16 delta; |
| 3076 | u16 rxf0ovfl; |
| 3077 | u16 txfunfl[NFIFO]; |
| 3078 | #endif /* BCMDBG */ |
| 3079 | |
| 3080 | /* if driver down, make no sense to update stats */ |
| 3081 | if (!wlc->pub->up) |
| 3082 | return; |
| 3083 | |
| 3084 | #ifdef BCMDBG |
| 3085 | /* save last rx fifo 0 overflow count */ |
| 3086 | rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl; |
| 3087 | |
| 3088 | /* save last tx fifo underflow count */ |
| 3089 | for (i = 0; i < NFIFO; i++) |
| 3090 | txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i]; |
| 3091 | #endif /* BCMDBG */ |
| 3092 | |
| 3093 | /* Read mac stats from contiguous shared memory */ |
| 3094 | brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats, |
| 3095 | sizeof(struct macstat), OBJADDR_SHM_SEL); |
| 3096 | |
| 3097 | #ifdef BCMDBG |
| 3098 | /* check for rx fifo 0 overflow */ |
| 3099 | delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl); |
| 3100 | if (delta) |
| 3101 | wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n", |
| 3102 | wlc->pub->unit, delta); |
| 3103 | |
| 3104 | /* check for tx fifo underflows */ |
| 3105 | for (i = 0; i < NFIFO; i++) { |
| 3106 | delta = |
| 3107 | (u16) (wlc->core->macstat_snapshot->txfunfl[i] - |
| 3108 | txfunfl[i]); |
| 3109 | if (delta) |
| 3110 | wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!" |
| 3111 | "\n", wlc->pub->unit, delta, i); |
| 3112 | } |
| 3113 | #endif /* BCMDBG */ |
| 3114 | |
| 3115 | /* merge counters from dma module */ |
| 3116 | for (i = 0; i < NFIFO; i++) { |
| 3117 | if (wlc->hw->di[i]) |
| 3118 | dma_counterreset(wlc->hw->di[i]); |
| 3119 | } |
| 3120 | } |
| 3121 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3122 | static void brcms_b_reset(struct brcms_hardware *wlc_hw) |
| 3123 | { |
| 3124 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 3125 | |
| 3126 | /* reset the core */ |
| 3127 | if (!brcms_deviceremoved(wlc_hw->wlc)) |
| 3128 | brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); |
| 3129 | |
| 3130 | /* purge the dma rings */ |
| 3131 | brcms_c_flushqueues(wlc_hw->wlc); |
| 3132 | } |
| 3133 | |
| 3134 | void brcms_c_reset(struct brcms_c_info *wlc) |
| 3135 | { |
| 3136 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 3137 | |
| 3138 | /* slurp up hw mac counters before core reset */ |
| 3139 | brcms_c_statsupd(wlc); |
| 3140 | |
| 3141 | /* reset our snapshot of macstat counters */ |
| 3142 | memset((char *)wlc->core->macstat_snapshot, 0, |
| 3143 | sizeof(struct macstat)); |
| 3144 | |
| 3145 | brcms_b_reset(wlc->hw); |
| 3146 | } |
| 3147 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3148 | /* Return the channel the driver should initialize during brcms_c_init. |
| 3149 | * the channel may have to be changed from the currently configured channel |
| 3150 | * if other configurations are in conflict (bandlocked, 11n mode disabled, |
| 3151 | * invalid channel for current country, etc.) |
| 3152 | */ |
| 3153 | static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc) |
| 3154 | { |
| 3155 | u16 chanspec = |
| 3156 | 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE | |
| 3157 | WL_CHANSPEC_BAND_2G; |
| 3158 | |
| 3159 | return chanspec; |
| 3160 | } |
| 3161 | |
| 3162 | void brcms_c_init_scb(struct scb *scb) |
| 3163 | { |
| 3164 | int i; |
| 3165 | |
| 3166 | memset(scb, 0, sizeof(struct scb)); |
| 3167 | scb->flags = SCB_WMECAP | SCB_HTCAP; |
| 3168 | for (i = 0; i < NUMPRIO; i++) { |
| 3169 | scb->seqnum[i] = 0; |
| 3170 | scb->seqctl[i] = 0xFFFF; |
| 3171 | } |
| 3172 | |
| 3173 | scb->seqctl_nonqos = 0xFFFF; |
| 3174 | scb->magic = SCB_MAGIC; |
| 3175 | } |
| 3176 | |
| 3177 | /* d11 core init |
| 3178 | * reset PSM |
| 3179 | * download ucode/PCM |
| 3180 | * let ucode run to suspended |
| 3181 | * download ucode inits |
| 3182 | * config other core registers |
| 3183 | * init dma |
| 3184 | */ |
| 3185 | static void brcms_b_coreinit(struct brcms_c_info *wlc) |
| 3186 | { |
| 3187 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 3188 | struct d11regs __iomem *regs; |
| 3189 | u32 sflags; |
| 3190 | uint bcnint_us; |
| 3191 | uint i = 0; |
| 3192 | bool fifosz_fixup = false; |
| 3193 | int err = 0; |
| 3194 | u16 buf[NFIFO]; |
| 3195 | struct wiphy *wiphy = wlc->wiphy; |
| 3196 | struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; |
| 3197 | |
| 3198 | regs = wlc_hw->regs; |
| 3199 | |
| 3200 | BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 3201 | |
| 3202 | /* reset PSM */ |
| 3203 | brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); |
| 3204 | |
| 3205 | brcms_ucode_download(wlc_hw); |
| 3206 | /* |
| 3207 | * FIFOSZ fixup. driver wants to controls the fifo allocation. |
| 3208 | */ |
| 3209 | fifosz_fixup = true; |
| 3210 | |
| 3211 | /* let the PSM run to the suspended state, set mode to BSS STA */ |
| 3212 | W_REG(®s->macintstatus, -1); |
| 3213 | brcms_b_mctrl(wlc_hw, ~0, |
| 3214 | (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); |
| 3215 | |
| 3216 | /* wait for ucode to self-suspend after auto-init */ |
| 3217 | SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0), |
| 3218 | 1000 * 1000); |
| 3219 | if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0) |
| 3220 | wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" |
| 3221 | "suspend!\n", wlc_hw->unit); |
| 3222 | |
| 3223 | brcms_c_gpio_init(wlc); |
| 3224 | |
| 3225 | sflags = ai_core_sflags(wlc_hw->sih, 0, 0); |
| 3226 | |
| 3227 | if (D11REV_IS(wlc_hw->corerev, 23)) { |
| 3228 | if (BRCMS_ISNPHY(wlc_hw->band)) |
| 3229 | brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16); |
| 3230 | else |
| 3231 | wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" |
| 3232 | " %d\n", __func__, wlc_hw->unit, |
| 3233 | wlc_hw->corerev); |
| 3234 | } else if (D11REV_IS(wlc_hw->corerev, 24)) { |
| 3235 | if (BRCMS_ISLCNPHY(wlc_hw->band)) |
| 3236 | brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24); |
| 3237 | else |
| 3238 | wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" |
| 3239 | " %d\n", __func__, wlc_hw->unit, |
| 3240 | wlc_hw->corerev); |
| 3241 | } else { |
| 3242 | wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n", |
| 3243 | __func__, wlc_hw->unit, wlc_hw->corerev); |
| 3244 | } |
| 3245 | |
| 3246 | /* For old ucode, txfifo sizes needs to be modified(increased) */ |
| 3247 | if (fifosz_fixup == true) |
| 3248 | brcms_b_corerev_fifofixup(wlc_hw); |
| 3249 | |
| 3250 | /* check txfifo allocations match between ucode and driver */ |
| 3251 | buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0); |
| 3252 | if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { |
| 3253 | i = TX_AC_BE_FIFO; |
| 3254 | err = -1; |
| 3255 | } |
| 3256 | buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1); |
| 3257 | if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { |
| 3258 | i = TX_AC_VI_FIFO; |
| 3259 | err = -1; |
| 3260 | } |
| 3261 | buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2); |
| 3262 | buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; |
| 3263 | buf[TX_AC_BK_FIFO] &= 0xff; |
| 3264 | if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { |
| 3265 | i = TX_AC_BK_FIFO; |
| 3266 | err = -1; |
| 3267 | } |
| 3268 | if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) { |
| 3269 | i = TX_AC_VO_FIFO; |
| 3270 | err = -1; |
| 3271 | } |
| 3272 | buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3); |
| 3273 | buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; |
| 3274 | buf[TX_BCMC_FIFO] &= 0xff; |
| 3275 | if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { |
| 3276 | i = TX_BCMC_FIFO; |
| 3277 | err = -1; |
| 3278 | } |
| 3279 | if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) { |
| 3280 | i = TX_ATIM_FIFO; |
| 3281 | err = -1; |
| 3282 | } |
| 3283 | if (err != 0) |
| 3284 | wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d" |
| 3285 | " driver size %d index %d\n", buf[i], |
| 3286 | wlc_hw->xmtfifo_sz[i], i); |
| 3287 | |
| 3288 | /* make sure we can still talk to the mac */ |
| 3289 | WARN_ON(R_REG(®s->maccontrol) == 0xffffffff); |
| 3290 | |
| 3291 | /* band-specific inits done by wlc_bsinit() */ |
| 3292 | |
| 3293 | /* Set up frame burst size and antenna swap threshold init values */ |
| 3294 | brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); |
| 3295 | brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); |
| 3296 | |
| 3297 | /* enable one rx interrupt per received frame */ |
| 3298 | W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); |
| 3299 | |
| 3300 | /* set the station mode (BSS STA) */ |
| 3301 | brcms_b_mctrl(wlc_hw, |
| 3302 | (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), |
| 3303 | (MCTL_INFRA | MCTL_DISCARD_PMQ)); |
| 3304 | |
| 3305 | /* set up Beacon interval */ |
| 3306 | bcnint_us = 0x8000 << 10; |
| 3307 | W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT)); |
| 3308 | W_REG(®s->tsf_cfpstart, bcnint_us); |
| 3309 | W_REG(®s->macintstatus, MI_GP1); |
| 3310 | |
| 3311 | /* write interrupt mask */ |
| 3312 | W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); |
| 3313 | |
| 3314 | /* allow the MAC to control the PHY clock (dynamic on/off) */ |
| 3315 | brcms_b_macphyclk_set(wlc_hw, ON); |
| 3316 | |
| 3317 | /* program dynamic clock control fast powerup delay register */ |
| 3318 | wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); |
| 3319 | W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); |
| 3320 | |
| 3321 | /* tell the ucode the corerev */ |
| 3322 | brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); |
| 3323 | |
| 3324 | /* tell the ucode MAC capabilities */ |
| 3325 | brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L, |
| 3326 | (u16) (wlc_hw->machwcap & 0xffff)); |
| 3327 | brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H, |
| 3328 | (u16) ((wlc_hw-> |
| 3329 | machwcap >> 16) & 0xffff)); |
| 3330 | |
| 3331 | /* write retry limits to SCR, this done after PSM init */ |
| 3332 | W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT); |
| 3333 | (void)R_REG(®s->objaddr); |
| 3334 | W_REG(®s->objdata, wlc_hw->SRL); |
| 3335 | W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT); |
| 3336 | (void)R_REG(®s->objaddr); |
| 3337 | W_REG(®s->objdata, wlc_hw->LRL); |
| 3338 | |
| 3339 | /* write rate fallback retry limits */ |
| 3340 | brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); |
| 3341 | brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); |
| 3342 | |
| 3343 | AND_REG(®s->ifs_ctl, 0x0FFF); |
| 3344 | W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); |
| 3345 | |
| 3346 | /* init the tx dma engines */ |
| 3347 | for (i = 0; i < NFIFO; i++) { |
| 3348 | if (wlc_hw->di[i]) |
| 3349 | dma_txinit(wlc_hw->di[i]); |
| 3350 | } |
| 3351 | |
| 3352 | /* init the rx dma engine(s) and post receive buffers */ |
| 3353 | dma_rxinit(wlc_hw->di[RX_FIFO]); |
| 3354 | dma_rxfill(wlc_hw->di[RX_FIFO]); |
| 3355 | } |
| 3356 | |
| 3357 | void |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 3358 | static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) { |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3359 | u32 macintmask; |
| 3360 | bool fastclk; |
| 3361 | struct brcms_c_info *wlc = wlc_hw->wlc; |
| 3362 | |
| 3363 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 3364 | |
| 3365 | /* request FAST clock if not on */ |
| 3366 | fastclk = wlc_hw->forcefastclk; |
| 3367 | if (!fastclk) |
| 3368 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 3369 | |
| 3370 | /* disable interrupts */ |
| 3371 | macintmask = brcms_intrsoff(wlc->wl); |
| 3372 | |
| 3373 | /* set up the specified band and chanspec */ |
| 3374 | brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec)); |
| 3375 | wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); |
| 3376 | |
| 3377 | /* do one-time phy inits and calibration */ |
| 3378 | wlc_phy_cal_init(wlc_hw->band->pi); |
| 3379 | |
| 3380 | /* core-specific initialization */ |
| 3381 | brcms_b_coreinit(wlc); |
| 3382 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3383 | /* band-specific inits */ |
| 3384 | brcms_b_bsinit(wlc, chanspec); |
| 3385 | |
| 3386 | /* restore macintmask */ |
| 3387 | brcms_intrsrestore(wlc->wl, macintmask); |
| 3388 | |
| 3389 | /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac |
| 3390 | * is suspended and brcms_c_enable_mac() will clear this override bit. |
| 3391 | */ |
| 3392 | mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND); |
| 3393 | |
| 3394 | /* |
| 3395 | * initialize mac_suspend_depth to 1 to match ucode |
| 3396 | * initial suspended state |
| 3397 | */ |
| 3398 | wlc_hw->mac_suspend_depth = 1; |
| 3399 | |
| 3400 | /* restore the clk */ |
| 3401 | if (!fastclk) |
| 3402 | brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); |
| 3403 | } |
| 3404 | |
| 3405 | static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc, |
| 3406 | u16 chanspec) |
| 3407 | { |
| 3408 | /* Save our copy of the chanspec */ |
| 3409 | wlc->chanspec = chanspec; |
| 3410 | |
| 3411 | /* Set the chanspec and power limits for this locale */ |
| 3412 | brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX); |
| 3413 | |
| 3414 | if (wlc->stf->ss_algosel_auto) |
| 3415 | brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel, |
| 3416 | chanspec); |
| 3417 | |
| 3418 | brcms_c_stf_ss_update(wlc, wlc->band); |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3419 | } |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3420 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3421 | static void |
| 3422 | brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs) |
| 3423 | { |
| 3424 | brcms_c_rateset_default(rs, NULL, wlc->band->phytype, |
| 3425 | wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL, |
| 3426 | (bool) (wlc->pub->_n_enab & SUPPORT_11N), |
| 3427 | brcms_chspec_bw(wlc->default_bss->chanspec), |
| 3428 | wlc->stf->txstreams); |
| 3429 | } |
| 3430 | |
| 3431 | /* derive wlc->band->basic_rate[] table from 'rateset' */ |
| 3432 | static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, |
| 3433 | struct brcms_c_rateset *rateset) |
| 3434 | { |
| 3435 | u8 rate; |
| 3436 | u8 mandatory; |
| 3437 | u8 cck_basic = 0; |
| 3438 | u8 ofdm_basic = 0; |
| 3439 | u8 *br = wlc->band->basic_rate; |
| 3440 | uint i; |
| 3441 | |
| 3442 | /* incoming rates are in 500kbps units as in 802.11 Supported Rates */ |
| 3443 | memset(br, 0, BRCM_MAXRATE + 1); |
| 3444 | |
| 3445 | /* For each basic rate in the rates list, make an entry in the |
| 3446 | * best basic lookup. |
| 3447 | */ |
| 3448 | for (i = 0; i < rateset->count; i++) { |
| 3449 | /* only make an entry for a basic rate */ |
| 3450 | if (!(rateset->rates[i] & BRCMS_RATE_FLAG)) |
| 3451 | continue; |
| 3452 | |
| 3453 | /* mask off basic bit */ |
| 3454 | rate = (rateset->rates[i] & BRCMS_RATE_MASK); |
| 3455 | |
| 3456 | if (rate > BRCM_MAXRATE) { |
| 3457 | wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: " |
| 3458 | "invalid rate 0x%X in rate set\n", |
| 3459 | rateset->rates[i]); |
| 3460 | continue; |
| 3461 | } |
| 3462 | |
| 3463 | br[rate] = rate; |
| 3464 | } |
| 3465 | |
| 3466 | /* The rate lookup table now has non-zero entries for each |
| 3467 | * basic rate, equal to the basic rate: br[basicN] = basicN |
| 3468 | * |
| 3469 | * To look up the best basic rate corresponding to any |
| 3470 | * particular rate, code can use the basic_rate table |
| 3471 | * like this |
| 3472 | * |
| 3473 | * basic_rate = wlc->band->basic_rate[tx_rate] |
| 3474 | * |
| 3475 | * Make sure there is a best basic rate entry for |
| 3476 | * every rate by walking up the table from low rates |
| 3477 | * to high, filling in holes in the lookup table |
| 3478 | */ |
| 3479 | |
| 3480 | for (i = 0; i < wlc->band->hw_rateset.count; i++) { |
| 3481 | rate = wlc->band->hw_rateset.rates[i]; |
| 3482 | |
| 3483 | if (br[rate] != 0) { |
| 3484 | /* This rate is a basic rate. |
| 3485 | * Keep track of the best basic rate so far by |
| 3486 | * modulation type. |
| 3487 | */ |
| 3488 | if (is_ofdm_rate(rate)) |
| 3489 | ofdm_basic = rate; |
| 3490 | else |
| 3491 | cck_basic = rate; |
| 3492 | |
| 3493 | continue; |
| 3494 | } |
| 3495 | |
| 3496 | /* This rate is not a basic rate so figure out the |
| 3497 | * best basic rate less than this rate and fill in |
| 3498 | * the hole in the table |
| 3499 | */ |
| 3500 | |
| 3501 | br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic; |
| 3502 | |
| 3503 | if (br[rate] != 0) |
| 3504 | continue; |
| 3505 | |
| 3506 | if (is_ofdm_rate(rate)) { |
| 3507 | /* |
| 3508 | * In 11g and 11a, the OFDM mandatory rates |
| 3509 | * are 6, 12, and 24 Mbps |
| 3510 | */ |
| 3511 | if (rate >= BRCM_RATE_24M) |
| 3512 | mandatory = BRCM_RATE_24M; |
| 3513 | else if (rate >= BRCM_RATE_12M) |
| 3514 | mandatory = BRCM_RATE_12M; |
| 3515 | else |
| 3516 | mandatory = BRCM_RATE_6M; |
| 3517 | } else { |
| 3518 | /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */ |
| 3519 | mandatory = rate; |
| 3520 | } |
| 3521 | |
| 3522 | br[rate] = mandatory; |
| 3523 | } |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3524 | } |
| 3525 | |
| 3526 | static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc, |
| 3527 | u16 chanspec) |
| 3528 | { |
| 3529 | struct brcms_c_rateset default_rateset; |
| 3530 | uint parkband; |
| 3531 | uint i, band_order[2]; |
| 3532 | |
| 3533 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 3534 | /* |
| 3535 | * We might have been bandlocked during down and the chip |
| 3536 | * power-cycled (hibernate). Figure out the right band to park on |
| 3537 | */ |
| 3538 | if (wlc->bandlocked || wlc->pub->_nbands == 1) { |
| 3539 | /* updated in brcms_c_bandlock() */ |
| 3540 | parkband = wlc->band->bandunit; |
| 3541 | band_order[0] = band_order[1] = parkband; |
| 3542 | } else { |
| 3543 | /* park on the band of the specified chanspec */ |
| 3544 | parkband = chspec_bandunit(chanspec); |
| 3545 | |
| 3546 | /* order so that parkband initialize last */ |
| 3547 | band_order[0] = parkband ^ 1; |
| 3548 | band_order[1] = parkband; |
| 3549 | } |
| 3550 | |
| 3551 | /* make each band operational, software state init */ |
| 3552 | for (i = 0; i < wlc->pub->_nbands; i++) { |
| 3553 | uint j = band_order[i]; |
| 3554 | |
| 3555 | wlc->band = wlc->bandstate[j]; |
| 3556 | |
| 3557 | brcms_default_rateset(wlc, &default_rateset); |
| 3558 | |
| 3559 | /* fill in hw_rate */ |
| 3560 | brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset, |
| 3561 | false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK, |
| 3562 | (bool) (wlc->pub->_n_enab & SUPPORT_11N)); |
| 3563 | |
| 3564 | /* init basic rate lookup */ |
| 3565 | brcms_c_rate_lookup_init(wlc, &default_rateset); |
| 3566 | } |
| 3567 | |
| 3568 | /* sync up phy/radio chanspec */ |
| 3569 | brcms_c_set_phy_chanspec(wlc, chanspec); |
| 3570 | } |
| 3571 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3572 | static void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc) |
| 3573 | { |
| 3574 | if (wlc->bcnmisc_monitor) |
| 3575 | brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC); |
| 3576 | else |
| 3577 | brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0); |
| 3578 | } |
| 3579 | |
| 3580 | void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc) |
| 3581 | { |
| 3582 | wlc->bcnmisc_monitor = promisc; |
| 3583 | brcms_c_mac_bcn_promisc(wlc); |
| 3584 | } |
| 3585 | |
| 3586 | /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */ |
| 3587 | static void brcms_c_mac_promisc(struct brcms_c_info *wlc) |
| 3588 | { |
| 3589 | u32 promisc_bits = 0; |
| 3590 | |
| 3591 | /* |
| 3592 | * promiscuous mode just sets MCTL_PROMISC |
| 3593 | * Note: APs get all BSS traffic without the need to set |
| 3594 | * the MCTL_PROMISC bit since all BSS data traffic is |
| 3595 | * directed at the AP |
| 3596 | */ |
| 3597 | if (wlc->pub->promisc) |
| 3598 | promisc_bits |= MCTL_PROMISC; |
| 3599 | |
| 3600 | /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL |
| 3601 | * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is |
| 3602 | * handled in brcms_c_mac_bcn_promisc() |
| 3603 | */ |
| 3604 | if (wlc->monitor) |
| 3605 | promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL; |
| 3606 | |
| 3607 | brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits); |
| 3608 | } |
| 3609 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3610 | /* |
| 3611 | * ucode, hwmac update |
| 3612 | * Channel dependent updates for ucode and hw |
| 3613 | */ |
| 3614 | static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc) |
| 3615 | { |
| 3616 | /* enable or disable any active IBSSs depending on whether or not |
| 3617 | * we are on the home channel |
| 3618 | */ |
| 3619 | if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) { |
| 3620 | if (wlc->pub->associated) { |
| 3621 | /* |
| 3622 | * BMAC_NOTE: This is something that should be fixed |
| 3623 | * in ucode inits. I think that the ucode inits set |
| 3624 | * up the bcn templates and shm values with a bogus |
| 3625 | * beacon. This should not be done in the inits. If |
| 3626 | * ucode needs to set up a beacon for testing, the |
| 3627 | * test routines should write it down, not expect the |
| 3628 | * inits to populate a bogus beacon. |
| 3629 | */ |
| 3630 | if (BRCMS_PHY_11N_CAP(wlc->band)) |
| 3631 | brcms_b_write_shm(wlc->hw, |
| 3632 | M_BCN_TXTSF_OFFSET, 0); |
| 3633 | } |
| 3634 | } else { |
| 3635 | /* disable an active IBSS if we are not on the home channel */ |
| 3636 | } |
| 3637 | |
| 3638 | /* update the various promisc bits */ |
| 3639 | brcms_c_mac_bcn_promisc(wlc); |
| 3640 | brcms_c_mac_promisc(wlc); |
| 3641 | } |
| 3642 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3643 | static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate, |
| 3644 | u8 basic_rate) |
| 3645 | { |
| 3646 | u8 phy_rate, index; |
| 3647 | u8 basic_phy_rate, basic_index; |
| 3648 | u16 dir_table, basic_table; |
| 3649 | u16 basic_ptr; |
| 3650 | |
| 3651 | /* Shared memory address for the table we are reading */ |
| 3652 | dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B; |
| 3653 | |
| 3654 | /* Shared memory address for the table we are writing */ |
| 3655 | basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B; |
| 3656 | |
| 3657 | /* |
| 3658 | * for a given rate, the LS-nibble of the PLCP SIGNAL field is |
| 3659 | * the index into the rate table. |
| 3660 | */ |
| 3661 | phy_rate = rate_info[rate] & BRCMS_RATE_MASK; |
| 3662 | basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK; |
| 3663 | index = phy_rate & 0xf; |
| 3664 | basic_index = basic_phy_rate & 0xf; |
| 3665 | |
| 3666 | /* Find the SHM pointer to the ACK rate entry by looking in the |
| 3667 | * Direct-map Table |
| 3668 | */ |
| 3669 | basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2)); |
| 3670 | |
| 3671 | /* Update the SHM BSS-basic-rate-set mapping table with the pointer |
| 3672 | * to the correct basic rate for the given incoming rate |
| 3673 | */ |
| 3674 | brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr); |
| 3675 | } |
| 3676 | |
| 3677 | static const struct brcms_c_rateset * |
| 3678 | brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc) |
| 3679 | { |
| 3680 | const struct brcms_c_rateset *rs_dflt; |
| 3681 | |
| 3682 | if (BRCMS_PHY_11N_CAP(wlc->band)) { |
| 3683 | if (wlc->band->bandtype == BRCM_BAND_5G) |
| 3684 | rs_dflt = &ofdm_mimo_rates; |
| 3685 | else |
| 3686 | rs_dflt = &cck_ofdm_mimo_rates; |
| 3687 | } else if (wlc->band->gmode) |
| 3688 | rs_dflt = &cck_ofdm_rates; |
| 3689 | else |
| 3690 | rs_dflt = &cck_rates; |
| 3691 | |
| 3692 | return rs_dflt; |
| 3693 | } |
| 3694 | |
| 3695 | static void brcms_c_set_ratetable(struct brcms_c_info *wlc) |
| 3696 | { |
| 3697 | const struct brcms_c_rateset *rs_dflt; |
| 3698 | struct brcms_c_rateset rs; |
| 3699 | u8 rate, basic_rate; |
| 3700 | uint i; |
| 3701 | |
| 3702 | rs_dflt = brcms_c_rateset_get_hwrs(wlc); |
| 3703 | |
| 3704 | brcms_c_rateset_copy(rs_dflt, &rs); |
| 3705 | brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams); |
| 3706 | |
| 3707 | /* walk the phy rate table and update SHM basic rate lookup table */ |
| 3708 | for (i = 0; i < rs.count; i++) { |
| 3709 | rate = rs.rates[i] & BRCMS_RATE_MASK; |
| 3710 | |
| 3711 | /* for a given rate brcms_basic_rate returns the rate at |
| 3712 | * which a response ACK/CTS should be sent. |
| 3713 | */ |
| 3714 | basic_rate = brcms_basic_rate(wlc, rate); |
| 3715 | if (basic_rate == 0) |
| 3716 | /* This should only happen if we are using a |
| 3717 | * restricted rateset. |
| 3718 | */ |
| 3719 | basic_rate = rs.rates[0] & BRCMS_RATE_MASK; |
| 3720 | |
| 3721 | brcms_c_write_rate_shm(wlc, rate, basic_rate); |
| 3722 | } |
| 3723 | } |
| 3724 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3725 | /* band-specific init */ |
| 3726 | static void brcms_c_bsinit(struct brcms_c_info *wlc) |
| 3727 | { |
| 3728 | BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", |
| 3729 | wlc->pub->unit, wlc->band->bandunit); |
| 3730 | |
| 3731 | /* write ucode ACK/CTS rate table */ |
| 3732 | brcms_c_set_ratetable(wlc); |
| 3733 | |
| 3734 | /* update some band specific mac configuration */ |
| 3735 | brcms_c_ucode_mac_upd(wlc); |
| 3736 | |
| 3737 | /* init antenna selection */ |
| 3738 | brcms_c_antsel_init(wlc->asi); |
| 3739 | |
| 3740 | } |
| 3741 | |
| 3742 | /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */ |
| 3743 | static int |
| 3744 | brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM, |
| 3745 | bool writeToShm) |
| 3746 | { |
| 3747 | int idle_busy_ratio_x_16 = 0; |
| 3748 | uint offset = |
| 3749 | isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM : |
| 3750 | M_TX_IDLE_BUSY_RATIO_X_16_CCK; |
| 3751 | if (duty_cycle > 100 || duty_cycle < 0) { |
| 3752 | wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n", |
| 3753 | wlc->pub->unit); |
| 3754 | return -EINVAL; |
| 3755 | } |
| 3756 | if (duty_cycle) |
| 3757 | idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle; |
| 3758 | /* Only write to shared memory when wl is up */ |
| 3759 | if (writeToShm) |
| 3760 | brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16); |
| 3761 | |
| 3762 | if (isOFDM) |
| 3763 | wlc->tx_duty_cycle_ofdm = (u16) duty_cycle; |
| 3764 | else |
| 3765 | wlc->tx_duty_cycle_cck = (u16) duty_cycle; |
| 3766 | |
| 3767 | return 0; |
| 3768 | } |
| 3769 | |
| 3770 | /* |
| 3771 | * Initialize the base precedence map for dequeueing |
| 3772 | * from txq based on WME settings |
| 3773 | */ |
| 3774 | static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc) |
| 3775 | { |
| 3776 | wlc->tx_prec_map = BRCMS_PREC_BMP_ALL; |
| 3777 | memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16)); |
| 3778 | |
| 3779 | wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK; |
| 3780 | wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE; |
| 3781 | wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI; |
| 3782 | wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO; |
| 3783 | } |
| 3784 | |
| 3785 | static void |
| 3786 | brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc, |
| 3787 | struct brcms_txq_info *qi, bool on, int prio) |
| 3788 | { |
| 3789 | /* transmit flowcontrol is not yet implemented */ |
| 3790 | } |
| 3791 | |
| 3792 | static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc) |
| 3793 | { |
| 3794 | struct brcms_txq_info *qi; |
| 3795 | |
| 3796 | for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { |
| 3797 | if (qi->stopped) { |
| 3798 | brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); |
| 3799 | qi->stopped = 0; |
| 3800 | } |
| 3801 | } |
| 3802 | } |
| 3803 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3804 | /* push sw hps and wake state through hardware */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3805 | static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3806 | { |
| 3807 | u32 v1, v2; |
| 3808 | bool hps; |
| 3809 | bool awake_before; |
| 3810 | |
| 3811 | hps = brcms_c_ps_allowed(wlc); |
| 3812 | |
| 3813 | BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps); |
| 3814 | |
| 3815 | v1 = R_REG(&wlc->regs->maccontrol); |
| 3816 | v2 = MCTL_WAKE; |
| 3817 | if (hps) |
| 3818 | v2 |= MCTL_HPS; |
| 3819 | |
| 3820 | brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2); |
| 3821 | |
| 3822 | awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0)); |
| 3823 | |
| 3824 | if (!awake_before) |
| 3825 | brcms_b_wait_for_wake(wlc->hw); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3826 | } |
| 3827 | |
| 3828 | /* |
| 3829 | * Write this BSS config's MAC address to core. |
| 3830 | * Updates RXE match engine. |
| 3831 | */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3832 | static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3833 | { |
| 3834 | int err = 0; |
| 3835 | struct brcms_c_info *wlc = bsscfg->wlc; |
| 3836 | |
| 3837 | /* enter the MAC addr into the RXE match registers */ |
| 3838 | brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr); |
| 3839 | |
| 3840 | brcms_c_ampdu_macaddr_upd(wlc); |
| 3841 | |
| 3842 | return err; |
| 3843 | } |
| 3844 | |
| 3845 | /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl). |
| 3846 | * Updates RXE match engine. |
| 3847 | */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3848 | static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3849 | { |
| 3850 | /* we need to update BSSID in RXE match registers */ |
| 3851 | brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID); |
| 3852 | } |
| 3853 | |
| 3854 | static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot) |
| 3855 | { |
| 3856 | wlc_hw->shortslot = shortslot; |
| 3857 | |
| 3858 | if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) { |
| 3859 | brcms_c_suspend_mac_and_wait(wlc_hw->wlc); |
| 3860 | brcms_b_update_slot_timing(wlc_hw, shortslot); |
| 3861 | brcms_c_enable_mac(wlc_hw->wlc); |
| 3862 | } |
| 3863 | } |
| 3864 | |
| 3865 | /* |
| 3866 | * Suspend the the MAC and update the slot timing |
| 3867 | * for standard 11b/g (20us slots) or shortslot 11g (9us slots). |
| 3868 | */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3869 | static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3870 | { |
| 3871 | /* use the override if it is set */ |
| 3872 | if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO) |
| 3873 | shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON); |
| 3874 | |
| 3875 | if (wlc->shortslot == shortslot) |
| 3876 | return; |
| 3877 | |
| 3878 | wlc->shortslot = shortslot; |
| 3879 | |
| 3880 | brcms_b_set_shortslot(wlc->hw, shortslot); |
| 3881 | } |
| 3882 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3883 | static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3884 | { |
| 3885 | if (wlc->home_chanspec != chanspec) { |
| 3886 | wlc->home_chanspec = chanspec; |
| 3887 | |
| 3888 | if (wlc->bsscfg->associated) |
| 3889 | wlc->bsscfg->current_bss->chanspec = chanspec; |
| 3890 | } |
| 3891 | } |
| 3892 | |
| 3893 | void |
| 3894 | brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec, |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 3895 | bool mute_tx, struct txpwr_limits *txpwr) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3896 | { |
| 3897 | uint bandunit; |
| 3898 | |
| 3899 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec); |
| 3900 | |
| 3901 | wlc_hw->chanspec = chanspec; |
| 3902 | |
| 3903 | /* Switch bands if necessary */ |
| 3904 | if (wlc_hw->_nbands > 1) { |
| 3905 | bandunit = chspec_bandunit(chanspec); |
| 3906 | if (wlc_hw->band->bandunit != bandunit) { |
| 3907 | /* brcms_b_setband disables other bandunit, |
| 3908 | * use light band switch if not up yet |
| 3909 | */ |
| 3910 | if (wlc_hw->up) { |
| 3911 | wlc_phy_chanspec_radio_set(wlc_hw-> |
| 3912 | bandstate[bandunit]-> |
| 3913 | pi, chanspec); |
| 3914 | brcms_b_setband(wlc_hw, bandunit, chanspec); |
| 3915 | } else { |
| 3916 | brcms_c_setxband(wlc_hw, bandunit); |
| 3917 | } |
| 3918 | } |
| 3919 | } |
| 3920 | |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 3921 | wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3922 | |
| 3923 | if (!wlc_hw->up) { |
| 3924 | if (wlc_hw->clk) |
| 3925 | wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, |
| 3926 | chanspec); |
| 3927 | wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); |
| 3928 | } else { |
| 3929 | wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec); |
| 3930 | wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); |
| 3931 | |
| 3932 | /* Update muting of the channel */ |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 3933 | brcms_b_mute(wlc_hw, mute_tx); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3934 | } |
| 3935 | } |
| 3936 | |
| 3937 | /* switch to and initialize new band */ |
| 3938 | static void brcms_c_setband(struct brcms_c_info *wlc, |
| 3939 | uint bandunit) |
| 3940 | { |
| 3941 | wlc->band = wlc->bandstate[bandunit]; |
| 3942 | |
| 3943 | if (!wlc->pub->up) |
| 3944 | return; |
| 3945 | |
| 3946 | /* wait for at least one beacon before entering sleeping state */ |
| 3947 | brcms_c_set_ps_ctrl(wlc); |
| 3948 | |
| 3949 | /* band-specific initializations */ |
| 3950 | brcms_c_bsinit(wlc); |
| 3951 | } |
| 3952 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 3953 | static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 3954 | { |
| 3955 | uint bandunit; |
| 3956 | bool switchband = false; |
| 3957 | u16 old_chanspec = wlc->chanspec; |
| 3958 | |
| 3959 | if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) { |
| 3960 | wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n", |
| 3961 | wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec)); |
| 3962 | return; |
| 3963 | } |
| 3964 | |
| 3965 | /* Switch bands if necessary */ |
| 3966 | if (wlc->pub->_nbands > 1) { |
| 3967 | bandunit = chspec_bandunit(chanspec); |
| 3968 | if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) { |
| 3969 | switchband = true; |
| 3970 | if (wlc->bandlocked) { |
| 3971 | wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d " |
| 3972 | "band is locked!\n", |
| 3973 | wlc->pub->unit, __func__, |
| 3974 | CHSPEC_CHANNEL(chanspec)); |
| 3975 | return; |
| 3976 | } |
| 3977 | /* |
| 3978 | * should the setband call come after the |
| 3979 | * brcms_b_chanspec() ? if the setband updates |
| 3980 | * (brcms_c_bsinit) use low level calls to inspect and |
| 3981 | * set state, the state inspected may be from the wrong |
| 3982 | * band, or the following brcms_b_set_chanspec() may |
| 3983 | * undo the work. |
| 3984 | */ |
| 3985 | brcms_c_setband(wlc, bandunit); |
| 3986 | } |
| 3987 | } |
| 3988 | |
| 3989 | /* sync up phy/radio chanspec */ |
| 3990 | brcms_c_set_phy_chanspec(wlc, chanspec); |
| 3991 | |
| 3992 | /* init antenna selection */ |
| 3993 | if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) { |
| 3994 | brcms_c_antsel_init(wlc->asi); |
| 3995 | |
| 3996 | /* Fix the hardware rateset based on bw. |
| 3997 | * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz |
| 3998 | */ |
| 3999 | brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset, |
| 4000 | wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0); |
| 4001 | } |
| 4002 | |
| 4003 | /* update some mac configuration since chanspec changed */ |
| 4004 | brcms_c_ucode_mac_upd(wlc); |
| 4005 | } |
| 4006 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4007 | /* |
| 4008 | * This function changes the phytxctl for beacon based on current |
| 4009 | * beacon ratespec AND txant setting as per this table: |
| 4010 | * ratespec CCK ant = wlc->stf->txant |
| 4011 | * OFDM ant = 3 |
| 4012 | */ |
| 4013 | void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, |
| 4014 | u32 bcn_rspec) |
| 4015 | { |
| 4016 | u16 phyctl; |
| 4017 | u16 phytxant = wlc->stf->phytxant; |
| 4018 | u16 mask = PHY_TXC_ANT_MASK; |
| 4019 | |
| 4020 | /* for non-siso rates or default setting, use the available chains */ |
| 4021 | if (BRCMS_PHY_11N_CAP(wlc->band)) |
| 4022 | phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec); |
| 4023 | |
| 4024 | phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD); |
| 4025 | phyctl = (phyctl & ~mask) | phytxant; |
| 4026 | brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl); |
| 4027 | } |
| 4028 | |
| 4029 | /* |
| 4030 | * centralized protection config change function to simplify debugging, no |
| 4031 | * consistency checking this should be called only on changes to avoid overhead |
| 4032 | * in periodic function |
| 4033 | */ |
| 4034 | void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val) |
| 4035 | { |
| 4036 | BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val); |
| 4037 | |
| 4038 | switch (idx) { |
| 4039 | case BRCMS_PROT_G_SPEC: |
| 4040 | wlc->protection->_g = (bool) val; |
| 4041 | break; |
| 4042 | case BRCMS_PROT_G_OVR: |
| 4043 | wlc->protection->g_override = (s8) val; |
| 4044 | break; |
| 4045 | case BRCMS_PROT_G_USER: |
| 4046 | wlc->protection->gmode_user = (u8) val; |
| 4047 | break; |
| 4048 | case BRCMS_PROT_OVERLAP: |
| 4049 | wlc->protection->overlap = (s8) val; |
| 4050 | break; |
| 4051 | case BRCMS_PROT_N_USER: |
| 4052 | wlc->protection->nmode_user = (s8) val; |
| 4053 | break; |
| 4054 | case BRCMS_PROT_N_CFG: |
| 4055 | wlc->protection->n_cfg = (s8) val; |
| 4056 | break; |
| 4057 | case BRCMS_PROT_N_CFG_OVR: |
| 4058 | wlc->protection->n_cfg_override = (s8) val; |
| 4059 | break; |
| 4060 | case BRCMS_PROT_N_NONGF: |
| 4061 | wlc->protection->nongf = (bool) val; |
| 4062 | break; |
| 4063 | case BRCMS_PROT_N_NONGF_OVR: |
| 4064 | wlc->protection->nongf_override = (s8) val; |
| 4065 | break; |
| 4066 | case BRCMS_PROT_N_PAM_OVR: |
| 4067 | wlc->protection->n_pam_override = (s8) val; |
| 4068 | break; |
| 4069 | case BRCMS_PROT_N_OBSS: |
| 4070 | wlc->protection->n_obss = (bool) val; |
| 4071 | break; |
| 4072 | |
| 4073 | default: |
| 4074 | break; |
| 4075 | } |
| 4076 | |
| 4077 | } |
| 4078 | |
| 4079 | static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val) |
| 4080 | { |
| 4081 | if (wlc->pub->up) { |
| 4082 | brcms_c_update_beacon(wlc); |
| 4083 | brcms_c_update_probe_resp(wlc, true); |
| 4084 | } |
| 4085 | } |
| 4086 | |
| 4087 | static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val) |
| 4088 | { |
| 4089 | wlc->stf->ldpc = val; |
| 4090 | |
| 4091 | if (wlc->pub->up) { |
| 4092 | brcms_c_update_beacon(wlc); |
| 4093 | brcms_c_update_probe_resp(wlc, true); |
| 4094 | wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false)); |
| 4095 | } |
| 4096 | } |
| 4097 | |
| 4098 | void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci, |
| 4099 | const struct ieee80211_tx_queue_params *params, |
| 4100 | bool suspend) |
| 4101 | { |
| 4102 | int i; |
| 4103 | struct shm_acparams acp_shm; |
| 4104 | u16 *shm_entry; |
| 4105 | |
| 4106 | /* Only apply params if the core is out of reset and has clocks */ |
| 4107 | if (!wlc->clk) { |
| 4108 | wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit, |
| 4109 | __func__); |
| 4110 | return; |
| 4111 | } |
| 4112 | |
| 4113 | memset((char *)&acp_shm, 0, sizeof(struct shm_acparams)); |
| 4114 | /* fill in shm ac params struct */ |
| 4115 | acp_shm.txop = params->txop; |
| 4116 | /* convert from units of 32us to us for ucode */ |
| 4117 | wlc->edcf_txop[aci & 0x3] = acp_shm.txop = |
| 4118 | EDCF_TXOP2USEC(acp_shm.txop); |
| 4119 | acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK); |
| 4120 | |
| 4121 | if (aci == AC_VI && acp_shm.txop == 0 |
| 4122 | && acp_shm.aifs < EDCF_AIFSN_MAX) |
| 4123 | acp_shm.aifs++; |
| 4124 | |
| 4125 | if (acp_shm.aifs < EDCF_AIFSN_MIN |
| 4126 | || acp_shm.aifs > EDCF_AIFSN_MAX) { |
| 4127 | wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad " |
| 4128 | "aifs %d\n", wlc->pub->unit, acp_shm.aifs); |
| 4129 | } else { |
| 4130 | acp_shm.cwmin = params->cw_min; |
| 4131 | acp_shm.cwmax = params->cw_max; |
| 4132 | acp_shm.cwcur = acp_shm.cwmin; |
| 4133 | acp_shm.bslots = |
| 4134 | R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur; |
| 4135 | acp_shm.reggap = acp_shm.bslots + acp_shm.aifs; |
| 4136 | /* Indicate the new params to the ucode */ |
| 4137 | acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO + |
| 4138 | wme_ac2fifo[aci] * |
| 4139 | M_EDCF_QLEN + |
| 4140 | M_EDCF_STATUS_OFF)); |
| 4141 | acp_shm.status |= WME_STATUS_NEWAC; |
| 4142 | |
| 4143 | /* Fill in shm acparam table */ |
| 4144 | shm_entry = (u16 *) &acp_shm; |
| 4145 | for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2) |
| 4146 | brcms_b_write_shm(wlc->hw, |
| 4147 | M_EDCF_QINFO + |
| 4148 | wme_ac2fifo[aci] * M_EDCF_QLEN + i, |
| 4149 | *shm_entry++); |
| 4150 | } |
| 4151 | |
| 4152 | if (suspend) { |
| 4153 | brcms_c_suspend_mac_and_wait(wlc); |
| 4154 | brcms_c_enable_mac(wlc); |
| 4155 | } |
| 4156 | } |
| 4157 | |
Arend van Spriel | 094b199 | 2011-10-18 14:03:07 +0200 | [diff] [blame] | 4158 | static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4159 | { |
| 4160 | u16 aci; |
| 4161 | int i_ac; |
| 4162 | struct ieee80211_tx_queue_params txq_pars; |
| 4163 | static const struct edcf_acparam default_edcf_acparams[] = { |
| 4164 | {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA}, |
| 4165 | {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA}, |
| 4166 | {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA}, |
| 4167 | {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA} |
| 4168 | }; /* ucode needs these parameters during its initialization */ |
| 4169 | const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0]; |
| 4170 | |
| 4171 | for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) { |
| 4172 | /* find out which ac this set of params applies to */ |
| 4173 | aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT; |
| 4174 | |
| 4175 | /* fill in shm ac params struct */ |
| 4176 | txq_pars.txop = edcf_acp->TXOP; |
| 4177 | txq_pars.aifs = edcf_acp->ACI; |
| 4178 | |
| 4179 | /* CWmin = 2^(ECWmin) - 1 */ |
| 4180 | txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK); |
| 4181 | /* CWmax = 2^(ECWmax) - 1 */ |
| 4182 | txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK) |
| 4183 | >> EDCF_ECWMAX_SHIFT); |
| 4184 | brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend); |
| 4185 | } |
| 4186 | |
| 4187 | if (suspend) { |
| 4188 | brcms_c_suspend_mac_and_wait(wlc); |
| 4189 | brcms_c_enable_mac(wlc); |
| 4190 | } |
| 4191 | } |
| 4192 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4193 | static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc) |
| 4194 | { |
| 4195 | /* Don't start the timer if HWRADIO feature is disabled */ |
| 4196 | if (wlc->radio_monitor) |
| 4197 | return; |
| 4198 | |
| 4199 | wlc->radio_monitor = true; |
| 4200 | brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON); |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 4201 | brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4202 | } |
| 4203 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 4204 | static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4205 | { |
| 4206 | if (!wlc->radio_monitor) |
| 4207 | return true; |
| 4208 | |
| 4209 | wlc->radio_monitor = false; |
| 4210 | brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON); |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 4211 | return brcms_del_timer(wlc->radio_timer); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4212 | } |
| 4213 | |
| 4214 | /* read hwdisable state and propagate to wlc flag */ |
| 4215 | static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc) |
| 4216 | { |
| 4217 | if (wlc->pub->hw_off) |
| 4218 | return; |
| 4219 | |
| 4220 | if (brcms_b_radio_read_hwdisabled(wlc->hw)) |
| 4221 | mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); |
| 4222 | else |
| 4223 | mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); |
| 4224 | } |
| 4225 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4226 | /* update hwradio status and return it */ |
| 4227 | bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc) |
| 4228 | { |
| 4229 | brcms_c_radio_hwdisable_upd(wlc); |
| 4230 | |
| 4231 | return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? |
| 4232 | true : false; |
| 4233 | } |
| 4234 | |
| 4235 | /* periodical query hw radio button while driver is "down" */ |
| 4236 | static void brcms_c_radio_timer(void *arg) |
| 4237 | { |
| 4238 | struct brcms_c_info *wlc = (struct brcms_c_info *) arg; |
| 4239 | |
| 4240 | if (brcms_deviceremoved(wlc)) { |
| 4241 | wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, |
| 4242 | __func__); |
| 4243 | brcms_down(wlc->wl); |
| 4244 | return; |
| 4245 | } |
| 4246 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4247 | brcms_c_radio_hwdisable_upd(wlc); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4248 | } |
| 4249 | |
| 4250 | /* common low-level watchdog code */ |
| 4251 | static void brcms_b_watchdog(void *arg) |
| 4252 | { |
| 4253 | struct brcms_c_info *wlc = (struct brcms_c_info *) arg; |
| 4254 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 4255 | |
| 4256 | BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 4257 | |
| 4258 | if (!wlc_hw->up) |
| 4259 | return; |
| 4260 | |
| 4261 | /* increment second count */ |
| 4262 | wlc_hw->now++; |
| 4263 | |
| 4264 | /* Check for FIFO error interrupts */ |
| 4265 | brcms_b_fifoerrors(wlc_hw); |
| 4266 | |
| 4267 | /* make sure RX dma has buffers */ |
| 4268 | dma_rxfill(wlc->hw->di[RX_FIFO]); |
| 4269 | |
| 4270 | wlc_phy_watchdog(wlc_hw->band->pi); |
| 4271 | } |
| 4272 | |
| 4273 | /* common watchdog code */ |
| 4274 | static void brcms_c_watchdog(void *arg) |
| 4275 | { |
| 4276 | struct brcms_c_info *wlc = (struct brcms_c_info *) arg; |
| 4277 | |
| 4278 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 4279 | |
| 4280 | if (!wlc->pub->up) |
| 4281 | return; |
| 4282 | |
| 4283 | if (brcms_deviceremoved(wlc)) { |
| 4284 | wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, |
| 4285 | __func__); |
| 4286 | brcms_down(wlc->wl); |
| 4287 | return; |
| 4288 | } |
| 4289 | |
| 4290 | /* increment second count */ |
| 4291 | wlc->pub->now++; |
| 4292 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4293 | brcms_c_radio_hwdisable_upd(wlc); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4294 | /* if radio is disable, driver may be down, quit here */ |
| 4295 | if (wlc->pub->radio_disabled) |
| 4296 | return; |
| 4297 | |
| 4298 | brcms_b_watchdog(wlc); |
| 4299 | |
| 4300 | /* |
| 4301 | * occasionally sample mac stat counters to |
| 4302 | * detect 16-bit counter wrap |
| 4303 | */ |
| 4304 | if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0) |
| 4305 | brcms_c_statsupd(wlc); |
| 4306 | |
| 4307 | if (BRCMS_ISNPHY(wlc->band) && |
| 4308 | ((wlc->pub->now - wlc->tempsense_lasttime) >= |
| 4309 | BRCMS_TEMPSENSE_PERIOD)) { |
| 4310 | wlc->tempsense_lasttime = wlc->pub->now; |
| 4311 | brcms_c_tempsense_upd(wlc); |
| 4312 | } |
| 4313 | } |
| 4314 | |
| 4315 | static void brcms_c_watchdog_by_timer(void *arg) |
| 4316 | { |
| 4317 | brcms_c_watchdog(arg); |
| 4318 | } |
| 4319 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 4320 | static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4321 | { |
| 4322 | wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer, |
| 4323 | wlc, "watchdog"); |
| 4324 | if (!wlc->wdtimer) { |
| 4325 | wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer " |
| 4326 | "failed\n", unit); |
| 4327 | goto fail; |
| 4328 | } |
| 4329 | |
| 4330 | wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer, |
| 4331 | wlc, "radio"); |
| 4332 | if (!wlc->radio_timer) { |
| 4333 | wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer " |
| 4334 | "failed\n", unit); |
| 4335 | goto fail; |
| 4336 | } |
| 4337 | |
| 4338 | return true; |
| 4339 | |
| 4340 | fail: |
| 4341 | return false; |
| 4342 | } |
| 4343 | |
| 4344 | /* |
| 4345 | * Initialize brcms_c_info default values ... |
| 4346 | * may get overrides later in this function |
| 4347 | */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 4348 | static void brcms_c_info_init(struct brcms_c_info *wlc, int unit) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4349 | { |
| 4350 | int i; |
| 4351 | |
| 4352 | /* Save our copy of the chanspec */ |
| 4353 | wlc->chanspec = ch20mhz_chspec(1); |
| 4354 | |
| 4355 | /* various 802.11g modes */ |
| 4356 | wlc->shortslot = false; |
| 4357 | wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO; |
| 4358 | |
| 4359 | brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO); |
| 4360 | brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false); |
| 4361 | |
| 4362 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR, |
| 4363 | BRCMS_PROTECTION_AUTO); |
| 4364 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF); |
| 4365 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR, |
| 4366 | BRCMS_PROTECTION_AUTO); |
| 4367 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false); |
| 4368 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO); |
| 4369 | |
| 4370 | brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP, |
| 4371 | BRCMS_PROTECTION_CTL_OVERLAP); |
| 4372 | |
| 4373 | /* 802.11g draft 4.0 NonERP elt advertisement */ |
| 4374 | wlc->include_legacy_erp = true; |
| 4375 | |
| 4376 | wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF; |
| 4377 | wlc->stf->txant = ANT_TX_DEF; |
| 4378 | |
| 4379 | wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT; |
| 4380 | |
| 4381 | wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN; |
| 4382 | for (i = 0; i < NFIFO; i++) |
| 4383 | wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN; |
| 4384 | wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN; |
| 4385 | |
| 4386 | /* default rate fallback retry limits */ |
| 4387 | wlc->SFBL = RETRY_SHORT_FB; |
| 4388 | wlc->LFBL = RETRY_LONG_FB; |
| 4389 | |
| 4390 | /* default mac retry limits */ |
| 4391 | wlc->SRL = RETRY_SHORT_DEF; |
| 4392 | wlc->LRL = RETRY_LONG_DEF; |
| 4393 | |
| 4394 | /* WME QoS mode is Auto by default */ |
| 4395 | wlc->pub->_ampdu = AMPDU_AGG_HOST; |
| 4396 | wlc->pub->bcmerror = 0; |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4397 | } |
| 4398 | |
| 4399 | static uint brcms_c_attach_module(struct brcms_c_info *wlc) |
| 4400 | { |
| 4401 | uint err = 0; |
| 4402 | uint unit; |
| 4403 | unit = wlc->pub->unit; |
| 4404 | |
| 4405 | wlc->asi = brcms_c_antsel_attach(wlc); |
| 4406 | if (wlc->asi == NULL) { |
| 4407 | wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach " |
| 4408 | "failed\n", unit); |
| 4409 | err = 44; |
| 4410 | goto fail; |
| 4411 | } |
| 4412 | |
| 4413 | wlc->ampdu = brcms_c_ampdu_attach(wlc); |
| 4414 | if (wlc->ampdu == NULL) { |
| 4415 | wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach " |
| 4416 | "failed\n", unit); |
| 4417 | err = 50; |
| 4418 | goto fail; |
| 4419 | } |
| 4420 | |
| 4421 | if ((brcms_c_stf_attach(wlc) != 0)) { |
| 4422 | wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach " |
| 4423 | "failed\n", unit); |
| 4424 | err = 68; |
| 4425 | goto fail; |
| 4426 | } |
| 4427 | fail: |
| 4428 | return err; |
| 4429 | } |
| 4430 | |
| 4431 | struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc) |
| 4432 | { |
| 4433 | return wlc->pub; |
| 4434 | } |
| 4435 | |
| 4436 | /* low level attach |
| 4437 | * run backplane attach, init nvram |
| 4438 | * run phy attach |
| 4439 | * initialize software state for each core and band |
| 4440 | * put the whole chip in reset(driver down state), no clock |
| 4441 | */ |
| 4442 | static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device, |
| 4443 | uint unit, bool piomode, void __iomem *regsva, |
| 4444 | struct pci_dev *btparam) |
| 4445 | { |
| 4446 | struct brcms_hardware *wlc_hw; |
| 4447 | struct d11regs __iomem *regs; |
| 4448 | char *macaddr = NULL; |
| 4449 | uint err = 0; |
| 4450 | uint j; |
| 4451 | bool wme = false; |
| 4452 | struct shared_phy_params sha_params; |
| 4453 | struct wiphy *wiphy = wlc->wiphy; |
| 4454 | |
| 4455 | BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, |
| 4456 | device); |
| 4457 | |
| 4458 | wme = true; |
| 4459 | |
| 4460 | wlc_hw = wlc->hw; |
| 4461 | wlc_hw->wlc = wlc; |
| 4462 | wlc_hw->unit = unit; |
| 4463 | wlc_hw->band = wlc_hw->bandstate[0]; |
| 4464 | wlc_hw->_piomode = piomode; |
| 4465 | |
| 4466 | /* populate struct brcms_hardware with default values */ |
| 4467 | brcms_b_info_init(wlc_hw); |
| 4468 | |
| 4469 | /* |
| 4470 | * Do the hardware portion of the attach. Also initialize software |
| 4471 | * state that depends on the particular hardware we are running. |
| 4472 | */ |
| 4473 | wlc_hw->sih = ai_attach(regsva, btparam); |
| 4474 | if (wlc_hw->sih == NULL) { |
| 4475 | wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n", |
| 4476 | unit); |
| 4477 | err = 11; |
| 4478 | goto fail; |
| 4479 | } |
| 4480 | |
| 4481 | /* verify again the device is supported */ |
| 4482 | if (!brcms_c_chipmatch(vendor, device)) { |
| 4483 | wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported " |
| 4484 | "vendor/device (0x%x/0x%x)\n", |
| 4485 | unit, vendor, device); |
| 4486 | err = 12; |
| 4487 | goto fail; |
| 4488 | } |
| 4489 | |
| 4490 | wlc_hw->vendorid = vendor; |
| 4491 | wlc_hw->deviceid = device; |
| 4492 | |
| 4493 | /* set bar0 window to point at D11 core */ |
| 4494 | wlc_hw->regs = (struct d11regs __iomem *) |
| 4495 | ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); |
| 4496 | wlc_hw->corerev = ai_corerev(wlc_hw->sih); |
| 4497 | |
| 4498 | regs = wlc_hw->regs; |
| 4499 | |
| 4500 | wlc->regs = wlc_hw->regs; |
| 4501 | |
| 4502 | /* validate chip, chiprev and corerev */ |
| 4503 | if (!brcms_c_isgoodchip(wlc_hw)) { |
| 4504 | err = 13; |
| 4505 | goto fail; |
| 4506 | } |
| 4507 | |
| 4508 | /* initialize power control registers */ |
| 4509 | ai_clkctl_init(wlc_hw->sih); |
| 4510 | |
| 4511 | /* request fastclock and force fastclock for the rest of attach |
| 4512 | * bring the d11 core out of reset. |
| 4513 | * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk |
| 4514 | * is still false; But it will be called again inside wlc_corereset, |
| 4515 | * after d11 is out of reset. |
| 4516 | */ |
| 4517 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 4518 | brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); |
| 4519 | |
| 4520 | if (!brcms_b_validate_chip_access(wlc_hw)) { |
| 4521 | wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access " |
| 4522 | "failed\n", unit); |
| 4523 | err = 14; |
| 4524 | goto fail; |
| 4525 | } |
| 4526 | |
| 4527 | /* get the board rev, used just below */ |
| 4528 | j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV); |
| 4529 | /* promote srom boardrev of 0xFF to 1 */ |
| 4530 | if (j == BOARDREV_PROMOTABLE) |
| 4531 | j = BOARDREV_PROMOTED; |
| 4532 | wlc_hw->boardrev = (u16) j; |
| 4533 | if (!brcms_c_validboardtype(wlc_hw)) { |
| 4534 | wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom " |
| 4535 | "board type (0x%x)" " or revision level (0x%x)\n", |
| 4536 | unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); |
| 4537 | err = 15; |
| 4538 | goto fail; |
| 4539 | } |
| 4540 | wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV); |
| 4541 | wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih, |
| 4542 | BRCMS_SROM_BOARDFLAGS); |
| 4543 | wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih, |
| 4544 | BRCMS_SROM_BOARDFLAGS2); |
| 4545 | |
| 4546 | if (wlc_hw->boardflags & BFL_NOPLLDOWN) |
| 4547 | brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED); |
| 4548 | |
| 4549 | /* check device id(srom, nvram etc.) to set bands */ |
| 4550 | if (wlc_hw->deviceid == BCM43224_D11N_ID || |
| 4551 | wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) |
| 4552 | /* Dualband boards */ |
| 4553 | wlc_hw->_nbands = 2; |
| 4554 | else |
| 4555 | wlc_hw->_nbands = 1; |
| 4556 | |
| 4557 | if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) |
| 4558 | wlc_hw->_nbands = 1; |
| 4559 | |
| 4560 | /* BMAC_NOTE: remove init of pub values when brcms_c_attach() |
| 4561 | * unconditionally does the init of these values |
| 4562 | */ |
| 4563 | wlc->vendorid = wlc_hw->vendorid; |
| 4564 | wlc->deviceid = wlc_hw->deviceid; |
| 4565 | wlc->pub->sih = wlc_hw->sih; |
| 4566 | wlc->pub->corerev = wlc_hw->corerev; |
| 4567 | wlc->pub->sromrev = wlc_hw->sromrev; |
| 4568 | wlc->pub->boardrev = wlc_hw->boardrev; |
| 4569 | wlc->pub->boardflags = wlc_hw->boardflags; |
| 4570 | wlc->pub->boardflags2 = wlc_hw->boardflags2; |
| 4571 | wlc->pub->_nbands = wlc_hw->_nbands; |
| 4572 | |
| 4573 | wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); |
| 4574 | |
| 4575 | if (wlc_hw->physhim == NULL) { |
| 4576 | wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach " |
| 4577 | "failed\n", unit); |
| 4578 | err = 25; |
| 4579 | goto fail; |
| 4580 | } |
| 4581 | |
| 4582 | /* pass all the parameters to wlc_phy_shared_attach in one struct */ |
| 4583 | sha_params.sih = wlc_hw->sih; |
| 4584 | sha_params.physhim = wlc_hw->physhim; |
| 4585 | sha_params.unit = unit; |
| 4586 | sha_params.corerev = wlc_hw->corerev; |
| 4587 | sha_params.vid = wlc_hw->vendorid; |
| 4588 | sha_params.did = wlc_hw->deviceid; |
| 4589 | sha_params.chip = wlc_hw->sih->chip; |
| 4590 | sha_params.chiprev = wlc_hw->sih->chiprev; |
| 4591 | sha_params.chippkg = wlc_hw->sih->chippkg; |
| 4592 | sha_params.sromrev = wlc_hw->sromrev; |
| 4593 | sha_params.boardtype = wlc_hw->sih->boardtype; |
| 4594 | sha_params.boardrev = wlc_hw->boardrev; |
| 4595 | sha_params.boardvendor = wlc_hw->sih->boardvendor; |
| 4596 | sha_params.boardflags = wlc_hw->boardflags; |
| 4597 | sha_params.boardflags2 = wlc_hw->boardflags2; |
| 4598 | sha_params.buscorerev = wlc_hw->sih->buscorerev; |
| 4599 | |
| 4600 | /* alloc and save pointer to shared phy state area */ |
| 4601 | wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params); |
| 4602 | if (!wlc_hw->phy_sh) { |
| 4603 | err = 16; |
| 4604 | goto fail; |
| 4605 | } |
| 4606 | |
| 4607 | /* initialize software state for each core and band */ |
| 4608 | for (j = 0; j < wlc_hw->_nbands; j++) { |
| 4609 | /* |
| 4610 | * band0 is always 2.4Ghz |
| 4611 | * band1, if present, is 5Ghz |
| 4612 | */ |
| 4613 | |
| 4614 | brcms_c_setxband(wlc_hw, j); |
| 4615 | |
| 4616 | wlc_hw->band->bandunit = j; |
| 4617 | wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; |
| 4618 | wlc->band->bandunit = j; |
| 4619 | wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; |
| 4620 | wlc->core->coreidx = ai_coreidx(wlc_hw->sih); |
| 4621 | |
| 4622 | wlc_hw->machwcap = R_REG(®s->machwcap); |
| 4623 | wlc_hw->machwcap_backup = wlc_hw->machwcap; |
| 4624 | |
| 4625 | /* init tx fifo size */ |
| 4626 | wlc_hw->xmtfifo_sz = |
| 4627 | xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)]; |
| 4628 | |
| 4629 | /* Get a phy for this band */ |
| 4630 | wlc_hw->band->pi = |
| 4631 | wlc_phy_attach(wlc_hw->phy_sh, regs, |
| 4632 | wlc_hw->band->bandtype, |
| 4633 | wlc->wiphy); |
| 4634 | if (wlc_hw->band->pi == NULL) { |
| 4635 | wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_" |
| 4636 | "attach failed\n", unit); |
| 4637 | err = 17; |
| 4638 | goto fail; |
| 4639 | } |
| 4640 | |
| 4641 | wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap); |
| 4642 | |
| 4643 | wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype, |
| 4644 | &wlc_hw->band->phyrev, |
| 4645 | &wlc_hw->band->radioid, |
| 4646 | &wlc_hw->band->radiorev); |
| 4647 | wlc_hw->band->abgphy_encore = |
| 4648 | wlc_phy_get_encore(wlc_hw->band->pi); |
| 4649 | wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi); |
| 4650 | wlc_hw->band->core_flags = |
| 4651 | wlc_phy_get_coreflags(wlc_hw->band->pi); |
| 4652 | |
| 4653 | /* verify good phy_type & supported phy revision */ |
| 4654 | if (BRCMS_ISNPHY(wlc_hw->band)) { |
| 4655 | if (NCONF_HAS(wlc_hw->band->phyrev)) |
| 4656 | goto good_phy; |
| 4657 | else |
| 4658 | goto bad_phy; |
| 4659 | } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { |
| 4660 | if (LCNCONF_HAS(wlc_hw->band->phyrev)) |
| 4661 | goto good_phy; |
| 4662 | else |
| 4663 | goto bad_phy; |
| 4664 | } else { |
| 4665 | bad_phy: |
| 4666 | wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported " |
| 4667 | "phy type/rev (%d/%d)\n", unit, |
| 4668 | wlc_hw->band->phytype, wlc_hw->band->phyrev); |
| 4669 | err = 18; |
| 4670 | goto fail; |
| 4671 | } |
| 4672 | |
| 4673 | good_phy: |
| 4674 | /* |
| 4675 | * BMAC_NOTE: wlc->band->pi should not be set below and should |
| 4676 | * be done in the high level attach. However we can not make |
| 4677 | * that change until all low level access is changed to |
| 4678 | * wlc_hw->band->pi. Instead do the wlc->band->pi init below, |
| 4679 | * keeping wlc_hw->band->pi as well for incremental update of |
| 4680 | * low level fns, and cut over low only init when all fns |
| 4681 | * updated. |
| 4682 | */ |
| 4683 | wlc->band->pi = wlc_hw->band->pi; |
| 4684 | wlc->band->phytype = wlc_hw->band->phytype; |
| 4685 | wlc->band->phyrev = wlc_hw->band->phyrev; |
| 4686 | wlc->band->radioid = wlc_hw->band->radioid; |
| 4687 | wlc->band->radiorev = wlc_hw->band->radiorev; |
| 4688 | |
| 4689 | /* default contention windows size limits */ |
| 4690 | wlc_hw->band->CWmin = APHY_CWMIN; |
| 4691 | wlc_hw->band->CWmax = PHY_CWMAX; |
| 4692 | |
| 4693 | if (!brcms_b_attach_dmapio(wlc, j, wme)) { |
| 4694 | err = 19; |
| 4695 | goto fail; |
| 4696 | } |
| 4697 | } |
| 4698 | |
| 4699 | /* disable core to match driver "down" state */ |
| 4700 | brcms_c_coredisable(wlc_hw); |
| 4701 | |
| 4702 | /* Match driver "down" state */ |
| 4703 | ai_pci_down(wlc_hw->sih); |
| 4704 | |
| 4705 | /* register sb interrupt callback functions */ |
| 4706 | ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff, |
| 4707 | (void *)brcms_c_wlintrsrestore, NULL, wlc); |
| 4708 | |
| 4709 | /* turn off pll and xtal to match driver "down" state */ |
| 4710 | brcms_b_xtal(wlc_hw, OFF); |
| 4711 | |
| 4712 | /* ******************************************************************* |
| 4713 | * The hardware is in the DOWN state at this point. D11 core |
| 4714 | * or cores are in reset with clocks off, and the board PLLs |
| 4715 | * are off if possible. |
| 4716 | * |
| 4717 | * Beyond this point, wlc->sbclk == false and chip registers |
| 4718 | * should not be touched. |
| 4719 | ********************************************************************* |
| 4720 | */ |
| 4721 | |
| 4722 | /* init etheraddr state variables */ |
| 4723 | macaddr = brcms_c_get_macaddr(wlc_hw); |
| 4724 | if (macaddr == NULL) { |
| 4725 | wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n", |
| 4726 | unit); |
| 4727 | err = 21; |
| 4728 | goto fail; |
| 4729 | } |
| 4730 | if (!mac_pton(macaddr, wlc_hw->etheraddr) || |
| 4731 | is_broadcast_ether_addr(wlc_hw->etheraddr) || |
| 4732 | is_zero_ether_addr(wlc_hw->etheraddr)) { |
| 4733 | wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n", |
| 4734 | unit, macaddr); |
| 4735 | err = 22; |
| 4736 | goto fail; |
| 4737 | } |
| 4738 | |
| 4739 | BCMMSG(wlc->wiphy, |
| 4740 | "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", |
| 4741 | wlc_hw->deviceid, wlc_hw->_nbands, |
| 4742 | wlc_hw->sih->boardtype, macaddr); |
| 4743 | |
| 4744 | return err; |
| 4745 | |
| 4746 | fail: |
| 4747 | wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit, |
| 4748 | err); |
| 4749 | return err; |
| 4750 | } |
| 4751 | |
| 4752 | static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc) |
| 4753 | { |
| 4754 | uint unit; |
| 4755 | unit = wlc->pub->unit; |
| 4756 | |
| 4757 | if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) { |
| 4758 | /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */ |
| 4759 | wlc->band->antgain = 8; |
| 4760 | } else if (wlc->band->antgain == -1) { |
| 4761 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" |
| 4762 | " srom, using 2dB\n", unit, __func__); |
| 4763 | wlc->band->antgain = 8; |
| 4764 | } else { |
| 4765 | s8 gain, fract; |
| 4766 | /* Older sroms specified gain in whole dbm only. In order |
| 4767 | * be able to specify qdbm granularity and remain backward |
| 4768 | * compatible the whole dbms are now encoded in only |
| 4769 | * low 6 bits and remaining qdbms are encoded in the hi 2 bits. |
| 4770 | * 6 bit signed number ranges from -32 - 31. |
| 4771 | * |
| 4772 | * Examples: |
| 4773 | * 0x1 = 1 db, |
| 4774 | * 0xc1 = 1.75 db (1 + 3 quarters), |
| 4775 | * 0x3f = -1 (-1 + 0 quarters), |
| 4776 | * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm. |
| 4777 | * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm. |
| 4778 | */ |
| 4779 | gain = wlc->band->antgain & 0x3f; |
| 4780 | gain <<= 2; /* Sign extend */ |
| 4781 | gain >>= 2; |
| 4782 | fract = (wlc->band->antgain & 0xc0) >> 6; |
| 4783 | wlc->band->antgain = 4 * gain + fract; |
| 4784 | } |
| 4785 | } |
| 4786 | |
| 4787 | static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc) |
| 4788 | { |
| 4789 | int aa; |
| 4790 | uint unit; |
| 4791 | int bandtype; |
| 4792 | struct si_pub *sih = wlc->hw->sih; |
| 4793 | |
| 4794 | unit = wlc->pub->unit; |
| 4795 | bandtype = wlc->band->bandtype; |
| 4796 | |
| 4797 | /* get antennas available */ |
| 4798 | if (bandtype == BRCM_BAND_5G) |
| 4799 | aa = (s8) getintvar(sih, BRCMS_SROM_AA5G); |
| 4800 | else |
| 4801 | aa = (s8) getintvar(sih, BRCMS_SROM_AA2G); |
| 4802 | |
| 4803 | if ((aa < 1) || (aa > 15)) { |
| 4804 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" |
| 4805 | " srom (0x%x), using 3\n", unit, __func__, aa); |
| 4806 | aa = 3; |
| 4807 | } |
| 4808 | |
| 4809 | /* reset the defaults if we have a single antenna */ |
| 4810 | if (aa == 1) { |
| 4811 | wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0; |
| 4812 | wlc->stf->txant = ANT_TX_FORCE_0; |
| 4813 | } else if (aa == 2) { |
| 4814 | wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1; |
| 4815 | wlc->stf->txant = ANT_TX_FORCE_1; |
| 4816 | } else { |
| 4817 | } |
| 4818 | |
| 4819 | /* Compute Antenna Gain */ |
| 4820 | if (bandtype == BRCM_BAND_5G) |
| 4821 | wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1); |
| 4822 | else |
| 4823 | wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0); |
| 4824 | |
| 4825 | brcms_c_attach_antgain_init(wlc); |
| 4826 | |
| 4827 | return true; |
| 4828 | } |
| 4829 | |
| 4830 | static void brcms_c_bss_default_init(struct brcms_c_info *wlc) |
| 4831 | { |
| 4832 | u16 chanspec; |
| 4833 | struct brcms_band *band; |
| 4834 | struct brcms_bss_info *bi = wlc->default_bss; |
| 4835 | |
| 4836 | /* init default and target BSS with some sane initial values */ |
| 4837 | memset((char *)(bi), 0, sizeof(struct brcms_bss_info)); |
| 4838 | bi->beacon_period = BEACON_INTERVAL_DEFAULT; |
| 4839 | |
| 4840 | /* fill the default channel as the first valid channel |
| 4841 | * starting from the 2G channels |
| 4842 | */ |
| 4843 | chanspec = ch20mhz_chspec(1); |
| 4844 | wlc->home_chanspec = bi->chanspec = chanspec; |
| 4845 | |
| 4846 | /* find the band of our default channel */ |
| 4847 | band = wlc->band; |
| 4848 | if (wlc->pub->_nbands > 1 && |
| 4849 | band->bandunit != chspec_bandunit(chanspec)) |
| 4850 | band = wlc->bandstate[OTHERBANDUNIT(wlc)]; |
| 4851 | |
| 4852 | /* init bss rates to the band specific default rate set */ |
| 4853 | brcms_c_rateset_default(&bi->rateset, NULL, band->phytype, |
| 4854 | band->bandtype, false, BRCMS_RATE_MASK_FULL, |
| 4855 | (bool) (wlc->pub->_n_enab & SUPPORT_11N), |
| 4856 | brcms_chspec_bw(chanspec), wlc->stf->txstreams); |
| 4857 | |
| 4858 | if (wlc->pub->_n_enab & SUPPORT_11N) |
| 4859 | bi->flags |= BRCMS_BSS_HT; |
| 4860 | } |
| 4861 | |
| 4862 | static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc) |
| 4863 | { |
| 4864 | struct brcms_txq_info *qi, *p; |
| 4865 | |
| 4866 | qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC); |
| 4867 | if (qi != NULL) { |
| 4868 | /* |
| 4869 | * Have enough room for control packets along with HI watermark |
| 4870 | * Also, add room to txq for total psq packets if all the SCBs |
| 4871 | * leave PS mode. The watermark for flowcontrol to OS packets |
| 4872 | * will remain the same |
| 4873 | */ |
| 4874 | brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT, |
| 4875 | 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT); |
| 4876 | |
| 4877 | /* add this queue to the the global list */ |
| 4878 | p = wlc->tx_queues; |
| 4879 | if (p == NULL) { |
| 4880 | wlc->tx_queues = qi; |
| 4881 | } else { |
| 4882 | while (p->next != NULL) |
| 4883 | p = p->next; |
| 4884 | p->next = qi; |
| 4885 | } |
| 4886 | } |
| 4887 | return qi; |
| 4888 | } |
| 4889 | |
| 4890 | static void brcms_c_txq_free(struct brcms_c_info *wlc, |
| 4891 | struct brcms_txq_info *qi) |
| 4892 | { |
| 4893 | struct brcms_txq_info *p; |
| 4894 | |
| 4895 | if (qi == NULL) |
| 4896 | return; |
| 4897 | |
| 4898 | /* remove the queue from the linked list */ |
| 4899 | p = wlc->tx_queues; |
| 4900 | if (p == qi) |
| 4901 | wlc->tx_queues = p->next; |
| 4902 | else { |
| 4903 | while (p != NULL && p->next != qi) |
| 4904 | p = p->next; |
| 4905 | if (p != NULL) |
| 4906 | p->next = p->next->next; |
| 4907 | } |
| 4908 | |
| 4909 | kfree(qi); |
| 4910 | } |
| 4911 | |
| 4912 | static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap) |
| 4913 | { |
| 4914 | uint i; |
| 4915 | struct brcms_band *band; |
| 4916 | |
| 4917 | for (i = 0; i < wlc->pub->_nbands; i++) { |
| 4918 | band = wlc->bandstate[i]; |
| 4919 | if (band->bandtype == BRCM_BAND_5G) { |
| 4920 | if ((bwcap == BRCMS_N_BW_40ALL) |
| 4921 | || (bwcap == BRCMS_N_BW_20IN2G_40IN5G)) |
| 4922 | band->mimo_cap_40 = true; |
| 4923 | else |
| 4924 | band->mimo_cap_40 = false; |
| 4925 | } else { |
| 4926 | if (bwcap == BRCMS_N_BW_40ALL) |
| 4927 | band->mimo_cap_40 = true; |
| 4928 | else |
| 4929 | band->mimo_cap_40 = false; |
| 4930 | } |
| 4931 | } |
| 4932 | } |
| 4933 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4934 | static void brcms_c_timers_deinit(struct brcms_c_info *wlc) |
| 4935 | { |
| 4936 | /* free timer state */ |
| 4937 | if (wlc->wdtimer) { |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 4938 | brcms_free_timer(wlc->wdtimer); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4939 | wlc->wdtimer = NULL; |
| 4940 | } |
| 4941 | if (wlc->radio_timer) { |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 4942 | brcms_free_timer(wlc->radio_timer); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 4943 | wlc->radio_timer = NULL; |
| 4944 | } |
| 4945 | } |
| 4946 | |
| 4947 | static void brcms_c_detach_module(struct brcms_c_info *wlc) |
| 4948 | { |
| 4949 | if (wlc->asi) { |
| 4950 | brcms_c_antsel_detach(wlc->asi); |
| 4951 | wlc->asi = NULL; |
| 4952 | } |
| 4953 | |
| 4954 | if (wlc->ampdu) { |
| 4955 | brcms_c_ampdu_detach(wlc->ampdu); |
| 4956 | wlc->ampdu = NULL; |
| 4957 | } |
| 4958 | |
| 4959 | brcms_c_stf_detach(wlc); |
| 4960 | } |
| 4961 | |
| 4962 | /* |
| 4963 | * low level detach |
| 4964 | */ |
| 4965 | static int brcms_b_detach(struct brcms_c_info *wlc) |
| 4966 | { |
| 4967 | uint i; |
| 4968 | struct brcms_hw_band *band; |
| 4969 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 4970 | int callbacks; |
| 4971 | |
| 4972 | callbacks = 0; |
| 4973 | |
| 4974 | if (wlc_hw->sih) { |
| 4975 | /* |
| 4976 | * detach interrupt sync mechanism since interrupt is disabled |
| 4977 | * and per-port interrupt object may has been freed. this must |
| 4978 | * be done before sb core switch |
| 4979 | */ |
| 4980 | ai_deregister_intr_callback(wlc_hw->sih); |
| 4981 | ai_pci_sleep(wlc_hw->sih); |
| 4982 | } |
| 4983 | |
| 4984 | brcms_b_detach_dmapio(wlc_hw); |
| 4985 | |
| 4986 | band = wlc_hw->band; |
| 4987 | for (i = 0; i < wlc_hw->_nbands; i++) { |
| 4988 | if (band->pi) { |
| 4989 | /* Detach this band's phy */ |
| 4990 | wlc_phy_detach(band->pi); |
| 4991 | band->pi = NULL; |
| 4992 | } |
| 4993 | band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)]; |
| 4994 | } |
| 4995 | |
| 4996 | /* Free shared phy state */ |
| 4997 | kfree(wlc_hw->phy_sh); |
| 4998 | |
| 4999 | wlc_phy_shim_detach(wlc_hw->physhim); |
| 5000 | |
| 5001 | if (wlc_hw->sih) { |
| 5002 | ai_detach(wlc_hw->sih); |
| 5003 | wlc_hw->sih = NULL; |
| 5004 | } |
| 5005 | |
| 5006 | return callbacks; |
| 5007 | |
| 5008 | } |
| 5009 | |
| 5010 | /* |
| 5011 | * Return a count of the number of driver callbacks still pending. |
| 5012 | * |
| 5013 | * General policy is that brcms_c_detach can only dealloc/free software states. |
| 5014 | * It can NOT touch hardware registers since the d11core may be in reset and |
| 5015 | * clock may not be available. |
| 5016 | * One exception is sb register access, which is possible if crystal is turned |
| 5017 | * on after "down" state, driver should avoid software timer with the exception |
| 5018 | * of radio_monitor. |
| 5019 | */ |
| 5020 | uint brcms_c_detach(struct brcms_c_info *wlc) |
| 5021 | { |
| 5022 | uint callbacks = 0; |
| 5023 | |
| 5024 | if (wlc == NULL) |
| 5025 | return 0; |
| 5026 | |
| 5027 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 5028 | |
| 5029 | callbacks += brcms_b_detach(wlc); |
| 5030 | |
| 5031 | /* delete software timers */ |
| 5032 | if (!brcms_c_radio_monitor_stop(wlc)) |
| 5033 | callbacks++; |
| 5034 | |
| 5035 | brcms_c_channel_mgr_detach(wlc->cmi); |
| 5036 | |
| 5037 | brcms_c_timers_deinit(wlc); |
| 5038 | |
| 5039 | brcms_c_detach_module(wlc); |
| 5040 | |
| 5041 | |
| 5042 | while (wlc->tx_queues != NULL) |
| 5043 | brcms_c_txq_free(wlc, wlc->tx_queues); |
| 5044 | |
| 5045 | brcms_c_detach_mfree(wlc); |
| 5046 | return callbacks; |
| 5047 | } |
| 5048 | |
| 5049 | /* update state that depends on the current value of "ap" */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 5050 | static void brcms_c_ap_upd(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5051 | { |
| 5052 | /* STA-BSS; short capable */ |
| 5053 | wlc->PLCPHdr_override = BRCMS_PLCP_SHORT; |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5054 | } |
| 5055 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5056 | /* Initialize just the hardware when coming out of POR or S3/S5 system states */ |
| 5057 | static void brcms_b_hw_up(struct brcms_hardware *wlc_hw) |
| 5058 | { |
| 5059 | if (wlc_hw->wlc->pub->hw_up) |
| 5060 | return; |
| 5061 | |
| 5062 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 5063 | |
| 5064 | /* |
| 5065 | * Enable pll and xtal, initialize the power control registers, |
| 5066 | * and force fastclock for the remainder of brcms_c_up(). |
| 5067 | */ |
| 5068 | brcms_b_xtal(wlc_hw, ON); |
| 5069 | ai_clkctl_init(wlc_hw->sih); |
| 5070 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 5071 | |
| 5072 | ai_pci_fixcfg(wlc_hw->sih); |
| 5073 | |
| 5074 | /* |
| 5075 | * AI chip doesn't restore bar0win2 on |
| 5076 | * hibernation/resume, need sw fixup |
| 5077 | */ |
| 5078 | if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || |
| 5079 | (wlc_hw->sih->chip == BCM43225_CHIP_ID)) |
| 5080 | wlc_hw->regs = (struct d11regs __iomem *) |
| 5081 | ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); |
| 5082 | |
| 5083 | /* |
| 5084 | * Inform phy that a POR reset has occurred so |
| 5085 | * it does a complete phy init |
| 5086 | */ |
| 5087 | wlc_phy_por_inform(wlc_hw->band->pi); |
| 5088 | |
| 5089 | wlc_hw->ucode_loaded = false; |
| 5090 | wlc_hw->wlc->pub->hw_up = true; |
| 5091 | |
| 5092 | if ((wlc_hw->boardflags & BFL_FEM) |
| 5093 | && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) { |
| 5094 | if (! |
| 5095 | (wlc_hw->boardrev >= 0x1250 |
| 5096 | && (wlc_hw->boardflags & BFL_FEM_BT))) |
| 5097 | ai_epa_4313war(wlc_hw->sih); |
| 5098 | } |
| 5099 | } |
| 5100 | |
| 5101 | static int brcms_b_up_prep(struct brcms_hardware *wlc_hw) |
| 5102 | { |
| 5103 | uint coremask; |
| 5104 | |
| 5105 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 5106 | |
| 5107 | /* |
| 5108 | * Enable pll and xtal, initialize the power control registers, |
| 5109 | * and force fastclock for the remainder of brcms_c_up(). |
| 5110 | */ |
| 5111 | brcms_b_xtal(wlc_hw, ON); |
| 5112 | ai_clkctl_init(wlc_hw->sih); |
| 5113 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 5114 | |
| 5115 | /* |
| 5116 | * Configure pci/pcmcia here instead of in brcms_c_attach() |
| 5117 | * to allow mfg hotswap: down, hotswap (chip power cycle), up. |
| 5118 | */ |
| 5119 | coremask = (1 << wlc_hw->wlc->core->coreidx); |
| 5120 | |
| 5121 | ai_pci_setup(wlc_hw->sih, coremask); |
| 5122 | |
| 5123 | /* |
| 5124 | * Need to read the hwradio status here to cover the case where the |
| 5125 | * system is loaded with the hw radio disabled. We do not want to |
| 5126 | * bring the driver up in this case. |
| 5127 | */ |
| 5128 | if (brcms_b_radio_read_hwdisabled(wlc_hw)) { |
| 5129 | /* put SB PCI in down state again */ |
| 5130 | ai_pci_down(wlc_hw->sih); |
| 5131 | brcms_b_xtal(wlc_hw, OFF); |
| 5132 | return -ENOMEDIUM; |
| 5133 | } |
| 5134 | |
| 5135 | ai_pci_up(wlc_hw->sih); |
| 5136 | |
| 5137 | /* reset the d11 core */ |
| 5138 | brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); |
| 5139 | |
| 5140 | return 0; |
| 5141 | } |
| 5142 | |
| 5143 | static int brcms_b_up_finish(struct brcms_hardware *wlc_hw) |
| 5144 | { |
| 5145 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 5146 | |
| 5147 | wlc_hw->up = true; |
| 5148 | wlc_phy_hw_state_upd(wlc_hw->band->pi, true); |
| 5149 | |
| 5150 | /* FULLY enable dynamic power control and d11 core interrupt */ |
| 5151 | brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); |
| 5152 | brcms_intrson(wlc_hw->wlc->wl); |
| 5153 | return 0; |
| 5154 | } |
| 5155 | |
| 5156 | /* |
| 5157 | * Write WME tunable parameters for retransmit/max rate |
| 5158 | * from wlc struct to ucode |
| 5159 | */ |
| 5160 | static void brcms_c_wme_retries_write(struct brcms_c_info *wlc) |
| 5161 | { |
| 5162 | int ac; |
| 5163 | |
| 5164 | /* Need clock to do this */ |
| 5165 | if (!wlc->clk) |
| 5166 | return; |
| 5167 | |
| 5168 | for (ac = 0; ac < AC_COUNT; ac++) |
| 5169 | brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac), |
| 5170 | wlc->wme_retries[ac]); |
| 5171 | } |
| 5172 | |
| 5173 | /* make interface operational */ |
| 5174 | int brcms_c_up(struct brcms_c_info *wlc) |
| 5175 | { |
| 5176 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 5177 | |
| 5178 | /* HW is turned off so don't try to access it */ |
| 5179 | if (wlc->pub->hw_off || brcms_deviceremoved(wlc)) |
| 5180 | return -ENOMEDIUM; |
| 5181 | |
| 5182 | if (!wlc->pub->hw_up) { |
| 5183 | brcms_b_hw_up(wlc->hw); |
| 5184 | wlc->pub->hw_up = true; |
| 5185 | } |
| 5186 | |
| 5187 | if ((wlc->pub->boardflags & BFL_FEM) |
| 5188 | && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) { |
| 5189 | if (wlc->pub->boardrev >= 0x1250 |
| 5190 | && (wlc->pub->boardflags & BFL_FEM_BT)) |
| 5191 | brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL, |
| 5192 | MHF5_4313_GPIOCTRL, BRCM_BAND_ALL); |
| 5193 | else |
| 5194 | brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE, |
| 5195 | MHF4_EXTPA_ENABLE, BRCM_BAND_ALL); |
| 5196 | } |
| 5197 | |
| 5198 | /* |
| 5199 | * Need to read the hwradio status here to cover the case where the |
| 5200 | * system is loaded with the hw radio disabled. We do not want to bring |
| 5201 | * the driver up in this case. If radio is disabled, abort up, lower |
| 5202 | * power, start radio timer and return 0(for NDIS) don't call |
| 5203 | * radio_update to avoid looping brcms_c_up. |
| 5204 | * |
| 5205 | * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only |
| 5206 | */ |
| 5207 | if (!wlc->pub->radio_disabled) { |
| 5208 | int status = brcms_b_up_prep(wlc->hw); |
| 5209 | if (status == -ENOMEDIUM) { |
| 5210 | if (!mboolisset |
| 5211 | (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) { |
| 5212 | struct brcms_bss_cfg *bsscfg = wlc->bsscfg; |
| 5213 | mboolset(wlc->pub->radio_disabled, |
| 5214 | WL_RADIO_HW_DISABLE); |
| 5215 | |
| 5216 | if (bsscfg->enable && bsscfg->BSS) |
| 5217 | wiphy_err(wlc->wiphy, "wl%d: up" |
| 5218 | ": rfdisable -> " |
| 5219 | "bsscfg_disable()\n", |
| 5220 | wlc->pub->unit); |
| 5221 | } |
| 5222 | } |
| 5223 | } |
| 5224 | |
| 5225 | if (wlc->pub->radio_disabled) { |
| 5226 | brcms_c_radio_monitor_start(wlc); |
| 5227 | return 0; |
| 5228 | } |
| 5229 | |
| 5230 | /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */ |
| 5231 | wlc->clk = true; |
| 5232 | |
| 5233 | brcms_c_radio_monitor_stop(wlc); |
| 5234 | |
| 5235 | /* Set EDCF hostflags */ |
| 5236 | brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL); |
| 5237 | |
| 5238 | brcms_init(wlc->wl); |
| 5239 | wlc->pub->up = true; |
| 5240 | |
| 5241 | if (wlc->bandinit_pending) { |
| 5242 | brcms_c_suspend_mac_and_wait(wlc); |
| 5243 | brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec); |
| 5244 | wlc->bandinit_pending = false; |
| 5245 | brcms_c_enable_mac(wlc); |
| 5246 | } |
| 5247 | |
| 5248 | brcms_b_up_finish(wlc->hw); |
| 5249 | |
| 5250 | /* Program the TX wme params with the current settings */ |
| 5251 | brcms_c_wme_retries_write(wlc); |
| 5252 | |
| 5253 | /* start one second watchdog timer */ |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 5254 | brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5255 | wlc->WDarmed = true; |
| 5256 | |
| 5257 | /* ensure antenna config is up to date */ |
| 5258 | brcms_c_stf_phy_txant_upd(wlc); |
| 5259 | /* ensure LDPC config is in sync */ |
| 5260 | brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc); |
| 5261 | |
| 5262 | return 0; |
| 5263 | } |
| 5264 | |
| 5265 | static uint brcms_c_down_del_timer(struct brcms_c_info *wlc) |
| 5266 | { |
| 5267 | uint callbacks = 0; |
| 5268 | |
| 5269 | return callbacks; |
| 5270 | } |
| 5271 | |
| 5272 | static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw) |
| 5273 | { |
| 5274 | bool dev_gone; |
| 5275 | uint callbacks = 0; |
| 5276 | |
| 5277 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 5278 | |
| 5279 | if (!wlc_hw->up) |
| 5280 | return callbacks; |
| 5281 | |
| 5282 | dev_gone = brcms_deviceremoved(wlc_hw->wlc); |
| 5283 | |
| 5284 | /* disable interrupts */ |
| 5285 | if (dev_gone) |
| 5286 | wlc_hw->wlc->macintmask = 0; |
| 5287 | else { |
| 5288 | /* now disable interrupts */ |
| 5289 | brcms_intrsoff(wlc_hw->wlc->wl); |
| 5290 | |
| 5291 | /* ensure we're running on the pll clock again */ |
| 5292 | brcms_b_clkctl_clk(wlc_hw, CLK_FAST); |
| 5293 | } |
| 5294 | /* down phy at the last of this stage */ |
| 5295 | callbacks += wlc_phy_down(wlc_hw->band->pi); |
| 5296 | |
| 5297 | return callbacks; |
| 5298 | } |
| 5299 | |
| 5300 | static int brcms_b_down_finish(struct brcms_hardware *wlc_hw) |
| 5301 | { |
| 5302 | uint callbacks = 0; |
| 5303 | bool dev_gone; |
| 5304 | |
| 5305 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 5306 | |
| 5307 | if (!wlc_hw->up) |
| 5308 | return callbacks; |
| 5309 | |
| 5310 | wlc_hw->up = false; |
| 5311 | wlc_phy_hw_state_upd(wlc_hw->band->pi, false); |
| 5312 | |
| 5313 | dev_gone = brcms_deviceremoved(wlc_hw->wlc); |
| 5314 | |
| 5315 | if (dev_gone) { |
| 5316 | wlc_hw->sbclk = false; |
| 5317 | wlc_hw->clk = false; |
| 5318 | wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); |
| 5319 | |
| 5320 | /* reclaim any posted packets */ |
| 5321 | brcms_c_flushqueues(wlc_hw->wlc); |
| 5322 | } else { |
| 5323 | |
| 5324 | /* Reset and disable the core */ |
| 5325 | if (ai_iscoreup(wlc_hw->sih)) { |
| 5326 | if (R_REG(&wlc_hw->regs->maccontrol) & |
| 5327 | MCTL_EN_MAC) |
| 5328 | brcms_c_suspend_mac_and_wait(wlc_hw->wlc); |
| 5329 | callbacks += brcms_reset(wlc_hw->wlc->wl); |
| 5330 | brcms_c_coredisable(wlc_hw); |
| 5331 | } |
| 5332 | |
| 5333 | /* turn off primary xtal and pll */ |
| 5334 | if (!wlc_hw->noreset) { |
| 5335 | ai_pci_down(wlc_hw->sih); |
| 5336 | brcms_b_xtal(wlc_hw, OFF); |
| 5337 | } |
| 5338 | } |
| 5339 | |
| 5340 | return callbacks; |
| 5341 | } |
| 5342 | |
| 5343 | /* |
| 5344 | * Mark the interface nonoperational, stop the software mechanisms, |
| 5345 | * disable the hardware, free any transient buffer state. |
| 5346 | * Return a count of the number of driver callbacks still pending. |
| 5347 | */ |
| 5348 | uint brcms_c_down(struct brcms_c_info *wlc) |
| 5349 | { |
| 5350 | |
| 5351 | uint callbacks = 0; |
| 5352 | int i; |
| 5353 | bool dev_gone = false; |
| 5354 | struct brcms_txq_info *qi; |
| 5355 | |
| 5356 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 5357 | |
| 5358 | /* check if we are already in the going down path */ |
| 5359 | if (wlc->going_down) { |
| 5360 | wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return" |
| 5361 | "\n", wlc->pub->unit, __func__); |
| 5362 | return 0; |
| 5363 | } |
| 5364 | if (!wlc->pub->up) |
| 5365 | return callbacks; |
| 5366 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5367 | wlc->going_down = true; |
| 5368 | |
| 5369 | callbacks += brcms_b_bmac_down_prep(wlc->hw); |
| 5370 | |
| 5371 | dev_gone = brcms_deviceremoved(wlc); |
| 5372 | |
| 5373 | /* Call any registered down handlers */ |
| 5374 | for (i = 0; i < BRCMS_MAXMODULES; i++) { |
| 5375 | if (wlc->modulecb[i].down_fn) |
| 5376 | callbacks += |
| 5377 | wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl); |
| 5378 | } |
| 5379 | |
| 5380 | /* cancel the watchdog timer */ |
| 5381 | if (wlc->WDarmed) { |
Roland Vossen | be69c4e | 2011-10-12 20:51:11 +0200 | [diff] [blame] | 5382 | if (!brcms_del_timer(wlc->wdtimer)) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5383 | callbacks++; |
| 5384 | wlc->WDarmed = false; |
| 5385 | } |
| 5386 | /* cancel all other timers */ |
| 5387 | callbacks += brcms_c_down_del_timer(wlc); |
| 5388 | |
| 5389 | wlc->pub->up = false; |
| 5390 | |
| 5391 | wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL); |
| 5392 | |
| 5393 | /* clear txq flow control */ |
| 5394 | brcms_c_txflowcontrol_reset(wlc); |
| 5395 | |
| 5396 | /* flush tx queues */ |
| 5397 | for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) |
| 5398 | brcmu_pktq_flush(&qi->q, true, NULL, NULL); |
| 5399 | |
| 5400 | callbacks += brcms_b_down_finish(wlc->hw); |
| 5401 | |
| 5402 | /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */ |
| 5403 | wlc->clk = false; |
| 5404 | |
| 5405 | wlc->going_down = false; |
| 5406 | return callbacks; |
| 5407 | } |
| 5408 | |
| 5409 | /* Set the current gmode configuration */ |
| 5410 | int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) |
| 5411 | { |
| 5412 | int ret = 0; |
| 5413 | uint i; |
| 5414 | struct brcms_c_rateset rs; |
| 5415 | /* Default to 54g Auto */ |
| 5416 | /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ |
| 5417 | s8 shortslot = BRCMS_SHORTSLOT_AUTO; |
| 5418 | bool shortslot_restrict = false; /* Restrict association to stations |
| 5419 | * that support shortslot |
| 5420 | */ |
| 5421 | bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ |
| 5422 | /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ |
| 5423 | int preamble = BRCMS_PLCP_LONG; |
| 5424 | bool preamble_restrict = false; /* Restrict association to stations |
| 5425 | * that support short preambles |
| 5426 | */ |
| 5427 | struct brcms_band *band; |
| 5428 | |
| 5429 | /* if N-support is enabled, allow Gmode set as long as requested |
| 5430 | * Gmode is not GMODE_LEGACY_B |
| 5431 | */ |
| 5432 | if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B) |
| 5433 | return -ENOTSUPP; |
| 5434 | |
| 5435 | /* verify that we are dealing with 2G band and grab the band pointer */ |
| 5436 | if (wlc->band->bandtype == BRCM_BAND_2G) |
| 5437 | band = wlc->band; |
| 5438 | else if ((wlc->pub->_nbands > 1) && |
| 5439 | (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G)) |
| 5440 | band = wlc->bandstate[OTHERBANDUNIT(wlc)]; |
| 5441 | else |
| 5442 | return -EINVAL; |
| 5443 | |
| 5444 | /* Legacy or bust when no OFDM is supported by regulatory */ |
| 5445 | if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) & |
| 5446 | BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B)) |
| 5447 | return -EINVAL; |
| 5448 | |
| 5449 | /* update configuration value */ |
| 5450 | if (config == true) |
| 5451 | brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode); |
| 5452 | |
| 5453 | /* Clear rateset override */ |
| 5454 | memset(&rs, 0, sizeof(struct brcms_c_rateset)); |
| 5455 | |
| 5456 | switch (gmode) { |
| 5457 | case GMODE_LEGACY_B: |
| 5458 | shortslot = BRCMS_SHORTSLOT_OFF; |
| 5459 | brcms_c_rateset_copy(&gphy_legacy_rates, &rs); |
| 5460 | |
| 5461 | break; |
| 5462 | |
| 5463 | case GMODE_LRS: |
| 5464 | break; |
| 5465 | |
| 5466 | case GMODE_AUTO: |
| 5467 | /* Accept defaults */ |
| 5468 | break; |
| 5469 | |
| 5470 | case GMODE_ONLY: |
| 5471 | ofdm_basic = true; |
| 5472 | preamble = BRCMS_PLCP_SHORT; |
| 5473 | preamble_restrict = true; |
| 5474 | break; |
| 5475 | |
| 5476 | case GMODE_PERFORMANCE: |
| 5477 | shortslot = BRCMS_SHORTSLOT_ON; |
| 5478 | shortslot_restrict = true; |
| 5479 | ofdm_basic = true; |
| 5480 | preamble = BRCMS_PLCP_SHORT; |
| 5481 | preamble_restrict = true; |
| 5482 | break; |
| 5483 | |
| 5484 | default: |
| 5485 | /* Error */ |
| 5486 | wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n", |
| 5487 | wlc->pub->unit, __func__, gmode); |
| 5488 | return -ENOTSUPP; |
| 5489 | } |
| 5490 | |
| 5491 | band->gmode = gmode; |
| 5492 | |
| 5493 | wlc->shortslot_override = shortslot; |
| 5494 | |
| 5495 | /* Use the default 11g rateset */ |
| 5496 | if (!rs.count) |
| 5497 | brcms_c_rateset_copy(&cck_ofdm_rates, &rs); |
| 5498 | |
| 5499 | if (ofdm_basic) { |
| 5500 | for (i = 0; i < rs.count; i++) { |
| 5501 | if (rs.rates[i] == BRCM_RATE_6M |
| 5502 | || rs.rates[i] == BRCM_RATE_12M |
| 5503 | || rs.rates[i] == BRCM_RATE_24M) |
| 5504 | rs.rates[i] |= BRCMS_RATE_FLAG; |
| 5505 | } |
| 5506 | } |
| 5507 | |
| 5508 | /* Set default bss rateset */ |
| 5509 | wlc->default_bss->rateset.count = rs.count; |
| 5510 | memcpy(wlc->default_bss->rateset.rates, rs.rates, |
| 5511 | sizeof(wlc->default_bss->rateset.rates)); |
| 5512 | |
| 5513 | return ret; |
| 5514 | } |
| 5515 | |
| 5516 | int brcms_c_set_nmode(struct brcms_c_info *wlc) |
| 5517 | { |
| 5518 | uint i; |
| 5519 | s32 nmode = AUTO; |
| 5520 | |
| 5521 | if (wlc->stf->txstreams == WL_11N_3x3) |
| 5522 | nmode = WL_11N_3x3; |
| 5523 | else |
| 5524 | nmode = WL_11N_2x2; |
| 5525 | |
| 5526 | /* force GMODE_AUTO if NMODE is ON */ |
| 5527 | brcms_c_set_gmode(wlc, GMODE_AUTO, true); |
| 5528 | if (nmode == WL_11N_3x3) |
| 5529 | wlc->pub->_n_enab = SUPPORT_HT; |
| 5530 | else |
| 5531 | wlc->pub->_n_enab = SUPPORT_11N; |
| 5532 | wlc->default_bss->flags |= BRCMS_BSS_HT; |
| 5533 | /* add the mcs rates to the default and hw ratesets */ |
| 5534 | brcms_c_rateset_mcs_build(&wlc->default_bss->rateset, |
| 5535 | wlc->stf->txstreams); |
| 5536 | for (i = 0; i < wlc->pub->_nbands; i++) |
| 5537 | memcpy(wlc->bandstate[i]->hw_rateset.mcs, |
| 5538 | wlc->default_bss->rateset.mcs, MCSSET_LEN); |
| 5539 | |
| 5540 | return 0; |
| 5541 | } |
| 5542 | |
| 5543 | static int |
| 5544 | brcms_c_set_internal_rateset(struct brcms_c_info *wlc, |
| 5545 | struct brcms_c_rateset *rs_arg) |
| 5546 | { |
| 5547 | struct brcms_c_rateset rs, new; |
| 5548 | uint bandunit; |
| 5549 | |
| 5550 | memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset)); |
| 5551 | |
| 5552 | /* check for bad count value */ |
| 5553 | if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES)) |
| 5554 | return -EINVAL; |
| 5555 | |
| 5556 | /* try the current band */ |
| 5557 | bandunit = wlc->band->bandunit; |
| 5558 | memcpy(&new, &rs, sizeof(struct brcms_c_rateset)); |
| 5559 | if (brcms_c_rate_hwrs_filter_sort_validate |
| 5560 | (&new, &wlc->bandstate[bandunit]->hw_rateset, true, |
| 5561 | wlc->stf->txstreams)) |
| 5562 | goto good; |
| 5563 | |
| 5564 | /* try the other band */ |
| 5565 | if (brcms_is_mband_unlocked(wlc)) { |
| 5566 | bandunit = OTHERBANDUNIT(wlc); |
| 5567 | memcpy(&new, &rs, sizeof(struct brcms_c_rateset)); |
| 5568 | if (brcms_c_rate_hwrs_filter_sort_validate(&new, |
| 5569 | &wlc-> |
| 5570 | bandstate[bandunit]-> |
| 5571 | hw_rateset, true, |
| 5572 | wlc->stf->txstreams)) |
| 5573 | goto good; |
| 5574 | } |
| 5575 | |
| 5576 | return -EBADE; |
| 5577 | |
| 5578 | good: |
| 5579 | /* apply new rateset */ |
| 5580 | memcpy(&wlc->default_bss->rateset, &new, |
| 5581 | sizeof(struct brcms_c_rateset)); |
| 5582 | memcpy(&wlc->bandstate[bandunit]->defrateset, &new, |
| 5583 | sizeof(struct brcms_c_rateset)); |
| 5584 | return 0; |
| 5585 | } |
| 5586 | |
| 5587 | static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc) |
| 5588 | { |
| 5589 | u8 r; |
| 5590 | bool war = false; |
| 5591 | |
| 5592 | if (wlc->bsscfg->associated) |
| 5593 | r = wlc->bsscfg->current_bss->rateset.rates[0]; |
| 5594 | else |
| 5595 | r = wlc->default_bss->rateset.rates[0]; |
| 5596 | |
| 5597 | wlc_phy_ofdm_rateset_war(wlc->band->pi, war); |
| 5598 | } |
| 5599 | |
| 5600 | int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel) |
| 5601 | { |
| 5602 | u16 chspec = ch20mhz_chspec(channel); |
| 5603 | |
| 5604 | if (channel < 0 || channel > MAXCHANNEL) |
| 5605 | return -EINVAL; |
| 5606 | |
| 5607 | if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec)) |
| 5608 | return -EINVAL; |
| 5609 | |
| 5610 | |
| 5611 | if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) { |
| 5612 | if (wlc->band->bandunit != chspec_bandunit(chspec)) |
| 5613 | wlc->bandinit_pending = true; |
| 5614 | else |
| 5615 | wlc->bandinit_pending = false; |
| 5616 | } |
| 5617 | |
| 5618 | wlc->default_bss->chanspec = chspec; |
| 5619 | /* brcms_c_BSSinit() will sanitize the rateset before |
| 5620 | * using it.. */ |
| 5621 | if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) { |
| 5622 | brcms_c_set_home_chanspec(wlc, chspec); |
| 5623 | brcms_c_suspend_mac_and_wait(wlc); |
| 5624 | brcms_c_set_chanspec(wlc, chspec); |
| 5625 | brcms_c_enable_mac(wlc); |
| 5626 | } |
| 5627 | return 0; |
| 5628 | } |
| 5629 | |
| 5630 | int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl) |
| 5631 | { |
| 5632 | int ac; |
| 5633 | |
| 5634 | if (srl < 1 || srl > RETRY_SHORT_MAX || |
| 5635 | lrl < 1 || lrl > RETRY_SHORT_MAX) |
| 5636 | return -EINVAL; |
| 5637 | |
| 5638 | wlc->SRL = srl; |
| 5639 | wlc->LRL = lrl; |
| 5640 | |
| 5641 | brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); |
| 5642 | |
| 5643 | for (ac = 0; ac < AC_COUNT; ac++) { |
| 5644 | wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], |
| 5645 | EDCF_SHORT, wlc->SRL); |
| 5646 | wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], |
| 5647 | EDCF_LONG, wlc->LRL); |
| 5648 | } |
| 5649 | brcms_c_wme_retries_write(wlc); |
| 5650 | |
| 5651 | return 0; |
| 5652 | } |
| 5653 | |
| 5654 | void brcms_c_get_current_rateset(struct brcms_c_info *wlc, |
| 5655 | struct brcm_rateset *currs) |
| 5656 | { |
| 5657 | struct brcms_c_rateset *rs; |
| 5658 | |
| 5659 | if (wlc->pub->associated) |
| 5660 | rs = &wlc->bsscfg->current_bss->rateset; |
| 5661 | else |
| 5662 | rs = &wlc->default_bss->rateset; |
| 5663 | |
| 5664 | /* Copy only legacy rateset section */ |
| 5665 | currs->count = rs->count; |
| 5666 | memcpy(&currs->rates, &rs->rates, rs->count); |
| 5667 | } |
| 5668 | |
| 5669 | int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs) |
| 5670 | { |
| 5671 | struct brcms_c_rateset internal_rs; |
| 5672 | int bcmerror; |
| 5673 | |
| 5674 | if (rs->count > BRCMS_NUMRATES) |
| 5675 | return -ENOBUFS; |
| 5676 | |
| 5677 | memset(&internal_rs, 0, sizeof(struct brcms_c_rateset)); |
| 5678 | |
| 5679 | /* Copy only legacy rateset section */ |
| 5680 | internal_rs.count = rs->count; |
| 5681 | memcpy(&internal_rs.rates, &rs->rates, internal_rs.count); |
| 5682 | |
| 5683 | /* merge rateset coming in with the current mcsset */ |
| 5684 | if (wlc->pub->_n_enab & SUPPORT_11N) { |
| 5685 | struct brcms_bss_info *mcsset_bss; |
| 5686 | if (wlc->bsscfg->associated) |
| 5687 | mcsset_bss = wlc->bsscfg->current_bss; |
| 5688 | else |
| 5689 | mcsset_bss = wlc->default_bss; |
| 5690 | memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0], |
| 5691 | MCSSET_LEN); |
| 5692 | } |
| 5693 | |
| 5694 | bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs); |
| 5695 | if (!bcmerror) |
| 5696 | brcms_c_ofdm_rateset_war(wlc); |
| 5697 | |
| 5698 | return bcmerror; |
| 5699 | } |
| 5700 | |
| 5701 | int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period) |
| 5702 | { |
| 5703 | if (period < DOT11_MIN_BEACON_PERIOD || |
| 5704 | period > DOT11_MAX_BEACON_PERIOD) |
| 5705 | return -EINVAL; |
| 5706 | |
| 5707 | wlc->default_bss->beacon_period = period; |
| 5708 | return 0; |
| 5709 | } |
| 5710 | |
| 5711 | u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx) |
| 5712 | { |
| 5713 | return wlc->band->phytype; |
| 5714 | } |
| 5715 | |
| 5716 | void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override) |
| 5717 | { |
| 5718 | wlc->shortslot_override = sslot_override; |
| 5719 | |
| 5720 | /* |
| 5721 | * shortslot is an 11g feature, so no more work if we are |
| 5722 | * currently on the 5G band |
| 5723 | */ |
| 5724 | if (wlc->band->bandtype == BRCM_BAND_5G) |
| 5725 | return; |
| 5726 | |
| 5727 | if (wlc->pub->up && wlc->pub->associated) { |
| 5728 | /* let watchdog or beacon processing update shortslot */ |
| 5729 | } else if (wlc->pub->up) { |
| 5730 | /* unassociated shortslot is off */ |
| 5731 | brcms_c_switch_shortslot(wlc, false); |
| 5732 | } else { |
| 5733 | /* driver is down, so just update the brcms_c_info |
| 5734 | * value */ |
| 5735 | if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO) |
| 5736 | wlc->shortslot = false; |
| 5737 | else |
| 5738 | wlc->shortslot = |
| 5739 | (wlc->shortslot_override == |
| 5740 | BRCMS_SHORTSLOT_ON); |
| 5741 | } |
| 5742 | } |
| 5743 | |
| 5744 | /* |
| 5745 | * register watchdog and down handlers. |
| 5746 | */ |
| 5747 | int brcms_c_module_register(struct brcms_pub *pub, |
| 5748 | const char *name, struct brcms_info *hdl, |
| 5749 | int (*d_fn)(void *handle)) |
| 5750 | { |
| 5751 | struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; |
| 5752 | int i; |
| 5753 | |
| 5754 | /* find an empty entry and just add, no duplication check! */ |
| 5755 | for (i = 0; i < BRCMS_MAXMODULES; i++) { |
| 5756 | if (wlc->modulecb[i].name[0] == '\0') { |
| 5757 | strncpy(wlc->modulecb[i].name, name, |
| 5758 | sizeof(wlc->modulecb[i].name) - 1); |
| 5759 | wlc->modulecb[i].hdl = hdl; |
| 5760 | wlc->modulecb[i].down_fn = d_fn; |
| 5761 | return 0; |
| 5762 | } |
| 5763 | } |
| 5764 | |
| 5765 | return -ENOSR; |
| 5766 | } |
| 5767 | |
| 5768 | /* unregister module callbacks */ |
| 5769 | int brcms_c_module_unregister(struct brcms_pub *pub, const char *name, |
| 5770 | struct brcms_info *hdl) |
| 5771 | { |
| 5772 | struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; |
| 5773 | int i; |
| 5774 | |
| 5775 | if (wlc == NULL) |
| 5776 | return -ENODATA; |
| 5777 | |
| 5778 | for (i = 0; i < BRCMS_MAXMODULES; i++) { |
| 5779 | if (!strcmp(wlc->modulecb[i].name, name) && |
| 5780 | (wlc->modulecb[i].hdl == hdl)) { |
| 5781 | memset(&wlc->modulecb[i], 0, sizeof(struct modulecb)); |
| 5782 | return 0; |
| 5783 | } |
| 5784 | } |
| 5785 | |
| 5786 | /* table not found! */ |
| 5787 | return -ENODATA; |
| 5788 | } |
| 5789 | |
| 5790 | #ifdef BCMDBG |
| 5791 | static const char * const supr_reason[] = { |
| 5792 | "None", "PMQ Entry", "Flush request", |
| 5793 | "Previous frag failure", "Channel mismatch", |
| 5794 | "Lifetime Expiry", "Underflow" |
| 5795 | }; |
| 5796 | |
| 5797 | static void brcms_c_print_txs_status(u16 s) |
| 5798 | { |
| 5799 | printk(KERN_DEBUG "[15:12] %d frame attempts\n", |
| 5800 | (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT); |
| 5801 | printk(KERN_DEBUG " [11:8] %d rts attempts\n", |
| 5802 | (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT); |
| 5803 | printk(KERN_DEBUG " [7] %d PM mode indicated\n", |
| 5804 | ((s & TX_STATUS_PMINDCTD) ? 1 : 0)); |
| 5805 | printk(KERN_DEBUG " [6] %d intermediate status\n", |
| 5806 | ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0)); |
| 5807 | printk(KERN_DEBUG " [5] %d AMPDU\n", |
| 5808 | (s & TX_STATUS_AMPDU) ? 1 : 0); |
| 5809 | printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n", |
| 5810 | ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT), |
| 5811 | supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]); |
| 5812 | printk(KERN_DEBUG " [1] %d acked\n", |
| 5813 | ((s & TX_STATUS_ACK_RCV) ? 1 : 0)); |
| 5814 | } |
| 5815 | #endif /* BCMDBG */ |
| 5816 | |
| 5817 | void brcms_c_print_txstatus(struct tx_status *txs) |
| 5818 | { |
| 5819 | #if defined(BCMDBG) |
| 5820 | u16 s = txs->status; |
| 5821 | u16 ackphyrxsh = txs->ackphyrxsh; |
| 5822 | |
| 5823 | printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n"); |
| 5824 | |
| 5825 | printk(KERN_DEBUG "FrameID: %04x ", txs->frameid); |
| 5826 | printk(KERN_DEBUG "TxStatus: %04x", s); |
| 5827 | printk(KERN_DEBUG "\n"); |
| 5828 | |
| 5829 | brcms_c_print_txs_status(s); |
| 5830 | |
| 5831 | printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime); |
| 5832 | printk(KERN_DEBUG "Seq: %04x ", txs->sequence); |
| 5833 | printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr); |
| 5834 | printk(KERN_DEBUG "RxAckRSSI: %04x ", |
| 5835 | (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT); |
| 5836 | printk(KERN_DEBUG "RxAckSQ: %04x", |
| 5837 | (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT); |
| 5838 | printk(KERN_DEBUG "\n"); |
| 5839 | #endif /* defined(BCMDBG) */ |
| 5840 | } |
| 5841 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5842 | bool brcms_c_chipmatch(u16 vendor, u16 device) |
| 5843 | { |
| 5844 | if (vendor != PCI_VENDOR_ID_BROADCOM) { |
| 5845 | pr_err("chipmatch: unknown vendor id %04x\n", vendor); |
| 5846 | return false; |
| 5847 | } |
| 5848 | |
| 5849 | if (device == BCM43224_D11N_ID_VEN1) |
| 5850 | return true; |
| 5851 | if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID)) |
| 5852 | return true; |
| 5853 | if (device == BCM4313_D11N2G_ID) |
| 5854 | return true; |
| 5855 | if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID)) |
| 5856 | return true; |
| 5857 | |
| 5858 | pr_err("chipmatch: unknown device id %04x\n", device); |
| 5859 | return false; |
| 5860 | } |
| 5861 | |
| 5862 | #if defined(BCMDBG) |
| 5863 | void brcms_c_print_txdesc(struct d11txh *txh) |
| 5864 | { |
| 5865 | u16 mtcl = le16_to_cpu(txh->MacTxControlLow); |
| 5866 | u16 mtch = le16_to_cpu(txh->MacTxControlHigh); |
| 5867 | u16 mfc = le16_to_cpu(txh->MacFrameControl); |
| 5868 | u16 tfest = le16_to_cpu(txh->TxFesTimeNormal); |
| 5869 | u16 ptcw = le16_to_cpu(txh->PhyTxControlWord); |
| 5870 | u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1); |
| 5871 | u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr); |
| 5872 | u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts); |
| 5873 | u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts); |
| 5874 | u16 mainrates = le16_to_cpu(txh->MainRates); |
| 5875 | u16 xtraft = le16_to_cpu(txh->XtraFrameTypes); |
| 5876 | u8 *iv = txh->IV; |
| 5877 | u8 *ra = txh->TxFrameRA; |
| 5878 | u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback); |
| 5879 | u8 *rtspfb = txh->RTSPLCPFallback; |
| 5880 | u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback); |
| 5881 | u8 *fragpfb = txh->FragPLCPFallback; |
| 5882 | u16 fragdfb = le16_to_cpu(txh->FragDurFallback); |
| 5883 | u16 mmodelen = le16_to_cpu(txh->MModeLen); |
| 5884 | u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen); |
| 5885 | u16 tfid = le16_to_cpu(txh->TxFrameID); |
| 5886 | u16 txs = le16_to_cpu(txh->TxStatus); |
| 5887 | u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus); |
| 5888 | u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT); |
| 5889 | u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR); |
| 5890 | u16 mmbyte = le16_to_cpu(txh->MinMBytes); |
| 5891 | |
| 5892 | u8 *rtsph = txh->RTSPhyHeader; |
| 5893 | struct ieee80211_rts rts = txh->rts_frame; |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5894 | |
| 5895 | /* add plcp header along with txh descriptor */ |
| 5896 | printk(KERN_DEBUG "Raw TxDesc + plcp header:\n"); |
| 5897 | print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, |
| 5898 | txh, sizeof(struct d11txh) + 48); |
| 5899 | |
| 5900 | printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl); |
| 5901 | printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch); |
| 5902 | printk(KERN_DEBUG "FC: %04x ", mfc); |
| 5903 | printk(KERN_DEBUG "FES Time: %04x\n", tfest); |
| 5904 | printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw, |
| 5905 | (ptcw & PHY_TXC_SHORT_HDR) ? " short" : ""); |
| 5906 | printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1); |
| 5907 | printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr); |
| 5908 | printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts); |
| 5909 | printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts); |
| 5910 | printk(KERN_DEBUG "MainRates: %04x ", mainrates); |
| 5911 | printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft); |
| 5912 | printk(KERN_DEBUG "\n"); |
| 5913 | |
Arend van Spriel | 09c7dfa | 2011-10-18 14:03:10 +0200 | [diff] [blame] | 5914 | print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV)); |
| 5915 | print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET, |
| 5916 | ra, sizeof(txh->TxFrameRA)); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5917 | |
| 5918 | printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb); |
Arend van Spriel | 09c7dfa | 2011-10-18 14:03:10 +0200 | [diff] [blame] | 5919 | print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET, |
| 5920 | rtspfb, sizeof(txh->RTSPLCPFallback)); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5921 | printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb); |
Arend van Spriel | 09c7dfa | 2011-10-18 14:03:10 +0200 | [diff] [blame] | 5922 | print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET, |
| 5923 | fragpfb, sizeof(txh->FragPLCPFallback)); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5924 | printk(KERN_DEBUG "DUR: %04x", fragdfb); |
| 5925 | printk(KERN_DEBUG "\n"); |
| 5926 | |
| 5927 | printk(KERN_DEBUG "MModeLen: %04x ", mmodelen); |
| 5928 | printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen); |
| 5929 | |
| 5930 | printk(KERN_DEBUG "FrameID: %04x\n", tfid); |
| 5931 | printk(KERN_DEBUG "TxStatus: %04x\n", txs); |
| 5932 | |
| 5933 | printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu); |
| 5934 | printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte); |
| 5935 | printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f); |
| 5936 | printk(KERN_DEBUG "MinByte: %04x\n", mmbyte); |
| 5937 | |
Arend van Spriel | 09c7dfa | 2011-10-18 14:03:10 +0200 | [diff] [blame] | 5938 | print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET, |
| 5939 | rtsph, sizeof(txh->RTSPhyHeader)); |
| 5940 | print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET, |
| 5941 | (u8 *)&rts, sizeof(txh->rts_frame)); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 5942 | printk(KERN_DEBUG "\n"); |
| 5943 | } |
| 5944 | #endif /* defined(BCMDBG) */ |
| 5945 | |
| 5946 | #if defined(BCMDBG) |
Arend van Spriel | 094b199 | 2011-10-18 14:03:07 +0200 | [diff] [blame] | 5947 | static int |
Alwin Beukers | 4476065 | 2011-10-12 20:51:31 +0200 | [diff] [blame] | 5948 | brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf, |
Arend van Spriel | 094b199 | 2011-10-18 14:03:07 +0200 | [diff] [blame] | 5949 | int len) |
Alwin Beukers | 4476065 | 2011-10-12 20:51:31 +0200 | [diff] [blame] | 5950 | { |
| 5951 | int i; |
| 5952 | char *p = buf; |
| 5953 | char hexstr[16]; |
| 5954 | int slen = 0, nlen = 0; |
| 5955 | u32 bit; |
| 5956 | const char *name; |
| 5957 | |
| 5958 | if (len < 2 || !buf) |
| 5959 | return 0; |
| 5960 | |
| 5961 | buf[0] = '\0'; |
| 5962 | |
| 5963 | for (i = 0; flags != 0; i++) { |
| 5964 | bit = bd[i].bit; |
| 5965 | name = bd[i].name; |
| 5966 | if (bit == 0 && flags != 0) { |
| 5967 | /* print any unnamed bits */ |
| 5968 | snprintf(hexstr, 16, "0x%X", flags); |
| 5969 | name = hexstr; |
| 5970 | flags = 0; /* exit loop */ |
| 5971 | } else if ((flags & bit) == 0) |
| 5972 | continue; |
| 5973 | flags &= ~bit; |
| 5974 | nlen = strlen(name); |
| 5975 | slen += nlen; |
| 5976 | /* count btwn flag space */ |
| 5977 | if (flags != 0) |
| 5978 | slen += 1; |
| 5979 | /* need NULL char as well */ |
| 5980 | if (len <= slen) |
| 5981 | break; |
| 5982 | /* copy NULL char but don't count it */ |
| 5983 | strncpy(p, name, nlen + 1); |
| 5984 | p += nlen; |
| 5985 | /* copy btwn flag space and NULL char */ |
| 5986 | if (flags != 0) |
| 5987 | p += snprintf(p, 2, " "); |
| 5988 | len -= slen; |
| 5989 | } |
| 5990 | |
| 5991 | /* indicate the str was too short */ |
| 5992 | if (flags != 0) { |
| 5993 | if (len < 2) |
| 5994 | p -= 2 - len; /* overwrite last char */ |
| 5995 | p += snprintf(p, 2, ">"); |
| 5996 | } |
| 5997 | |
| 5998 | return (int)(p - buf); |
| 5999 | } |
| 6000 | #endif /* defined(BCMDBG) */ |
| 6001 | |
| 6002 | #if defined(BCMDBG) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6003 | void brcms_c_print_rxh(struct d11rxhdr *rxh) |
| 6004 | { |
| 6005 | u16 len = rxh->RxFrameSize; |
| 6006 | u16 phystatus_0 = rxh->PhyRxStatus_0; |
| 6007 | u16 phystatus_1 = rxh->PhyRxStatus_1; |
| 6008 | u16 phystatus_2 = rxh->PhyRxStatus_2; |
| 6009 | u16 phystatus_3 = rxh->PhyRxStatus_3; |
| 6010 | u16 macstatus1 = rxh->RxStatus1; |
| 6011 | u16 macstatus2 = rxh->RxStatus2; |
| 6012 | char flagstr[64]; |
| 6013 | char lenbuf[20]; |
Alwin Beukers | 4476065 | 2011-10-12 20:51:31 +0200 | [diff] [blame] | 6014 | static const struct brcms_c_bit_desc macstat_flags[] = { |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6015 | {RXS_FCSERR, "FCSErr"}, |
| 6016 | {RXS_RESPFRAMETX, "Reply"}, |
| 6017 | {RXS_PBPRES, "PADDING"}, |
| 6018 | {RXS_DECATMPT, "DeCr"}, |
| 6019 | {RXS_DECERR, "DeCrErr"}, |
| 6020 | {RXS_BCNSENT, "Bcn"}, |
| 6021 | {0, NULL} |
| 6022 | }; |
| 6023 | |
| 6024 | printk(KERN_DEBUG "Raw RxDesc:\n"); |
| 6025 | print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, |
| 6026 | sizeof(struct d11rxhdr)); |
| 6027 | |
Alwin Beukers | 4476065 | 2011-10-12 20:51:31 +0200 | [diff] [blame] | 6028 | brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64); |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6029 | |
| 6030 | snprintf(lenbuf, sizeof(lenbuf), "0x%x", len); |
| 6031 | |
| 6032 | printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len, |
| 6033 | (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : ""); |
| 6034 | printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n", |
| 6035 | phystatus_0, phystatus_1, phystatus_2, phystatus_3); |
| 6036 | printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr); |
| 6037 | printk(KERN_DEBUG "RXMACaggtype: %x\n", |
| 6038 | (macstatus2 & RXS_AGGTYPE_MASK)); |
| 6039 | printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime); |
| 6040 | } |
| 6041 | #endif /* defined(BCMDBG) */ |
| 6042 | |
| 6043 | u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate) |
| 6044 | { |
| 6045 | u16 table_ptr; |
| 6046 | u8 phy_rate, index; |
| 6047 | |
| 6048 | /* get the phy specific rate encoding for the PLCP SIGNAL field */ |
| 6049 | if (is_ofdm_rate(rate)) |
| 6050 | table_ptr = M_RT_DIRMAP_A; |
| 6051 | else |
| 6052 | table_ptr = M_RT_DIRMAP_B; |
| 6053 | |
| 6054 | /* for a given rate, the LS-nibble of the PLCP SIGNAL field is |
| 6055 | * the index into the rate table. |
| 6056 | */ |
| 6057 | phy_rate = rate_info[rate] & BRCMS_RATE_MASK; |
| 6058 | index = phy_rate & 0xf; |
| 6059 | |
| 6060 | /* Find the SHM pointer to the rate table entry by looking in the |
| 6061 | * Direct-map Table |
| 6062 | */ |
| 6063 | return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2)); |
| 6064 | } |
| 6065 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 6066 | static bool |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6067 | brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q, |
| 6068 | struct sk_buff *pkt, int prec, bool head) |
| 6069 | { |
| 6070 | struct sk_buff *p; |
| 6071 | int eprec = -1; /* precedence to evict from */ |
| 6072 | |
| 6073 | /* Determine precedence from which to evict packet, if any */ |
| 6074 | if (pktq_pfull(q, prec)) |
| 6075 | eprec = prec; |
| 6076 | else if (pktq_full(q)) { |
| 6077 | p = brcmu_pktq_peek_tail(q, &eprec); |
| 6078 | if (eprec > prec) { |
| 6079 | wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d" |
| 6080 | "\n", __func__, eprec, prec); |
| 6081 | return false; |
| 6082 | } |
| 6083 | } |
| 6084 | |
| 6085 | /* Evict if needed */ |
| 6086 | if (eprec >= 0) { |
| 6087 | bool discard_oldest; |
| 6088 | |
| 6089 | discard_oldest = ac_bitmap_tst(0, eprec); |
| 6090 | |
| 6091 | /* Refuse newer packet unless configured to discard oldest */ |
| 6092 | if (eprec == prec && !discard_oldest) { |
| 6093 | wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d" |
| 6094 | "\n", __func__, prec); |
| 6095 | return false; |
| 6096 | } |
| 6097 | |
| 6098 | /* Evict packet according to discard policy */ |
| 6099 | p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : |
| 6100 | brcmu_pktq_pdeq_tail(q, eprec); |
| 6101 | brcmu_pkt_buf_free_skb(p); |
| 6102 | } |
| 6103 | |
| 6104 | /* Enqueue */ |
| 6105 | if (head) |
| 6106 | p = brcmu_pktq_penq_head(q, prec, pkt); |
| 6107 | else |
| 6108 | p = brcmu_pktq_penq(q, prec, pkt); |
| 6109 | |
| 6110 | return true; |
| 6111 | } |
| 6112 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 6113 | /* |
| 6114 | * Attempts to queue a packet onto a multiple-precedence queue, |
| 6115 | * if necessary evicting a lower precedence packet from the queue. |
| 6116 | * |
| 6117 | * 'prec' is the precedence number that has already been mapped |
| 6118 | * from the packet priority. |
| 6119 | * |
| 6120 | * Returns true if packet consumed (queued), false if not. |
| 6121 | */ |
| 6122 | static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q, |
| 6123 | struct sk_buff *pkt, int prec) |
| 6124 | { |
| 6125 | return brcms_c_prec_enq_head(wlc, q, pkt, prec, false); |
| 6126 | } |
| 6127 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6128 | void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb, |
| 6129 | struct sk_buff *sdu, uint prec) |
| 6130 | { |
| 6131 | struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */ |
| 6132 | struct pktq *q = &qi->q; |
| 6133 | int prio; |
| 6134 | |
| 6135 | prio = sdu->priority; |
| 6136 | |
| 6137 | if (!brcms_c_prec_enq(wlc, q, sdu, prec)) { |
| 6138 | /* |
| 6139 | * we might hit this condtion in case |
| 6140 | * packet flooding from mac80211 stack |
| 6141 | */ |
| 6142 | brcmu_pkt_buf_free_skb(sdu); |
| 6143 | } |
| 6144 | } |
| 6145 | |
| 6146 | /* |
| 6147 | * bcmc_fid_generate: |
| 6148 | * Generate frame ID for a BCMC packet. The frag field is not used |
| 6149 | * for MC frames so is used as part of the sequence number. |
| 6150 | */ |
| 6151 | static inline u16 |
| 6152 | bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg, |
| 6153 | struct d11txh *txh) |
| 6154 | { |
| 6155 | u16 frameid; |
| 6156 | |
| 6157 | frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK | |
| 6158 | TXFID_QUEUE_MASK); |
| 6159 | frameid |= |
| 6160 | (((wlc-> |
| 6161 | mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | |
| 6162 | TX_BCMC_FIFO; |
| 6163 | |
| 6164 | return frameid; |
| 6165 | } |
| 6166 | |
| 6167 | static uint |
| 6168 | brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec, |
| 6169 | u8 preamble_type) |
| 6170 | { |
| 6171 | uint dur = 0; |
| 6172 | |
| 6173 | BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n", |
| 6174 | wlc->pub->unit, rspec, preamble_type); |
| 6175 | /* |
| 6176 | * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that |
| 6177 | * is less than or equal to the rate of the immediately previous |
| 6178 | * frame in the FES |
| 6179 | */ |
| 6180 | rspec = brcms_basic_rate(wlc, rspec); |
| 6181 | /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */ |
| 6182 | dur = |
| 6183 | brcms_c_calc_frame_time(wlc, rspec, preamble_type, |
| 6184 | (DOT11_ACK_LEN + FCS_LEN)); |
| 6185 | return dur; |
| 6186 | } |
| 6187 | |
| 6188 | static uint |
| 6189 | brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec, |
| 6190 | u8 preamble_type) |
| 6191 | { |
| 6192 | BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n", |
| 6193 | wlc->pub->unit, rspec, preamble_type); |
| 6194 | return brcms_c_calc_ack_time(wlc, rspec, preamble_type); |
| 6195 | } |
| 6196 | |
| 6197 | static uint |
| 6198 | brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec, |
| 6199 | u8 preamble_type) |
| 6200 | { |
| 6201 | BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, " |
| 6202 | "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); |
| 6203 | /* |
| 6204 | * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that |
| 6205 | * is less than or equal to the rate of the immediately previous |
| 6206 | * frame in the FES |
| 6207 | */ |
| 6208 | rspec = brcms_basic_rate(wlc, rspec); |
| 6209 | /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */ |
| 6210 | return brcms_c_calc_frame_time(wlc, rspec, preamble_type, |
| 6211 | (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN + |
| 6212 | FCS_LEN)); |
| 6213 | } |
| 6214 | |
| 6215 | /* brcms_c_compute_frame_dur() |
| 6216 | * |
| 6217 | * Calculate the 802.11 MAC header DUR field for MPDU |
| 6218 | * DUR for a single frame = 1 SIFS + 1 ACK |
| 6219 | * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time |
| 6220 | * |
| 6221 | * rate MPDU rate in unit of 500kbps |
| 6222 | * next_frag_len next MPDU length in bytes |
| 6223 | * preamble_type use short/GF or long/MM PLCP header |
| 6224 | */ |
| 6225 | static u16 |
| 6226 | brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate, |
| 6227 | u8 preamble_type, uint next_frag_len) |
| 6228 | { |
| 6229 | u16 dur, sifs; |
| 6230 | |
| 6231 | sifs = get_sifs(wlc->band); |
| 6232 | |
| 6233 | dur = sifs; |
| 6234 | dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type); |
| 6235 | |
| 6236 | if (next_frag_len) { |
| 6237 | /* Double the current DUR to get 2 SIFS + 2 ACKs */ |
| 6238 | dur *= 2; |
| 6239 | /* add another SIFS and the frag time */ |
| 6240 | dur += sifs; |
| 6241 | dur += |
| 6242 | (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type, |
| 6243 | next_frag_len); |
| 6244 | } |
| 6245 | return dur; |
| 6246 | } |
| 6247 | |
| 6248 | /* The opposite of brcms_c_calc_frame_time */ |
| 6249 | static uint |
| 6250 | brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec, |
| 6251 | u8 preamble_type, uint dur) |
| 6252 | { |
| 6253 | uint nsyms, mac_len, Ndps, kNdps; |
| 6254 | uint rate = rspec2rate(ratespec); |
| 6255 | |
| 6256 | BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n", |
| 6257 | wlc->pub->unit, ratespec, preamble_type, dur); |
| 6258 | |
| 6259 | if (is_mcs_rate(ratespec)) { |
| 6260 | uint mcs = ratespec & RSPEC_RATE_MASK; |
| 6261 | int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec); |
| 6262 | dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); |
| 6263 | /* payload calculation matches that of regular ofdm */ |
| 6264 | if (wlc->band->bandtype == BRCM_BAND_2G) |
| 6265 | dur -= DOT11_OFDM_SIGNAL_EXTENSION; |
| 6266 | /* kNdbps = kbps * 4 */ |
| 6267 | kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec), |
| 6268 | rspec_issgi(ratespec)) * 4; |
| 6269 | nsyms = dur / APHY_SYMBOL_TIME; |
| 6270 | mac_len = |
| 6271 | ((nsyms * kNdps) - |
| 6272 | ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000; |
| 6273 | } else if (is_ofdm_rate(ratespec)) { |
| 6274 | dur -= APHY_PREAMBLE_TIME; |
| 6275 | dur -= APHY_SIGNAL_TIME; |
| 6276 | /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */ |
| 6277 | Ndps = rate * 2; |
| 6278 | nsyms = dur / APHY_SYMBOL_TIME; |
| 6279 | mac_len = |
| 6280 | ((nsyms * Ndps) - |
| 6281 | (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8; |
| 6282 | } else { |
| 6283 | if (preamble_type & BRCMS_SHORT_PREAMBLE) |
| 6284 | dur -= BPHY_PLCP_SHORT_TIME; |
| 6285 | else |
| 6286 | dur -= BPHY_PLCP_TIME; |
| 6287 | mac_len = dur * rate; |
| 6288 | /* divide out factor of 2 in rate (1/2 mbps) */ |
| 6289 | mac_len = mac_len / 8 / 2; |
| 6290 | } |
| 6291 | return mac_len; |
| 6292 | } |
| 6293 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 6294 | /* |
| 6295 | * Return true if the specified rate is supported by the specified band. |
| 6296 | * BRCM_BAND_AUTO indicates the current band. |
| 6297 | */ |
| 6298 | static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band, |
| 6299 | bool verbose) |
| 6300 | { |
| 6301 | struct brcms_c_rateset *hw_rateset; |
| 6302 | uint i; |
| 6303 | |
| 6304 | if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype)) |
| 6305 | hw_rateset = &wlc->band->hw_rateset; |
| 6306 | else if (wlc->pub->_nbands > 1) |
| 6307 | hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset; |
| 6308 | else |
| 6309 | /* other band specified and we are a single band device */ |
| 6310 | return false; |
| 6311 | |
| 6312 | /* check if this is a mimo rate */ |
| 6313 | if (is_mcs_rate(rspec)) { |
| 6314 | if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE) |
| 6315 | goto error; |
| 6316 | |
| 6317 | return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK)); |
| 6318 | } |
| 6319 | |
| 6320 | for (i = 0; i < hw_rateset->count; i++) |
| 6321 | if (hw_rateset->rates[i] == rspec2rate(rspec)) |
| 6322 | return true; |
| 6323 | error: |
| 6324 | if (verbose) |
| 6325 | wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x " |
| 6326 | "not in hw_rateset\n", wlc->pub->unit, rspec); |
| 6327 | |
| 6328 | return false; |
| 6329 | } |
| 6330 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6331 | static u32 |
| 6332 | mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, |
| 6333 | u32 int_val) |
| 6334 | { |
| 6335 | u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT; |
| 6336 | u8 rate = int_val & NRATE_RATE_MASK; |
| 6337 | u32 rspec; |
| 6338 | bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE); |
| 6339 | bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT); |
| 6340 | bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY) |
| 6341 | == NRATE_OVERRIDE_MCS_ONLY); |
| 6342 | int bcmerror = 0; |
| 6343 | |
| 6344 | if (!ismcs) |
| 6345 | return (u32) rate; |
| 6346 | |
| 6347 | /* validate the combination of rate/mcs/stf is allowed */ |
| 6348 | if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) { |
| 6349 | /* mcs only allowed when nmode */ |
| 6350 | if (stf > PHY_TXC1_MODE_SDM) { |
| 6351 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n", |
| 6352 | wlc->pub->unit, __func__); |
| 6353 | bcmerror = -EINVAL; |
| 6354 | goto done; |
| 6355 | } |
| 6356 | |
| 6357 | /* mcs 32 is a special case, DUP mode 40 only */ |
| 6358 | if (rate == 32) { |
| 6359 | if (!CHSPEC_IS40(wlc->home_chanspec) || |
| 6360 | ((stf != PHY_TXC1_MODE_SISO) |
| 6361 | && (stf != PHY_TXC1_MODE_CDD))) { |
| 6362 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs " |
| 6363 | "32\n", wlc->pub->unit, __func__); |
| 6364 | bcmerror = -EINVAL; |
| 6365 | goto done; |
| 6366 | } |
| 6367 | /* mcs > 7 must use stf SDM */ |
| 6368 | } else if (rate > HIGHEST_SINGLE_STREAM_MCS) { |
| 6369 | /* mcs > 7 must use stf SDM */ |
| 6370 | if (stf != PHY_TXC1_MODE_SDM) { |
| 6371 | BCMMSG(wlc->wiphy, "wl%d: enabling " |
| 6372 | "SDM mode for mcs %d\n", |
| 6373 | wlc->pub->unit, rate); |
| 6374 | stf = PHY_TXC1_MODE_SDM; |
| 6375 | } |
| 6376 | } else { |
| 6377 | /* |
| 6378 | * MCS 0-7 may use SISO, CDD, and for |
| 6379 | * phy_rev >= 3 STBC |
| 6380 | */ |
| 6381 | if ((stf > PHY_TXC1_MODE_STBC) || |
| 6382 | (!BRCMS_STBC_CAP_PHY(wlc) |
| 6383 | && (stf == PHY_TXC1_MODE_STBC))) { |
| 6384 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC" |
| 6385 | "\n", wlc->pub->unit, __func__); |
| 6386 | bcmerror = -EINVAL; |
| 6387 | goto done; |
| 6388 | } |
| 6389 | } |
| 6390 | } else if (is_ofdm_rate(rate)) { |
| 6391 | if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) { |
| 6392 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n", |
| 6393 | wlc->pub->unit, __func__); |
| 6394 | bcmerror = -EINVAL; |
| 6395 | goto done; |
| 6396 | } |
| 6397 | } else if (is_cck_rate(rate)) { |
| 6398 | if ((cur_band->bandtype != BRCM_BAND_2G) |
| 6399 | || (stf != PHY_TXC1_MODE_SISO)) { |
| 6400 | wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n", |
| 6401 | wlc->pub->unit, __func__); |
| 6402 | bcmerror = -EINVAL; |
| 6403 | goto done; |
| 6404 | } |
| 6405 | } else { |
| 6406 | wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n", |
| 6407 | wlc->pub->unit, __func__); |
| 6408 | bcmerror = -EINVAL; |
| 6409 | goto done; |
| 6410 | } |
| 6411 | /* make sure multiple antennae are available for non-siso rates */ |
| 6412 | if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) { |
| 6413 | wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO " |
| 6414 | "request\n", wlc->pub->unit, __func__); |
| 6415 | bcmerror = -EINVAL; |
| 6416 | goto done; |
| 6417 | } |
| 6418 | |
| 6419 | rspec = rate; |
| 6420 | if (ismcs) { |
| 6421 | rspec |= RSPEC_MIMORATE; |
| 6422 | /* For STBC populate the STC field of the ratespec */ |
| 6423 | if (stf == PHY_TXC1_MODE_STBC) { |
| 6424 | u8 stc; |
| 6425 | stc = 1; /* Nss for single stream is always 1 */ |
| 6426 | rspec |= (stc << RSPEC_STC_SHIFT); |
| 6427 | } |
| 6428 | } |
| 6429 | |
| 6430 | rspec |= (stf << RSPEC_STF_SHIFT); |
| 6431 | |
| 6432 | if (override_mcs_only) |
| 6433 | rspec |= RSPEC_OVERRIDE_MCS_ONLY; |
| 6434 | |
| 6435 | if (issgi) |
| 6436 | rspec |= RSPEC_SHORT_GI; |
| 6437 | |
| 6438 | if ((rate != 0) |
| 6439 | && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true)) |
| 6440 | return rate; |
| 6441 | |
| 6442 | return rspec; |
| 6443 | done: |
| 6444 | return rate; |
| 6445 | } |
| 6446 | |
| 6447 | /* |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 6448 | * Compute PLCP, but only requires actual rate and length of pkt. |
| 6449 | * Rate is given in the driver standard multiple of 500 kbps. |
| 6450 | * le is set for 11 Mbps rate if necessary. |
| 6451 | * Broken out for PRQ. |
| 6452 | */ |
| 6453 | |
| 6454 | static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500, |
| 6455 | uint length, u8 *plcp) |
| 6456 | { |
| 6457 | u16 usec = 0; |
| 6458 | u8 le = 0; |
| 6459 | |
| 6460 | switch (rate_500) { |
| 6461 | case BRCM_RATE_1M: |
| 6462 | usec = length << 3; |
| 6463 | break; |
| 6464 | case BRCM_RATE_2M: |
| 6465 | usec = length << 2; |
| 6466 | break; |
| 6467 | case BRCM_RATE_5M5: |
| 6468 | usec = (length << 4) / 11; |
| 6469 | if ((length << 4) - (usec * 11) > 0) |
| 6470 | usec++; |
| 6471 | break; |
| 6472 | case BRCM_RATE_11M: |
| 6473 | usec = (length << 3) / 11; |
| 6474 | if ((length << 3) - (usec * 11) > 0) { |
| 6475 | usec++; |
| 6476 | if ((usec * 11) - (length << 3) >= 8) |
| 6477 | le = D11B_PLCP_SIGNAL_LE; |
| 6478 | } |
| 6479 | break; |
| 6480 | |
| 6481 | default: |
| 6482 | wiphy_err(wlc->wiphy, |
| 6483 | "brcms_c_cck_plcp_set: unsupported rate %d\n", |
| 6484 | rate_500); |
| 6485 | rate_500 = BRCM_RATE_1M; |
| 6486 | usec = length << 3; |
| 6487 | break; |
| 6488 | } |
| 6489 | /* PLCP signal byte */ |
| 6490 | plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */ |
| 6491 | /* PLCP service byte */ |
| 6492 | plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED); |
| 6493 | /* PLCP length u16, little endian */ |
| 6494 | plcp[2] = usec & 0xff; |
| 6495 | plcp[3] = (usec >> 8) & 0xff; |
| 6496 | /* PLCP CRC16 */ |
| 6497 | plcp[4] = 0; |
| 6498 | plcp[5] = 0; |
| 6499 | } |
| 6500 | |
| 6501 | /* Rate: 802.11 rate code, length: PSDU length in octets */ |
| 6502 | static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp) |
| 6503 | { |
| 6504 | u8 mcs = (u8) (rspec & RSPEC_RATE_MASK); |
| 6505 | plcp[0] = mcs; |
| 6506 | if (rspec_is40mhz(rspec) || (mcs == 32)) |
| 6507 | plcp[0] |= MIMO_PLCP_40MHZ; |
| 6508 | BRCMS_SET_MIMO_PLCP_LEN(plcp, length); |
| 6509 | plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */ |
| 6510 | plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ |
| 6511 | plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ |
| 6512 | plcp[5] = 0; |
| 6513 | } |
| 6514 | |
| 6515 | /* Rate: 802.11 rate code, length: PSDU length in octets */ |
| 6516 | static void |
| 6517 | brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp) |
| 6518 | { |
| 6519 | u8 rate_signal; |
| 6520 | u32 tmp = 0; |
| 6521 | int rate = rspec2rate(rspec); |
| 6522 | |
| 6523 | /* |
| 6524 | * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb |
| 6525 | * transmitted first |
| 6526 | */ |
| 6527 | rate_signal = rate_info[rate] & BRCMS_RATE_MASK; |
| 6528 | memset(plcp, 0, D11_PHY_HDR_LEN); |
| 6529 | D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal); |
| 6530 | |
| 6531 | tmp = (length & 0xfff) << 5; |
| 6532 | plcp[2] |= (tmp >> 16) & 0xff; |
| 6533 | plcp[1] |= (tmp >> 8) & 0xff; |
| 6534 | plcp[0] |= tmp & 0xff; |
| 6535 | } |
| 6536 | |
| 6537 | /* Rate: 802.11 rate code, length: PSDU length in octets */ |
| 6538 | static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec, |
| 6539 | uint length, u8 *plcp) |
| 6540 | { |
| 6541 | int rate = rspec2rate(rspec); |
| 6542 | |
| 6543 | brcms_c_cck_plcp_set(wlc, rate, length, plcp); |
| 6544 | } |
| 6545 | |
| 6546 | static void |
| 6547 | brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec, |
| 6548 | uint length, u8 *plcp) |
| 6549 | { |
| 6550 | if (is_mcs_rate(rspec)) |
| 6551 | brcms_c_compute_mimo_plcp(rspec, length, plcp); |
| 6552 | else if (is_ofdm_rate(rspec)) |
| 6553 | brcms_c_compute_ofdm_plcp(rspec, length, plcp); |
| 6554 | else |
| 6555 | brcms_c_compute_cck_plcp(wlc, rspec, length, plcp); |
| 6556 | } |
| 6557 | |
| 6558 | /* brcms_c_compute_rtscts_dur() |
| 6559 | * |
| 6560 | * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame |
| 6561 | * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK |
| 6562 | * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK |
| 6563 | * |
| 6564 | * cts cts-to-self or rts/cts |
| 6565 | * rts_rate rts or cts rate in unit of 500kbps |
| 6566 | * rate next MPDU rate in unit of 500kbps |
| 6567 | * frame_len next MPDU frame length in bytes |
| 6568 | */ |
| 6569 | u16 |
| 6570 | brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, |
| 6571 | u32 rts_rate, |
| 6572 | u32 frame_rate, u8 rts_preamble_type, |
| 6573 | u8 frame_preamble_type, uint frame_len, bool ba) |
| 6574 | { |
| 6575 | u16 dur, sifs; |
| 6576 | |
| 6577 | sifs = get_sifs(wlc->band); |
| 6578 | |
| 6579 | if (!cts_only) { |
| 6580 | /* RTS/CTS */ |
| 6581 | dur = 3 * sifs; |
| 6582 | dur += |
| 6583 | (u16) brcms_c_calc_cts_time(wlc, rts_rate, |
| 6584 | rts_preamble_type); |
| 6585 | } else { |
| 6586 | /* CTS-TO-SELF */ |
| 6587 | dur = 2 * sifs; |
| 6588 | } |
| 6589 | |
| 6590 | dur += |
| 6591 | (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type, |
| 6592 | frame_len); |
| 6593 | if (ba) |
| 6594 | dur += |
| 6595 | (u16) brcms_c_calc_ba_time(wlc, frame_rate, |
| 6596 | BRCMS_SHORT_PREAMBLE); |
| 6597 | else |
| 6598 | dur += |
| 6599 | (u16) brcms_c_calc_ack_time(wlc, frame_rate, |
| 6600 | frame_preamble_type); |
| 6601 | return dur; |
| 6602 | } |
| 6603 | |
| 6604 | static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec) |
| 6605 | { |
| 6606 | u16 phyctl1 = 0; |
| 6607 | u16 bw; |
| 6608 | |
| 6609 | if (BRCMS_ISLCNPHY(wlc->band)) { |
| 6610 | bw = PHY_TXC1_BW_20MHZ; |
| 6611 | } else { |
| 6612 | bw = rspec_get_bw(rspec); |
| 6613 | /* 10Mhz is not supported yet */ |
| 6614 | if (bw < PHY_TXC1_BW_20MHZ) { |
| 6615 | wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is " |
| 6616 | "not supported yet, set to 20L\n", bw); |
| 6617 | bw = PHY_TXC1_BW_20MHZ; |
| 6618 | } |
| 6619 | } |
| 6620 | |
| 6621 | if (is_mcs_rate(rspec)) { |
| 6622 | uint mcs = rspec & RSPEC_RATE_MASK; |
| 6623 | |
| 6624 | /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */ |
| 6625 | phyctl1 = rspec_phytxbyte2(rspec); |
| 6626 | /* set the upper byte of phyctl1 */ |
| 6627 | phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8); |
| 6628 | } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band) |
| 6629 | && !BRCMS_ISSSLPNPHY(wlc->band)) { |
| 6630 | /* |
| 6631 | * In CCK mode LPPHY overloads OFDM Modulation bits with CCK |
| 6632 | * Data Rate. Eventually MIMOPHY would also be converted to |
| 6633 | * this format |
| 6634 | */ |
| 6635 | /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ |
| 6636 | phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT)); |
| 6637 | } else { /* legacy OFDM/CCK */ |
| 6638 | s16 phycfg; |
| 6639 | /* get the phyctl byte from rate phycfg table */ |
| 6640 | phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec)); |
| 6641 | if (phycfg == -1) { |
| 6642 | wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong " |
| 6643 | "legacy OFDM/CCK rate\n"); |
| 6644 | phycfg = 0; |
| 6645 | } |
| 6646 | /* set the upper byte of phyctl1 */ |
| 6647 | phyctl1 = |
| 6648 | (bw | (phycfg << 8) | |
| 6649 | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT)); |
| 6650 | } |
| 6651 | return phyctl1; |
| 6652 | } |
| 6653 | |
| 6654 | /* |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 6655 | * Add struct d11txh, struct cck_phy_hdr. |
| 6656 | * |
| 6657 | * 'p' data must start with 802.11 MAC header |
| 6658 | * 'p' must allow enough bytes of local headers to be "pushed" onto the packet |
| 6659 | * |
| 6660 | * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes) |
| 6661 | * |
| 6662 | */ |
| 6663 | static u16 |
| 6664 | brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, |
| 6665 | struct sk_buff *p, struct scb *scb, uint frag, |
| 6666 | uint nfrags, uint queue, uint next_frag_len) |
| 6667 | { |
| 6668 | struct ieee80211_hdr *h; |
| 6669 | struct d11txh *txh; |
| 6670 | u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN]; |
| 6671 | int len, phylen, rts_phylen; |
| 6672 | u16 mch, phyctl, xfts, mainrates; |
| 6673 | u16 seq = 0, mcl = 0, status = 0, frameid = 0; |
| 6674 | u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M }; |
| 6675 | u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M }; |
| 6676 | bool use_rts = false; |
| 6677 | bool use_cts = false; |
| 6678 | bool use_rifs = false; |
| 6679 | bool short_preamble[2] = { false, false }; |
| 6680 | u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE }; |
| 6681 | u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE }; |
| 6682 | u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN]; |
| 6683 | struct ieee80211_rts *rts = NULL; |
| 6684 | bool qos; |
| 6685 | uint ac; |
| 6686 | bool hwtkmic = false; |
| 6687 | u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; |
| 6688 | #define ANTCFG_NONE 0xFF |
| 6689 | u8 antcfg = ANTCFG_NONE; |
| 6690 | u8 fbantcfg = ANTCFG_NONE; |
| 6691 | uint phyctl1_stf = 0; |
| 6692 | u16 durid = 0; |
| 6693 | struct ieee80211_tx_rate *txrate[2]; |
| 6694 | int k; |
| 6695 | struct ieee80211_tx_info *tx_info; |
| 6696 | bool is_mcs; |
| 6697 | u16 mimo_txbw; |
| 6698 | u8 mimo_preamble_type; |
| 6699 | |
| 6700 | /* locate 802.11 MAC header */ |
| 6701 | h = (struct ieee80211_hdr *)(p->data); |
| 6702 | qos = ieee80211_is_data_qos(h->frame_control); |
| 6703 | |
| 6704 | /* compute length of frame in bytes for use in PLCP computations */ |
| 6705 | len = brcmu_pkttotlen(p); |
| 6706 | phylen = len + FCS_LEN; |
| 6707 | |
| 6708 | /* Get tx_info */ |
| 6709 | tx_info = IEEE80211_SKB_CB(p); |
| 6710 | |
| 6711 | /* add PLCP */ |
| 6712 | plcp = skb_push(p, D11_PHY_HDR_LEN); |
| 6713 | |
| 6714 | /* add Broadcom tx descriptor header */ |
| 6715 | txh = (struct d11txh *) skb_push(p, D11_TXH_LEN); |
| 6716 | memset(txh, 0, D11_TXH_LEN); |
| 6717 | |
| 6718 | /* setup frameid */ |
| 6719 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { |
| 6720 | /* non-AP STA should never use BCMC queue */ |
| 6721 | if (queue == TX_BCMC_FIFO) { |
| 6722 | wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == " |
| 6723 | "TX_BCMC!\n", wlc->pub->unit, __func__); |
| 6724 | frameid = bcmc_fid_generate(wlc, NULL, txh); |
| 6725 | } else { |
| 6726 | /* Increment the counter for first fragment */ |
| 6727 | if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
| 6728 | scb->seqnum[p->priority]++; |
| 6729 | |
| 6730 | /* extract fragment number from frame first */ |
| 6731 | seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK; |
| 6732 | seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT); |
| 6733 | h->seq_ctrl = cpu_to_le16(seq); |
| 6734 | |
| 6735 | frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) | |
| 6736 | (queue & TXFID_QUEUE_MASK); |
| 6737 | } |
| 6738 | } |
| 6739 | frameid |= queue & TXFID_QUEUE_MASK; |
| 6740 | |
| 6741 | /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */ |
| 6742 | if (ieee80211_is_beacon(h->frame_control)) |
| 6743 | mcl |= TXC_IGNOREPMQ; |
| 6744 | |
| 6745 | txrate[0] = tx_info->control.rates; |
| 6746 | txrate[1] = txrate[0] + 1; |
| 6747 | |
| 6748 | /* |
| 6749 | * if rate control algorithm didn't give us a fallback |
| 6750 | * rate, use the primary rate |
| 6751 | */ |
| 6752 | if (txrate[1]->idx < 0) |
| 6753 | txrate[1] = txrate[0]; |
| 6754 | |
| 6755 | for (k = 0; k < hw->max_rates; k++) { |
| 6756 | is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false; |
| 6757 | if (!is_mcs) { |
| 6758 | if ((txrate[k]->idx >= 0) |
| 6759 | && (txrate[k]->idx < |
| 6760 | hw->wiphy->bands[tx_info->band]->n_bitrates)) { |
| 6761 | rspec[k] = |
| 6762 | hw->wiphy->bands[tx_info->band]-> |
| 6763 | bitrates[txrate[k]->idx].hw_value; |
| 6764 | short_preamble[k] = |
| 6765 | txrate[k]-> |
| 6766 | flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ? |
| 6767 | true : false; |
| 6768 | } else { |
| 6769 | rspec[k] = BRCM_RATE_1M; |
| 6770 | } |
| 6771 | } else { |
| 6772 | rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band, |
| 6773 | NRATE_MCS_INUSE | txrate[k]->idx); |
| 6774 | } |
| 6775 | |
| 6776 | /* |
| 6777 | * Currently only support same setting for primay and |
| 6778 | * fallback rates. Unify flags for each rate into a |
| 6779 | * single value for the frame |
| 6780 | */ |
| 6781 | use_rts |= |
| 6782 | txrate[k]-> |
| 6783 | flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false; |
| 6784 | use_cts |= |
| 6785 | txrate[k]-> |
| 6786 | flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false; |
| 6787 | |
| 6788 | |
| 6789 | /* |
| 6790 | * (1) RATE: |
| 6791 | * determine and validate primary rate |
| 6792 | * and fallback rates |
| 6793 | */ |
| 6794 | if (!rspec_active(rspec[k])) { |
| 6795 | rspec[k] = BRCM_RATE_1M; |
| 6796 | } else { |
| 6797 | if (!is_multicast_ether_addr(h->addr1)) { |
| 6798 | /* set tx antenna config */ |
| 6799 | brcms_c_antsel_antcfg_get(wlc->asi, false, |
| 6800 | false, 0, 0, &antcfg, &fbantcfg); |
| 6801 | } |
| 6802 | } |
| 6803 | } |
| 6804 | |
| 6805 | phyctl1_stf = wlc->stf->ss_opmode; |
| 6806 | |
| 6807 | if (wlc->pub->_n_enab & SUPPORT_11N) { |
| 6808 | for (k = 0; k < hw->max_rates; k++) { |
| 6809 | /* |
| 6810 | * apply siso/cdd to single stream mcs's or ofdm |
| 6811 | * if rspec is auto selected |
| 6812 | */ |
| 6813 | if (((is_mcs_rate(rspec[k]) && |
| 6814 | is_single_stream(rspec[k] & RSPEC_RATE_MASK)) || |
| 6815 | is_ofdm_rate(rspec[k])) |
| 6816 | && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY) |
| 6817 | || !(rspec[k] & RSPEC_OVERRIDE))) { |
| 6818 | rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK); |
| 6819 | |
| 6820 | /* For SISO MCS use STBC if possible */ |
| 6821 | if (is_mcs_rate(rspec[k]) |
| 6822 | && BRCMS_STF_SS_STBC_TX(wlc, scb)) { |
| 6823 | u8 stc; |
| 6824 | |
| 6825 | /* Nss for single stream is always 1 */ |
| 6826 | stc = 1; |
| 6827 | rspec[k] |= (PHY_TXC1_MODE_STBC << |
| 6828 | RSPEC_STF_SHIFT) | |
| 6829 | (stc << RSPEC_STC_SHIFT); |
| 6830 | } else |
| 6831 | rspec[k] |= |
| 6832 | (phyctl1_stf << RSPEC_STF_SHIFT); |
| 6833 | } |
| 6834 | |
| 6835 | /* |
| 6836 | * Is the phy configured to use 40MHZ frames? If |
| 6837 | * so then pick the desired txbw |
| 6838 | */ |
| 6839 | if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) { |
| 6840 | /* default txbw is 20in40 SB */ |
| 6841 | mimo_ctlchbw = mimo_txbw = |
| 6842 | CHSPEC_SB_UPPER(wlc_phy_chanspec_get( |
| 6843 | wlc->band->pi)) |
| 6844 | ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; |
| 6845 | |
| 6846 | if (is_mcs_rate(rspec[k])) { |
| 6847 | /* mcs 32 must be 40b/w DUP */ |
| 6848 | if ((rspec[k] & RSPEC_RATE_MASK) |
| 6849 | == 32) { |
| 6850 | mimo_txbw = |
| 6851 | PHY_TXC1_BW_40MHZ_DUP; |
| 6852 | /* use override */ |
| 6853 | } else if (wlc->mimo_40txbw != AUTO) |
| 6854 | mimo_txbw = wlc->mimo_40txbw; |
| 6855 | /* else check if dst is using 40 Mhz */ |
| 6856 | else if (scb->flags & SCB_IS40) |
| 6857 | mimo_txbw = PHY_TXC1_BW_40MHZ; |
| 6858 | } else if (is_ofdm_rate(rspec[k])) { |
| 6859 | if (wlc->ofdm_40txbw != AUTO) |
| 6860 | mimo_txbw = wlc->ofdm_40txbw; |
| 6861 | } else if (wlc->cck_40txbw != AUTO) { |
| 6862 | mimo_txbw = wlc->cck_40txbw; |
| 6863 | } |
| 6864 | } else { |
| 6865 | /* |
| 6866 | * mcs32 is 40 b/w only. |
| 6867 | * This is possible for probe packets on |
| 6868 | * a STA during SCAN |
| 6869 | */ |
| 6870 | if ((rspec[k] & RSPEC_RATE_MASK) == 32) |
| 6871 | /* mcs 0 */ |
| 6872 | rspec[k] = RSPEC_MIMORATE; |
| 6873 | |
| 6874 | mimo_txbw = PHY_TXC1_BW_20MHZ; |
| 6875 | } |
| 6876 | |
| 6877 | /* Set channel width */ |
| 6878 | rspec[k] &= ~RSPEC_BW_MASK; |
| 6879 | if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k]))) |
| 6880 | rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT); |
| 6881 | else |
| 6882 | rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT); |
| 6883 | |
| 6884 | /* Disable short GI, not supported yet */ |
| 6885 | rspec[k] &= ~RSPEC_SHORT_GI; |
| 6886 | |
| 6887 | mimo_preamble_type = BRCMS_MM_PREAMBLE; |
| 6888 | if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD) |
| 6889 | mimo_preamble_type = BRCMS_GF_PREAMBLE; |
| 6890 | |
| 6891 | if ((txrate[k]->flags & IEEE80211_TX_RC_MCS) |
| 6892 | && (!is_mcs_rate(rspec[k]))) { |
| 6893 | wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_" |
| 6894 | "RC_MCS != is_mcs_rate(rspec)\n", |
| 6895 | wlc->pub->unit, __func__); |
| 6896 | } |
| 6897 | |
| 6898 | if (is_mcs_rate(rspec[k])) { |
| 6899 | preamble_type[k] = mimo_preamble_type; |
| 6900 | |
| 6901 | /* |
| 6902 | * if SGI is selected, then forced mm |
| 6903 | * for single stream |
| 6904 | */ |
| 6905 | if ((rspec[k] & RSPEC_SHORT_GI) |
| 6906 | && is_single_stream(rspec[k] & |
| 6907 | RSPEC_RATE_MASK)) |
| 6908 | preamble_type[k] = BRCMS_MM_PREAMBLE; |
| 6909 | } |
| 6910 | |
| 6911 | /* should be better conditionalized */ |
| 6912 | if (!is_mcs_rate(rspec[0]) |
| 6913 | && (tx_info->control.rates[0]. |
| 6914 | flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)) |
| 6915 | preamble_type[k] = BRCMS_SHORT_PREAMBLE; |
| 6916 | } |
| 6917 | } else { |
| 6918 | for (k = 0; k < hw->max_rates; k++) { |
| 6919 | /* Set ctrlchbw as 20Mhz */ |
| 6920 | rspec[k] &= ~RSPEC_BW_MASK; |
| 6921 | rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT); |
| 6922 | |
| 6923 | /* for nphy, stf of ofdm frames must follow policies */ |
| 6924 | if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) { |
| 6925 | rspec[k] &= ~RSPEC_STF_MASK; |
| 6926 | rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT; |
| 6927 | } |
| 6928 | } |
| 6929 | } |
| 6930 | |
| 6931 | /* Reset these for use with AMPDU's */ |
| 6932 | txrate[0]->count = 0; |
| 6933 | txrate[1]->count = 0; |
| 6934 | |
| 6935 | /* (2) PROTECTION, may change rspec */ |
| 6936 | if ((ieee80211_is_data(h->frame_control) || |
| 6937 | ieee80211_is_mgmt(h->frame_control)) && |
| 6938 | (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1)) |
| 6939 | use_rts = true; |
| 6940 | |
| 6941 | /* (3) PLCP: determine PLCP header and MAC duration, |
| 6942 | * fill struct d11txh */ |
| 6943 | brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp); |
| 6944 | brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback); |
| 6945 | memcpy(&txh->FragPLCPFallback, |
| 6946 | plcp_fallback, sizeof(txh->FragPLCPFallback)); |
| 6947 | |
| 6948 | /* Length field now put in CCK FBR CRC field */ |
| 6949 | if (is_cck_rate(rspec[1])) { |
| 6950 | txh->FragPLCPFallback[4] = phylen & 0xff; |
| 6951 | txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8; |
| 6952 | } |
| 6953 | |
| 6954 | /* MIMO-RATE: need validation ?? */ |
| 6955 | mainrates = is_ofdm_rate(rspec[0]) ? |
| 6956 | D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) : |
| 6957 | plcp[0]; |
| 6958 | |
| 6959 | /* DUR field for main rate */ |
| 6960 | if (!ieee80211_is_pspoll(h->frame_control) && |
| 6961 | !is_multicast_ether_addr(h->addr1) && !use_rifs) { |
| 6962 | durid = |
| 6963 | brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0], |
| 6964 | next_frag_len); |
| 6965 | h->duration_id = cpu_to_le16(durid); |
| 6966 | } else if (use_rifs) { |
| 6967 | /* NAV protect to end of next max packet size */ |
| 6968 | durid = |
| 6969 | (u16) brcms_c_calc_frame_time(wlc, rspec[0], |
| 6970 | preamble_type[0], |
| 6971 | DOT11_MAX_FRAG_LEN); |
| 6972 | durid += RIFS_11N_TIME; |
| 6973 | h->duration_id = cpu_to_le16(durid); |
| 6974 | } |
| 6975 | |
| 6976 | /* DUR field for fallback rate */ |
| 6977 | if (ieee80211_is_pspoll(h->frame_control)) |
| 6978 | txh->FragDurFallback = h->duration_id; |
| 6979 | else if (is_multicast_ether_addr(h->addr1) || use_rifs) |
| 6980 | txh->FragDurFallback = 0; |
| 6981 | else { |
| 6982 | durid = brcms_c_compute_frame_dur(wlc, rspec[1], |
| 6983 | preamble_type[1], next_frag_len); |
| 6984 | txh->FragDurFallback = cpu_to_le16(durid); |
| 6985 | } |
| 6986 | |
| 6987 | /* (4) MAC-HDR: MacTxControlLow */ |
| 6988 | if (frag == 0) |
| 6989 | mcl |= TXC_STARTMSDU; |
| 6990 | |
| 6991 | if (!is_multicast_ether_addr(h->addr1)) |
| 6992 | mcl |= TXC_IMMEDACK; |
| 6993 | |
| 6994 | if (wlc->band->bandtype == BRCM_BAND_5G) |
| 6995 | mcl |= TXC_FREQBAND_5G; |
| 6996 | |
| 6997 | if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi))) |
| 6998 | mcl |= TXC_BW_40; |
| 6999 | |
| 7000 | /* set AMIC bit if using hardware TKIP MIC */ |
| 7001 | if (hwtkmic) |
| 7002 | mcl |= TXC_AMIC; |
| 7003 | |
| 7004 | txh->MacTxControlLow = cpu_to_le16(mcl); |
| 7005 | |
| 7006 | /* MacTxControlHigh */ |
| 7007 | mch = 0; |
| 7008 | |
| 7009 | /* Set fallback rate preamble type */ |
| 7010 | if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) || |
| 7011 | (preamble_type[1] == BRCMS_GF_PREAMBLE)) { |
| 7012 | if (rspec2rate(rspec[1]) != BRCM_RATE_1M) |
| 7013 | mch |= TXC_PREAMBLE_DATA_FB_SHORT; |
| 7014 | } |
| 7015 | |
| 7016 | /* MacFrameControl */ |
| 7017 | memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16)); |
| 7018 | txh->TxFesTimeNormal = cpu_to_le16(0); |
| 7019 | |
| 7020 | txh->TxFesTimeFallback = cpu_to_le16(0); |
| 7021 | |
| 7022 | /* TxFrameRA */ |
| 7023 | memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN); |
| 7024 | |
| 7025 | /* TxFrameID */ |
| 7026 | txh->TxFrameID = cpu_to_le16(frameid); |
| 7027 | |
| 7028 | /* |
| 7029 | * TxStatus, Note the case of recreating the first frag of a suppressed |
| 7030 | * frame then we may need to reset the retry cnt's via the status reg |
| 7031 | */ |
| 7032 | txh->TxStatus = cpu_to_le16(status); |
| 7033 | |
| 7034 | /* |
| 7035 | * extra fields for ucode AMPDU aggregation, the new fields are added to |
| 7036 | * the END of previous structure so that it's compatible in driver. |
| 7037 | */ |
| 7038 | txh->MaxNMpdus = cpu_to_le16(0); |
| 7039 | txh->MaxABytes_MRT = cpu_to_le16(0); |
| 7040 | txh->MaxABytes_FBR = cpu_to_le16(0); |
| 7041 | txh->MinMBytes = cpu_to_le16(0); |
| 7042 | |
| 7043 | /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration, |
| 7044 | * furnish struct d11txh */ |
| 7045 | /* RTS PLCP header and RTS frame */ |
| 7046 | if (use_rts || use_cts) { |
| 7047 | if (use_rts && use_cts) |
| 7048 | use_cts = false; |
| 7049 | |
| 7050 | for (k = 0; k < 2; k++) { |
| 7051 | rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k], |
| 7052 | false, |
| 7053 | mimo_ctlchbw); |
| 7054 | } |
| 7055 | |
| 7056 | if (!is_ofdm_rate(rts_rspec[0]) && |
| 7057 | !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) || |
| 7058 | (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) { |
| 7059 | rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE; |
| 7060 | mch |= TXC_PREAMBLE_RTS_MAIN_SHORT; |
| 7061 | } |
| 7062 | |
| 7063 | if (!is_ofdm_rate(rts_rspec[1]) && |
| 7064 | !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) || |
| 7065 | (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) { |
| 7066 | rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE; |
| 7067 | mch |= TXC_PREAMBLE_RTS_FB_SHORT; |
| 7068 | } |
| 7069 | |
| 7070 | /* RTS/CTS additions to MacTxControlLow */ |
| 7071 | if (use_cts) { |
| 7072 | txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS); |
| 7073 | } else { |
| 7074 | txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS); |
| 7075 | txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME); |
| 7076 | } |
| 7077 | |
| 7078 | /* RTS PLCP header */ |
| 7079 | rts_plcp = txh->RTSPhyHeader; |
| 7080 | if (use_cts) |
| 7081 | rts_phylen = DOT11_CTS_LEN + FCS_LEN; |
| 7082 | else |
| 7083 | rts_phylen = DOT11_RTS_LEN + FCS_LEN; |
| 7084 | |
| 7085 | brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp); |
| 7086 | |
| 7087 | /* fallback rate version of RTS PLCP header */ |
| 7088 | brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen, |
| 7089 | rts_plcp_fallback); |
| 7090 | memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback, |
| 7091 | sizeof(txh->RTSPLCPFallback)); |
| 7092 | |
| 7093 | /* RTS frame fields... */ |
| 7094 | rts = (struct ieee80211_rts *)&txh->rts_frame; |
| 7095 | |
| 7096 | durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0], |
| 7097 | rspec[0], rts_preamble_type[0], |
| 7098 | preamble_type[0], phylen, false); |
| 7099 | rts->duration = cpu_to_le16(durid); |
| 7100 | /* fallback rate version of RTS DUR field */ |
| 7101 | durid = brcms_c_compute_rtscts_dur(wlc, use_cts, |
| 7102 | rts_rspec[1], rspec[1], |
| 7103 | rts_preamble_type[1], |
| 7104 | preamble_type[1], phylen, false); |
| 7105 | txh->RTSDurFallback = cpu_to_le16(durid); |
| 7106 | |
| 7107 | if (use_cts) { |
| 7108 | rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | |
| 7109 | IEEE80211_STYPE_CTS); |
| 7110 | |
| 7111 | memcpy(&rts->ra, &h->addr2, ETH_ALEN); |
| 7112 | } else { |
| 7113 | rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL | |
| 7114 | IEEE80211_STYPE_RTS); |
| 7115 | |
| 7116 | memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN); |
| 7117 | } |
| 7118 | |
| 7119 | /* mainrate |
| 7120 | * low 8 bits: main frag rate/mcs, |
| 7121 | * high 8 bits: rts/cts rate/mcs |
| 7122 | */ |
| 7123 | mainrates |= (is_ofdm_rate(rts_rspec[0]) ? |
| 7124 | D11A_PHY_HDR_GRATE( |
| 7125 | (struct ofdm_phy_hdr *) rts_plcp) : |
| 7126 | rts_plcp[0]) << 8; |
| 7127 | } else { |
| 7128 | memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN); |
| 7129 | memset((char *)&txh->rts_frame, 0, |
| 7130 | sizeof(struct ieee80211_rts)); |
| 7131 | memset((char *)txh->RTSPLCPFallback, 0, |
| 7132 | sizeof(txh->RTSPLCPFallback)); |
| 7133 | txh->RTSDurFallback = 0; |
| 7134 | } |
| 7135 | |
| 7136 | #ifdef SUPPORT_40MHZ |
| 7137 | /* add null delimiter count */ |
| 7138 | if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec)) |
| 7139 | txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = |
| 7140 | brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); |
| 7141 | |
| 7142 | #endif |
| 7143 | |
| 7144 | /* |
| 7145 | * Now that RTS/RTS FB preamble types are updated, write |
| 7146 | * the final value |
| 7147 | */ |
| 7148 | txh->MacTxControlHigh = cpu_to_le16(mch); |
| 7149 | |
| 7150 | /* |
| 7151 | * MainRates (both the rts and frag plcp rates have |
| 7152 | * been calculated now) |
| 7153 | */ |
| 7154 | txh->MainRates = cpu_to_le16(mainrates); |
| 7155 | |
| 7156 | /* XtraFrameTypes */ |
| 7157 | xfts = frametype(rspec[1], wlc->mimoft); |
| 7158 | xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT); |
| 7159 | xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT); |
| 7160 | xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) << |
| 7161 | XFTS_CHANNEL_SHIFT; |
| 7162 | txh->XtraFrameTypes = cpu_to_le16(xfts); |
| 7163 | |
| 7164 | /* PhyTxControlWord */ |
| 7165 | phyctl = frametype(rspec[0], wlc->mimoft); |
| 7166 | if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) || |
| 7167 | (preamble_type[0] == BRCMS_GF_PREAMBLE)) { |
| 7168 | if (rspec2rate(rspec[0]) != BRCM_RATE_1M) |
| 7169 | phyctl |= PHY_TXC_SHORT_HDR; |
| 7170 | } |
| 7171 | |
| 7172 | /* phytxant is properly bit shifted */ |
| 7173 | phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]); |
| 7174 | txh->PhyTxControlWord = cpu_to_le16(phyctl); |
| 7175 | |
| 7176 | /* PhyTxControlWord_1 */ |
| 7177 | if (BRCMS_PHY_11N_CAP(wlc->band)) { |
| 7178 | u16 phyctl1 = 0; |
| 7179 | |
| 7180 | phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]); |
| 7181 | txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1); |
| 7182 | phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]); |
| 7183 | txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1); |
| 7184 | |
| 7185 | if (use_rts || use_cts) { |
| 7186 | phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]); |
| 7187 | txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1); |
| 7188 | phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]); |
| 7189 | txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1); |
| 7190 | } |
| 7191 | |
| 7192 | /* |
| 7193 | * For mcs frames, if mixedmode(overloaded with long preamble) |
| 7194 | * is going to be set, fill in non-zero MModeLen and/or |
| 7195 | * MModeFbrLen it will be unnecessary if they are separated |
| 7196 | */ |
| 7197 | if (is_mcs_rate(rspec[0]) && |
| 7198 | (preamble_type[0] == BRCMS_MM_PREAMBLE)) { |
| 7199 | u16 mmodelen = |
| 7200 | brcms_c_calc_lsig_len(wlc, rspec[0], phylen); |
| 7201 | txh->MModeLen = cpu_to_le16(mmodelen); |
| 7202 | } |
| 7203 | |
| 7204 | if (is_mcs_rate(rspec[1]) && |
| 7205 | (preamble_type[1] == BRCMS_MM_PREAMBLE)) { |
| 7206 | u16 mmodefbrlen = |
| 7207 | brcms_c_calc_lsig_len(wlc, rspec[1], phylen); |
| 7208 | txh->MModeFbrLen = cpu_to_le16(mmodefbrlen); |
| 7209 | } |
| 7210 | } |
| 7211 | |
| 7212 | ac = skb_get_queue_mapping(p); |
| 7213 | if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) { |
| 7214 | uint frag_dur, dur, dur_fallback; |
| 7215 | |
| 7216 | /* WME: Update TXOP threshold */ |
| 7217 | if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) { |
| 7218 | frag_dur = |
| 7219 | brcms_c_calc_frame_time(wlc, rspec[0], |
| 7220 | preamble_type[0], phylen); |
| 7221 | |
| 7222 | if (rts) { |
| 7223 | /* 1 RTS or CTS-to-self frame */ |
| 7224 | dur = |
| 7225 | brcms_c_calc_cts_time(wlc, rts_rspec[0], |
| 7226 | rts_preamble_type[0]); |
| 7227 | dur_fallback = |
| 7228 | brcms_c_calc_cts_time(wlc, rts_rspec[1], |
| 7229 | rts_preamble_type[1]); |
| 7230 | /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */ |
| 7231 | dur += le16_to_cpu(rts->duration); |
| 7232 | dur_fallback += |
| 7233 | le16_to_cpu(txh->RTSDurFallback); |
| 7234 | } else if (use_rifs) { |
| 7235 | dur = frag_dur; |
| 7236 | dur_fallback = 0; |
| 7237 | } else { |
| 7238 | /* frame + SIFS + ACK */ |
| 7239 | dur = frag_dur; |
| 7240 | dur += |
| 7241 | brcms_c_compute_frame_dur(wlc, rspec[0], |
| 7242 | preamble_type[0], 0); |
| 7243 | |
| 7244 | dur_fallback = |
| 7245 | brcms_c_calc_frame_time(wlc, rspec[1], |
| 7246 | preamble_type[1], |
| 7247 | phylen); |
| 7248 | dur_fallback += |
| 7249 | brcms_c_compute_frame_dur(wlc, rspec[1], |
| 7250 | preamble_type[1], 0); |
| 7251 | } |
| 7252 | /* NEED to set TxFesTimeNormal (hard) */ |
| 7253 | txh->TxFesTimeNormal = cpu_to_le16((u16) dur); |
| 7254 | /* |
| 7255 | * NEED to set fallback rate version of |
| 7256 | * TxFesTimeNormal (hard) |
| 7257 | */ |
| 7258 | txh->TxFesTimeFallback = |
| 7259 | cpu_to_le16((u16) dur_fallback); |
| 7260 | |
| 7261 | /* |
| 7262 | * update txop byte threshold (txop minus intraframe |
| 7263 | * overhead) |
| 7264 | */ |
| 7265 | if (wlc->edcf_txop[ac] >= (dur - frag_dur)) { |
| 7266 | uint newfragthresh; |
| 7267 | |
| 7268 | newfragthresh = |
| 7269 | brcms_c_calc_frame_len(wlc, |
| 7270 | rspec[0], preamble_type[0], |
| 7271 | (wlc->edcf_txop[ac] - |
| 7272 | (dur - frag_dur))); |
| 7273 | /* range bound the fragthreshold */ |
| 7274 | if (newfragthresh < DOT11_MIN_FRAG_LEN) |
| 7275 | newfragthresh = |
| 7276 | DOT11_MIN_FRAG_LEN; |
| 7277 | else if (newfragthresh > |
| 7278 | wlc->usr_fragthresh) |
| 7279 | newfragthresh = |
| 7280 | wlc->usr_fragthresh; |
| 7281 | /* update the fragthresh and do txc update */ |
| 7282 | if (wlc->fragthresh[queue] != |
| 7283 | (u16) newfragthresh) |
| 7284 | wlc->fragthresh[queue] = |
| 7285 | (u16) newfragthresh; |
| 7286 | } else { |
| 7287 | wiphy_err(wlc->wiphy, "wl%d: %s txop invalid " |
| 7288 | "for rate %d\n", |
| 7289 | wlc->pub->unit, fifo_names[queue], |
| 7290 | rspec2rate(rspec[0])); |
| 7291 | } |
| 7292 | |
| 7293 | if (dur > wlc->edcf_txop[ac]) |
| 7294 | wiphy_err(wlc->wiphy, "wl%d: %s: %s txop " |
| 7295 | "exceeded phylen %d/%d dur %d/%d\n", |
| 7296 | wlc->pub->unit, __func__, |
| 7297 | fifo_names[queue], |
| 7298 | phylen, wlc->fragthresh[queue], |
| 7299 | dur, wlc->edcf_txop[ac]); |
| 7300 | } |
| 7301 | } |
| 7302 | |
| 7303 | return 0; |
| 7304 | } |
| 7305 | |
| 7306 | void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu, |
| 7307 | struct ieee80211_hw *hw) |
| 7308 | { |
| 7309 | u8 prio; |
| 7310 | uint fifo; |
| 7311 | struct scb *scb = &wlc->pri_scb; |
| 7312 | struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data); |
| 7313 | |
| 7314 | /* |
| 7315 | * 802.11 standard requires management traffic |
| 7316 | * to go at highest priority |
| 7317 | */ |
| 7318 | prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority : |
| 7319 | MAXPRIO; |
| 7320 | fifo = prio2fifo[prio]; |
| 7321 | if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0)) |
| 7322 | return; |
| 7323 | brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio)); |
| 7324 | brcms_c_send_q(wlc); |
| 7325 | } |
| 7326 | |
| 7327 | void brcms_c_send_q(struct brcms_c_info *wlc) |
| 7328 | { |
| 7329 | struct sk_buff *pkt[DOT11_MAXNUMFRAGS]; |
| 7330 | int prec; |
| 7331 | u16 prec_map; |
| 7332 | int err = 0, i, count; |
| 7333 | uint fifo; |
| 7334 | struct brcms_txq_info *qi = wlc->pkt_queue; |
| 7335 | struct pktq *q = &qi->q; |
| 7336 | struct ieee80211_tx_info *tx_info; |
| 7337 | |
| 7338 | prec_map = wlc->tx_prec_map; |
| 7339 | |
| 7340 | /* Send all the enq'd pkts that we can. |
| 7341 | * Dequeue packets with precedence with empty HW fifo only |
| 7342 | */ |
| 7343 | while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) { |
| 7344 | tx_info = IEEE80211_SKB_CB(pkt[0]); |
| 7345 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { |
| 7346 | err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec); |
| 7347 | } else { |
| 7348 | count = 1; |
| 7349 | err = brcms_c_prep_pdu(wlc, pkt[0], &fifo); |
| 7350 | if (!err) { |
| 7351 | for (i = 0; i < count; i++) |
| 7352 | brcms_c_txfifo(wlc, fifo, pkt[i], true, |
| 7353 | 1); |
| 7354 | } |
| 7355 | } |
| 7356 | |
| 7357 | if (err == -EBUSY) { |
| 7358 | brcmu_pktq_penq_head(q, prec, pkt[0]); |
| 7359 | /* |
| 7360 | * If send failed due to any other reason than a |
| 7361 | * change in HW FIFO condition, quit. Otherwise, |
| 7362 | * read the new prec_map! |
| 7363 | */ |
| 7364 | if (prec_map == wlc->tx_prec_map) |
| 7365 | break; |
| 7366 | prec_map = wlc->tx_prec_map; |
| 7367 | } |
| 7368 | } |
| 7369 | } |
| 7370 | |
| 7371 | void |
| 7372 | brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p, |
| 7373 | bool commit, s8 txpktpend) |
| 7374 | { |
| 7375 | u16 frameid = INVALIDFID; |
| 7376 | struct d11txh *txh; |
| 7377 | |
| 7378 | txh = (struct d11txh *) (p->data); |
| 7379 | |
| 7380 | /* When a BC/MC frame is being committed to the BCMC fifo |
| 7381 | * via DMA (NOT PIO), update ucode or BSS info as appropriate. |
| 7382 | */ |
| 7383 | if (fifo == TX_BCMC_FIFO) |
| 7384 | frameid = le16_to_cpu(txh->TxFrameID); |
| 7385 | |
| 7386 | /* |
| 7387 | * Bump up pending count for if not using rpc. If rpc is |
| 7388 | * used, this will be handled in brcms_b_txfifo() |
| 7389 | */ |
| 7390 | if (commit) { |
| 7391 | wlc->core->txpktpend[fifo] += txpktpend; |
| 7392 | BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n", |
| 7393 | txpktpend, wlc->core->txpktpend[fifo]); |
| 7394 | } |
| 7395 | |
| 7396 | /* Commit BCMC sequence number in the SHM frame ID location */ |
| 7397 | if (frameid != INVALIDFID) { |
| 7398 | /* |
| 7399 | * To inform the ucode of the last mcast frame posted |
| 7400 | * so that it can clear moredata bit |
| 7401 | */ |
| 7402 | brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid); |
| 7403 | } |
| 7404 | |
| 7405 | if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) |
| 7406 | wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n"); |
| 7407 | } |
| 7408 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7409 | u32 |
| 7410 | brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec, |
| 7411 | bool use_rspec, u16 mimo_ctlchbw) |
| 7412 | { |
| 7413 | u32 rts_rspec = 0; |
| 7414 | |
| 7415 | if (use_rspec) |
| 7416 | /* use frame rate as rts rate */ |
| 7417 | rts_rspec = rspec; |
| 7418 | else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec)) |
| 7419 | /* Use 11Mbps as the g protection RTS target rate and fallback. |
| 7420 | * Use the brcms_basic_rate() lookup to find the best basic rate |
| 7421 | * under the target in case 11 Mbps is not Basic. |
| 7422 | * 6 and 9 Mbps are not usually selected by rate selection, but |
| 7423 | * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11 |
| 7424 | * is more robust. |
| 7425 | */ |
| 7426 | rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M); |
| 7427 | else |
| 7428 | /* calculate RTS rate and fallback rate based on the frame rate |
| 7429 | * RTS must be sent at a basic rate since it is a |
| 7430 | * control frame, sec 9.6 of 802.11 spec |
| 7431 | */ |
| 7432 | rts_rspec = brcms_basic_rate(wlc, rspec); |
| 7433 | |
| 7434 | if (BRCMS_PHY_11N_CAP(wlc->band)) { |
| 7435 | /* set rts txbw to correct side band */ |
| 7436 | rts_rspec &= ~RSPEC_BW_MASK; |
| 7437 | |
| 7438 | /* |
| 7439 | * if rspec/rspec_fallback is 40MHz, then send RTS on both |
| 7440 | * 20MHz channel (DUP), otherwise send RTS on control channel |
| 7441 | */ |
| 7442 | if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec)) |
| 7443 | rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT); |
| 7444 | else |
| 7445 | rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT); |
| 7446 | |
| 7447 | /* pick siso/cdd as default for ofdm */ |
| 7448 | if (is_ofdm_rate(rts_rspec)) { |
| 7449 | rts_rspec &= ~RSPEC_STF_MASK; |
| 7450 | rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT); |
| 7451 | } |
| 7452 | } |
| 7453 | return rts_rspec; |
| 7454 | } |
| 7455 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7456 | void |
| 7457 | brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend) |
| 7458 | { |
| 7459 | wlc->core->txpktpend[fifo] -= txpktpend; |
| 7460 | BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend, |
| 7461 | wlc->core->txpktpend[fifo]); |
| 7462 | |
| 7463 | /* There is more room; mark precedences related to this FIFO sendable */ |
| 7464 | wlc->tx_prec_map |= wlc->fifo2prec_map[fifo]; |
| 7465 | |
| 7466 | /* figure out which bsscfg is being worked on... */ |
| 7467 | } |
| 7468 | |
| 7469 | /* Update beacon listen interval in shared memory */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 7470 | static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7471 | { |
| 7472 | /* wake up every DTIM is the default */ |
| 7473 | if (wlc->bcn_li_dtim == 1) |
| 7474 | brcms_b_write_shm(wlc->hw, M_BCN_LI, 0); |
| 7475 | else |
| 7476 | brcms_b_write_shm(wlc->hw, M_BCN_LI, |
| 7477 | (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn); |
| 7478 | } |
| 7479 | |
| 7480 | static void |
| 7481 | brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr, |
| 7482 | u32 *tsf_h_ptr) |
| 7483 | { |
| 7484 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 7485 | |
| 7486 | /* read the tsf timer low, then high to get an atomic read */ |
| 7487 | *tsf_l_ptr = R_REG(®s->tsf_timerlow); |
| 7488 | *tsf_h_ptr = R_REG(®s->tsf_timerhigh); |
| 7489 | } |
| 7490 | |
| 7491 | /* |
| 7492 | * recover 64bit TSF value from the 16bit TSF value in the rx header |
| 7493 | * given the assumption that the TSF passed in header is within 65ms |
| 7494 | * of the current tsf. |
| 7495 | * |
| 7496 | * 6 5 4 4 3 2 1 |
| 7497 | * 3.......6.......8.......0.......2.......4.......6.......8......0 |
| 7498 | * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->| |
| 7499 | * |
| 7500 | * The RxTSFTime are the lowest 16 bits and provided by the ucode. The |
| 7501 | * tsf_l is filled in by brcms_b_recv, which is done earlier in the |
| 7502 | * receive call sequence after rx interrupt. Only the higher 16 bits |
| 7503 | * are used. Finally, the tsf_h is read from the tsf register. |
| 7504 | */ |
| 7505 | static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc, |
| 7506 | struct d11rxhdr *rxh) |
| 7507 | { |
| 7508 | u32 tsf_h, tsf_l; |
| 7509 | u16 rx_tsf_0_15, rx_tsf_16_31; |
| 7510 | |
| 7511 | brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h); |
| 7512 | |
| 7513 | rx_tsf_16_31 = (u16)(tsf_l >> 16); |
| 7514 | rx_tsf_0_15 = rxh->RxTSFTime; |
| 7515 | |
| 7516 | /* |
| 7517 | * a greater tsf time indicates the low 16 bits of |
| 7518 | * tsf_l wrapped, so decrement the high 16 bits. |
| 7519 | */ |
| 7520 | if ((u16)tsf_l < rx_tsf_0_15) { |
| 7521 | rx_tsf_16_31 -= 1; |
| 7522 | if (rx_tsf_16_31 == 0xffff) |
| 7523 | tsf_h -= 1; |
| 7524 | } |
| 7525 | |
| 7526 | return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15); |
| 7527 | } |
| 7528 | |
| 7529 | static void |
| 7530 | prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh, |
| 7531 | struct sk_buff *p, |
| 7532 | struct ieee80211_rx_status *rx_status) |
| 7533 | { |
| 7534 | int preamble; |
| 7535 | int channel; |
| 7536 | u32 rspec; |
| 7537 | unsigned char *plcp; |
| 7538 | |
| 7539 | /* fill in TSF and flag its presence */ |
| 7540 | rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh); |
| 7541 | rx_status->flag |= RX_FLAG_MACTIME_MPDU; |
| 7542 | |
| 7543 | channel = BRCMS_CHAN_CHANNEL(rxh->RxChan); |
| 7544 | |
| 7545 | if (channel > 14) { |
| 7546 | rx_status->band = IEEE80211_BAND_5GHZ; |
| 7547 | rx_status->freq = ieee80211_ofdm_chan_to_freq( |
| 7548 | WF_CHAN_FACTOR_5_G/2, channel); |
| 7549 | |
| 7550 | } else { |
| 7551 | rx_status->band = IEEE80211_BAND_2GHZ; |
| 7552 | rx_status->freq = ieee80211_dsss_chan_to_freq(channel); |
| 7553 | } |
| 7554 | |
| 7555 | rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh); |
| 7556 | |
| 7557 | /* noise */ |
| 7558 | /* qual */ |
| 7559 | rx_status->antenna = |
| 7560 | (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; |
| 7561 | |
| 7562 | plcp = p->data; |
| 7563 | |
| 7564 | rspec = brcms_c_compute_rspec(rxh, plcp); |
| 7565 | if (is_mcs_rate(rspec)) { |
| 7566 | rx_status->rate_idx = rspec & RSPEC_RATE_MASK; |
| 7567 | rx_status->flag |= RX_FLAG_HT; |
| 7568 | if (rspec_is40mhz(rspec)) |
| 7569 | rx_status->flag |= RX_FLAG_40MHZ; |
| 7570 | } else { |
| 7571 | switch (rspec2rate(rspec)) { |
| 7572 | case BRCM_RATE_1M: |
| 7573 | rx_status->rate_idx = 0; |
| 7574 | break; |
| 7575 | case BRCM_RATE_2M: |
| 7576 | rx_status->rate_idx = 1; |
| 7577 | break; |
| 7578 | case BRCM_RATE_5M5: |
| 7579 | rx_status->rate_idx = 2; |
| 7580 | break; |
| 7581 | case BRCM_RATE_11M: |
| 7582 | rx_status->rate_idx = 3; |
| 7583 | break; |
| 7584 | case BRCM_RATE_6M: |
| 7585 | rx_status->rate_idx = 4; |
| 7586 | break; |
| 7587 | case BRCM_RATE_9M: |
| 7588 | rx_status->rate_idx = 5; |
| 7589 | break; |
| 7590 | case BRCM_RATE_12M: |
| 7591 | rx_status->rate_idx = 6; |
| 7592 | break; |
| 7593 | case BRCM_RATE_18M: |
| 7594 | rx_status->rate_idx = 7; |
| 7595 | break; |
| 7596 | case BRCM_RATE_24M: |
| 7597 | rx_status->rate_idx = 8; |
| 7598 | break; |
| 7599 | case BRCM_RATE_36M: |
| 7600 | rx_status->rate_idx = 9; |
| 7601 | break; |
| 7602 | case BRCM_RATE_48M: |
| 7603 | rx_status->rate_idx = 10; |
| 7604 | break; |
| 7605 | case BRCM_RATE_54M: |
| 7606 | rx_status->rate_idx = 11; |
| 7607 | break; |
| 7608 | default: |
| 7609 | wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__); |
| 7610 | } |
| 7611 | |
| 7612 | /* |
| 7613 | * For 5GHz, we should decrease the index as it is |
| 7614 | * a subset of the 2.4G rates. See bitrates field |
| 7615 | * of brcms_band_5GHz_nphy (in mac80211_if.c). |
| 7616 | */ |
| 7617 | if (rx_status->band == IEEE80211_BAND_5GHZ) |
| 7618 | rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET; |
| 7619 | |
| 7620 | /* Determine short preamble and rate_idx */ |
| 7621 | preamble = 0; |
| 7622 | if (is_cck_rate(rspec)) { |
| 7623 | if (rxh->PhyRxStatus_0 & PRXS0_SHORTH) |
| 7624 | rx_status->flag |= RX_FLAG_SHORTPRE; |
| 7625 | } else if (is_ofdm_rate(rspec)) { |
| 7626 | rx_status->flag |= RX_FLAG_SHORTPRE; |
| 7627 | } else { |
| 7628 | wiphy_err(wlc->wiphy, "%s: Unknown modulation\n", |
| 7629 | __func__); |
| 7630 | } |
| 7631 | } |
| 7632 | |
| 7633 | if (plcp3_issgi(plcp[3])) |
| 7634 | rx_status->flag |= RX_FLAG_SHORT_GI; |
| 7635 | |
| 7636 | if (rxh->RxStatus1 & RXS_DECERR) { |
| 7637 | rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC; |
| 7638 | wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n", |
| 7639 | __func__); |
| 7640 | } |
| 7641 | if (rxh->RxStatus1 & RXS_FCSERR) { |
| 7642 | rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; |
| 7643 | wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n", |
| 7644 | __func__); |
| 7645 | } |
| 7646 | } |
| 7647 | |
| 7648 | static void |
| 7649 | brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh, |
| 7650 | struct sk_buff *p) |
| 7651 | { |
| 7652 | int len_mpdu; |
| 7653 | struct ieee80211_rx_status rx_status; |
| 7654 | |
| 7655 | memset(&rx_status, 0, sizeof(rx_status)); |
| 7656 | prep_mac80211_status(wlc, rxh, p, &rx_status); |
| 7657 | |
| 7658 | /* mac header+body length, exclude CRC and plcp header */ |
| 7659 | len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN; |
| 7660 | skb_pull(p, D11_PHY_HDR_LEN); |
| 7661 | __skb_trim(p, len_mpdu); |
| 7662 | |
| 7663 | memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status)); |
| 7664 | ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p); |
| 7665 | } |
| 7666 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7667 | /* calculate frame duration for Mixed-mode L-SIG spoofing, return |
| 7668 | * number of bytes goes in the length field |
| 7669 | * |
| 7670 | * Formula given by HT PHY Spec v 1.13 |
| 7671 | * len = 3(nsyms + nstream + 3) - 3 |
| 7672 | */ |
| 7673 | u16 |
| 7674 | brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, |
| 7675 | uint mac_len) |
| 7676 | { |
| 7677 | uint nsyms, len = 0, kNdps; |
| 7678 | |
| 7679 | BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n", |
| 7680 | wlc->pub->unit, rspec2rate(ratespec), mac_len); |
| 7681 | |
| 7682 | if (is_mcs_rate(ratespec)) { |
| 7683 | uint mcs = ratespec & RSPEC_RATE_MASK; |
| 7684 | int tot_streams = (mcs_2_txstreams(mcs) + 1) + |
| 7685 | rspec_stc(ratespec); |
| 7686 | |
| 7687 | /* |
| 7688 | * the payload duration calculation matches that |
| 7689 | * of regular ofdm |
| 7690 | */ |
| 7691 | /* 1000Ndbps = kbps * 4 */ |
| 7692 | kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec), |
| 7693 | rspec_issgi(ratespec)) * 4; |
| 7694 | |
| 7695 | if (rspec_stc(ratespec) == 0) |
| 7696 | nsyms = |
| 7697 | CEIL((APHY_SERVICE_NBITS + 8 * mac_len + |
| 7698 | APHY_TAIL_NBITS) * 1000, kNdps); |
| 7699 | else |
| 7700 | /* STBC needs to have even number of symbols */ |
| 7701 | nsyms = |
| 7702 | 2 * |
| 7703 | CEIL((APHY_SERVICE_NBITS + 8 * mac_len + |
| 7704 | APHY_TAIL_NBITS) * 1000, 2 * kNdps); |
| 7705 | |
| 7706 | /* (+3) account for HT-SIG(2) and HT-STF(1) */ |
| 7707 | nsyms += (tot_streams + 3); |
| 7708 | /* |
| 7709 | * 3 bytes/symbol @ legacy 6Mbps rate |
| 7710 | * (-3) excluding service bits and tail bits |
| 7711 | */ |
| 7712 | len = (3 * nsyms) - 3; |
| 7713 | } |
| 7714 | |
| 7715 | return (u16) len; |
| 7716 | } |
| 7717 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 7718 | static void |
| 7719 | brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7720 | { |
| 7721 | const struct brcms_c_rateset *rs_dflt; |
| 7722 | struct brcms_c_rateset rs; |
| 7723 | u8 rate; |
| 7724 | u16 entry_ptr; |
| 7725 | u8 plcp[D11_PHY_HDR_LEN]; |
| 7726 | u16 dur, sifs; |
| 7727 | uint i; |
| 7728 | |
| 7729 | sifs = get_sifs(wlc->band); |
| 7730 | |
| 7731 | rs_dflt = brcms_c_rateset_get_hwrs(wlc); |
| 7732 | |
| 7733 | brcms_c_rateset_copy(rs_dflt, &rs); |
| 7734 | brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams); |
| 7735 | |
| 7736 | /* |
| 7737 | * walk the phy rate table and update MAC core SHM |
| 7738 | * basic rate table entries |
| 7739 | */ |
| 7740 | for (i = 0; i < rs.count; i++) { |
| 7741 | rate = rs.rates[i] & BRCMS_RATE_MASK; |
| 7742 | |
| 7743 | entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate); |
| 7744 | |
| 7745 | /* Calculate the Probe Response PLCP for the given rate */ |
| 7746 | brcms_c_compute_plcp(wlc, rate, frame_len, plcp); |
| 7747 | |
| 7748 | /* |
| 7749 | * Calculate the duration of the Probe Response |
| 7750 | * frame plus SIFS for the MAC |
| 7751 | */ |
| 7752 | dur = (u16) brcms_c_calc_frame_time(wlc, rate, |
| 7753 | BRCMS_LONG_PREAMBLE, frame_len); |
| 7754 | dur += sifs; |
| 7755 | |
| 7756 | /* Update the SHM Rate Table entry Probe Response values */ |
| 7757 | brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS, |
| 7758 | (u16) (plcp[0] + (plcp[1] << 8))); |
| 7759 | brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2, |
| 7760 | (u16) (plcp[2] + (plcp[3] << 8))); |
| 7761 | brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur); |
| 7762 | } |
| 7763 | } |
| 7764 | |
| 7765 | /* Max buffering needed for beacon template/prb resp template is 142 bytes. |
| 7766 | * |
| 7767 | * PLCP header is 6 bytes. |
| 7768 | * 802.11 A3 header is 24 bytes. |
| 7769 | * Max beacon frame body template length is 112 bytes. |
| 7770 | * Max probe resp frame body template length is 110 bytes. |
| 7771 | * |
| 7772 | * *len on input contains the max length of the packet available. |
| 7773 | * |
| 7774 | * The *len value is set to the number of bytes in buf used, and starts |
| 7775 | * with the PLCP and included up to, but not including, the 4 byte FCS. |
| 7776 | */ |
| 7777 | static void |
| 7778 | brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type, |
| 7779 | u32 bcn_rspec, |
| 7780 | struct brcms_bss_cfg *cfg, u16 *buf, int *len) |
| 7781 | { |
| 7782 | static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; |
| 7783 | struct cck_phy_hdr *plcp; |
| 7784 | struct ieee80211_mgmt *h; |
| 7785 | int hdr_len, body_len; |
| 7786 | |
| 7787 | hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN; |
| 7788 | |
| 7789 | /* calc buffer size provided for frame body */ |
| 7790 | body_len = *len - hdr_len; |
| 7791 | /* return actual size */ |
| 7792 | *len = hdr_len + body_len; |
| 7793 | |
| 7794 | /* format PHY and MAC headers */ |
| 7795 | memset((char *)buf, 0, hdr_len); |
| 7796 | |
| 7797 | plcp = (struct cck_phy_hdr *) buf; |
| 7798 | |
| 7799 | /* |
| 7800 | * PLCP for Probe Response frames are filled in from |
| 7801 | * core's rate table |
| 7802 | */ |
| 7803 | if (type == IEEE80211_STYPE_BEACON) |
| 7804 | /* fill in PLCP */ |
| 7805 | brcms_c_compute_plcp(wlc, bcn_rspec, |
| 7806 | (DOT11_MAC_HDR_LEN + body_len + FCS_LEN), |
| 7807 | (u8 *) plcp); |
| 7808 | |
| 7809 | /* "Regular" and 16 MBSS but not for 4 MBSS */ |
| 7810 | /* Update the phytxctl for the beacon based on the rspec */ |
| 7811 | brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec); |
| 7812 | |
| 7813 | h = (struct ieee80211_mgmt *)&plcp[1]; |
| 7814 | |
| 7815 | /* fill in 802.11 header */ |
| 7816 | h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type); |
| 7817 | |
| 7818 | /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */ |
| 7819 | /* A1 filled in by MAC for prb resp, broadcast for bcn */ |
| 7820 | if (type == IEEE80211_STYPE_BEACON) |
| 7821 | memcpy(&h->da, ðer_bcast, ETH_ALEN); |
| 7822 | memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN); |
| 7823 | memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN); |
| 7824 | |
| 7825 | /* SEQ filled in by MAC */ |
| 7826 | } |
| 7827 | |
| 7828 | int brcms_c_get_header_len(void) |
| 7829 | { |
| 7830 | return TXOFF; |
| 7831 | } |
| 7832 | |
| 7833 | /* |
| 7834 | * Update all beacons for the system. |
| 7835 | */ |
| 7836 | void brcms_c_update_beacon(struct brcms_c_info *wlc) |
| 7837 | { |
| 7838 | struct brcms_bss_cfg *bsscfg = wlc->bsscfg; |
| 7839 | |
| 7840 | if (bsscfg->up && !bsscfg->BSS) |
| 7841 | /* Clear the soft intmask */ |
| 7842 | wlc->defmacintmask &= ~MI_BCNTPL; |
| 7843 | } |
| 7844 | |
| 7845 | /* Write ssid into shared memory */ |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 7846 | static void |
| 7847 | brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg) |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7848 | { |
| 7849 | u8 *ssidptr = cfg->SSID; |
| 7850 | u16 base = M_SSID; |
| 7851 | u8 ssidbuf[IEEE80211_MAX_SSID_LEN]; |
| 7852 | |
| 7853 | /* padding the ssid with zero and copy it into shm */ |
| 7854 | memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN); |
| 7855 | memcpy(ssidbuf, ssidptr, cfg->SSID_len); |
| 7856 | |
| 7857 | brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN); |
| 7858 | brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len); |
| 7859 | } |
| 7860 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 7861 | static void |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7862 | brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc, |
| 7863 | struct brcms_bss_cfg *cfg, |
| 7864 | bool suspend) |
| 7865 | { |
| 7866 | u16 prb_resp[BCN_TMPL_LEN / 2]; |
| 7867 | int len = BCN_TMPL_LEN; |
| 7868 | |
| 7869 | /* |
| 7870 | * write the probe response to hardware, or save in |
| 7871 | * the config structure |
| 7872 | */ |
| 7873 | |
| 7874 | /* create the probe response template */ |
| 7875 | brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0, |
| 7876 | cfg, prb_resp, &len); |
| 7877 | |
| 7878 | if (suspend) |
| 7879 | brcms_c_suspend_mac_and_wait(wlc); |
| 7880 | |
| 7881 | /* write the probe response into the template region */ |
| 7882 | brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE, |
| 7883 | (len + 3) & ~3, prb_resp); |
| 7884 | |
| 7885 | /* write the length of the probe response frame (+PLCP/-FCS) */ |
| 7886 | brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len); |
| 7887 | |
| 7888 | /* write the SSID and SSID length */ |
| 7889 | brcms_c_shm_ssid_upd(wlc, cfg); |
| 7890 | |
| 7891 | /* |
| 7892 | * Write PLCP headers and durations for probe response frames |
| 7893 | * at all rates. Use the actual frame length covered by the |
| 7894 | * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table() |
| 7895 | * by subtracting the PLCP len and adding the FCS. |
| 7896 | */ |
| 7897 | len += (-D11_PHY_HDR_LEN + FCS_LEN); |
| 7898 | brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len); |
| 7899 | |
| 7900 | if (suspend) |
| 7901 | brcms_c_enable_mac(wlc); |
| 7902 | } |
| 7903 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 7904 | void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend) |
| 7905 | { |
| 7906 | struct brcms_bss_cfg *bsscfg = wlc->bsscfg; |
| 7907 | |
| 7908 | /* update AP or IBSS probe responses */ |
| 7909 | if (bsscfg->up && !bsscfg->BSS) |
| 7910 | brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend); |
| 7911 | } |
| 7912 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7913 | /* prepares pdu for transmission. returns BCM error codes */ |
| 7914 | int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop) |
| 7915 | { |
| 7916 | uint fifo; |
| 7917 | struct d11txh *txh; |
| 7918 | struct ieee80211_hdr *h; |
| 7919 | struct scb *scb; |
| 7920 | |
| 7921 | txh = (struct d11txh *) (pdu->data); |
| 7922 | h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); |
| 7923 | |
| 7924 | /* get the pkt queue info. This was put at brcms_c_sendctl or |
| 7925 | * brcms_c_send for PDU */ |
| 7926 | fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK; |
| 7927 | |
| 7928 | scb = NULL; |
| 7929 | |
| 7930 | *fifop = fifo; |
| 7931 | |
| 7932 | /* return if insufficient dma resources */ |
| 7933 | if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) { |
| 7934 | /* Mark precedences related to this FIFO, unsendable */ |
| 7935 | /* A fifo is full. Clear precedences related to that FIFO */ |
| 7936 | wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]); |
| 7937 | return -EBUSY; |
| 7938 | } |
| 7939 | return 0; |
| 7940 | } |
| 7941 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7942 | int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo, |
| 7943 | uint *blocks) |
| 7944 | { |
| 7945 | if (fifo >= NFIFO) |
| 7946 | return -EINVAL; |
| 7947 | |
| 7948 | *blocks = wlc_hw->xmtfifo_sz[fifo]; |
| 7949 | |
| 7950 | return 0; |
| 7951 | } |
| 7952 | |
| 7953 | void |
| 7954 | brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset, |
| 7955 | const u8 *addr) |
| 7956 | { |
| 7957 | brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr); |
| 7958 | if (match_reg_offset == RCM_BSSID_OFFSET) |
| 7959 | memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN); |
| 7960 | } |
| 7961 | |
Arend van Spriel | 5b435de | 2011-10-05 13:19:03 +0200 | [diff] [blame] | 7962 | /* |
| 7963 | * Flag 'scan in progress' to withhold dynamic phy calibration |
| 7964 | */ |
| 7965 | void brcms_c_scan_start(struct brcms_c_info *wlc) |
| 7966 | { |
| 7967 | wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true); |
| 7968 | } |
| 7969 | |
| 7970 | void brcms_c_scan_stop(struct brcms_c_info *wlc) |
| 7971 | { |
| 7972 | wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false); |
| 7973 | } |
| 7974 | |
| 7975 | void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state) |
| 7976 | { |
| 7977 | wlc->pub->associated = state; |
| 7978 | wlc->bsscfg->associated = state; |
| 7979 | } |
| 7980 | |
| 7981 | /* |
| 7982 | * When a remote STA/AP is removed by Mac80211, or when it can no longer accept |
| 7983 | * AMPDU traffic, packets pending in hardware have to be invalidated so that |
| 7984 | * when later on hardware releases them, they can be handled appropriately. |
| 7985 | */ |
| 7986 | void brcms_c_inval_dma_pkts(struct brcms_hardware *hw, |
| 7987 | struct ieee80211_sta *sta, |
| 7988 | void (*dma_callback_fn)) |
| 7989 | { |
| 7990 | struct dma_pub *dmah; |
| 7991 | int i; |
| 7992 | for (i = 0; i < NFIFO; i++) { |
| 7993 | dmah = hw->di[i]; |
| 7994 | if (dmah != NULL) |
| 7995 | dma_walk_packets(dmah, dma_callback_fn, sta); |
| 7996 | } |
| 7997 | } |
| 7998 | |
| 7999 | int brcms_c_get_curband(struct brcms_c_info *wlc) |
| 8000 | { |
| 8001 | return wlc->band->bandunit; |
| 8002 | } |
| 8003 | |
| 8004 | void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop) |
| 8005 | { |
| 8006 | /* flush packet queue when requested */ |
| 8007 | if (drop) |
| 8008 | brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); |
| 8009 | |
| 8010 | /* wait for queue and DMA fifos to run dry */ |
| 8011 | while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) |
| 8012 | brcms_msleep(wlc->wl, 1); |
| 8013 | } |
| 8014 | |
| 8015 | void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval) |
| 8016 | { |
| 8017 | wlc->bcn_li_bcn = interval; |
| 8018 | if (wlc->pub->up) |
| 8019 | brcms_c_bcn_li_upd(wlc); |
| 8020 | } |
| 8021 | |
| 8022 | int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr) |
| 8023 | { |
| 8024 | uint qdbm; |
| 8025 | |
| 8026 | /* Remove override bit and clip to max qdbm value */ |
| 8027 | qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff); |
| 8028 | return wlc_phy_txpower_set(wlc->band->pi, qdbm, false); |
| 8029 | } |
| 8030 | |
| 8031 | int brcms_c_get_tx_power(struct brcms_c_info *wlc) |
| 8032 | { |
| 8033 | uint qdbm; |
| 8034 | bool override; |
| 8035 | |
| 8036 | wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override); |
| 8037 | |
| 8038 | /* Return qdbm units */ |
| 8039 | return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR); |
| 8040 | } |
| 8041 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8042 | /* Process received frames */ |
| 8043 | /* |
| 8044 | * Return true if more frames need to be processed. false otherwise. |
| 8045 | * Param 'bound' indicates max. # frames to process before break out. |
| 8046 | */ |
| 8047 | static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p) |
| 8048 | { |
| 8049 | struct d11rxhdr *rxh; |
| 8050 | struct ieee80211_hdr *h; |
| 8051 | uint len; |
| 8052 | bool is_amsdu; |
| 8053 | |
| 8054 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 8055 | |
| 8056 | /* frame starts with rxhdr */ |
| 8057 | rxh = (struct d11rxhdr *) (p->data); |
| 8058 | |
| 8059 | /* strip off rxhdr */ |
| 8060 | skb_pull(p, BRCMS_HWRXOFF); |
| 8061 | |
| 8062 | /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */ |
| 8063 | if (rxh->RxStatus1 & RXS_PBPRES) { |
| 8064 | if (p->len < 2) { |
| 8065 | wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of " |
| 8066 | "len %d\n", wlc->pub->unit, p->len); |
| 8067 | goto toss; |
| 8068 | } |
| 8069 | skb_pull(p, 2); |
| 8070 | } |
| 8071 | |
| 8072 | h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN); |
| 8073 | len = p->len; |
| 8074 | |
| 8075 | if (rxh->RxStatus1 & RXS_FCSERR) { |
| 8076 | if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) { |
| 8077 | wiphy_err(wlc->wiphy, "FCSERR while scanning******* -" |
| 8078 | " tossing\n"); |
| 8079 | goto toss; |
| 8080 | } else { |
| 8081 | wiphy_err(wlc->wiphy, "RCSERR!!!\n"); |
| 8082 | goto toss; |
| 8083 | } |
| 8084 | } |
| 8085 | |
| 8086 | /* check received pkt has at least frame control field */ |
| 8087 | if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control)) |
| 8088 | goto toss; |
| 8089 | |
| 8090 | /* not supporting A-MSDU */ |
| 8091 | is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK; |
| 8092 | if (is_amsdu) |
| 8093 | goto toss; |
| 8094 | |
| 8095 | brcms_c_recvctl(wlc, rxh, p); |
| 8096 | return; |
| 8097 | |
| 8098 | toss: |
| 8099 | brcmu_pkt_buf_free_skb(p); |
| 8100 | } |
| 8101 | |
| 8102 | /* Process received frames */ |
| 8103 | /* |
| 8104 | * Return true if more frames need to be processed. false otherwise. |
| 8105 | * Param 'bound' indicates max. # frames to process before break out. |
| 8106 | */ |
| 8107 | static bool |
| 8108 | brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound) |
| 8109 | { |
| 8110 | struct sk_buff *p; |
| 8111 | struct sk_buff *head = NULL; |
| 8112 | struct sk_buff *tail = NULL; |
| 8113 | uint n = 0; |
| 8114 | uint bound_limit = bound ? RXBND : -1; |
| 8115 | |
| 8116 | BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); |
| 8117 | /* gather received frames */ |
| 8118 | while ((p = dma_rx(wlc_hw->di[fifo]))) { |
| 8119 | |
| 8120 | if (!tail) |
| 8121 | head = tail = p; |
| 8122 | else { |
| 8123 | tail->prev = p; |
| 8124 | tail = p; |
| 8125 | } |
| 8126 | |
| 8127 | /* !give others some time to run! */ |
| 8128 | if (++n >= bound_limit) |
| 8129 | break; |
| 8130 | } |
| 8131 | |
| 8132 | /* post more rbufs */ |
| 8133 | dma_rxfill(wlc_hw->di[fifo]); |
| 8134 | |
| 8135 | /* process each frame */ |
| 8136 | while ((p = head) != NULL) { |
| 8137 | struct d11rxhdr_le *rxh_le; |
| 8138 | struct d11rxhdr *rxh; |
| 8139 | head = head->prev; |
| 8140 | p->prev = NULL; |
| 8141 | |
| 8142 | rxh_le = (struct d11rxhdr_le *)p->data; |
| 8143 | rxh = (struct d11rxhdr *)p->data; |
| 8144 | |
| 8145 | /* fixup rx header endianness */ |
| 8146 | rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize); |
| 8147 | rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0); |
| 8148 | rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1); |
| 8149 | rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2); |
| 8150 | rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3); |
| 8151 | rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4); |
| 8152 | rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5); |
| 8153 | rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1); |
| 8154 | rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2); |
| 8155 | rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime); |
| 8156 | rxh->RxChan = le16_to_cpu(rxh_le->RxChan); |
| 8157 | |
| 8158 | brcms_c_recv(wlc_hw->wlc, p); |
| 8159 | } |
| 8160 | |
| 8161 | return n >= bound_limit; |
| 8162 | } |
| 8163 | |
| 8164 | /* second-level interrupt processing |
| 8165 | * Return true if another dpc needs to be re-scheduled. false otherwise. |
| 8166 | * Param 'bounded' indicates if applicable loops should be bounded. |
| 8167 | */ |
| 8168 | bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded) |
| 8169 | { |
| 8170 | u32 macintstatus; |
| 8171 | struct brcms_hardware *wlc_hw = wlc->hw; |
| 8172 | struct d11regs __iomem *regs = wlc_hw->regs; |
| 8173 | struct wiphy *wiphy = wlc->wiphy; |
| 8174 | |
| 8175 | if (brcms_deviceremoved(wlc)) { |
| 8176 | wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, |
| 8177 | __func__); |
| 8178 | brcms_down(wlc->wl); |
| 8179 | return false; |
| 8180 | } |
| 8181 | |
| 8182 | /* grab and clear the saved software intstatus bits */ |
| 8183 | macintstatus = wlc->macintstatus; |
| 8184 | wlc->macintstatus = 0; |
| 8185 | |
| 8186 | BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n", |
| 8187 | wlc_hw->unit, macintstatus); |
| 8188 | |
| 8189 | WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */ |
| 8190 | |
| 8191 | /* tx status */ |
| 8192 | if (macintstatus & MI_TFS) { |
| 8193 | bool fatal; |
| 8194 | if (brcms_b_txstatus(wlc->hw, bounded, &fatal)) |
| 8195 | wlc->macintstatus |= MI_TFS; |
| 8196 | if (fatal) { |
| 8197 | wiphy_err(wiphy, "MI_TFS: fatal\n"); |
| 8198 | goto fatal; |
| 8199 | } |
| 8200 | } |
| 8201 | |
| 8202 | if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) |
| 8203 | brcms_c_tbtt(wlc); |
| 8204 | |
| 8205 | /* ATIM window end */ |
| 8206 | if (macintstatus & MI_ATIMWINEND) { |
| 8207 | BCMMSG(wlc->wiphy, "end of ATIM window\n"); |
| 8208 | OR_REG(®s->maccommand, wlc->qvalid); |
| 8209 | wlc->qvalid = 0; |
| 8210 | } |
| 8211 | |
| 8212 | /* |
| 8213 | * received data or control frame, MI_DMAINT is |
| 8214 | * indication of RX_FIFO interrupt |
| 8215 | */ |
| 8216 | if (macintstatus & MI_DMAINT) |
| 8217 | if (brcms_b_recv(wlc_hw, RX_FIFO, bounded)) |
| 8218 | wlc->macintstatus |= MI_DMAINT; |
| 8219 | |
| 8220 | /* noise sample collected */ |
| 8221 | if (macintstatus & MI_BG_NOISE) |
| 8222 | wlc_phy_noise_sample_intr(wlc_hw->band->pi); |
| 8223 | |
| 8224 | if (macintstatus & MI_GP0) { |
| 8225 | wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d " |
| 8226 | "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now); |
| 8227 | |
| 8228 | printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", |
| 8229 | __func__, wlc_hw->sih->chip, |
| 8230 | wlc_hw->sih->chiprev); |
Roland Vossen | c261bdf | 2011-10-18 14:03:04 +0200 | [diff] [blame] | 8231 | brcms_fatal_error(wlc_hw->wlc->wl); |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8232 | } |
| 8233 | |
| 8234 | /* gptimer timeout */ |
| 8235 | if (macintstatus & MI_TO) |
| 8236 | W_REG(®s->gptimer, 0); |
| 8237 | |
| 8238 | if (macintstatus & MI_RFDISABLE) { |
| 8239 | BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" |
| 8240 | " RF Disable Input\n", wlc_hw->unit); |
| 8241 | brcms_rfkill_set_hw_state(wlc->wl); |
| 8242 | } |
| 8243 | |
| 8244 | /* send any enq'd tx packets. Just makes sure to jump start tx */ |
| 8245 | if (!pktq_empty(&wlc->pkt_queue->q)) |
| 8246 | brcms_c_send_q(wlc); |
| 8247 | |
| 8248 | /* it isn't done and needs to be resched if macintstatus is non-zero */ |
| 8249 | return wlc->macintstatus != 0; |
| 8250 | |
| 8251 | fatal: |
Roland Vossen | c261bdf | 2011-10-18 14:03:04 +0200 | [diff] [blame] | 8252 | brcms_fatal_error(wlc_hw->wlc->wl); |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8253 | return wlc->macintstatus != 0; |
| 8254 | } |
| 8255 | |
| 8256 | void brcms_c_init(struct brcms_c_info *wlc) |
| 8257 | { |
| 8258 | struct d11regs __iomem *regs; |
| 8259 | u16 chanspec; |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 8260 | bool mute_tx = false; |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8261 | |
| 8262 | BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); |
| 8263 | |
| 8264 | regs = wlc->regs; |
| 8265 | |
| 8266 | /* |
| 8267 | * This will happen if a big-hammer was executed. In |
| 8268 | * that case, we want to go back to the channel that |
| 8269 | * we were on and not new channel |
| 8270 | */ |
| 8271 | if (wlc->pub->associated) |
| 8272 | chanspec = wlc->home_chanspec; |
| 8273 | else |
| 8274 | chanspec = brcms_c_init_chanspec(wlc); |
| 8275 | |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 8276 | brcms_b_init(wlc->hw, chanspec); |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8277 | |
| 8278 | /* update beacon listen interval */ |
| 8279 | brcms_c_bcn_li_upd(wlc); |
| 8280 | |
| 8281 | /* write ethernet address to core */ |
| 8282 | brcms_c_set_mac(wlc->bsscfg); |
| 8283 | brcms_c_set_bssid(wlc->bsscfg); |
| 8284 | |
| 8285 | /* Update tsf_cfprep if associated and up */ |
| 8286 | if (wlc->pub->associated && wlc->bsscfg->up) { |
| 8287 | u32 bi; |
| 8288 | |
| 8289 | /* get beacon period and convert to uS */ |
| 8290 | bi = wlc->bsscfg->current_bss->beacon_period << 10; |
| 8291 | /* |
| 8292 | * update since init path would reset |
| 8293 | * to default value |
| 8294 | */ |
| 8295 | W_REG(®s->tsf_cfprep, |
| 8296 | (bi << CFPREP_CBI_SHIFT)); |
| 8297 | |
| 8298 | /* Update maccontrol PM related bits */ |
| 8299 | brcms_c_set_ps_ctrl(wlc); |
| 8300 | } |
| 8301 | |
| 8302 | brcms_c_bandinit_ordered(wlc, chanspec); |
| 8303 | |
| 8304 | /* init probe response timeout */ |
| 8305 | brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout); |
| 8306 | |
| 8307 | /* init max burst txop (framebursting) */ |
| 8308 | brcms_b_write_shm(wlc->hw, M_MBURST_TXOP, |
| 8309 | (wlc-> |
| 8310 | _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP)); |
| 8311 | |
| 8312 | /* initialize maximum allowed duty cycle */ |
| 8313 | brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); |
| 8314 | brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); |
| 8315 | |
| 8316 | /* |
| 8317 | * Update some shared memory locations related to |
| 8318 | * max AMPDU size allowed to received |
| 8319 | */ |
| 8320 | brcms_c_ampdu_shm_upd(wlc->ampdu); |
| 8321 | |
| 8322 | /* band-specific inits */ |
| 8323 | brcms_c_bsinit(wlc); |
| 8324 | |
| 8325 | /* Enable EDCF mode (while the MAC is suspended) */ |
| 8326 | OR_REG(®s->ifs_ctl, IFS_USEEDCF); |
| 8327 | brcms_c_edcf_setparams(wlc, false); |
| 8328 | |
| 8329 | /* Init precedence maps for empty FIFOs */ |
| 8330 | brcms_c_tx_prec_map_init(wlc); |
| 8331 | |
| 8332 | /* read the ucode version if we have not yet done so */ |
| 8333 | if (wlc->ucode_rev == 0) { |
| 8334 | wlc->ucode_rev = |
| 8335 | brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16); |
| 8336 | wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR); |
| 8337 | } |
| 8338 | |
| 8339 | /* ..now really unleash hell (allow the MAC out of suspend) */ |
| 8340 | brcms_c_enable_mac(wlc); |
| 8341 | |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 8342 | /* suspend the tx fifos and mute the phy for preism cac time */ |
| 8343 | if (mute_tx) |
Roland Vossen | c6c4489 | 2011-10-21 16:16:26 +0200 | [diff] [blame^] | 8344 | brcms_b_mute(wlc->hw, true); |
Roland Vossen | a8bc491 | 2011-10-21 16:16:25 +0200 | [diff] [blame] | 8345 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8346 | /* clear tx flow control */ |
| 8347 | brcms_c_txflowcontrol_reset(wlc); |
| 8348 | |
| 8349 | /* enable the RF Disable Delay timer */ |
| 8350 | W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT); |
| 8351 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8352 | /* |
| 8353 | * Initialize WME parameters; if they haven't been set by some other |
| 8354 | * mechanism (IOVar, etc) then read them from the hardware. |
| 8355 | */ |
| 8356 | if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) { |
| 8357 | /* Uninitialized; read from HW */ |
| 8358 | int ac; |
| 8359 | |
| 8360 | for (ac = 0; ac < AC_COUNT; ac++) |
| 8361 | wlc->wme_retries[ac] = |
| 8362 | brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac)); |
| 8363 | } |
| 8364 | } |
| 8365 | |
| 8366 | /* |
| 8367 | * The common driver entry routine. Error codes should be unique |
| 8368 | */ |
| 8369 | struct brcms_c_info * |
| 8370 | brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, |
| 8371 | bool piomode, void __iomem *regsva, struct pci_dev *btparam, |
| 8372 | uint *perr) |
| 8373 | { |
| 8374 | struct brcms_c_info *wlc; |
| 8375 | uint err = 0; |
| 8376 | uint i, j; |
| 8377 | struct brcms_pub *pub; |
| 8378 | |
| 8379 | /* allocate struct brcms_c_info state and its substructures */ |
| 8380 | wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device); |
| 8381 | if (wlc == NULL) |
| 8382 | goto fail; |
| 8383 | wlc->wiphy = wl->wiphy; |
| 8384 | pub = wlc->pub; |
| 8385 | |
| 8386 | #if defined(BCMDBG) |
| 8387 | wlc_info_dbg = wlc; |
| 8388 | #endif |
| 8389 | |
| 8390 | wlc->band = wlc->bandstate[0]; |
| 8391 | wlc->core = wlc->corestate; |
| 8392 | wlc->wl = wl; |
| 8393 | pub->unit = unit; |
| 8394 | pub->_piomode = piomode; |
| 8395 | wlc->bandinit_pending = false; |
| 8396 | |
| 8397 | /* populate struct brcms_c_info with default values */ |
| 8398 | brcms_c_info_init(wlc, unit); |
| 8399 | |
| 8400 | /* update sta/ap related parameters */ |
| 8401 | brcms_c_ap_upd(wlc); |
| 8402 | |
| 8403 | /* |
| 8404 | * low level attach steps(all hw accesses go |
| 8405 | * inside, no more in rest of the attach) |
| 8406 | */ |
| 8407 | err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva, |
| 8408 | btparam); |
| 8409 | if (err) |
| 8410 | goto fail; |
| 8411 | |
| 8412 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF); |
| 8413 | |
| 8414 | pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band); |
| 8415 | |
| 8416 | /* disable allowed duty cycle */ |
| 8417 | wlc->tx_duty_cycle_ofdm = 0; |
| 8418 | wlc->tx_duty_cycle_cck = 0; |
| 8419 | |
| 8420 | brcms_c_stf_phy_chain_calc(wlc); |
| 8421 | |
| 8422 | /* txchain 1: txant 0, txchain 2: txant 1 */ |
| 8423 | if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) |
| 8424 | wlc->stf->txant = wlc->stf->hw_txchain - 1; |
| 8425 | |
| 8426 | /* push to BMAC driver */ |
| 8427 | wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain, |
| 8428 | wlc->stf->hw_rxchain); |
| 8429 | |
| 8430 | /* pull up some info resulting from the low attach */ |
| 8431 | for (i = 0; i < NFIFO; i++) |
| 8432 | wlc->core->txavail[i] = wlc->hw->txavail[i]; |
| 8433 | |
| 8434 | memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN); |
| 8435 | memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN); |
| 8436 | |
| 8437 | for (j = 0; j < wlc->pub->_nbands; j++) { |
| 8438 | wlc->band = wlc->bandstate[j]; |
| 8439 | |
| 8440 | if (!brcms_c_attach_stf_ant_init(wlc)) { |
| 8441 | err = 24; |
| 8442 | goto fail; |
| 8443 | } |
| 8444 | |
| 8445 | /* default contention windows size limits */ |
| 8446 | wlc->band->CWmin = APHY_CWMIN; |
| 8447 | wlc->band->CWmax = PHY_CWMAX; |
| 8448 | |
| 8449 | /* init gmode value */ |
| 8450 | if (wlc->band->bandtype == BRCM_BAND_2G) { |
| 8451 | wlc->band->gmode = GMODE_AUTO; |
| 8452 | brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, |
| 8453 | wlc->band->gmode); |
| 8454 | } |
| 8455 | |
| 8456 | /* init _n_enab supported mode */ |
| 8457 | if (BRCMS_PHY_11N_CAP(wlc->band)) { |
| 8458 | pub->_n_enab = SUPPORT_11N; |
| 8459 | brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER, |
| 8460 | ((pub->_n_enab == |
| 8461 | SUPPORT_11N) ? WL_11N_2x2 : |
| 8462 | WL_11N_3x3)); |
| 8463 | } |
| 8464 | |
| 8465 | /* init per-band default rateset, depend on band->gmode */ |
| 8466 | brcms_default_rateset(wlc, &wlc->band->defrateset); |
| 8467 | |
| 8468 | /* fill in hw_rateset */ |
| 8469 | brcms_c_rateset_filter(&wlc->band->defrateset, |
| 8470 | &wlc->band->hw_rateset, false, |
| 8471 | BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK, |
| 8472 | (bool) (wlc->pub->_n_enab & SUPPORT_11N)); |
| 8473 | } |
| 8474 | |
| 8475 | /* |
| 8476 | * update antenna config due to |
| 8477 | * wlc->stf->txant/txchain/ant_rx_ovr change |
| 8478 | */ |
| 8479 | brcms_c_stf_phy_txant_upd(wlc); |
| 8480 | |
| 8481 | /* attach each modules */ |
| 8482 | err = brcms_c_attach_module(wlc); |
| 8483 | if (err != 0) |
| 8484 | goto fail; |
| 8485 | |
| 8486 | if (!brcms_c_timers_init(wlc, unit)) { |
| 8487 | wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit, |
| 8488 | __func__); |
| 8489 | err = 32; |
| 8490 | goto fail; |
| 8491 | } |
| 8492 | |
| 8493 | /* depend on rateset, gmode */ |
| 8494 | wlc->cmi = brcms_c_channel_mgr_attach(wlc); |
| 8495 | if (!wlc->cmi) { |
| 8496 | wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed" |
| 8497 | "\n", unit, __func__); |
| 8498 | err = 33; |
| 8499 | goto fail; |
| 8500 | } |
| 8501 | |
| 8502 | /* init default when all parameters are ready, i.e. ->rateset */ |
| 8503 | brcms_c_bss_default_init(wlc); |
| 8504 | |
| 8505 | /* |
| 8506 | * Complete the wlc default state initializations.. |
| 8507 | */ |
| 8508 | |
| 8509 | /* allocate our initial queue */ |
| 8510 | wlc->pkt_queue = brcms_c_txq_alloc(wlc); |
| 8511 | if (wlc->pkt_queue == NULL) { |
| 8512 | wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n", |
| 8513 | unit, __func__); |
| 8514 | err = 100; |
| 8515 | goto fail; |
| 8516 | } |
| 8517 | |
| 8518 | wlc->bsscfg->wlc = wlc; |
| 8519 | |
| 8520 | wlc->mimoft = FT_HT; |
| 8521 | wlc->mimo_40txbw = AUTO; |
| 8522 | wlc->ofdm_40txbw = AUTO; |
| 8523 | wlc->cck_40txbw = AUTO; |
| 8524 | brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G); |
| 8525 | |
| 8526 | /* Set default values of SGI */ |
| 8527 | if (BRCMS_SGI_CAP_PHY(wlc)) { |
| 8528 | brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 | |
| 8529 | BRCMS_N_SGI_40)); |
| 8530 | } else if (BRCMS_ISSSLPNPHY(wlc->band)) { |
| 8531 | brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 | |
| 8532 | BRCMS_N_SGI_40)); |
| 8533 | } else { |
| 8534 | brcms_c_ht_update_sgi_rx(wlc, 0); |
| 8535 | } |
| 8536 | |
Alwin Beukers | 94bdc2a | 2011-10-12 20:51:13 +0200 | [diff] [blame] | 8537 | brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail); |
| 8538 | |
| 8539 | if (perr) |
| 8540 | *perr = 0; |
| 8541 | |
| 8542 | return wlc; |
| 8543 | |
| 8544 | fail: |
| 8545 | wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n", |
| 8546 | unit, __func__, err); |
| 8547 | if (wlc) |
| 8548 | brcms_c_detach(wlc); |
| 8549 | |
| 8550 | if (perr) |
| 8551 | *perr = err; |
| 8552 | return NULL; |
| 8553 | } |