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Dong Aishengae75ff82012-04-27 20:26:16 +08001/*
2 * IMX pinmux core definitions
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef __DRIVERS_PINCTRL_IMX_H
16#define __DRIVERS_PINCTRL_IMX_H
17
18struct platform_device;
19
20/**
Sascha Hauer8f903f82013-07-28 16:29:22 +020021 * struct imx_pin_group - describes a single i.MX pin
22 * @pin: the pin_id of this pin
23 * @mux_mode: the mux mode for this pin.
24 * @input_reg: the select input register offset for this pin if any
25 * 0 if no select input setting needed.
26 * @input_val: the select input value for this pin.
27 * @configs: the config for this pin.
28 */
29struct imx_pin {
30 unsigned int pin;
31 unsigned int mux_mode;
32 u16 input_reg;
33 unsigned int input_val;
34 unsigned long config;
35};
36
37/**
Dong Aishengae75ff82012-04-27 20:26:16 +080038 * struct imx_pin_group - describes an IMX pin group
39 * @name: the name of this specific pin group
Dong Aishengae75ff82012-04-27 20:26:16 +080040 * @npins: the number of pins in this group array, i.e. the number of
41 * elements in .pins so we can iterate over that array
Sascha Hauer8f903f82013-07-28 16:29:22 +020042 * @pin_ids: array of pin_ids. pinctrl forces us to maintain such an array
43 * @pins: array of pins
Dong Aishengae75ff82012-04-27 20:26:16 +080044 */
45struct imx_pin_group {
46 const char *name;
Dong Aishengae75ff82012-04-27 20:26:16 +080047 unsigned npins;
Sascha Hauer8f903f82013-07-28 16:29:22 +020048 unsigned int *pin_ids;
49 struct imx_pin *pins;
Dong Aishengae75ff82012-04-27 20:26:16 +080050};
51
52/**
53 * struct imx_pmx_func - describes IMX pinmux functions
54 * @name: the name of this specific function
55 * @groups: corresponding pin groups
56 * @num_groups: the number of groups
57 */
58struct imx_pmx_func {
59 const char *name;
60 const char **groups;
61 unsigned num_groups;
62};
63
64/**
65 * struct imx_pin_reg - describe a pin reg map
Dong Aishengae75ff82012-04-27 20:26:16 +080066 * @mux_reg: mux register offset
67 * @conf_reg: config register offset
Dong Aishengae75ff82012-04-27 20:26:16 +080068 */
69struct imx_pin_reg {
Dong Aishengae75ff82012-04-27 20:26:16 +080070 u16 mux_reg;
71 u16 conf_reg;
Dong Aishengae75ff82012-04-27 20:26:16 +080072};
73
74struct imx_pinctrl_soc_info {
75 struct device *dev;
76 const struct pinctrl_pin_desc *pins;
77 unsigned int npins;
Shawn Guoe1641532013-02-20 10:32:52 +080078 struct imx_pin_reg *pin_regs;
Dong Aishengae75ff82012-04-27 20:26:16 +080079 struct imx_pin_group *groups;
80 unsigned int ngroups;
81 struct imx_pmx_func *functions;
82 unsigned int nfunctions;
Jingchang Lubf5a5302013-05-28 17:32:07 +080083 unsigned int flags;
Dong Aishengae75ff82012-04-27 20:26:16 +080084};
85
Jingchang Lubf5a5302013-05-28 17:32:07 +080086#define ZERO_OFFSET_VALID 0x1
87#define SHARE_MUX_CONF_REG 0x2
88
Dong Aishengae75ff82012-04-27 20:26:16 +080089#define NO_MUX 0x0
90#define NO_PAD 0x0
91
Dong Aishengae75ff82012-04-27 20:26:16 +080092#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
93
94#define PAD_CTL_MASK(len) ((1 << len) - 1)
95#define IMX_MUX_MASK 0x7
96#define IOMUXC_CONFIG_SION (0x1 << 4)
97
98int imx_pinctrl_probe(struct platform_device *pdev,
99 struct imx_pinctrl_soc_info *info);
100int imx_pinctrl_remove(struct platform_device *pdev);
101#endif /* __DRIVERS_PINCTRL_IMX_H */