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Arnd Bergmann5d0769f2012-03-02 23:07:21 +00001/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
Linus Walleij90c40252013-05-29 19:15:39 +020012#include <dt-bindings/interrupt-controller/irq.h>
Lee Jones841cd0c2013-09-18 09:53:10 +010013#include <dt-bindings/mfd/dbx500-prcmu.h>
Gabriel Fernandez807e8832013-05-27 15:30:53 +020014#include "skeleton.dtsi"
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000015
16/ {
Gabriel Fernandezb1ba1432013-03-01 14:38:07 +010017 soc {
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000018 #address-cells = <1>;
19 #size-cells = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +000020 compatible = "stericsson,db8500";
Lee Jonesdab64872012-03-07 17:22:30 +000021 interrupt-parent = <&intc>;
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000022 ranges;
Lee Jones7e0ce272012-03-15 16:46:17 +000023
Lee Jonesdab64872012-03-07 17:22:30 +000024 intc: interrupt-controller@a0411000 {
25 compatible = "arm,cortex-a9-gic";
26 #interrupt-cells = <3>;
27 #address-cells = <1>;
28 interrupt-controller;
Lee Jonesdab64872012-03-07 17:22:30 +000029 reg = <0xa0411000 0x1000>,
30 <0xa0410100 0x100>;
31 };
32
Lee Jonesf1949ea2012-03-08 09:02:02 +000033 L2: l2-cache {
34 compatible = "arm,pl310-cache";
35 reg = <0xa0412000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +020036 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesf1949ea2012-03-08 09:02:02 +000037 cache-unified;
38 cache-level = <2>;
39 };
40
Lee Jones7e0ce272012-03-15 16:46:17 +000041 pmu {
42 compatible = "arm,cortex-a9-pmu";
Linus Walleij90c40252013-05-29 19:15:39 +020043 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones7e0ce272012-03-15 16:46:17 +000044 };
45
Lee Jones8132ed12013-09-18 09:54:07 +010046
Lee Jones841cd0c2013-09-18 09:53:10 +010047 clocks {
48 compatible = "stericsson,u8500-clks";
49
50 prcmu_clk: prcmu-clock {
51 #clock-cells = <1>;
52 };
Lee Jonesfcbe5e92013-06-06 10:51:04 +010053
54 prcc_pclk: prcc-periph-clock {
55 #clock-cells = <2>;
56 };
Lee Jones2588fea2013-06-06 10:52:50 +010057
58 prcc_kclk: prcc-kernel-clock {
59 #clock-cells = <2>;
60 };
Lee Jones589d9832013-06-06 10:54:27 +010061
62 rtc_clk: rtc32k-clock {
63 #clock-cells = <0>;
64 };
Lee Jones309012d2013-06-06 10:54:48 +010065
66 smp_twd_clk: smp-twd-clock {
67 #clock-cells = <0>;
68 };
Lee Jones841cd0c2013-09-18 09:53:10 +010069 };
70
Lee Jones8132ed12013-09-18 09:54:07 +010071 mtu@a03c6000 {
72 /* Nomadik System Timer */
73 compatible = "st,nomadik-mtu";
74 reg = <0xa03c6000 0x1000>;
75 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
76
77 clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
78 clock-names = "timclk", "apb_pclk";
79 };
80
Lee Jones71de5c42012-03-16 09:53:24 +000081 timer@a0410600 {
82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0xa0410600 0x20>;
Linus Walleij90c40252013-05-29 19:15:39 +020084 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
Lee Jonesa8acb1e2013-06-05 12:26:52 +010085
86 clocks = <&smp_twd_clk>;
Lee Jones71de5c42012-03-16 09:53:24 +000087 };
88
Lee Jones7e0ce272012-03-15 16:46:17 +000089 rtc@80154000 {
Lee Jonesddb3b992012-05-26 07:01:31 +010090 compatible = "arm,rtc-pl031", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +000091 reg = <0x80154000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +020092 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesd299b5a2013-06-05 12:27:24 +010093
94 clocks = <&rtc_clk>;
95 clock-names = "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +000096 };
97
98 gpio0: gpio@8012e000 {
99 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100100 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000101 reg = <0x8012e000 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200102 interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800103 interrupt-controller;
104 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100105 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000106 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100107 #gpio-cells = <2>;
108 gpio-bank = <0>;
Lee Jones9d891072013-06-03 13:07:51 +0100109
110 clocks = <&prcc_pclk 1 9>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000111 };
112
113 gpio1: gpio@8012e080 {
114 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100115 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000116 reg = <0x8012e080 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200117 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800118 interrupt-controller;
119 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100120 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000121 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100122 #gpio-cells = <2>;
123 gpio-bank = <1>;
Lee Jones9d891072013-06-03 13:07:51 +0100124
125 clocks = <&prcc_pclk 1 9>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000126 };
127
128 gpio2: gpio@8000e000 {
129 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100130 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000131 reg = <0x8000e000 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200132 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800133 interrupt-controller;
134 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100135 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000136 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100137 #gpio-cells = <2>;
138 gpio-bank = <2>;
Lee Jones9d891072013-06-03 13:07:51 +0100139
140 clocks = <&prcc_pclk 3 8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000141 };
142
143 gpio3: gpio@8000e080 {
144 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100145 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000146 reg = <0x8000e080 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200147 interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800148 interrupt-controller;
149 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100150 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000151 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100152 #gpio-cells = <2>;
153 gpio-bank = <3>;
Lee Jones9d891072013-06-03 13:07:51 +0100154
155 clocks = <&prcc_pclk 3 8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000156 };
157
158 gpio4: gpio@8000e100 {
159 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100160 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000161 reg = <0x8000e100 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200162 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800163 interrupt-controller;
164 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100165 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000166 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100167 #gpio-cells = <2>;
168 gpio-bank = <4>;
Lee Jones9d891072013-06-03 13:07:51 +0100169
170 clocks = <&prcc_pclk 3 8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000171 };
172
173 gpio5: gpio@8000e180 {
174 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100175 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000176 reg = <0x8000e180 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200177 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800178 interrupt-controller;
179 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100180 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000181 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100182 #gpio-cells = <2>;
183 gpio-bank = <5>;
Lee Jones9d891072013-06-03 13:07:51 +0100184
185 clocks = <&prcc_pclk 3 8>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000186 };
187
188 gpio6: gpio@8011e000 {
189 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100190 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000191 reg = <0x8011e000 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200192 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800193 interrupt-controller;
194 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100195 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000196 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100197 #gpio-cells = <2>;
198 gpio-bank = <6>;
Lee Jones9d891072013-06-03 13:07:51 +0100199
Linus Walleijd5916402013-10-18 09:49:21 +0200200 clocks = <&prcc_pclk 2 11>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000201 };
202
203 gpio7: gpio@8011e080 {
204 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100205 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000206 reg = <0x8011e080 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200207 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800208 interrupt-controller;
209 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100210 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000211 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100212 #gpio-cells = <2>;
213 gpio-bank = <7>;
Lee Jones9d891072013-06-03 13:07:51 +0100214
Linus Walleijd5916402013-10-18 09:49:21 +0200215 clocks = <&prcc_pclk 2 11>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000216 };
217
218 gpio8: gpio@a03fe000 {
219 compatible = "stericsson,db8500-gpio",
Lee Jonesfd9a80b2012-04-13 15:05:03 +0100220 "st,nomadik-gpio";
Lee Jones7e0ce272012-03-15 16:46:17 +0000221 reg = <0xa03fe000 0x80>;
Linus Walleij90c40252013-05-29 19:15:39 +0200222 interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones93b56982012-05-29 14:17:36 +0800223 interrupt-controller;
224 #interrupt-cells = <2>;
Lee Jones61be4982012-06-14 11:16:03 +0100225 st,supports-sleepmode;
Lee Jones7e0ce272012-03-15 16:46:17 +0000226 gpio-controller;
Lee Jonesc0b133b2012-04-13 15:05:05 +0100227 #gpio-cells = <2>;
228 gpio-bank = <8>;
Lee Jones9d891072013-06-03 13:07:51 +0100229
Linus Walleij84873cb2013-10-18 09:45:07 +0200230 clocks = <&prcc_pclk 5 1>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000231 };
232
Lee Jones8979cfe2013-01-11 15:45:28 +0000233 pinctrl {
Lee Jones818d99a2013-05-22 15:22:55 +0100234 compatible = "stericsson,db8500-pinctrl";
Lee Jones8979cfe2013-01-11 15:45:28 +0000235 prcm = <&prcmu>;
Lee Jones5910de92012-05-26 06:25:36 +0100236 };
237
Lee Jonesb32dc862013-05-03 15:31:51 +0100238 usb_per5@a03e0000 {
Sebastian Andrzej Siewior4a6cd432013-08-20 18:40:27 +0200239 compatible = "stericsson,db8500-musb";
Lee Jones7e0ce272012-03-15 16:46:17 +0000240 reg = <0xa03e0000 0x10000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200241 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesb32dc862013-05-03 15:31:51 +0100242 interrupt-names = "mc";
243
244 dr_mode = "otg";
245
246 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
247 <&dma 38 0 0x0>, /* Logical - MemToDev */
248 <&dma 37 0 0x2>, /* Logical - DevToMem */
249 <&dma 37 0 0x0>, /* Logical - MemToDev */
250 <&dma 36 0 0x2>, /* Logical - DevToMem */
251 <&dma 36 0 0x0>, /* Logical - MemToDev */
252 <&dma 19 0 0x2>, /* Logical - DevToMem */
253 <&dma 19 0 0x0>, /* Logical - MemToDev */
254 <&dma 18 0 0x2>, /* Logical - DevToMem */
255 <&dma 18 0 0x0>, /* Logical - MemToDev */
256 <&dma 17 0 0x2>, /* Logical - DevToMem */
257 <&dma 17 0 0x0>, /* Logical - MemToDev */
258 <&dma 16 0 0x2>, /* Logical - DevToMem */
259 <&dma 16 0 0x0>, /* Logical - MemToDev */
260 <&dma 39 0 0x2>, /* Logical - DevToMem */
261 <&dma 39 0 0x0>; /* Logical - MemToDev */
262
263 dma-names = "iep_1_9", "oep_1_9",
264 "iep_2_10", "oep_2_10",
265 "iep_3_11", "oep_3_11",
266 "iep_4_12", "oep_4_12",
267 "iep_5_13", "oep_5_13",
268 "iep_6_14", "oep_6_14",
269 "iep_7_15", "oep_7_15",
270 "iep_8", "oep_8";
Lee Jonese47339f2013-06-03 13:08:26 +0100271
272 clocks = <&prcc_pclk 5 0>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000273 };
274
Lee Jonesba074ae2013-05-03 15:31:48 +0100275 dma: dma-controller@801C0000 {
276 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
Lee Jones7e0ce272012-03-15 16:46:17 +0000277 reg = <0x801C0000 0x1000 0x40010000 0x800>;
Lee Jones70d39a82013-05-03 15:31:47 +0100278 reg-names = "base", "lcpa";
Linus Walleij90c40252013-05-29 19:15:39 +0200279 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesba074ae2013-05-03 15:31:48 +0100280
281 #dma-cells = <3>;
Lee Jonesd37fcdb2013-05-03 15:31:52 +0100282 memcpy-channels = <56 57 58 59 60>;
Lee Jonese064cb22013-06-03 13:13:54 +0100283
284 clocks = <&prcmu_clk PRCMU_DMACLK>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000285 };
286
Lee Jones8979cfe2013-01-11 15:45:28 +0000287 prcmu: prcmu@80157000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000288 compatible = "stericsson,db8500-prcmu";
Linus Torvalds4d26aa32013-05-02 08:56:55 -0700289 reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
Lee Jonese73081d2013-03-26 10:26:15 +0000290 reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
Linus Walleij90c40252013-05-29 19:15:39 +0200291 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000292 #address-cells = <1>;
Lee Jones3de3d742012-04-24 10:00:15 +0100293 #size-cells = <1>;
Lee Jonesc09090b2012-08-03 15:42:25 +0100294 interrupt-controller;
295 #interrupt-cells = <2>;
Lee Jones3de3d742012-04-24 10:00:15 +0100296 ranges;
297
Lee Jonesccf74f72012-05-28 16:50:49 +0800298 prcmu-timer-4@80157450 {
Lee Jones3de3d742012-04-24 10:00:15 +0100299 compatible = "stericsson,db8500-prcmu-timer-4";
300 reg = <0x80157450 0xC>;
301 };
Lee Jones7e0ce272012-03-15 16:46:17 +0000302
Lee Jones98585612013-09-18 16:07:44 +0100303 cpufreq {
304 compatible = "stericsson,cpufreq-ux500";
305 clocks = <&prcmu_clk PRCMU_ARMSS>;
306 clock-names = "armss";
307 status = "disabled";
308 };
309
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800310 thermal@801573c0 {
311 compatible = "stericsson,db8500-thermal";
312 reg = <0x801573c0 0x40>;
Linus Walleij90c40252013-05-29 19:15:39 +0200313 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
314 <22 IRQ_TYPE_LEVEL_HIGH>;
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800315 interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
316 status = "disabled";
Lee Jones1d3f99f2013-06-06 12:21:15 +0100317 };
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800318
Lee Jonese5999f22012-05-04 13:32:34 +0100319 db8500-prcmu-regulators {
320 compatible = "stericsson,db8500-prcmu-regulator";
321
322 // DB8500_REGULATOR_VAPE
323 db8500_vape_reg: db8500_vape {
Laxman Dewanganda268482012-06-20 17:53:05 +0530324 regulator-compatible = "db8500_vape";
Lee Jonese5999f22012-05-04 13:32:34 +0100325 regulator-always-on;
326 };
327
328 // DB8500_REGULATOR_VARM
329 db8500_varm_reg: db8500_varm {
Laxman Dewanganda268482012-06-20 17:53:05 +0530330 regulator-compatible = "db8500_varm";
Lee Jonese5999f22012-05-04 13:32:34 +0100331 };
332
333 // DB8500_REGULATOR_VMODEM
334 db8500_vmodem_reg: db8500_vmodem {
Laxman Dewanganda268482012-06-20 17:53:05 +0530335 regulator-compatible = "db8500_vmodem";
Lee Jonese5999f22012-05-04 13:32:34 +0100336 };
337
338 // DB8500_REGULATOR_VPLL
339 db8500_vpll_reg: db8500_vpll {
Laxman Dewanganda268482012-06-20 17:53:05 +0530340 regulator-compatible = "db8500_vpll";
Lee Jonese5999f22012-05-04 13:32:34 +0100341 };
342
343 // DB8500_REGULATOR_VSMPS1
344 db8500_vsmps1_reg: db8500_vsmps1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530345 regulator-compatible = "db8500_vsmps1";
Lee Jonese5999f22012-05-04 13:32:34 +0100346 };
347
348 // DB8500_REGULATOR_VSMPS2
349 db8500_vsmps2_reg: db8500_vsmps2 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530350 regulator-compatible = "db8500_vsmps2";
Lee Jonese5999f22012-05-04 13:32:34 +0100351 };
352
353 // DB8500_REGULATOR_VSMPS3
354 db8500_vsmps3_reg: db8500_vsmps3 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530355 regulator-compatible = "db8500_vsmps3";
Lee Jonese5999f22012-05-04 13:32:34 +0100356 };
357
358 // DB8500_REGULATOR_VRF1
359 db8500_vrf1_reg: db8500_vrf1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530360 regulator-compatible = "db8500_vrf1";
Lee Jonese5999f22012-05-04 13:32:34 +0100361 };
362
363 // DB8500_REGULATOR_SWITCH_SVAMMDSP
364 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
Laxman Dewanganda268482012-06-20 17:53:05 +0530365 regulator-compatible = "db8500_sva_mmdsp";
Lee Jonese5999f22012-05-04 13:32:34 +0100366 };
367
368 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
369 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530370 regulator-compatible = "db8500_sva_mmdsp_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100371 };
372
373 // DB8500_REGULATOR_SWITCH_SVAPIPE
374 db8500_sva_pipe_reg: db8500_sva_pipe {
Laxman Dewanganda268482012-06-20 17:53:05 +0530375 regulator-compatible = "db8500_sva_pipe";
Lee Jonese5999f22012-05-04 13:32:34 +0100376 };
377
378 // DB8500_REGULATOR_SWITCH_SIAMMDSP
379 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
Laxman Dewanganda268482012-06-20 17:53:05 +0530380 regulator-compatible = "db8500_sia_mmdsp";
Lee Jonese5999f22012-05-04 13:32:34 +0100381 };
382
383 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
384 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
Lee Jonese5999f22012-05-04 13:32:34 +0100385 };
386
387 // DB8500_REGULATOR_SWITCH_SIAPIPE
388 db8500_sia_pipe_reg: db8500_sia_pipe {
Laxman Dewanganda268482012-06-20 17:53:05 +0530389 regulator-compatible = "db8500_sia_pipe";
Lee Jonese5999f22012-05-04 13:32:34 +0100390 };
391
392 // DB8500_REGULATOR_SWITCH_SGA
393 db8500_sga_reg: db8500_sga {
Laxman Dewanganda268482012-06-20 17:53:05 +0530394 regulator-compatible = "db8500_sga";
Lee Jonese5999f22012-05-04 13:32:34 +0100395 vin-supply = <&db8500_vape_reg>;
396 };
397
398 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
399 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
Laxman Dewanganda268482012-06-20 17:53:05 +0530400 regulator-compatible = "db8500_b2r2_mcde";
Lee Jonese5999f22012-05-04 13:32:34 +0100401 vin-supply = <&db8500_vape_reg>;
402 };
403
404 // DB8500_REGULATOR_SWITCH_ESRAM12
405 db8500_esram12_reg: db8500_esram12 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530406 regulator-compatible = "db8500_esram12";
Lee Jonese5999f22012-05-04 13:32:34 +0100407 };
408
409 // DB8500_REGULATOR_SWITCH_ESRAM12RET
410 db8500_esram12_ret_reg: db8500_esram12_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530411 regulator-compatible = "db8500_esram12_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100412 };
413
414 // DB8500_REGULATOR_SWITCH_ESRAM34
415 db8500_esram34_reg: db8500_esram34 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530416 regulator-compatible = "db8500_esram34";
Lee Jonese5999f22012-05-04 13:32:34 +0100417 };
418
419 // DB8500_REGULATOR_SWITCH_ESRAM34RET
420 db8500_esram34_ret_reg: db8500_esram34_ret {
Laxman Dewanganda268482012-06-20 17:53:05 +0530421 regulator-compatible = "db8500_esram34_ret";
Lee Jonese5999f22012-05-04 13:32:34 +0100422 };
423 };
424
Arnd Bergmannd52701d32013-03-12 09:39:01 +0100425 ab8500 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000426 compatible = "stericsson,ab8500";
Lee Jones8d4c6d42012-08-03 20:37:35 +0100427 interrupt-parent = <&intc>;
Linus Walleij90c40252013-05-29 19:15:39 +0200428 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones732973c2012-05-29 10:49:33 +0800429 interrupt-controller;
430 #interrupt-cells = <2>;
Lee Jones4a85c7f2012-05-29 14:29:53 +0800431
Lee Jones348f3bc2013-06-18 09:51:57 +0100432 ab8500_gpio: ab8500-gpio {
433 gpio-controller;
434 #gpio-cells = <2>;
435 };
436
Lee Jonesd4b29ac2012-05-26 07:03:48 +0100437 ab8500-rtc {
438 compatible = "stericsson,ab8500-rtc";
Linus Walleij90c40252013-05-29 19:15:39 +0200439 interrupts = <17 IRQ_TYPE_LEVEL_HIGH
440 18 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesd4b29ac2012-05-26 07:03:48 +0100441 interrupt-names = "60S", "ALARM";
442 };
443
Lee Jones4eda9122012-05-28 16:59:26 +0800444 ab8500-gpadc {
445 compatible = "stericsson,ab8500-gpadc";
Linus Walleij90c40252013-05-29 19:15:39 +0200446 interrupts = <32 IRQ_TYPE_LEVEL_HIGH
447 39 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones4eda9122012-05-28 16:59:26 +0800448 interrupt-names = "HW_CONV_END", "SW_CONV_END";
449 vddadc-supply = <&ab8500_ldo_tvout_reg>;
450 };
451
Rajanikanth H.Ve0f1abe2012-11-18 18:45:41 -0800452 ab8500_battery: ab8500_battery {
453 stericsson,battery-type = "LIPO";
454 thermistor-on-batctrl;
455 };
456
457 ab8500_fg {
458 compatible = "stericsson,ab8500-fg";
459 battery = <&ab8500_battery>;
460 };
461
Rajanikanth H.Vbd9e8ab2012-11-18 19:16:58 -0800462 ab8500_btemp {
463 compatible = "stericsson,ab8500-btemp";
464 battery = <&ab8500_battery>;
465 };
466
Rajanikanth H.V4aef72d2012-11-18 19:17:47 -0800467 ab8500_charger {
468 compatible = "stericsson,ab8500-charger";
469 battery = <&ab8500_battery>;
470 vddadc-supply = <&ab8500_ldo_tvout_reg>;
471 };
472
Rajanikanth H.Va12810a2012-10-31 15:40:33 +0000473 ab8500_chargalg {
474 compatible = "stericsson,ab8500-chargalg";
475 battery = <&ab8500_battery>;
476 };
477
Rajanikanth H.Ve0f1abe2012-11-18 18:45:41 -0800478 ab8500_usb {
Lee Jonesee189ce2012-05-03 14:40:24 +0100479 compatible = "stericsson,ab8500-usb";
Linus Walleij90c40252013-05-29 19:15:39 +0200480 interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
481 96 IRQ_TYPE_LEVEL_HIGH
482 14 IRQ_TYPE_LEVEL_HIGH
483 15 IRQ_TYPE_LEVEL_HIGH
484 79 IRQ_TYPE_LEVEL_HIGH
485 74 IRQ_TYPE_LEVEL_HIGH
486 75 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesee189ce2012-05-03 14:40:24 +0100487 interrupt-names = "ID_WAKEUP_R",
488 "ID_WAKEUP_F",
489 "VBUS_DET_F",
490 "VBUS_DET_R",
491 "USB_LINK_STATUS",
492 "USB_ADP_PROBE_PLUG",
493 "USB_ADP_PROBE_UNPLUG";
Fabio Baltieri99b38ee2013-04-09 11:16:56 +0200494 vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
Lee Jonesee189ce2012-05-03 14:40:24 +0100495 v-ape-supply = <&db8500_vape_reg>;
496 musb_1v8-supply = <&db8500_vsmps2_reg>;
497 };
498
Lee Jones12cb7bd2012-05-02 08:45:40 +0100499 ab8500-ponkey {
Lee Jones74630702012-08-09 13:00:12 +0100500 compatible = "stericsson,ab8500-poweron-key";
Linus Walleij90c40252013-05-29 19:15:39 +0200501 interrupts = <6 IRQ_TYPE_LEVEL_HIGH
502 7 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones12cb7bd2012-05-02 08:45:40 +0100503 interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
504 };
505
Lee Jones401cd1b2012-05-03 12:53:55 +0100506 ab8500-sysctrl {
507 compatible = "stericsson,ab8500-sysctrl";
508 };
509
Lee Jones78451de2012-05-03 13:03:59 +0100510 ab8500-pwm {
511 compatible = "stericsson,ab8500-pwm";
512 };
513
Lee Jones215891e2012-05-01 16:11:19 +0100514 ab8500-debugfs {
515 compatible = "stericsson,ab8500-debug";
516 };
Lee Jones4a85c7f2012-05-29 14:29:53 +0800517
Lee Jones9c06af32012-07-25 12:50:13 +0100518 codec: ab8500-codec {
519 compatible = "stericsson,ab8500-codec";
520
Fabio Baltierif99808a62013-05-30 15:27:43 +0200521 V-AUD-supply = <&ab8500_ldo_audio_reg>;
522 V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
523 V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
524 V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
525
Lee Jones9c06af32012-07-25 12:50:13 +0100526 stericsson,earpeice-cmv = <950>; /* Units in mV. */
527 };
528
Lee Jones62ebfe62013-06-07 17:11:19 +0100529 ext_regulators: ab8500-ext-regulators {
530 compatible = "stericsson,ab8500-ext-regulator";
531
532 ab8500_ext1_reg: ab8500_ext1 {
533 regulator-compatible = "ab8500_ext1";
534 regulator-min-microvolt = <1800000>;
535 regulator-max-microvolt = <1800000>;
536 regulator-boot-on;
537 regulator-always-on;
538 };
539
540 ab8500_ext2_reg: ab8500_ext2 {
541 regulator-compatible = "ab8500_ext2";
542 regulator-min-microvolt = <1360000>;
543 regulator-max-microvolt = <1360000>;
544 regulator-boot-on;
545 regulator-always-on;
546 };
547
548 ab8500_ext3_reg: ab8500_ext3 {
549 regulator-compatible = "ab8500_ext3";
550 regulator-min-microvolt = <3400000>;
551 regulator-max-microvolt = <3400000>;
552 regulator-boot-on;
553 };
554 };
555
Lee Jones4a85c7f2012-05-29 14:29:53 +0800556 ab8500-regulators {
557 compatible = "stericsson,ab8500-regulator";
Lee Jones75f0999a2013-06-07 17:11:20 +0100558 vin-supply = <&ab8500_ext3_reg>;
Lee Jones4a85c7f2012-05-29 14:29:53 +0800559
560 // supplies to the display/camera
561 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530562 regulator-compatible = "ab8500_ldo_aux1";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800563 regulator-min-microvolt = <2500000>;
564 regulator-max-microvolt = <2900000>;
565 regulator-boot-on;
566 /* BUG: If turned off MMC will be affected. */
567 regulator-always-on;
568 };
569
570 // supplies to the on-board eMMC
571 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530572 regulator-compatible = "ab8500_ldo_aux2";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800573 regulator-min-microvolt = <1100000>;
574 regulator-max-microvolt = <3300000>;
575 };
576
577 // supply for VAUX3; SDcard slots
578 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530579 regulator-compatible = "ab8500_ldo_aux3";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800580 regulator-min-microvolt = <1100000>;
581 regulator-max-microvolt = <3300000>;
582 };
583
584 // supply for v-intcore12; VINTCORE12 LDO
Fabio Baltieri99b38ee2013-04-09 11:16:56 +0200585 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
586 regulator-compatible = "ab8500_ldo_intcore";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800587 };
588
589 // supply for tvout; gpadc; TVOUT LDO
590 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
Laxman Dewanganda268482012-06-20 17:53:05 +0530591 regulator-compatible = "ab8500_ldo_tvout";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800592 };
593
594 // supply for ab8500-usb; USB LDO
595 ab8500_ldo_usb_reg: ab8500_ldo_usb {
Laxman Dewanganda268482012-06-20 17:53:05 +0530596 regulator-compatible = "ab8500_ldo_usb";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800597 };
598
599 // supply for ab8500-vaudio; VAUDIO LDO
600 ab8500_ldo_audio_reg: ab8500_ldo_audio {
Laxman Dewanganda268482012-06-20 17:53:05 +0530601 regulator-compatible = "ab8500_ldo_audio";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800602 };
603
Fabio Baltieri4aa44872013-05-30 15:27:41 +0200604 // supply for v-anamic1 VAMIC1 LDO
Lee Jones4a85c7f2012-05-29 14:29:53 +0800605 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
Laxman Dewanganda268482012-06-20 17:53:05 +0530606 regulator-compatible = "ab8500_ldo_anamic1";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800607 };
608
609 // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
Fabio Baltieri5510ed92013-05-30 15:27:42 +0200610 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
611 regulator-compatible = "ab8500_ldo_anamic2";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800612 };
613
614 // supply for v-dmic; VDMIC LDO
615 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
Laxman Dewanganda268482012-06-20 17:53:05 +0530616 regulator-compatible = "ab8500_ldo_dmic";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800617 };
618
619 // supply for U8500 CSI/DSI; VANA LDO
620 ab8500_ldo_ana_reg: ab8500_ldo_ana {
Laxman Dewanganda268482012-06-20 17:53:05 +0530621 regulator-compatible = "ab8500_ldo_ana";
Lee Jones4a85c7f2012-05-29 14:29:53 +0800622 };
623 };
Lee Jones7e0ce272012-03-15 16:46:17 +0000624 };
625 };
626
627 i2c@80004000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100628 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000629 reg = <0x80004000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200630 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones35b33d22012-10-24 11:07:02 +0100631
Lee Jones7e0ce272012-03-15 16:46:17 +0000632 #address-cells = <1>;
633 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100634 v-i2c-supply = <&db8500_vape_reg>;
635
636 clock-frequency = <400000>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100637 clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
638 clock-names = "i2cclk", "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +0000639 };
640
641 i2c@80122000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100642 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000643 reg = <0x80122000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200644 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones35b33d22012-10-24 11:07:02 +0100645
Lee Jones7e0ce272012-03-15 16:46:17 +0000646 #address-cells = <1>;
647 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100648 v-i2c-supply = <&db8500_vape_reg>;
649
650 clock-frequency = <400000>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100651
652 clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
653 clock-names = "i2cclk", "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +0000654 };
655
656 i2c@80128000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100657 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000658 reg = <0x80128000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200659 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones35b33d22012-10-24 11:07:02 +0100660
Lee Jones7e0ce272012-03-15 16:46:17 +0000661 #address-cells = <1>;
662 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100663 v-i2c-supply = <&db8500_vape_reg>;
664
665 clock-frequency = <400000>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100666
667 clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
668 clock-names = "i2cclk", "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +0000669 };
670
671 i2c@80110000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100672 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000673 reg = <0x80110000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200674 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones35b33d22012-10-24 11:07:02 +0100675
Lee Jones7e0ce272012-03-15 16:46:17 +0000676 #address-cells = <1>;
677 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100678 v-i2c-supply = <&db8500_vape_reg>;
679
680 clock-frequency = <400000>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100681
682 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
683 clock-names = "i2cclk", "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +0000684 };
685
686 i2c@8012a000 {
Lee Jonesd524fa72012-06-18 09:55:44 +0100687 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
Lee Jones7e0ce272012-03-15 16:46:17 +0000688 reg = <0x8012a000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200689 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones35b33d22012-10-24 11:07:02 +0100690
Lee Jones7e0ce272012-03-15 16:46:17 +0000691 #address-cells = <1>;
692 #size-cells = <0>;
Lee Jonesd524fa72012-06-18 09:55:44 +0100693 v-i2c-supply = <&db8500_vape_reg>;
694
695 clock-frequency = <400000>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100696
Linus Walleij72b3e242013-10-18 10:39:58 +0200697 clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
Lee Jonesafd653e2013-06-03 13:15:22 +0100698 clock-names = "i2cclk", "apb_pclk";
Lee Jones7e0ce272012-03-15 16:46:17 +0000699 };
700
701 ssp@80002000 {
702 compatible = "arm,pl022", "arm,primecell";
Lee Jonesc164fa62012-09-07 12:09:34 +0100703 reg = <0x80002000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200704 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones7e0ce272012-03-15 16:46:17 +0000705 #address-cells = <1>;
706 #size-cells = <0>;
Linus Walleij6e1484c2013-10-18 10:25:52 +0200707 clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100708 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200709 dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
710 <&dma 8 0 0x0>; /* Logical - MemToDev */
711 dma-names = "rx", "tx";
712 };
713
714 ssp@80003000 {
715 compatible = "arm,pl022", "arm,primecell";
716 reg = <0x80003000 0x1000>;
717 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
718 #address-cells = <1>;
719 #size-cells = <0>;
720 clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100721 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200722 dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
723 <&dma 9 0 0x0>; /* Logical - MemToDev */
724 dma-names = "rx", "tx";
725 };
726
727 spi@8011a000 {
728 compatible = "arm,pl022", "arm,primecell";
729 reg = <0x8011a000 0x1000>;
730 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
731 #address-cells = <1>;
732 #size-cells = <0>;
733 /* Same clock wired to kernel and pclk */
734 clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100735 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200736 dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
737 <&dma 0 0 0x0>; /* Logical - MemToDev */
738 dma-names = "rx", "tx";
739 };
740
741 spi@80112000 {
742 compatible = "arm,pl022", "arm,primecell";
743 reg = <0x80112000 0x1000>;
744 interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
745 #address-cells = <1>;
746 #size-cells = <0>;
747 /* Same clock wired to kernel and pclk */
748 clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100749 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200750 dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
751 <&dma 35 0 0x0>; /* Logical - MemToDev */
752 dma-names = "rx", "tx";
753 };
754
755 spi@80111000 {
756 compatible = "arm,pl022", "arm,primecell";
757 reg = <0x80111000 0x1000>;
758 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
759 #address-cells = <1>;
760 #size-cells = <0>;
761 /* Same clock wired to kernel and pclk */
762 clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100763 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200764 dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
765 <&dma 33 0 0x0>; /* Logical - MemToDev */
766 dma-names = "rx", "tx";
767 };
768
769 spi@80129000 {
770 compatible = "arm,pl022", "arm,primecell";
771 reg = <0x80129000 0x1000>;
772 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
773 #address-cells = <1>;
774 #size-cells = <0>;
775 /* Same clock wired to kernel and pclk */
776 clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>;
Linus Walleij80fbe302014-02-24 13:30:15 +0100777 clock-names = "SSPCLK", "apb_pclk";
Linus Walleij6e1484c2013-10-18 10:25:52 +0200778 dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
779 <&dma 40 0 0x0>; /* Logical - MemToDev */
780 dma-names = "rx", "tx";
Lee Jones7e0ce272012-03-15 16:46:17 +0000781 };
782
783 uart@80120000 {
784 compatible = "arm,pl011", "arm,primecell";
785 reg = <0x80120000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200786 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100787
788 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
789 <&dma 13 0 0x0>; /* Logical - MemToDev */
790 dma-names = "rx", "tx";
791
Lee Jones5a323fb2013-06-03 13:17:17 +0100792 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
793 clock-names = "uart", "apb_pclk";
794
Lee Jones7e0ce272012-03-15 16:46:17 +0000795 status = "disabled";
796 };
Lee Jonesfbff01c2013-05-03 15:31:49 +0100797
Lee Jones7e0ce272012-03-15 16:46:17 +0000798 uart@80121000 {
799 compatible = "arm,pl011", "arm,primecell";
800 reg = <0x80121000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200801 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100802
803 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
804 <&dma 12 0 0x0>; /* Logical - MemToDev */
805 dma-names = "rx", "tx";
806
Lee Jones5a323fb2013-06-03 13:17:17 +0100807 clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
808 clock-names = "uart", "apb_pclk";
809
Lee Jones7e0ce272012-03-15 16:46:17 +0000810 status = "disabled";
811 };
Lee Jonesfbff01c2013-05-03 15:31:49 +0100812
Lee Jones7e0ce272012-03-15 16:46:17 +0000813 uart@80007000 {
814 compatible = "arm,pl011", "arm,primecell";
815 reg = <0x80007000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200816 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfbff01c2013-05-03 15:31:49 +0100817
818 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
819 <&dma 11 0 0x0>; /* Logical - MemToDev */
820 dma-names = "rx", "tx";
821
Lee Jones5a323fb2013-06-03 13:17:17 +0100822 clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
823 clock-names = "uart", "apb_pclk";
824
Lee Jones7e0ce272012-03-15 16:46:17 +0000825 status = "disabled";
826 };
827
Lee Jones81bf8c22012-09-26 12:55:56 +0100828 sdi0_per1@80126000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000829 compatible = "arm,pl18x", "arm,primecell";
830 reg = <0x80126000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200831 interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones498315b92013-05-03 15:31:50 +0100832
833 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
834 <&dma 29 0 0x0>; /* Logical - MemToDev */
835 dma-names = "rx", "tx";
836
Lee Jones604be892013-06-06 12:28:50 +0100837 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
838 clock-names = "sdi", "apb_pclk";
839
Lee Jones7e0ce272012-03-15 16:46:17 +0000840 status = "disabled";
841 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100842
Lee Jones81bf8c22012-09-26 12:55:56 +0100843 sdi1_per2@80118000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000844 compatible = "arm,pl18x", "arm,primecell";
845 reg = <0x80118000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200846 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones498315b92013-05-03 15:31:50 +0100847
848 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
849 <&dma 32 0 0x0>; /* Logical - MemToDev */
850 dma-names = "rx", "tx";
851
Lee Jones604be892013-06-06 12:28:50 +0100852 clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
853 clock-names = "sdi", "apb_pclk";
854
Lee Jones7e0ce272012-03-15 16:46:17 +0000855 status = "disabled";
856 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100857
Lee Jones81bf8c22012-09-26 12:55:56 +0100858 sdi2_per3@80005000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000859 compatible = "arm,pl18x", "arm,primecell";
860 reg = <0x80005000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200861 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones498315b92013-05-03 15:31:50 +0100862
863 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
864 <&dma 28 0 0x0>; /* Logical - MemToDev */
865 dma-names = "rx", "tx";
866
Lee Jones604be892013-06-06 12:28:50 +0100867 clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
868 clock-names = "sdi", "apb_pclk";
869
Lee Jones7e0ce272012-03-15 16:46:17 +0000870 status = "disabled";
871 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100872
Lee Jones81bf8c22012-09-26 12:55:56 +0100873 sdi3_per2@80119000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000874 compatible = "arm,pl18x", "arm,primecell";
875 reg = <0x80119000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200876 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones604be892013-06-06 12:28:50 +0100877
Linus Walleij14cdf8c2014-06-11 10:45:50 +0200878 dmas = <&dma 41 0 0x2>, /* Logical - DevToMem */
879 <&dma 41 0 0x0>; /* Logical - MemToDev */
880 dma-names = "rx", "tx";
881
Lee Jones604be892013-06-06 12:28:50 +0100882 clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
883 clock-names = "sdi", "apb_pclk";
884
Lee Jones7e0ce272012-03-15 16:46:17 +0000885 status = "disabled";
886 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100887
Lee Jones81bf8c22012-09-26 12:55:56 +0100888 sdi4_per2@80114000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000889 compatible = "arm,pl18x", "arm,primecell";
890 reg = <0x80114000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200891 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones498315b92013-05-03 15:31:50 +0100892
893 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
894 <&dma 42 0 0x0>; /* Logical - MemToDev */
895 dma-names = "rx", "tx";
896
Lee Jones604be892013-06-06 12:28:50 +0100897 clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
898 clock-names = "sdi", "apb_pclk";
899
Lee Jones7e0ce272012-03-15 16:46:17 +0000900 status = "disabled";
901 };
Lee Jones76ff4e42012-10-24 11:10:05 +0100902
Lee Jones81bf8c22012-09-26 12:55:56 +0100903 sdi5_per3@80008000 {
Lee Jones7e0ce272012-03-15 16:46:17 +0000904 compatible = "arm,pl18x", "arm,primecell";
Lee Jones76ff4e42012-10-24 11:10:05 +0100905 reg = <0x80008000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200906 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
Lee Jones604be892013-06-06 12:28:50 +0100907
Linus Walleij14cdf8c2014-06-11 10:45:50 +0200908 dmas = <&dma 43 0 0x2>, /* Logical - DevToMem */
909 <&dma 43 0 0x0>; /* Logical - MemToDev */
910 dma-names = "rx", "tx";
911
Lee Jones604be892013-06-06 12:28:50 +0100912 clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
913 clock-names = "sdi", "apb_pclk";
914
Lee Jones7e0ce272012-03-15 16:46:17 +0000915 status = "disabled";
916 };
Lee Jonesbf76e062012-04-24 10:53:18 +0100917
Lee Jonesfe164522012-07-31 12:37:16 +0100918 msp0: msp@80123000 {
919 compatible = "stericsson,ux500-msp-i2s";
920 reg = <0x80123000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200921 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfe164522012-07-31 12:37:16 +0100922 v-ape-supply = <&db8500_vape_reg>;
Lee Jones133e6022013-06-03 13:18:00 +0100923
Lee Jones618111c2013-11-06 10:16:16 +0000924 dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
925 <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
926 dma-names = "rx", "tx";
927
Lee Jones133e6022013-06-03 13:18:00 +0100928 clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
929 clock-names = "msp", "apb_pclk";
930
Lee Jonesfe164522012-07-31 12:37:16 +0100931 status = "disabled";
932 };
933
934 msp1: msp@80124000 {
935 compatible = "stericsson,ux500-msp-i2s";
936 reg = <0x80124000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200937 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfe164522012-07-31 12:37:16 +0100938 v-ape-supply = <&db8500_vape_reg>;
Lee Jones133e6022013-06-03 13:18:00 +0100939
Linus Walleij14cdf8c2014-06-11 10:45:50 +0200940 /* This DMA channel only exist on DB8500 v1 */
Lee Jones618111c2013-11-06 10:16:16 +0000941 dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
942 dma-names = "tx";
943
Lee Jones133e6022013-06-03 13:18:00 +0100944 clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
945 clock-names = "msp", "apb_pclk";
946
Lee Jonesfe164522012-07-31 12:37:16 +0100947 status = "disabled";
948 };
949
950 // HDMI sound
951 msp2: msp@80117000 {
952 compatible = "stericsson,ux500-msp-i2s";
953 reg = <0x80117000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200954 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfe164522012-07-31 12:37:16 +0100955 v-ape-supply = <&db8500_vape_reg>;
Lee Jones133e6022013-06-03 13:18:00 +0100956
Lee Jones618111c2013-11-06 10:16:16 +0000957 dmas = <&dma 14 0 0x12>, /* Logical - DevToMem - HighPrio */
958 <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
959 HighPrio - Fixed */
960 dma-names = "rx", "tx";
961
Lee Jones133e6022013-06-03 13:18:00 +0100962 clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
963 clock-names = "msp", "apb_pclk";
964
Lee Jonesfe164522012-07-31 12:37:16 +0100965 status = "disabled";
966 };
967
968 msp3: msp@80125000 {
969 compatible = "stericsson,ux500-msp-i2s";
970 reg = <0x80125000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +0200971 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfe164522012-07-31 12:37:16 +0100972 v-ape-supply = <&db8500_vape_reg>;
Lee Jones133e6022013-06-03 13:18:00 +0100973
Linus Walleij14cdf8c2014-06-11 10:45:50 +0200974 /* This DMA channel only exist on DB8500 v2 */
Lee Jones618111c2013-11-06 10:16:16 +0000975 dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
976 dma-names = "rx";
977
Lee Jones133e6022013-06-03 13:18:00 +0100978 clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
979 clock-names = "msp", "apb_pclk";
980
Lee Jonesfe164522012-07-31 12:37:16 +0100981 status = "disabled";
982 };
983
Lee Jonesbf76e062012-04-24 10:53:18 +0100984 external-bus@50000000 {
985 compatible = "simple-bus";
986 reg = <0x50000000 0x4000000>;
987 #address-cells = <1>;
988 #size-cells = <1>;
989 ranges = <0 0x50000000 0x4000000>;
990 status = "disabled";
991 };
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800992
993 cpufreq-cooling {
994 compatible = "stericsson,db8500-cpufreq-cooling";
995 status = "disabled";
Lee Jonesd460d282013-09-18 16:05:04 +0100996 };
hongbo.zhangdc1956b2012-11-15 18:56:43 +0800997
Lee Jones0563f632012-10-24 11:18:14 +0100998 vmmci: regulator-gpio {
999 compatible = "regulator-gpio";
1000
1001 regulator-min-microvolt = <1800000>;
Lee Jones4f902b42012-12-06 14:00:01 +00001002 regulator-max-microvolt = <2900000>;
Lee Jones0563f632012-10-24 11:18:14 +01001003 regulator-name = "mmci-reg";
1004 regulator-type = "voltage";
1005
Lee Jones874c9202012-12-07 13:46:01 +00001006 startup-delay-us = <100>;
Lee Jonese7bda302012-12-06 15:00:46 +00001007 enable-active-high;
1008
Lee Jones0563f632012-10-24 11:18:14 +01001009 states = <1800000 0x1
1010 2900000 0x0>;
Lee Jonesc94a4ab2012-11-15 13:02:16 +00001011
1012 status = "disabled";
Lee Jones0563f632012-10-24 11:18:14 +01001013 };
Lee Jonesfe2e9f92013-05-16 12:27:21 +01001014
Linus Walleij6e9a88a2013-11-14 15:21:00 +01001015 mcde@a0350000 {
1016 compatible = "stericsson,mcde";
1017 reg = <0xa0350000 0x1000>, /* MCDE */
1018 <0xa0351000 0x1000>, /* DSI link 1 */
1019 <0xa0352000 0x1000>, /* DSI link 2 */
1020 <0xa0353000 0x1000>; /* DSI link 3 */
1021 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
1023 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
1024 <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
1025 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
1026 <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
1027 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
1028 <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
1029 <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
1030 };
1031
Lee Jonesfe2e9f92013-05-16 12:27:21 +01001032 cryp@a03cb000 {
1033 compatible = "stericsson,ux500-cryp";
1034 reg = <0xa03cb000 0x1000>;
Linus Walleij90c40252013-05-29 19:15:39 +02001035 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
Lee Jonesfe2e9f92013-05-16 12:27:21 +01001036
1037 v-ape-supply = <&db8500_vape_reg>;
Lee Jonesd2f898c2013-09-18 16:05:52 +01001038 clocks = <&prcc_pclk 6 1>;
Lee Jonesfe2e9f92013-05-16 12:27:21 +01001039 };
Lee Jones61122cf2013-05-16 12:27:22 +01001040
1041 hash@a03c2000 {
1042 compatible = "stericsson,ux500-hash";
1043 reg = <0xa03c2000 0x1000>;
1044
1045 v-ape-supply = <&db8500_vape_reg>;
Lee Jones024cfe82013-09-18 16:07:27 +01001046 clocks = <&prcc_pclk 6 2>;
Lee Jones61122cf2013-05-16 12:27:22 +01001047 };
Arnd Bergmann5d0769f2012-03-02 23:07:21 +00001048 };
1049};