Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2001, 2002, MontaVista Software Inc. |
| 3 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net |
| 4 | * Copyright (c) 2003 Maciej W. Rozycki |
| 5 | * |
| 6 | * include/asm-mips/time.h |
| 7 | * header file for the new style time.c file and time services. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | */ |
| 14 | #ifndef _ASM_TIME_H |
| 15 | #define _ASM_TIME_H |
| 16 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/rtc.h> |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 18 | #include <linux/spinlock.h> |
Ralf Baechle | 93c846f | 2007-10-19 08:13:08 +0100 | [diff] [blame] | 19 | #include <linux/clockchips.h> |
Atsushi Nemoto | 0059856 | 2006-11-12 00:10:28 +0900 | [diff] [blame] | 20 | #include <linux/clocksource.h> |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 21 | |
| 22 | extern spinlock_t rtc_lock; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| 24 | /* |
Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 25 | * RTC ops. By default, they point to weak no-op RTC functions. |
Yoichi Yuasa | d23ee8f | 2006-03-27 01:16:33 -0800 | [diff] [blame] | 26 | * rtc_mips_set_time - reverse the above translation and set time to RTC. |
| 27 | * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * to be set. Used by RTC sync-up. |
| 29 | */ |
Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 30 | extern int rtc_mips_set_time(unsigned long); |
| 31 | extern int rtc_mips_set_mmss(unsigned long); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * Timer interrupt functions. |
| 35 | * mips_timer_state is needed for high precision timer calibration. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | */ |
| 37 | extern int (*mips_timer_state)(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
| 39 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | * board specific routines required by time_init(). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | */ |
Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 42 | extern void plat_time_init(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
| 44 | /* |
| 45 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible |
| 46 | * counter as a timer interrupt source; otherwise it can be set up |
| 47 | * automagically with an aid of mips_timer_state. |
| 48 | */ |
| 49 | extern unsigned int mips_hpt_frequency; |
| 50 | |
Ralf Baechle | 91a2fcc | 2007-10-11 23:46:09 +0100 | [diff] [blame] | 51 | /* |
| 52 | * The performance counter IRQ on MIPS is a close relative to the timer IRQ |
| 53 | * so it lives here. |
| 54 | */ |
| 55 | extern int (*perf_irq)(void); |
| 56 | |
Ralf Baechle | 7bcf771 | 2007-10-11 23:46:09 +0100 | [diff] [blame] | 57 | /* |
| 58 | * Initialize the calling CPU's compare interrupt as clockevent device |
| 59 | */ |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 60 | #ifdef CONFIG_CEVT_R4K |
Ralf Baechle | 5aa85c9 | 2007-11-21 16:39:44 +0000 | [diff] [blame] | 61 | extern int mips_clockevent_init(void); |
Ralf Baechle | 38760d4 | 2007-10-29 14:23:43 +0000 | [diff] [blame] | 62 | extern unsigned int __weak get_c0_compare_int(void); |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 63 | #else |
Ralf Baechle | 5aa85c9 | 2007-11-21 16:39:44 +0000 | [diff] [blame] | 64 | static inline int mips_clockevent_init(void) |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 65 | { |
Ralf Baechle | 5aa85c9 | 2007-11-21 16:39:44 +0000 | [diff] [blame] | 66 | return -ENXIO; |
Ralf Baechle | 42f7754 | 2007-10-18 17:48:11 +0100 | [diff] [blame] | 67 | } |
| 68 | #endif |
Ralf Baechle | 7bcf771 | 2007-10-11 23:46:09 +0100 | [diff] [blame] | 69 | |
Ralf Baechle | 940f6b4 | 2007-11-24 22:33:28 +0000 | [diff] [blame] | 70 | /* |
| 71 | * Initialize the count register as a clocksource |
| 72 | */ |
| 73 | #ifdef CONFIG_CEVT_R4K |
| 74 | extern void init_mips_clocksource(void); |
| 75 | #else |
| 76 | static inline void init_mips_clocksource(void) |
| 77 | { |
| 78 | } |
| 79 | #endif |
| 80 | |
Ralf Baechle | 93c846f | 2007-10-19 08:13:08 +0100 | [diff] [blame] | 81 | extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock); |
| 82 | extern void clockevent_set_clock(struct clock_event_device *cd, |
| 83 | unsigned int clock); |
| 84 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | #endif /* _ASM_TIME_H */ |