Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 1 | * MDIO IO device |
| 2 | |
| 3 | The MDIO is a bus to which the PHY devices are connected. For each |
| 4 | device that exists on this bus, a child node should be created. See |
Andy Fleming | b31a1d8 | 2008-12-16 15:29:15 -0800 | [diff] [blame] | 5 | the definition of the PHY node in booting-without-of.txt for an example |
| 6 | of how to define a PHY. |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 7 | |
| 8 | Required properties: |
| 9 | - reg : Offset and length of the register set for the device |
| 10 | - compatible : Should define the compatible device type for the |
| 11 | mdio. Currently, this is most likely to be "fsl,gianfar-mdio" |
| 12 | |
| 13 | Example: |
| 14 | |
| 15 | mdio@24520 { |
| 16 | reg = <24520 20>; |
| 17 | compatible = "fsl,gianfar-mdio"; |
| 18 | |
| 19 | ethernet-phy@0 { |
| 20 | ...... |
| 21 | }; |
| 22 | }; |
| 23 | |
Andy Fleming | b31a1d8 | 2008-12-16 15:29:15 -0800 | [diff] [blame] | 24 | * TBI Internal MDIO bus |
| 25 | |
| 26 | As of this writing, every tsec is associated with an internal TBI PHY. |
| 27 | This PHY is accessed through the local MDIO bus. These buses are defined |
| 28 | similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi". |
| 29 | The TBI PHYs underneath them are similar to normal PHYs, but the reg property |
| 30 | is considered instructive, rather than descriptive. The reg property should |
| 31 | be chosen so it doesn't interfere with other PHYs on the bus. |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 32 | |
| 33 | * Gianfar-compatible ethernet nodes |
| 34 | |
Scott Wood | 0026298 | 2008-07-11 18:04:43 -0500 | [diff] [blame] | 35 | Properties: |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 36 | |
| 37 | - device_type : Should be "network" |
| 38 | - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" |
| 39 | - compatible : Should be "gianfar" |
| 40 | - reg : Offset and length of the register set for the device |
Scott Wood | 0026298 | 2008-07-11 18:04:43 -0500 | [diff] [blame] | 41 | - interrupts : For FEC devices, the first interrupt is the device's |
| 42 | interrupt. For TSEC and eTSEC devices, the first interrupt is |
| 43 | transmit, the second is receive, and the third is error. |
Sergei Shtylyov | e8f08ee | 2014-02-18 02:41:59 +0300 | [diff] [blame] | 44 | - phy-handle : See ethernet.txt file in the same directory. |
Florian Fainelli | ae21888 | 2014-05-22 09:47:44 -0700 | [diff] [blame] | 45 | - fixed-link : See fixed-link.txt in the same directory. |
Sergei Shtylyov | e8f08ee | 2014-02-18 02:41:59 +0300 | [diff] [blame] | 46 | - phy-connection-type : See ethernet.txt file in the same directory. |
| 47 | This property is only really needed if the connection is of type |
| 48 | "rgmii-id", as all other connection types are detected by hardware. |
Scott Wood | 0026298 | 2008-07-11 18:04:43 -0500 | [diff] [blame] | 49 | - fsl,magic-packet : If present, indicates that the hardware supports |
| 50 | waking up via magic packet. |
Andy Fleming | 4d7902f | 2009-02-04 16:43:44 -0800 | [diff] [blame] | 51 | - bd-stash : If present, indicates that the hardware supports stashing |
| 52 | buffer descriptors in the L2. |
| 53 | - rx-stash-len : Denotes the number of bytes of a received buffer to stash |
| 54 | in the L2. |
| 55 | - rx-stash-idx : Denotes the index of the first byte from the received |
| 56 | buffer to stash in the L2. |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 57 | |
| 58 | Example: |
| 59 | ethernet@24000 { |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 60 | device_type = "network"; |
| 61 | model = "TSEC"; |
| 62 | compatible = "gianfar"; |
Scott Wood | 0026298 | 2008-07-11 18:04:43 -0500 | [diff] [blame] | 63 | reg = <0x24000 0x1000>; |
| 64 | local-mac-address = [ 00 E0 0C 00 73 00 ]; |
| 65 | interrupts = <29 2 30 2 34 2>; |
| 66 | interrupt-parent = <&mpic>; |
| 67 | phy-handle = <&phy0> |
Kumar Gala | d0fc2ea | 2008-07-07 11:28:33 -0500 | [diff] [blame] | 68 | }; |
Richard Cochran | c78275f | 2011-04-22 12:03:54 +0200 | [diff] [blame] | 69 | |
| 70 | * Gianfar PTP clock nodes |
| 71 | |
| 72 | General Properties: |
| 73 | |
| 74 | - compatible Should be "fsl,etsec-ptp" |
| 75 | - reg Offset and length of the register set for the device |
| 76 | - interrupts There should be at least two interrupts. Some devices |
| 77 | have as many as four PTP related interrupts. |
| 78 | |
| 79 | Clock Properties: |
| 80 | |
Aida Mynzhasova | e58f6f4 | 2013-09-27 17:40:27 +0400 | [diff] [blame] | 81 | - fsl,cksel Timer reference clock source. |
Richard Cochran | c78275f | 2011-04-22 12:03:54 +0200 | [diff] [blame] | 82 | - fsl,tclk-period Timer reference clock period in nanoseconds. |
| 83 | - fsl,tmr-prsc Prescaler, divides the output clock. |
| 84 | - fsl,tmr-add Frequency compensation value. |
| 85 | - fsl,tmr-fiper1 Fixed interval period pulse generator. |
| 86 | - fsl,tmr-fiper2 Fixed interval period pulse generator. |
| 87 | - fsl,max-adj Maximum frequency adjustment in parts per billion. |
| 88 | |
| 89 | These properties set the operational parameters for the PTP |
| 90 | clock. You must choose these carefully for the clock to work right. |
| 91 | Here is how to figure good values: |
| 92 | |
Aida Mynzhasova | e58f6f4 | 2013-09-27 17:40:27 +0400 | [diff] [blame] | 93 | TimerOsc = selected reference clock MHz |
Richard Cochran | c78275f | 2011-04-22 12:03:54 +0200 | [diff] [blame] | 94 | tclk_period = desired clock period nanoseconds |
| 95 | NominalFreq = 1000 / tclk_period MHz |
| 96 | FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) |
| 97 | tmr_add = ceil(2^32 / FreqDivRatio) |
| 98 | OutputClock = NominalFreq / tmr_prsc MHz |
| 99 | PulseWidth = 1 / OutputClock microseconds |
| 100 | FiperFreq1 = desired frequency in Hz |
| 101 | FiperDiv1 = 1000000 * OutputClock / FiperFreq1 |
| 102 | tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period |
| 103 | max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1 |
| 104 | |
| 105 | The calculation for tmr_fiper2 is the same as for tmr_fiper1. The |
| 106 | driver expects that tmr_fiper1 will be correctly set to produce a 1 |
| 107 | Pulse Per Second (PPS) signal, since this will be offered to the PPS |
| 108 | subsystem to synchronize the Linux clock. |
| 109 | |
Aida Mynzhasova | e58f6f4 | 2013-09-27 17:40:27 +0400 | [diff] [blame] | 110 | Reference clock source is determined by the value, which is holded |
| 111 | in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the |
| 112 | value, which will be directly written in those bits, that is why, |
| 113 | according to reference manual, the next clock sources can be used: |
| 114 | |
| 115 | <0> - external high precision timer reference clock (TSEC_TMR_CLK |
| 116 | input is used for this purpose); |
| 117 | <1> - eTSEC system clock; |
| 118 | <2> - eTSEC1 transmit clock; |
| 119 | <3> - RTC clock input. |
| 120 | |
| 121 | When this attribute is not used, eTSEC system clock will serve as |
| 122 | IEEE 1588 timer reference clock. |
| 123 | |
Richard Cochran | c78275f | 2011-04-22 12:03:54 +0200 | [diff] [blame] | 124 | Example: |
| 125 | |
| 126 | ptp_clock@24E00 { |
| 127 | compatible = "fsl,etsec-ptp"; |
| 128 | reg = <0x24E00 0xB0>; |
| 129 | interrupts = <12 0x8 13 0x8>; |
| 130 | interrupt-parent = < &ipic >; |
Aida Mynzhasova | e58f6f4 | 2013-09-27 17:40:27 +0400 | [diff] [blame] | 131 | fsl,cksel = <1>; |
Richard Cochran | c78275f | 2011-04-22 12:03:54 +0200 | [diff] [blame] | 132 | fsl,tclk-period = <10>; |
| 133 | fsl,tmr-prsc = <100>; |
| 134 | fsl,tmr-add = <0x999999A4>; |
| 135 | fsl,tmr-fiper1 = <0x3B9AC9F6>; |
| 136 | fsl,tmr-fiper2 = <0x00018696>; |
| 137 | fsl,max-adj = <659999998>; |
| 138 | }; |