blob: aa03ca8f2d9b0a0f08f85cab9d928fdc0a594388 [file] [log] [blame]
Josh Cartwright1094ebe2014-09-25 17:51:02 -05001/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/clk.h>
Josh Cartwright05e487d2014-09-25 17:51:04 -050014#include <linux/delay.h>
Josh Cartwright1094ebe2014-09-25 17:51:02 -050015#include <linux/io.h>
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/platform_device.h>
Josh Cartwright05e487d2014-09-25 17:51:04 -050020#include <linux/reboot.h>
Josh Cartwright1094ebe2014-09-25 17:51:02 -050021#include <linux/watchdog.h>
22
Mathieu Olivari0dfd5822015-02-20 18:19:34 -080023#define WDT_RST 0x38
24#define WDT_EN 0x40
25#define WDT_BITE_TIME 0x5C
Josh Cartwright1094ebe2014-09-25 17:51:02 -050026
27struct qcom_wdt {
28 struct watchdog_device wdd;
29 struct clk *clk;
30 unsigned long rate;
Josh Cartwright05e487d2014-09-25 17:51:04 -050031 struct notifier_block restart_nb;
Josh Cartwright1094ebe2014-09-25 17:51:02 -050032 void __iomem *base;
33};
34
35static inline
36struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
37{
38 return container_of(wdd, struct qcom_wdt, wdd);
39}
40
41static int qcom_wdt_start(struct watchdog_device *wdd)
42{
43 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
44
45 writel(0, wdt->base + WDT_EN);
46 writel(1, wdt->base + WDT_RST);
47 writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
48 writel(1, wdt->base + WDT_EN);
49 return 0;
50}
51
52static int qcom_wdt_stop(struct watchdog_device *wdd)
53{
54 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
55
56 writel(0, wdt->base + WDT_EN);
57 return 0;
58}
59
60static int qcom_wdt_ping(struct watchdog_device *wdd)
61{
62 struct qcom_wdt *wdt = to_qcom_wdt(wdd);
63
64 writel(1, wdt->base + WDT_RST);
65 return 0;
66}
67
68static int qcom_wdt_set_timeout(struct watchdog_device *wdd,
69 unsigned int timeout)
70{
71 wdd->timeout = timeout;
72 return qcom_wdt_start(wdd);
73}
74
75static const struct watchdog_ops qcom_wdt_ops = {
76 .start = qcom_wdt_start,
77 .stop = qcom_wdt_stop,
78 .ping = qcom_wdt_ping,
79 .set_timeout = qcom_wdt_set_timeout,
80 .owner = THIS_MODULE,
81};
82
83static const struct watchdog_info qcom_wdt_info = {
84 .options = WDIOF_KEEPALIVEPING
85 | WDIOF_MAGICCLOSE
86 | WDIOF_SETTIMEOUT,
87 .identity = KBUILD_MODNAME,
88};
89
Josh Cartwright05e487d2014-09-25 17:51:04 -050090static int qcom_wdt_restart(struct notifier_block *nb, unsigned long action,
91 void *data)
92{
93 struct qcom_wdt *wdt = container_of(nb, struct qcom_wdt, restart_nb);
94 u32 timeout;
95
96 /*
97 * Trigger watchdog bite:
98 * Setup BITE_TIME to be 128ms, and enable WDT.
99 */
100 timeout = 128 * wdt->rate / 1000;
101
102 writel(0, wdt->base + WDT_EN);
103 writel(1, wdt->base + WDT_RST);
104 writel(timeout, wdt->base + WDT_BITE_TIME);
105 writel(1, wdt->base + WDT_EN);
106
107 /*
108 * Actually make sure the above sequence hits hardware before sleeping.
109 */
110 wmb();
111
112 msleep(150);
113 return NOTIFY_DONE;
114}
115
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500116static int qcom_wdt_probe(struct platform_device *pdev)
117{
118 struct qcom_wdt *wdt;
119 struct resource *res;
Mathieu Olivari0dfd5822015-02-20 18:19:34 -0800120 struct device_node *np = pdev->dev.of_node;
121 u32 percpu_offset;
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500122 int ret;
123
124 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
125 if (!wdt)
126 return -ENOMEM;
127
128 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Mathieu Olivari0dfd5822015-02-20 18:19:34 -0800129
130 /* We use CPU0's DGT for the watchdog */
131 if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
132 percpu_offset = 0;
133
134 res->start += percpu_offset;
135 res->end += percpu_offset;
136
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500137 wdt->base = devm_ioremap_resource(&pdev->dev, res);
138 if (IS_ERR(wdt->base))
139 return PTR_ERR(wdt->base);
140
141 wdt->clk = devm_clk_get(&pdev->dev, NULL);
142 if (IS_ERR(wdt->clk)) {
143 dev_err(&pdev->dev, "failed to get input clock\n");
144 return PTR_ERR(wdt->clk);
145 }
146
147 ret = clk_prepare_enable(wdt->clk);
148 if (ret) {
149 dev_err(&pdev->dev, "failed to setup clock\n");
150 return ret;
151 }
152
153 /*
154 * We use the clock rate to calculate the max timeout, so ensure it's
155 * not zero to avoid a divide-by-zero exception.
156 *
157 * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such
158 * that it would bite before a second elapses it's usefulness is
159 * limited. Bail if this is the case.
160 */
161 wdt->rate = clk_get_rate(wdt->clk);
162 if (wdt->rate == 0 ||
163 wdt->rate > 0x10000000U) {
164 dev_err(&pdev->dev, "invalid clock rate\n");
165 ret = -EINVAL;
166 goto err_clk_unprepare;
167 }
168
169 wdt->wdd.dev = &pdev->dev;
170 wdt->wdd.info = &qcom_wdt_info;
171 wdt->wdd.ops = &qcom_wdt_ops;
172 wdt->wdd.min_timeout = 1;
173 wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
174
175 /*
176 * If 'timeout-sec' unspecified in devicetree, assume a 30 second
177 * default, unless the max timeout is less than 30 seconds, then use
178 * the max instead.
179 */
180 wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
181 watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev);
182
183 ret = watchdog_register_device(&wdt->wdd);
184 if (ret) {
185 dev_err(&pdev->dev, "failed to register watchdog\n");
186 goto err_clk_unprepare;
187 }
188
Josh Cartwright05e487d2014-09-25 17:51:04 -0500189 /*
190 * WDT restart notifier has priority 0 (use as a last resort)
191 */
192 wdt->restart_nb.notifier_call = qcom_wdt_restart;
193 ret = register_restart_handler(&wdt->restart_nb);
194 if (ret)
195 dev_err(&pdev->dev, "failed to setup restart handler\n");
196
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500197 platform_set_drvdata(pdev, wdt);
198 return 0;
199
200err_clk_unprepare:
201 clk_disable_unprepare(wdt->clk);
202 return ret;
203}
204
205static int qcom_wdt_remove(struct platform_device *pdev)
206{
207 struct qcom_wdt *wdt = platform_get_drvdata(pdev);
208
Josh Cartwright05e487d2014-09-25 17:51:04 -0500209 unregister_restart_handler(&wdt->restart_nb);
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500210 watchdog_unregister_device(&wdt->wdd);
211 clk_disable_unprepare(wdt->clk);
212 return 0;
213}
214
215static const struct of_device_id qcom_wdt_of_table[] = {
Mathieu Olivari0dfd5822015-02-20 18:19:34 -0800216 { .compatible = "qcom,kpss-timer" },
217 { .compatible = "qcom,scss-timer" },
Josh Cartwright1094ebe2014-09-25 17:51:02 -0500218 { },
219};
220MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
221
222static struct platform_driver qcom_watchdog_driver = {
223 .probe = qcom_wdt_probe,
224 .remove = qcom_wdt_remove,
225 .driver = {
226 .name = KBUILD_MODNAME,
227 .of_match_table = qcom_wdt_of_table,
228 },
229};
230module_platform_driver(qcom_watchdog_driver);
231
232MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver");
233MODULE_LICENSE("GPL v2");