Anson Huang | 99fc5ba | 2014-12-17 12:22:09 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | |
| 11 | #include "imx6sx.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "Freescale i.MX6 SoloX Sabre Auto Board"; |
| 15 | compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx"; |
| 16 | |
| 17 | memory { |
| 18 | reg = <0x80000000 0x80000000>; |
| 19 | }; |
| 20 | |
| 21 | regulators { |
| 22 | compatible = "simple-bus"; |
| 23 | #address-cells = <1>; |
| 24 | #size-cells = <0>; |
| 25 | |
| 26 | vcc_sd3: regulator@0 { |
| 27 | compatible = "regulator-fixed"; |
| 28 | reg = <0>; |
| 29 | pinctrl-names = "default"; |
| 30 | pinctrl-0 = <&pinctrl_vcc_sd3>; |
| 31 | regulator-name = "VCC_SD3"; |
| 32 | regulator-min-microvolt = <3000000>; |
| 33 | regulator-max-microvolt = <3000000>; |
| 34 | gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| 35 | enable-active-high; |
| 36 | }; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | &uart1 { |
| 41 | pinctrl-names = "default"; |
| 42 | pinctrl-0 = <&pinctrl_uart1>; |
| 43 | status = "okay"; |
| 44 | }; |
| 45 | |
| 46 | &usdhc3 { |
| 47 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| 48 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 49 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 50 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 51 | bus-width = <8>; |
Dong Aisheng | 89c1a8cf | 2015-07-22 20:53:02 +0800 | [diff] [blame] | 52 | cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; |
Anson Huang | 99fc5ba | 2014-12-17 12:22:09 +0800 | [diff] [blame] | 53 | wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; |
| 54 | keep-power-in-suspend; |
Sudeep Holla | 26cefdd | 2015-10-21 11:10:08 +0100 | [diff] [blame] | 55 | wakeup-source; |
Anson Huang | 99fc5ba | 2014-12-17 12:22:09 +0800 | [diff] [blame] | 56 | vmmc-supply = <&vcc_sd3>; |
| 57 | status = "okay"; |
| 58 | }; |
| 59 | |
| 60 | &usdhc4 { |
| 61 | pinctrl-names = "default"; |
| 62 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 63 | bus-width = <8>; |
Dong Aisheng | 89c1a8cf | 2015-07-22 20:53:02 +0800 | [diff] [blame] | 64 | cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; |
Anson Huang | 99fc5ba | 2014-12-17 12:22:09 +0800 | [diff] [blame] | 65 | no-1-8-v; |
| 66 | keep-power-in-suspend; |
| 67 | enable-sdio-wakup; |
| 68 | status = "okay"; |
| 69 | }; |
| 70 | |
| 71 | &iomuxc { |
| 72 | imx6x-sabreauto { |
| 73 | pinctrl_uart1: uart1grp { |
| 74 | fsl,pins = < |
| 75 | MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 |
| 76 | MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 |
| 77 | >; |
| 78 | }; |
| 79 | |
| 80 | pinctrl_usdhc3: usdhc3grp { |
| 81 | fsl,pins = < |
| 82 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 |
| 83 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 |
| 84 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 |
| 85 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 |
| 86 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 |
| 87 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 |
| 88 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 |
| 89 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 |
| 90 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 |
| 91 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 |
| 92 | MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ |
| 93 | MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ |
| 94 | >; |
| 95 | }; |
| 96 | |
| 97 | pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { |
| 98 | fsl,pins = < |
| 99 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9 |
| 100 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9 |
| 101 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9 |
| 102 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9 |
| 103 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9 |
| 104 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9 |
| 105 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9 |
| 106 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9 |
| 107 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9 |
| 108 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9 |
| 109 | >; |
| 110 | }; |
| 111 | |
| 112 | pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { |
| 113 | fsl,pins = < |
| 114 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9 |
| 115 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9 |
| 116 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9 |
| 117 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9 |
| 118 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9 |
| 119 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9 |
| 120 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9 |
| 121 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9 |
| 122 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9 |
| 123 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9 |
| 124 | >; |
| 125 | }; |
| 126 | |
| 127 | pinctrl_usdhc4: usdhc4grp { |
| 128 | fsl,pins = < |
| 129 | MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 |
| 130 | MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 |
| 131 | MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 |
| 132 | MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 |
| 133 | MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 |
| 134 | MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 |
| 135 | MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */ |
| 136 | MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */ |
| 137 | >; |
| 138 | }; |
| 139 | |
| 140 | pinctrl_vcc_sd3: vccsd3grp { |
| 141 | fsl,pins = < |
| 142 | MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 |
| 143 | >; |
| 144 | }; |
| 145 | }; |
| 146 | }; |