arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi

/*
 * Google Veyron (and derivatives) board device tree source
 * Chromebook specific parts
 *
 * Copyright 2015 Google, Inc
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *  Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288-veyron.dtsi"
#include "rk3288-veyron-sdmmc.dtsi"

/ {
	aliases {
		/* Assign 20 so we don't get confused w/ builtin ones */
		i2c20 = &i2c_tunnel;
	};

	gpio-charger {
		compatible = "gpio-charger";
		charger-type = "mains";
		gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&ac_present_ap>;
	};

	/* A non-regulated voltage from power supply or battery */
	vccsys: vccsys {
		compatible = "regulator-fixed";
		regulator-name = "vccsys";
		regulator-boot-on;
		regulator-always-on;
	};

	vcc33_sys: vcc33-sys {
		vin-supply = <&vccsys>;
	};

	vcc_5v: vcc-5v {
		vin-supply = <&vccsys>;
	};

	/* This turns on vbus for host1 (dwc2) */
	vcc5_host1: vcc5-host1-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&host1_pwr_en>;
		regulator-name = "vcc5_host1";
		regulator-always-on;
		regulator-boot-on;
	};

	/* This turns on vbus for otg for host mode (dwc2) */
	vcc5v_otg: vcc5v-otg-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&usbotg_pwren_h>;
		regulator-name = "vcc5_host2";
		regulator-always-on;
		regulator-boot-on;
	};
};

&gpio_keys {
	pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
	lid {
		label = "Lid";
		gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
		wakeup-source;
		linux,code = <0>; /* SW_LID */
		linux,input-type = <5>; /* EV_SW */
		debounce-interval = <1>;
	};
};

&rk808 {
	vcc11-supply = <&vcc_5v>;

	regulators {
		vcc33_ccd: LDO_REG8 {
			regulator-name = "vcc33_ccd";
			regulator-always-on;
			regulator-boot-on;
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-state-mem {
				regulator-on-in-suspend;
				regulator-suspend-microvolt = <3300000>;
			};
		};
	};
};

&spi0 {
	status = "okay";

	cros_ec: ec@0 {
		compatible = "google,cros-ec-spi";
		reg = <0>;
		google,cros-ec-spi-pre-delay = <30>;
		interrupt-parent = <&gpio7>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&ec_int>;
		spi-max-frequency = <3000000>;

		i2c_tunnel: i2c-tunnel {
			compatible = "google,cros-ec-i2c-tunnel";
			google,remote-bus = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};

&i2c4 {
	trackpad@15 {
		compatible = "elan,ekth3000";
		reg = <0x15>;
		interrupt-parent = <&gpio7>;
		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-names = "default";
		pinctrl-0 = <&trackpad_int>;
		vcc-supply = <&vcc33_io>;
		wakeup-source;
	};
};

&pinctrl {
	pinctrl-0 = <
		/* Common for sleep and wake, but no owners */
		&global_pwroff

		/* Wake only */
		&suspend_l_wake
	>;
	pinctrl-1 = <
		/* Common for sleep and wake, but no owners */
		&global_pwroff

		/* Sleep only */
		&suspend_l_sleep
	>;

	buttons {
		ap_lid_int_l: ap-lid-int-l {
			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	charger {
		ac_present_ap: ac-present-ap {
			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	cros-ec {
		ec_int: ec-int {
			rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	suspend {
		suspend_l_wake: suspend-l-wake {
			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
		};

		suspend_l_sleep: suspend-l-sleep {
			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
		};
	};

	trackpad {
		trackpad_int: trackpad-int {
			rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	usb-host {
		host1_pwr_en: host1-pwr-en {
			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		usbotg_pwren_h: usbotg-pwren-h {
			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

#include "cros-ec-keyboard.dtsi"