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Mike Marciniszyn77241052015-07-30 15:17:43 -04001/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50/* QSFP support common definitions, for hfi driver */
51
52#define QSFP_DEV 0xA0
53#define QSFP_PWR_LAG_MSEC 2000
54#define QSFP_MODPRS_LAG_MSEC 20
55/* 128 byte pages, per SFF 8636 rev 2.4 */
56#define QSFP_MAX_NUM_PAGES 5
57
58/*
59 * Below are masks for QSFP pins. Pins are the same for HFI0 and HFI1.
60 * _N means asserted low
61 */
jubin.john@intel.com349ac712016-01-11 18:30:52 -050062#define QSFP_HFI0_I2CCLK BIT(0)
63#define QSFP_HFI0_I2CDAT BIT(1)
64#define QSFP_HFI0_RESET_N BIT(2)
65#define QSFP_HFI0_INT_N BIT(3)
66#define QSFP_HFI0_MODPRST_N BIT(4)
Mike Marciniszyn77241052015-07-30 15:17:43 -040067
68/* QSFP is paged at 256 bytes */
69#define QSFP_PAGESIZE 256
Mike Marciniszync7cb7632016-02-03 14:31:05 -080070/* Reads/writes cannot cross 128 byte boundaries */
71#define QSFP_RW_BOUNDARY 128
Mike Marciniszyn77241052015-07-30 15:17:43 -040072
73/* Defined fields that Intel requires of qualified cables */
74/* Byte 0 is Identifier, not checked */
75/* Byte 1 is reserved "status MSB" */
Mike Marciniszync7cb7632016-02-03 14:31:05 -080076#define QSFP_TX_CTRL_BYTE_OFFS 86
77#define QSFP_PWR_CTRL_BYTE_OFFS 93
78#define QSFP_CDR_CTRL_BYTE_OFFS 98
79
Mike Marciniszyn77241052015-07-30 15:17:43 -040080#define QSFP_PAGE_SELECT_BYTE_OFFS 127
81/* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */
82#define QSFP_MOD_ID_OFFS 128
83/*
84 * Byte 129 is "Extended Identifier". We only care about D7,D6: Power class
85 * 0:1.5W, 1:2.0W, 2:2.5W, 3:3.5W
86 */
87#define QSFP_MOD_PWR_OFFS 129
88/* Byte 130 is Connector type. Not Intel req'd */
89/* Bytes 131..138 are Transceiver types, bit maps for various tech, none IB */
90/* Byte 139 is encoding. code 0x01 is 8b10b. Not Intel req'd */
Mike Marciniszync7cb7632016-02-03 14:31:05 -080091/* byte 140 is nominal bit-rate, in units of 100Mbits/sec */
92#define QSFP_NOM_BIT_RATE_100_OFFS 140
Mike Marciniszyn77241052015-07-30 15:17:43 -040093/* Byte 141 is Extended Rate Select. Not Intel req'd */
94/* Bytes 142..145 are lengths for various fiber types. Not Intel req'd */
95/* Byte 146 is length for Copper. Units of 1 meter */
96#define QSFP_MOD_LEN_OFFS 146
97/*
98 * Byte 147 is Device technology. D0..3 not Intel req'd
99 * D4..7 select from 15 choices, translated by table:
100 */
101#define QSFP_MOD_TECH_OFFS 147
102extern const char *const hfi1_qsfp_devtech[16];
103/* Active Equalization includes fiber, copper full EQ, and copper near Eq */
104#define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1)
105/* Active Equalization includes fiber, copper full EQ, and copper far Eq */
106#define QSFP_IS_ACTIVE_FAR(tech) ((0x32FF >> ((tech) >> 4)) & 1)
107/* Attenuation should be valid for copper other than full/near Eq */
108#define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1)
109/* Length is only valid if technology is "copper" */
110#define QSFP_IS_CU(tech) ((0xED00 >> ((tech) >> 4)) & 1)
111#define QSFP_TECH_1490 9
112
113#define QSFP_OUI(oui) (((unsigned)oui[0] << 16) | ((unsigned)oui[1] << 8) | \
114 oui[2])
115#define QSFP_OUI_AMPHENOL 0x415048
116#define QSFP_OUI_FINISAR 0x009065
117#define QSFP_OUI_GORE 0x002177
118
119/* Bytes 148..163 are Vendor Name, Left-justified Blank-filled */
120#define QSFP_VEND_OFFS 148
121#define QSFP_VEND_LEN 16
122/* Byte 164 is IB Extended transceiver codes Bits D0..3 are SDR,DDR,QDR,EDR */
123#define QSFP_IBXCV_OFFS 164
124/* Bytes 165..167 are Vendor OUI number */
125#define QSFP_VOUI_OFFS 165
126#define QSFP_VOUI_LEN 3
127/* Bytes 168..183 are Vendor Part Number, string */
128#define QSFP_PN_OFFS 168
129#define QSFP_PN_LEN 16
130/* Bytes 184,185 are Vendor Rev. Left Justified, Blank-filled */
131#define QSFP_REV_OFFS 184
132#define QSFP_REV_LEN 2
133/*
134 * Bytes 186,187 are Wavelength, if Optical. Not Intel req'd
135 * If copper, they are attenuation in dB:
136 * Byte 186 is at 2.5Gb/sec (SDR), Byte 187 at 5.0Gb/sec (DDR)
137 */
138#define QSFP_ATTEN_OFFS 186
139#define QSFP_ATTEN_LEN 2
Mike Marciniszync7cb7632016-02-03 14:31:05 -0800140/*
141 * Bytes 188,189 are Wavelength tolerance, if optical
142 * If copper, they are attenuation in dB:
143 * Byte 188 is at 12.5 Gb/s, Byte 189 at 25 Gb/s
144 */
145#define QSFP_CU_ATTEN_7G_OFFS 188
146#define QSFP_CU_ATTEN_12G_OFFS 189
Mike Marciniszyn77241052015-07-30 15:17:43 -0400147/* Byte 190 is Max Case Temp. Not Intel req'd */
148/* Byte 191 is LSB of sum of bytes 128..190. Not Intel req'd */
149#define QSFP_CC_OFFS 191
Mike Marciniszync7cb7632016-02-03 14:31:05 -0800150#define QSFP_EQ_INFO_OFFS 193
151#define QSFP_CDR_INFO_OFFS 194
Mike Marciniszyn77241052015-07-30 15:17:43 -0400152/* Bytes 196..211 are Serial Number, String */
153#define QSFP_SN_OFFS 196
154#define QSFP_SN_LEN 16
155/* Bytes 212..219 are date-code YYMMDD (MM==1 for Jan) */
156#define QSFP_DATE_OFFS 212
157#define QSFP_DATE_LEN 6
158/* Bytes 218,219 are optional lot-code, string */
159#define QSFP_LOT_OFFS 218
160#define QSFP_LOT_LEN 2
161/* Bytes 220, 221 indicate monitoring options, Not Intel req'd */
Mike Marciniszync7cb7632016-02-03 14:31:05 -0800162/* Byte 222 indicates nominal bitrate in units of 250Mbits/sec */
163#define QSFP_NOM_BIT_RATE_250_OFFS 222
Mike Marciniszyn77241052015-07-30 15:17:43 -0400164/* Byte 223 is LSB of sum of bytes 192..222 */
165#define QSFP_CC_EXT_OFFS 223
166
167/*
168 * Interrupt flag masks
169 */
170#define QSFP_DATA_NOT_READY 0x01
171
172#define QSFP_HIGH_TEMP_ALARM 0x80
173#define QSFP_LOW_TEMP_ALARM 0x40
174#define QSFP_HIGH_TEMP_WARNING 0x20
175#define QSFP_LOW_TEMP_WARNING 0x10
176
177#define QSFP_HIGH_VCC_ALARM 0x80
178#define QSFP_LOW_VCC_ALARM 0x40
179#define QSFP_HIGH_VCC_WARNING 0x20
180#define QSFP_LOW_VCC_WARNING 0x10
181
182#define QSFP_HIGH_POWER_ALARM 0x88
183#define QSFP_LOW_POWER_ALARM 0x44
184#define QSFP_HIGH_POWER_WARNING 0x22
185#define QSFP_LOW_POWER_WARNING 0x11
186
187#define QSFP_HIGH_BIAS_ALARM 0x88
188#define QSFP_LOW_BIAS_ALARM 0x44
189#define QSFP_HIGH_BIAS_WARNING 0x22
190#define QSFP_LOW_BIAS_WARNING 0x11
191
192/*
193 * struct qsfp_data encapsulates state of QSFP device for one port.
194 * it will be part of port-specific data if a board supports QSFP.
195 *
196 * Since multiple board-types use QSFP, and their pport_data structs
197 * differ (in the chip-specific section), we need a pointer to its head.
198 *
199 * Avoiding premature optimization, we will have one work_struct per port,
200 * and let the qsfp_lock arbitrate access to common resources.
201 *
202 */
203
204#define QSFP_PWR(pbyte) (((pbyte) >> 6) & 3)
Mike Marciniszync7cb7632016-02-03 14:31:05 -0800205#define QSFP_HIGH_PWR(pbyte) (((pbyte) & 3) | 4)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400206#define QSFP_ATTEN_SDR(attenarray) (attenarray[0])
207#define QSFP_ATTEN_DDR(attenarray) (attenarray[1])
208
209struct qsfp_data {
210 /* Helps to find our way */
211 struct hfi1_pportdata *ppd;
212 struct work_struct qsfp_work;
213 u8 cache[QSFP_MAX_NUM_PAGES*128];
214 spinlock_t qsfp_lock;
215 u8 check_interrupt_flags;
216 u8 qsfp_interrupt_functional;
217 u8 cache_valid;
218 u8 cache_refresh_required;
219};
220
221int refresh_qsfp_cache(struct hfi1_pportdata *ppd,
222 struct qsfp_data *cp);
223int qsfp_mod_present(struct hfi1_pportdata *ppd);
224int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr,
225 u32 len, u8 *data);
226
227int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
228 int offset, void *bp, int len);
229int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr,
230 int offset, void *bp, int len);
231int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
232 int len);
233int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp,
234 int len);