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Mike Marciniszyn77241052015-07-30 15:17:43 -04001/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50#define CREATE_TRACE_POINTS
51#include "trace.h"
52
53u8 ibhdr_exhdr_len(struct hfi1_ib_header *hdr)
54{
55 struct hfi1_other_headers *ohdr;
56 u8 opcode;
57 u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
58
59 if (lnh == HFI1_LRH_BTH)
60 ohdr = &hdr->u.oth;
61 else
62 ohdr = &hdr->u.l.oth;
63 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
64 return hdr_len_by_opcode[opcode] == 0 ?
65 0 : hdr_len_by_opcode[opcode] - (12 + 8);
66}
67
68#define IMM_PRN "imm %d"
69#define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
Dean Luick3802f7e2015-12-01 15:38:12 -050070#define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
Mike Marciniszyn77241052015-07-30 15:17:43 -040071#define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
72#define ATOMICACKETH_PRN "origdata %lld"
73#define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %lld cdata %lld"
74
75#define OP(transport, op) IB_OPCODE_## transport ## _ ## op
76
77static u64 ib_u64_get(__be32 *p)
78{
79 return ((u64)be32_to_cpu(p[0]) << 32) | be32_to_cpu(p[1]);
80}
81
Dean Luick3802f7e2015-12-01 15:38:12 -050082static const char *parse_syndrome(u8 syndrome)
83{
84 switch (syndrome >> 5) {
85 case 0:
86 return "ACK";
87 case 1:
88 return "RNRNAK";
89 case 3:
90 return "NAK";
91 }
92 return "";
93}
94
Mike Marciniszyn77241052015-07-30 15:17:43 -040095const char *parse_everbs_hdrs(
96 struct trace_seq *p,
97 u8 opcode,
98 void *ehdrs)
99{
100 union ib_ehdrs *eh = ehdrs;
101 const char *ret = trace_seq_buffer_ptr(p);
102
103 switch (opcode) {
104 /* imm */
105 case OP(RC, SEND_LAST_WITH_IMMEDIATE):
106 case OP(UC, SEND_LAST_WITH_IMMEDIATE):
107 case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
108 case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
109 case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
110 case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
111 trace_seq_printf(p, IMM_PRN,
112 be32_to_cpu(eh->imm_data));
113 break;
114 /* reth + imm */
115 case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
116 case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
117 trace_seq_printf(p, RETH_PRN " " IMM_PRN,
118 (unsigned long long)ib_u64_get(
119 (__be32 *)&eh->rc.reth.vaddr),
120 be32_to_cpu(eh->rc.reth.rkey),
121 be32_to_cpu(eh->rc.reth.length),
122 be32_to_cpu(eh->rc.imm_data));
123 break;
124 /* reth */
125 case OP(RC, RDMA_READ_REQUEST):
126 case OP(RC, RDMA_WRITE_FIRST):
127 case OP(UC, RDMA_WRITE_FIRST):
128 case OP(RC, RDMA_WRITE_ONLY):
129 case OP(UC, RDMA_WRITE_ONLY):
130 trace_seq_printf(p, RETH_PRN,
131 (unsigned long long)ib_u64_get(
132 (__be32 *)&eh->rc.reth.vaddr),
133 be32_to_cpu(eh->rc.reth.rkey),
134 be32_to_cpu(eh->rc.reth.length));
135 break;
136 case OP(RC, RDMA_READ_RESPONSE_FIRST):
137 case OP(RC, RDMA_READ_RESPONSE_LAST):
138 case OP(RC, RDMA_READ_RESPONSE_ONLY):
139 case OP(RC, ACKNOWLEDGE):
Dean Luick3802f7e2015-12-01 15:38:12 -0500140 trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
141 parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
142 be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400143 break;
144 /* aeth + atomicacketh */
145 case OP(RC, ATOMIC_ACKNOWLEDGE):
146 trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
Dean Luick3802f7e2015-12-01 15:38:12 -0500147 be32_to_cpu(eh->at.aeth) >> 24,
148 parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
149 be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
150 (unsigned long long)
151 ib_u64_get(eh->at.atomic_ack_eth));
Mike Marciniszyn77241052015-07-30 15:17:43 -0400152 break;
153 /* atomiceth */
154 case OP(RC, COMPARE_SWAP):
155 case OP(RC, FETCH_ADD):
156 trace_seq_printf(p, ATOMICETH_PRN,
157 (unsigned long long)ib_u64_get(eh->atomic_eth.vaddr),
158 eh->atomic_eth.rkey,
159 (unsigned long long)ib_u64_get(
160 (__be32 *)&eh->atomic_eth.swap_data),
161 (unsigned long long) ib_u64_get(
162 (__be32 *)&eh->atomic_eth.compare_data));
163 break;
164 /* deth */
165 case OP(UD, SEND_ONLY):
166 case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
167 trace_seq_printf(p, DETH_PRN,
168 be32_to_cpu(eh->ud.deth[0]),
Dennis Dalessandroec4274f2016-01-19 14:43:44 -0800169 be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400170 break;
171 }
172 trace_seq_putc(p, 0);
173 return ret;
174}
175
176const char *parse_sdma_flags(
177 struct trace_seq *p,
178 u64 desc0, u64 desc1)
179{
180 const char *ret = trace_seq_buffer_ptr(p);
181 char flags[5] = { 'x', 'x', 'x', 'x', 0 };
182
183 flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
184 flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ? 'H' : '-';
185 flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
186 flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
187 trace_seq_printf(p, "%s", flags);
188 if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
189 trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
190 (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT)
191 & SDMA_DESC1_HEADER_MODE_MASK),
192 (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT)
193 & SDMA_DESC1_HEADER_INDEX_MASK),
194 (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT)
195 & SDMA_DESC1_HEADER_DWS_MASK));
196 return ret;
197}
198
199const char *print_u32_array(
200 struct trace_seq *p,
201 u32 *arr, int len)
202{
203 int i;
204 const char *ret = trace_seq_buffer_ptr(p);
205
206 for (i = 0; i < len ; i++)
207 trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
208 trace_seq_putc(p, 0);
209 return ret;
210}
211
212const char *print_u64_array(
213 struct trace_seq *p,
214 u64 *arr, int len)
215{
216 int i;
217 const char *ret = trace_seq_buffer_ptr(p);
218
219 for (i = 0; i < len; i++)
220 trace_seq_printf(p, "%s0x%016llx", i == 0 ? "" : " ", arr[i]);
221 trace_seq_putc(p, 0);
222 return ret;
223}
224
225__hfi1_trace_fn(PKT);
226__hfi1_trace_fn(PROC);
227__hfi1_trace_fn(SDMA);
228__hfi1_trace_fn(LINKVERB);
229__hfi1_trace_fn(DEBUG);
230__hfi1_trace_fn(SNOOP);
231__hfi1_trace_fn(CNTR);
232__hfi1_trace_fn(PIO);
233__hfi1_trace_fn(DC8051);
234__hfi1_trace_fn(FIRMWARE);
235__hfi1_trace_fn(RCVCTRL);
236__hfi1_trace_fn(TID);