Narender Ankam | c7ce0b0 | 2020-03-16 17:40:34 +0530 | [diff] [blame^] | 1 | /* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 13 | #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__ |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/of_address.h> |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/soc/qcom/llcc-qcom.h> |
Lloyd Atkinson | 1fb32ea | 2017-10-10 17:10:28 -0400 | [diff] [blame] | 18 | #include <linux/pm_qos.h> |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 19 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 20 | #include "sde_hw_mdss.h" |
| 21 | #include "sde_hw_catalog.h" |
| 22 | #include "sde_hw_catalog_format.h" |
| 23 | #include "sde_kms.h" |
| 24 | |
| 25 | /************************************************************* |
| 26 | * MACRO DEFINITION |
| 27 | *************************************************************/ |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 28 | |
| 29 | /** |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 30 | * Max hardware block in certain hardware. For ex: sspp pipes |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 31 | * can have QSEED, pcc, igc, pa, csc, qos entries, etc. This count is |
| 32 | * 64 based on software design. It should be increased if any of the |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 33 | * hardware block has more subblocks. |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 34 | */ |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 35 | #define MAX_SDE_HW_BLK 64 |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 36 | |
| 37 | /* each entry will have register address and bit offset in that register */ |
| 38 | #define MAX_BIT_OFFSET 2 |
| 39 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 40 | /* default line width for sspp, mixer, ds (input), wb */ |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 41 | #define DEFAULT_SDE_LINE_WIDTH 2048 |
| 42 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 43 | /* default output line width for ds */ |
| 44 | #define DEFAULT_SDE_OUTPUT_LINE_WIDTH 2560 |
| 45 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 46 | /* max mixer blend stages */ |
| 47 | #define DEFAULT_SDE_MIXER_BLENDSTAGES 7 |
| 48 | |
| 49 | /* max bank bit for macro tile and ubwc format */ |
| 50 | #define DEFAULT_SDE_HIGHEST_BANK_BIT 15 |
| 51 | |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 52 | /* default ubwc version */ |
| 53 | #define DEFAULT_SDE_UBWC_VERSION SDE_HW_UBWC_VER_10 |
| 54 | |
| 55 | /* default ubwc static config register value */ |
| 56 | #define DEFAULT_SDE_UBWC_STATIC 0x0 |
| 57 | |
| 58 | /* default ubwc swizzle register value */ |
| 59 | #define DEFAULT_SDE_UBWC_SWIZZLE 0x0 |
| 60 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 61 | /* default hardware block size if dtsi entry is not present */ |
| 62 | #define DEFAULT_SDE_HW_BLOCK_LEN 0x100 |
| 63 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 64 | /* total number of intf - dp, dsi, hdmi */ |
| 65 | #define INTF_COUNT 3 |
| 66 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 67 | #define MAX_UPSCALE_RATIO 20 |
| 68 | #define MAX_DOWNSCALE_RATIO 4 |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 69 | #define SSPP_UNITY_SCALE 1 |
| 70 | |
| 71 | #define MAX_HORZ_DECIMATION 4 |
| 72 | #define MAX_VERT_DECIMATION 4 |
| 73 | |
| 74 | #define MAX_SPLIT_DISPLAY_CTL 2 |
| 75 | #define MAX_PP_SPLIT_DISPLAY_CTL 1 |
| 76 | |
| 77 | #define MDSS_BASE_OFFSET 0x0 |
| 78 | |
| 79 | #define ROT_LM_OFFSET 3 |
| 80 | #define LINE_LM_OFFSET 5 |
| 81 | #define LINE_MODE_WB_OFFSET 2 |
| 82 | |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 83 | /** |
| 84 | * these configurations are decided based on max mdp clock. It accounts |
| 85 | * for max and min display resolution based on virtual hardware resource |
| 86 | * support. |
| 87 | */ |
| 88 | #define MAX_DISPLAY_HEIGHT_WITH_DECIMATION 2160 |
| 89 | #define MAX_DISPLAY_HEIGHT 5120 |
| 90 | #define MIN_DISPLAY_HEIGHT 0 |
| 91 | #define MIN_DISPLAY_WIDTH 0 |
| 92 | #define MAX_LM_PER_DISPLAY 2 |
| 93 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 94 | /* maximum XIN halt timeout in usec */ |
| 95 | #define VBIF_XIN_HALT_TIMEOUT 0x4000 |
| 96 | |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 97 | #define DEFAULT_PIXEL_RAM_SIZE (50 * 1024) |
| 98 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 99 | /* access property value based on prop_type and hardware index */ |
| 100 | #define PROP_VALUE_ACCESS(p, i, j) ((p + i)->value[j]) |
| 101 | |
| 102 | /* |
| 103 | * access element within PROP_TYPE_BIT_OFFSET_ARRAYs based on prop_type, |
| 104 | * hardware index and offset array index |
| 105 | */ |
| 106 | #define PROP_BITVALUE_ACCESS(p, i, j, k) ((p + i)->bit_value[j][k]) |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 107 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 108 | #define DEFAULT_SBUF_HEADROOM (20) |
Clarence Ip | 8dece62 | 2017-12-22 18:25:25 -0500 | [diff] [blame] | 109 | #define DEFAULT_SBUF_PREFILL (128) |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 110 | |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 111 | /* |
| 112 | * Default parameter values |
| 113 | */ |
| 114 | #define DEFAULT_MAX_BW_HIGH 7000000 |
| 115 | #define DEFAULT_MAX_BW_LOW 7000000 |
| 116 | #define DEFAULT_UNDERSIZED_PREFILL_LINES 2 |
| 117 | #define DEFAULT_XTRA_PREFILL_LINES 2 |
| 118 | #define DEFAULT_DEST_SCALE_PREFILL_LINES 3 |
| 119 | #define DEFAULT_MACROTILE_PREFILL_LINES 4 |
| 120 | #define DEFAULT_YUV_NV12_PREFILL_LINES 8 |
| 121 | #define DEFAULT_LINEAR_PREFILL_LINES 1 |
| 122 | #define DEFAULT_DOWNSCALING_PREFILL_LINES 1 |
| 123 | #define DEFAULT_CORE_IB_FF "6.0" |
| 124 | #define DEFAULT_CORE_CLK_FF "1.0" |
| 125 | #define DEFAULT_COMP_RATIO_RT \ |
| 126 | "NV12/5/1/1.23 AB24/5/1/1.23 XB24/5/1/1.23" |
| 127 | #define DEFAULT_COMP_RATIO_NRT \ |
| 128 | "NV12/5/1/1.25 AB24/5/1/1.25 XB24/5/1/1.25" |
| 129 | #define DEFAULT_MAX_PER_PIPE_BW 2400000 |
| 130 | #define DEFAULT_AMORTIZABLE_THRESHOLD 25 |
Lloyd Atkinson | 1fb32ea | 2017-10-10 17:10:28 -0400 | [diff] [blame] | 131 | #define DEFAULT_CPU_MASK 0 |
| 132 | #define DEFAULT_CPU_DMA_LATENCY PM_QOS_DEFAULT_VALUE |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 133 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 134 | /************************************************************* |
| 135 | * DTSI PROPERTY INDEX |
| 136 | *************************************************************/ |
| 137 | enum { |
| 138 | HW_OFF, |
| 139 | HW_LEN, |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 140 | HW_DISP, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 141 | HW_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 142 | }; |
| 143 | |
| 144 | enum sde_prop { |
| 145 | SDE_OFF, |
| 146 | SDE_LEN, |
| 147 | SSPP_LINEWIDTH, |
| 148 | MIXER_LINEWIDTH, |
| 149 | MIXER_BLEND, |
| 150 | WB_LINEWIDTH, |
| 151 | BANK_BIT, |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 152 | UBWC_VERSION, |
| 153 | UBWC_STATIC, |
| 154 | UBWC_SWIZZLE, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 155 | QSEED_TYPE, |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 156 | CSC_TYPE, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 157 | PANIC_PER_PIPE, |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 158 | SRC_SPLIT, |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 159 | DIM_LAYER, |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 160 | SMART_DMA_REV, |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 161 | IDLE_PC, |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 162 | DEST_SCALER, |
Sravanthi Kollukuduru | 15421d8 | 2017-10-26 12:05:04 +0530 | [diff] [blame] | 163 | SMART_PANEL_ALIGN_MODE, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 164 | SDE_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 165 | }; |
| 166 | |
| 167 | enum { |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 168 | PERF_MAX_BW_LOW, |
| 169 | PERF_MAX_BW_HIGH, |
Narendra Muppalla | a50934b | 2017-08-15 19:43:37 -0700 | [diff] [blame] | 170 | PERF_MIN_CORE_IB, |
| 171 | PERF_MIN_LLCC_IB, |
| 172 | PERF_MIN_DRAM_IB, |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 173 | PERF_CORE_IB_FF, |
| 174 | PERF_CORE_CLK_FF, |
| 175 | PERF_COMP_RATIO_RT, |
| 176 | PERF_COMP_RATIO_NRT, |
| 177 | PERF_UNDERSIZED_PREFILL_LINES, |
| 178 | PERF_DEST_SCALE_PREFILL_LINES, |
| 179 | PERF_MACROTILE_PREFILL_LINES, |
| 180 | PERF_YUV_NV12_PREFILL_LINES, |
| 181 | PERF_LINEAR_PREFILL_LINES, |
| 182 | PERF_DOWNSCALING_PREFILL_LINES, |
| 183 | PERF_XTRA_PREFILL_LINES, |
| 184 | PERF_AMORTIZABLE_THRESHOLD, |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 185 | PERF_DANGER_LUT, |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 186 | PERF_SAFE_LUT_LINEAR, |
| 187 | PERF_SAFE_LUT_MACROTILE, |
| 188 | PERF_SAFE_LUT_NRT, |
| 189 | PERF_SAFE_LUT_CWB, |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 190 | PERF_QOS_LUT_LINEAR, |
| 191 | PERF_QOS_LUT_MACROTILE, |
| 192 | PERF_QOS_LUT_NRT, |
| 193 | PERF_QOS_LUT_CWB, |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 194 | PERF_CDP_SETTING, |
Lloyd Atkinson | 1fb32ea | 2017-10-10 17:10:28 -0400 | [diff] [blame] | 195 | PERF_CPU_MASK, |
| 196 | PERF_CPU_DMA_LATENCY, |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 197 | PERF_PROP_MAX, |
| 198 | }; |
| 199 | |
| 200 | enum { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 201 | SSPP_OFF, |
| 202 | SSPP_SIZE, |
| 203 | SSPP_TYPE, |
| 204 | SSPP_XIN, |
| 205 | SSPP_CLK_CTRL, |
| 206 | SSPP_CLK_STATUS, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 207 | SSPP_SCALE_SIZE, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 208 | SSPP_VIG_BLOCKS, |
| 209 | SSPP_RGB_BLOCKS, |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 210 | SSPP_EXCL_RECT, |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 211 | SSPP_SMART_DMA, |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 212 | SSPP_MAX_PER_PIPE_BW, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 213 | SSPP_PROP_MAX, |
| 214 | }; |
| 215 | |
| 216 | enum { |
| 217 | VIG_QSEED_OFF, |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 218 | VIG_QSEED_LEN, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 219 | VIG_CSC_OFF, |
| 220 | VIG_HSIC_PROP, |
| 221 | VIG_MEMCOLOR_PROP, |
| 222 | VIG_PCC_PROP, |
| 223 | VIG_PROP_MAX, |
| 224 | }; |
| 225 | |
| 226 | enum { |
| 227 | RGB_SCALER_OFF, |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 228 | RGB_SCALER_LEN, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 229 | RGB_PCC_PROP, |
| 230 | RGB_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 231 | }; |
| 232 | |
| 233 | enum { |
| 234 | INTF_OFF, |
| 235 | INTF_LEN, |
| 236 | INTF_PREFETCH, |
| 237 | INTF_TYPE, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 238 | INTF_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 239 | }; |
| 240 | |
| 241 | enum { |
| 242 | PP_OFF, |
| 243 | PP_LEN, |
| 244 | TE_OFF, |
| 245 | TE_LEN, |
| 246 | TE2_OFF, |
| 247 | TE2_LEN, |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 248 | PP_SLAVE, |
Ping Li | 8430ee1 | 2017-02-24 14:14:44 -0800 | [diff] [blame] | 249 | DITHER_OFF, |
| 250 | DITHER_LEN, |
| 251 | DITHER_VER, |
Kalyan Thota | a02db2c | 2018-04-27 11:39:18 +0530 | [diff] [blame] | 252 | TE_SOURCE, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 253 | PP_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 254 | }; |
| 255 | |
| 256 | enum { |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 257 | DSC_OFF, |
| 258 | DSC_LEN, |
| 259 | DSC_PROP_MAX, |
| 260 | }; |
| 261 | |
| 262 | enum { |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 263 | DS_TOP_OFF, |
| 264 | DS_TOP_LEN, |
| 265 | DS_TOP_INPUT_LINEWIDTH, |
| 266 | DS_TOP_OUTPUT_LINEWIDTH, |
| 267 | DS_TOP_PROP_MAX, |
| 268 | }; |
| 269 | |
| 270 | enum { |
| 271 | DS_OFF, |
| 272 | DS_LEN, |
| 273 | DS_PROP_MAX, |
| 274 | }; |
| 275 | |
| 276 | enum { |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 277 | DSPP_TOP_OFF, |
| 278 | DSPP_TOP_SIZE, |
| 279 | DSPP_TOP_PROP_MAX, |
| 280 | }; |
| 281 | |
| 282 | enum { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 283 | DSPP_OFF, |
| 284 | DSPP_SIZE, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 285 | DSPP_BLOCKS, |
| 286 | DSPP_PROP_MAX, |
| 287 | }; |
| 288 | |
| 289 | enum { |
| 290 | DSPP_IGC_PROP, |
| 291 | DSPP_PCC_PROP, |
| 292 | DSPP_GC_PROP, |
| 293 | DSPP_HSIC_PROP, |
| 294 | DSPP_MEMCOLOR_PROP, |
| 295 | DSPP_SIXZONE_PROP, |
| 296 | DSPP_GAMUT_PROP, |
| 297 | DSPP_DITHER_PROP, |
| 298 | DSPP_HIST_PROP, |
| 299 | DSPP_VLUT_PROP, |
| 300 | DSPP_BLOCKS_PROP_MAX, |
| 301 | }; |
| 302 | |
| 303 | enum { |
| 304 | AD_OFF, |
| 305 | AD_VERSION, |
| 306 | AD_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 307 | }; |
| 308 | |
| 309 | enum { |
| 310 | MIXER_OFF, |
| 311 | MIXER_LEN, |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 312 | MIXER_PAIR_MASK, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 313 | MIXER_BLOCKS, |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 314 | MIXER_DISP, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 315 | MIXER_PROP_MAX, |
| 316 | }; |
| 317 | |
| 318 | enum { |
| 319 | MIXER_GC_PROP, |
| 320 | MIXER_BLOCKS_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 321 | }; |
| 322 | |
| 323 | enum { |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 324 | MIXER_BLEND_OP_OFF, |
| 325 | MIXER_BLEND_PROP_MAX, |
| 326 | }; |
| 327 | |
| 328 | enum { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 329 | WB_OFF, |
| 330 | WB_LEN, |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 331 | WB_ID, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 332 | WB_XIN_ID, |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 333 | WB_CLK_CTRL, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 334 | WB_PROP_MAX, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 335 | }; |
| 336 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 337 | enum { |
| 338 | VBIF_OFF, |
| 339 | VBIF_LEN, |
| 340 | VBIF_ID, |
| 341 | VBIF_DEFAULT_OT_RD_LIMIT, |
| 342 | VBIF_DEFAULT_OT_WR_LIMIT, |
| 343 | VBIF_DYNAMIC_OT_RD_LIMIT, |
| 344 | VBIF_DYNAMIC_OT_WR_LIMIT, |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 345 | VBIF_QOS_RT_REMAP, |
| 346 | VBIF_QOS_NRT_REMAP, |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 347 | VBIF_MEMTYPE_0, |
| 348 | VBIF_MEMTYPE_1, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 349 | VBIF_PROP_MAX, |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 350 | }; |
| 351 | |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 352 | enum { |
| 353 | REG_DMA_OFF, |
| 354 | REG_DMA_VERSION, |
| 355 | REG_DMA_TRIGGER_OFF, |
| 356 | REG_DMA_PROP_MAX |
| 357 | }; |
| 358 | |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 359 | enum { |
| 360 | INLINE_ROT_XIN, |
| 361 | INLINE_ROT_XIN_TYPE, |
| 362 | INLINE_ROT_CLK_CTRL, |
| 363 | INLINE_ROT_PROP_MAX |
| 364 | }; |
| 365 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 366 | /************************************************************* |
| 367 | * dts property definition |
| 368 | *************************************************************/ |
| 369 | enum prop_type { |
| 370 | PROP_TYPE_BOOL, |
| 371 | PROP_TYPE_U32, |
| 372 | PROP_TYPE_U32_ARRAY, |
| 373 | PROP_TYPE_STRING, |
| 374 | PROP_TYPE_STRING_ARRAY, |
| 375 | PROP_TYPE_BIT_OFFSET_ARRAY, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 376 | PROP_TYPE_NODE, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 377 | }; |
| 378 | |
| 379 | struct sde_prop_type { |
| 380 | /* use property index from enum property for readability purpose */ |
| 381 | u8 id; |
| 382 | /* it should be property name based on dtsi documentation */ |
| 383 | char *prop_name; |
| 384 | /** |
| 385 | * if property is marked mandatory then it will fail parsing |
| 386 | * when property is not present |
| 387 | */ |
| 388 | u32 is_mandatory; |
| 389 | /* property type based on "enum prop_type" */ |
| 390 | enum prop_type type; |
| 391 | }; |
| 392 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 393 | struct sde_prop_value { |
| 394 | u32 value[MAX_SDE_HW_BLK]; |
| 395 | u32 bit_value[MAX_SDE_HW_BLK][MAX_BIT_OFFSET]; |
| 396 | }; |
| 397 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 398 | /************************************************************* |
| 399 | * dts property list |
| 400 | *************************************************************/ |
| 401 | static struct sde_prop_type sde_prop[] = { |
| 402 | {SDE_OFF, "qcom,sde-off", true, PROP_TYPE_U32}, |
| 403 | {SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32}, |
| 404 | {SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32}, |
| 405 | {MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32}, |
| 406 | {MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32}, |
| 407 | {WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32}, |
| 408 | {BANK_BIT, "qcom,sde-highest-bank-bit", false, PROP_TYPE_U32}, |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 409 | {UBWC_VERSION, "qcom,sde-ubwc-version", false, PROP_TYPE_U32}, |
| 410 | {UBWC_STATIC, "qcom,sde-ubwc-static", false, PROP_TYPE_U32}, |
| 411 | {UBWC_SWIZZLE, "qcom,sde-ubwc-swizzle", false, PROP_TYPE_U32}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 412 | {QSEED_TYPE, "qcom,sde-qseed-type", false, PROP_TYPE_STRING}, |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 413 | {CSC_TYPE, "qcom,sde-csc-type", false, PROP_TYPE_STRING}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 414 | {PANIC_PER_PIPE, "qcom,sde-panic-per-pipe", false, PROP_TYPE_BOOL}, |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 415 | {SRC_SPLIT, "qcom,sde-has-src-split", false, PROP_TYPE_BOOL}, |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 416 | {DIM_LAYER, "qcom,sde-has-dim-layer", false, PROP_TYPE_BOOL}, |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 417 | {SMART_DMA_REV, "qcom,sde-smart-dma-rev", false, PROP_TYPE_STRING}, |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 418 | {IDLE_PC, "qcom,sde-has-idle-pc", false, PROP_TYPE_BOOL}, |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 419 | {DEST_SCALER, "qcom,sde-has-dest-scaler", false, PROP_TYPE_BOOL}, |
Sravanthi Kollukuduru | 15421d8 | 2017-10-26 12:05:04 +0530 | [diff] [blame] | 420 | {SMART_PANEL_ALIGN_MODE, "qcom,sde-smart-panel-align-mode", |
| 421 | false, PROP_TYPE_U32}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 422 | }; |
| 423 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 424 | static struct sde_prop_type sde_perf_prop[] = { |
| 425 | {PERF_MAX_BW_LOW, "qcom,sde-max-bw-low-kbps", false, PROP_TYPE_U32}, |
| 426 | {PERF_MAX_BW_HIGH, "qcom,sde-max-bw-high-kbps", false, PROP_TYPE_U32}, |
Narendra Muppalla | a50934b | 2017-08-15 19:43:37 -0700 | [diff] [blame] | 427 | {PERF_MIN_CORE_IB, "qcom,sde-min-core-ib-kbps", false, PROP_TYPE_U32}, |
| 428 | {PERF_MIN_LLCC_IB, "qcom,sde-min-llcc-ib-kbps", false, PROP_TYPE_U32}, |
| 429 | {PERF_MIN_DRAM_IB, "qcom,sde-min-dram-ib-kbps", false, PROP_TYPE_U32}, |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 430 | {PERF_CORE_IB_FF, "qcom,sde-core-ib-ff", false, PROP_TYPE_STRING}, |
| 431 | {PERF_CORE_CLK_FF, "qcom,sde-core-clk-ff", false, PROP_TYPE_STRING}, |
| 432 | {PERF_COMP_RATIO_RT, "qcom,sde-comp-ratio-rt", false, |
| 433 | PROP_TYPE_STRING}, |
| 434 | {PERF_COMP_RATIO_NRT, "qcom,sde-comp-ratio-nrt", false, |
| 435 | PROP_TYPE_STRING}, |
| 436 | {PERF_UNDERSIZED_PREFILL_LINES, "qcom,sde-undersizedprefill-lines", |
| 437 | false, PROP_TYPE_U32}, |
| 438 | {PERF_DEST_SCALE_PREFILL_LINES, "qcom,sde-dest-scaleprefill-lines", |
| 439 | false, PROP_TYPE_U32}, |
| 440 | {PERF_MACROTILE_PREFILL_LINES, "qcom,sde-macrotileprefill-lines", |
| 441 | false, PROP_TYPE_U32}, |
| 442 | {PERF_YUV_NV12_PREFILL_LINES, "qcom,sde-yuv-nv12prefill-lines", |
| 443 | false, PROP_TYPE_U32}, |
| 444 | {PERF_LINEAR_PREFILL_LINES, "qcom,sde-linearprefill-lines", |
| 445 | false, PROP_TYPE_U32}, |
| 446 | {PERF_DOWNSCALING_PREFILL_LINES, "qcom,sde-downscalingprefill-lines", |
| 447 | false, PROP_TYPE_U32}, |
| 448 | {PERF_XTRA_PREFILL_LINES, "qcom,sde-xtra-prefill-lines", |
| 449 | false, PROP_TYPE_U32}, |
| 450 | {PERF_AMORTIZABLE_THRESHOLD, "qcom,sde-amortizable-threshold", |
| 451 | false, PROP_TYPE_U32}, |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 452 | {PERF_DANGER_LUT, "qcom,sde-danger-lut", false, PROP_TYPE_U32_ARRAY}, |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 453 | {PERF_SAFE_LUT_LINEAR, "qcom,sde-safe-lut-linear", false, |
| 454 | PROP_TYPE_U32_ARRAY}, |
| 455 | {PERF_SAFE_LUT_MACROTILE, "qcom,sde-safe-lut-macrotile", false, |
| 456 | PROP_TYPE_U32_ARRAY}, |
| 457 | {PERF_SAFE_LUT_NRT, "qcom,sde-safe-lut-nrt", false, |
| 458 | PROP_TYPE_U32_ARRAY}, |
| 459 | {PERF_SAFE_LUT_CWB, "qcom,sde-safe-lut-cwb", false, |
| 460 | PROP_TYPE_U32_ARRAY}, |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 461 | {PERF_QOS_LUT_LINEAR, "qcom,sde-qos-lut-linear", false, |
| 462 | PROP_TYPE_U32_ARRAY}, |
| 463 | {PERF_QOS_LUT_MACROTILE, "qcom,sde-qos-lut-macrotile", false, |
| 464 | PROP_TYPE_U32_ARRAY}, |
| 465 | {PERF_QOS_LUT_NRT, "qcom,sde-qos-lut-nrt", false, |
| 466 | PROP_TYPE_U32_ARRAY}, |
| 467 | {PERF_QOS_LUT_CWB, "qcom,sde-qos-lut-cwb", false, |
| 468 | PROP_TYPE_U32_ARRAY}, |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 469 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 470 | {PERF_CDP_SETTING, "qcom,sde-cdp-setting", false, |
| 471 | PROP_TYPE_U32_ARRAY}, |
Lloyd Atkinson | 1fb32ea | 2017-10-10 17:10:28 -0400 | [diff] [blame] | 472 | {PERF_CPU_MASK, "qcom,sde-qos-cpu-mask", false, PROP_TYPE_U32}, |
| 473 | {PERF_CPU_DMA_LATENCY, "qcom,sde-qos-cpu-dma-latency", false, |
| 474 | PROP_TYPE_U32}, |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 475 | }; |
| 476 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 477 | static struct sde_prop_type sspp_prop[] = { |
| 478 | {SSPP_OFF, "qcom,sde-sspp-off", true, PROP_TYPE_U32_ARRAY}, |
| 479 | {SSPP_SIZE, "qcom,sde-sspp-src-size", false, PROP_TYPE_U32}, |
| 480 | {SSPP_TYPE, "qcom,sde-sspp-type", true, PROP_TYPE_STRING_ARRAY}, |
| 481 | {SSPP_XIN, "qcom,sde-sspp-xin-id", true, PROP_TYPE_U32_ARRAY}, |
| 482 | {SSPP_CLK_CTRL, "qcom,sde-sspp-clk-ctrl", false, |
| 483 | PROP_TYPE_BIT_OFFSET_ARRAY}, |
| 484 | {SSPP_CLK_STATUS, "qcom,sde-sspp-clk-status", false, |
| 485 | PROP_TYPE_BIT_OFFSET_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 486 | {SSPP_SCALE_SIZE, "qcom,sde-sspp-scale-size", false, PROP_TYPE_U32}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 487 | {SSPP_VIG_BLOCKS, "qcom,sde-sspp-vig-blocks", false, PROP_TYPE_NODE}, |
| 488 | {SSPP_RGB_BLOCKS, "qcom,sde-sspp-rgb-blocks", false, PROP_TYPE_NODE}, |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 489 | {SSPP_EXCL_RECT, "qcom,sde-sspp-excl-rect", false, PROP_TYPE_U32_ARRAY}, |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 490 | {SSPP_SMART_DMA, "qcom,sde-sspp-smart-dma-priority", false, |
| 491 | PROP_TYPE_U32_ARRAY}, |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 492 | {SSPP_MAX_PER_PIPE_BW, "qcom,sde-max-per-pipe-bw-kbps", false, |
| 493 | PROP_TYPE_U32_ARRAY}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 494 | }; |
| 495 | |
| 496 | static struct sde_prop_type vig_prop[] = { |
| 497 | {VIG_QSEED_OFF, "qcom,sde-vig-qseed-off", false, PROP_TYPE_U32}, |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 498 | {VIG_QSEED_LEN, "qcom,sde-vig-qseed-size", false, PROP_TYPE_U32}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 499 | {VIG_CSC_OFF, "qcom,sde-vig-csc-off", false, PROP_TYPE_U32}, |
| 500 | {VIG_HSIC_PROP, "qcom,sde-vig-hsic", false, PROP_TYPE_U32_ARRAY}, |
| 501 | {VIG_MEMCOLOR_PROP, "qcom,sde-vig-memcolor", false, |
| 502 | PROP_TYPE_U32_ARRAY}, |
| 503 | {VIG_PCC_PROP, "qcom,sde-vig-pcc", false, PROP_TYPE_U32_ARRAY}, |
| 504 | }; |
| 505 | |
| 506 | static struct sde_prop_type rgb_prop[] = { |
| 507 | {RGB_SCALER_OFF, "qcom,sde-rgb-scaler-off", false, PROP_TYPE_U32}, |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 508 | {RGB_SCALER_LEN, "qcom,sde-rgb-scaler-size", false, PROP_TYPE_U32}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 509 | {RGB_PCC_PROP, "qcom,sde-rgb-pcc", false, PROP_TYPE_U32_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 510 | }; |
| 511 | |
| 512 | static struct sde_prop_type ctl_prop[] = { |
| 513 | {HW_OFF, "qcom,sde-ctl-off", true, PROP_TYPE_U32_ARRAY}, |
| 514 | {HW_LEN, "qcom,sde-ctl-size", false, PROP_TYPE_U32}, |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 515 | {HW_DISP, "qcom,sde-ctl-display-pref", false, PROP_TYPE_STRING_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 516 | }; |
| 517 | |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 518 | struct sde_prop_type mixer_blend_prop[] = { |
| 519 | {MIXER_BLEND_OP_OFF, "qcom,sde-mixer-blend-op-off", true, |
| 520 | PROP_TYPE_U32_ARRAY}, |
| 521 | }; |
| 522 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 523 | static struct sde_prop_type mixer_prop[] = { |
| 524 | {MIXER_OFF, "qcom,sde-mixer-off", true, PROP_TYPE_U32_ARRAY}, |
| 525 | {MIXER_LEN, "qcom,sde-mixer-size", false, PROP_TYPE_U32}, |
Kalyan Thota | 72ea3ec | 2019-03-18 11:52:12 +0530 | [diff] [blame] | 526 | {MIXER_PAIR_MASK, "qcom,sde-mixer-pair-mask", false, |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 527 | PROP_TYPE_U32_ARRAY}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 528 | {MIXER_BLOCKS, "qcom,sde-mixer-blocks", false, PROP_TYPE_NODE}, |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 529 | {MIXER_DISP, "qcom,sde-mixer-display-pref", false, |
| 530 | PROP_TYPE_STRING_ARRAY}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 531 | }; |
| 532 | |
| 533 | static struct sde_prop_type mixer_blocks_prop[] = { |
| 534 | {MIXER_GC_PROP, "qcom,sde-mixer-gc", false, PROP_TYPE_U32_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 535 | }; |
| 536 | |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 537 | static struct sde_prop_type dspp_top_prop[] = { |
| 538 | {DSPP_TOP_OFF, "qcom,sde-dspp-top-off", true, PROP_TYPE_U32}, |
| 539 | {DSPP_TOP_SIZE, "qcom,sde-dspp-top-size", false, PROP_TYPE_U32}, |
| 540 | }; |
| 541 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 542 | static struct sde_prop_type dspp_prop[] = { |
| 543 | {DSPP_OFF, "qcom,sde-dspp-off", true, PROP_TYPE_U32_ARRAY}, |
| 544 | {DSPP_SIZE, "qcom,sde-dspp-size", false, PROP_TYPE_U32}, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 545 | {DSPP_BLOCKS, "qcom,sde-dspp-blocks", false, PROP_TYPE_NODE}, |
| 546 | }; |
| 547 | |
| 548 | static struct sde_prop_type dspp_blocks_prop[] = { |
| 549 | {DSPP_IGC_PROP, "qcom,sde-dspp-igc", false, PROP_TYPE_U32_ARRAY}, |
| 550 | {DSPP_PCC_PROP, "qcom,sde-dspp-pcc", false, PROP_TYPE_U32_ARRAY}, |
| 551 | {DSPP_GC_PROP, "qcom,sde-dspp-gc", false, PROP_TYPE_U32_ARRAY}, |
| 552 | {DSPP_HSIC_PROP, "qcom,sde-dspp-hsic", false, PROP_TYPE_U32_ARRAY}, |
| 553 | {DSPP_MEMCOLOR_PROP, "qcom,sde-dspp-memcolor", false, |
| 554 | PROP_TYPE_U32_ARRAY}, |
| 555 | {DSPP_SIXZONE_PROP, "qcom,sde-dspp-sixzone", false, |
| 556 | PROP_TYPE_U32_ARRAY}, |
| 557 | {DSPP_GAMUT_PROP, "qcom,sde-dspp-gamut", false, PROP_TYPE_U32_ARRAY}, |
| 558 | {DSPP_DITHER_PROP, "qcom,sde-dspp-dither", false, PROP_TYPE_U32_ARRAY}, |
| 559 | {DSPP_HIST_PROP, "qcom,sde-dspp-hist", false, PROP_TYPE_U32_ARRAY}, |
| 560 | {DSPP_VLUT_PROP, "qcom,sde-dspp-vlut", false, PROP_TYPE_U32_ARRAY}, |
| 561 | }; |
| 562 | |
| 563 | static struct sde_prop_type ad_prop[] = { |
| 564 | {AD_OFF, "qcom,sde-dspp-ad-off", false, PROP_TYPE_U32_ARRAY}, |
| 565 | {AD_VERSION, "qcom,sde-dspp-ad-version", false, PROP_TYPE_U32}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 566 | }; |
| 567 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 568 | static struct sde_prop_type ds_top_prop[] = { |
| 569 | {DS_TOP_OFF, "qcom,sde-dest-scaler-top-off", false, PROP_TYPE_U32}, |
| 570 | {DS_TOP_LEN, "qcom,sde-dest-scaler-top-size", false, PROP_TYPE_U32}, |
| 571 | {DS_TOP_INPUT_LINEWIDTH, "qcom,sde-max-dest-scaler-input-linewidth", |
| 572 | false, PROP_TYPE_U32}, |
| 573 | {DS_TOP_OUTPUT_LINEWIDTH, "qcom,sde-max-dest-scaler-output-linewidth", |
| 574 | false, PROP_TYPE_U32}, |
| 575 | }; |
| 576 | |
| 577 | static struct sde_prop_type ds_prop[] = { |
| 578 | {DS_OFF, "qcom,sde-dest-scaler-off", false, PROP_TYPE_U32_ARRAY}, |
| 579 | {DS_LEN, "qcom,sde-dest-scaler-size", false, PROP_TYPE_U32}, |
| 580 | }; |
| 581 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 582 | static struct sde_prop_type pp_prop[] = { |
| 583 | {PP_OFF, "qcom,sde-pp-off", true, PROP_TYPE_U32_ARRAY}, |
| 584 | {PP_LEN, "qcom,sde-pp-size", false, PROP_TYPE_U32}, |
| 585 | {TE_OFF, "qcom,sde-te-off", false, PROP_TYPE_U32_ARRAY}, |
| 586 | {TE_LEN, "qcom,sde-te-size", false, PROP_TYPE_U32}, |
| 587 | {TE2_OFF, "qcom,sde-te2-off", false, PROP_TYPE_U32_ARRAY}, |
| 588 | {TE2_LEN, "qcom,sde-te2-size", false, PROP_TYPE_U32}, |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 589 | {PP_SLAVE, "qcom,sde-pp-slave", false, PROP_TYPE_U32_ARRAY}, |
Ping Li | 8430ee1 | 2017-02-24 14:14:44 -0800 | [diff] [blame] | 590 | {DITHER_OFF, "qcom,sde-dither-off", false, PROP_TYPE_U32_ARRAY}, |
| 591 | {DITHER_LEN, "qcom,sde-dither-size", false, PROP_TYPE_U32}, |
| 592 | {DITHER_VER, "qcom,sde-dither-version", false, PROP_TYPE_U32}, |
Kalyan Thota | a02db2c | 2018-04-27 11:39:18 +0530 | [diff] [blame] | 593 | {TE_SOURCE, "qcom,sde-te-source", false, PROP_TYPE_U32_ARRAY}, |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 594 | }; |
| 595 | |
| 596 | static struct sde_prop_type dsc_prop[] = { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 597 | {DSC_OFF, "qcom,sde-dsc-off", false, PROP_TYPE_U32_ARRAY}, |
| 598 | {DSC_LEN, "qcom,sde-dsc-size", false, PROP_TYPE_U32}, |
| 599 | }; |
| 600 | |
| 601 | static struct sde_prop_type cdm_prop[] = { |
| 602 | {HW_OFF, "qcom,sde-cdm-off", false, PROP_TYPE_U32_ARRAY}, |
| 603 | {HW_LEN, "qcom,sde-cdm-size", false, PROP_TYPE_U32}, |
| 604 | }; |
| 605 | |
| 606 | static struct sde_prop_type intf_prop[] = { |
| 607 | {INTF_OFF, "qcom,sde-intf-off", true, PROP_TYPE_U32_ARRAY}, |
| 608 | {INTF_LEN, "qcom,sde-intf-size", false, PROP_TYPE_U32}, |
| 609 | {INTF_PREFETCH, "qcom,sde-intf-max-prefetch-lines", false, |
| 610 | PROP_TYPE_U32_ARRAY}, |
| 611 | {INTF_TYPE, "qcom,sde-intf-type", false, PROP_TYPE_STRING_ARRAY}, |
| 612 | }; |
| 613 | |
| 614 | static struct sde_prop_type wb_prop[] = { |
| 615 | {WB_OFF, "qcom,sde-wb-off", true, PROP_TYPE_U32_ARRAY}, |
| 616 | {WB_LEN, "qcom,sde-wb-size", false, PROP_TYPE_U32}, |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 617 | {WB_ID, "qcom,sde-wb-id", true, PROP_TYPE_U32_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 618 | {WB_XIN_ID, "qcom,sde-wb-xin-id", false, PROP_TYPE_U32_ARRAY}, |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 619 | {WB_CLK_CTRL, "qcom,sde-wb-clk-ctrl", false, |
| 620 | PROP_TYPE_BIT_OFFSET_ARRAY}, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 621 | }; |
| 622 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 623 | static struct sde_prop_type vbif_prop[] = { |
| 624 | {VBIF_OFF, "qcom,sde-vbif-off", true, PROP_TYPE_U32_ARRAY}, |
| 625 | {VBIF_LEN, "qcom,sde-vbif-size", false, PROP_TYPE_U32}, |
| 626 | {VBIF_ID, "qcom,sde-vbif-id", false, PROP_TYPE_U32_ARRAY}, |
| 627 | {VBIF_DEFAULT_OT_RD_LIMIT, "qcom,sde-vbif-default-ot-rd-limit", false, |
| 628 | PROP_TYPE_U32}, |
| 629 | {VBIF_DEFAULT_OT_WR_LIMIT, "qcom,sde-vbif-default-ot-wr-limit", false, |
| 630 | PROP_TYPE_U32}, |
| 631 | {VBIF_DYNAMIC_OT_RD_LIMIT, "qcom,sde-vbif-dynamic-ot-rd-limit", false, |
| 632 | PROP_TYPE_U32_ARRAY}, |
| 633 | {VBIF_DYNAMIC_OT_WR_LIMIT, "qcom,sde-vbif-dynamic-ot-wr-limit", false, |
| 634 | PROP_TYPE_U32_ARRAY}, |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 635 | {VBIF_QOS_RT_REMAP, "qcom,sde-vbif-qos-rt-remap", false, |
| 636 | PROP_TYPE_U32_ARRAY}, |
| 637 | {VBIF_QOS_NRT_REMAP, "qcom,sde-vbif-qos-nrt-remap", false, |
| 638 | PROP_TYPE_U32_ARRAY}, |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 639 | {VBIF_MEMTYPE_0, "qcom,sde-vbif-memtype-0", false, PROP_TYPE_U32_ARRAY}, |
| 640 | {VBIF_MEMTYPE_1, "qcom,sde-vbif-memtype-1", false, PROP_TYPE_U32_ARRAY}, |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 641 | }; |
| 642 | |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 643 | static struct sde_prop_type reg_dma_prop[REG_DMA_PROP_MAX] = { |
| 644 | [REG_DMA_OFF] = {REG_DMA_OFF, "qcom,sde-reg-dma-off", false, |
| 645 | PROP_TYPE_U32}, |
| 646 | [REG_DMA_VERSION] = {REG_DMA_VERSION, "qcom,sde-reg-dma-version", |
| 647 | false, PROP_TYPE_U32}, |
| 648 | [REG_DMA_TRIGGER_OFF] = {REG_DMA_TRIGGER_OFF, |
| 649 | "qcom,sde-reg-dma-trigger-off", false, |
| 650 | PROP_TYPE_U32}, |
| 651 | }; |
| 652 | |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 653 | static struct sde_prop_type inline_rot_prop[INLINE_ROT_PROP_MAX] = { |
| 654 | {INLINE_ROT_XIN, "qcom,sde-inline-rot-xin", false, |
| 655 | PROP_TYPE_U32_ARRAY}, |
| 656 | {INLINE_ROT_XIN_TYPE, "qcom,sde-inline-rot-xin-type", false, |
| 657 | PROP_TYPE_STRING_ARRAY}, |
| 658 | {INLINE_ROT_CLK_CTRL, "qcom,sde-inline-rot-clk-ctrl", false, |
| 659 | PROP_TYPE_BIT_OFFSET_ARRAY}, |
| 660 | }; |
| 661 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 662 | /************************************************************* |
| 663 | * static API list |
| 664 | *************************************************************/ |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 665 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 666 | static int _parse_dt_u32_handler(struct device_node *np, |
| 667 | char *prop_name, u32 *offsets, int len, bool mandatory) |
| 668 | { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 669 | int rc = -EINVAL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 670 | |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 671 | if (len > MAX_SDE_HW_BLK) { |
| 672 | SDE_ERROR( |
| 673 | "prop: %s tries out of bound access for u32 array read len: %d\n", |
| 674 | prop_name, len); |
| 675 | return -E2BIG; |
| 676 | } |
| 677 | |
| 678 | rc = of_property_read_u32_array(np, prop_name, offsets, len); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 679 | if (rc && mandatory) |
| 680 | SDE_ERROR("mandatory prop: %s u32 array read len:%d\n", |
| 681 | prop_name, len); |
| 682 | else if (rc) |
| 683 | SDE_DEBUG("optional prop: %s u32 array read len:%d\n", |
| 684 | prop_name, len); |
| 685 | |
| 686 | return rc; |
| 687 | } |
| 688 | |
| 689 | static int _parse_dt_bit_offset(struct device_node *np, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 690 | char *prop_name, struct sde_prop_value *prop_value, u32 prop_index, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 691 | u32 count, bool mandatory) |
| 692 | { |
| 693 | int rc = 0, len, i, j; |
| 694 | const u32 *arr; |
| 695 | |
| 696 | arr = of_get_property(np, prop_name, &len); |
| 697 | if (arr) { |
| 698 | len /= sizeof(u32); |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 699 | len &= ~0x1; |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 700 | |
| 701 | if (len > (MAX_SDE_HW_BLK * MAX_BIT_OFFSET)) { |
| 702 | SDE_ERROR( |
| 703 | "prop: %s len: %d will lead to out of bound access\n", |
| 704 | prop_name, len / MAX_BIT_OFFSET); |
| 705 | return -E2BIG; |
| 706 | } |
| 707 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 708 | for (i = 0, j = 0; i < len; j++) { |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 709 | PROP_BITVALUE_ACCESS(prop_value, prop_index, j, 0) = |
| 710 | be32_to_cpu(arr[i]); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 711 | i++; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 712 | PROP_BITVALUE_ACCESS(prop_value, prop_index, j, 1) = |
| 713 | be32_to_cpu(arr[i]); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 714 | i++; |
| 715 | } |
| 716 | } else { |
| 717 | if (mandatory) { |
| 718 | SDE_ERROR("error mandatory property '%s' not found\n", |
| 719 | prop_name); |
| 720 | rc = -EINVAL; |
| 721 | } else { |
| 722 | SDE_DEBUG("error optional property '%s' not found\n", |
| 723 | prop_name); |
| 724 | } |
| 725 | } |
| 726 | |
| 727 | return rc; |
| 728 | } |
| 729 | |
| 730 | static int _validate_dt_entry(struct device_node *np, |
| 731 | struct sde_prop_type *sde_prop, u32 prop_size, int *prop_count, |
| 732 | int *off_count) |
| 733 | { |
| 734 | int rc = 0, i, val; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 735 | struct device_node *snp = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 736 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 737 | if (off_count) { |
| 738 | *off_count = of_property_count_u32_elems(np, |
| 739 | sde_prop[0].prop_name); |
| 740 | if ((*off_count > MAX_BLOCKS) || (*off_count < 0)) { |
| 741 | if (sde_prop[0].is_mandatory) { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 742 | SDE_ERROR( |
| 743 | "invalid hw offset prop name:%s count: %d\n", |
Alan Kwong | 15cfbf9 | 2016-10-27 21:10:54 -0400 | [diff] [blame] | 744 | sde_prop[0].prop_name, *off_count); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 745 | rc = -EINVAL; |
| 746 | } |
| 747 | *off_count = 0; |
Alan Kwong | cbac0b3 | 2017-04-21 13:14:33 -0700 | [diff] [blame] | 748 | memset(prop_count, 0, sizeof(int) * prop_size); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 749 | return rc; |
Alan Kwong | 15cfbf9 | 2016-10-27 21:10:54 -0400 | [diff] [blame] | 750 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 751 | } |
| 752 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 753 | for (i = 0; i < prop_size; i++) { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 754 | switch (sde_prop[i].type) { |
| 755 | case PROP_TYPE_U32: |
| 756 | rc = of_property_read_u32(np, sde_prop[i].prop_name, |
| 757 | &val); |
| 758 | break; |
| 759 | case PROP_TYPE_U32_ARRAY: |
| 760 | prop_count[i] = of_property_count_u32_elems(np, |
| 761 | sde_prop[i].prop_name); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 762 | if (prop_count[i] < 0) |
| 763 | rc = prop_count[i]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 764 | break; |
| 765 | case PROP_TYPE_STRING_ARRAY: |
| 766 | prop_count[i] = of_property_count_strings(np, |
| 767 | sde_prop[i].prop_name); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 768 | if (prop_count[i] < 0) |
| 769 | rc = prop_count[i]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 770 | break; |
| 771 | case PROP_TYPE_BIT_OFFSET_ARRAY: |
| 772 | of_get_property(np, sde_prop[i].prop_name, &val); |
| 773 | prop_count[i] = val / (MAX_BIT_OFFSET * sizeof(u32)); |
| 774 | break; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 775 | case PROP_TYPE_NODE: |
| 776 | snp = of_get_child_by_name(np, |
| 777 | sde_prop[i].prop_name); |
| 778 | if (!snp) |
| 779 | rc = -EINVAL; |
| 780 | break; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 781 | default: |
| 782 | SDE_DEBUG("invalid property type:%d\n", |
| 783 | sde_prop[i].type); |
| 784 | break; |
| 785 | } |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 786 | SDE_DEBUG( |
| 787 | "prop id:%d prop name:%s prop type:%d prop_count:%d\n", |
| 788 | i, sde_prop[i].prop_name, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 789 | sde_prop[i].type, prop_count[i]); |
| 790 | |
| 791 | if (rc && sde_prop[i].is_mandatory && |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 792 | ((sde_prop[i].type == PROP_TYPE_U32) || |
| 793 | (sde_prop[i].type == PROP_TYPE_NODE))) { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 794 | SDE_ERROR("prop:%s not present\n", |
| 795 | sde_prop[i].prop_name); |
| 796 | goto end; |
| 797 | } else if (sde_prop[i].type == PROP_TYPE_U32 || |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 798 | sde_prop[i].type == PROP_TYPE_BOOL || |
| 799 | sde_prop[i].type == PROP_TYPE_NODE) { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 800 | rc = 0; |
| 801 | continue; |
| 802 | } |
| 803 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 804 | if (off_count && (prop_count[i] != *off_count) && |
| 805 | sde_prop[i].is_mandatory) { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 806 | SDE_ERROR( |
| 807 | "prop:%s count:%d is different compared to offset array:%d\n", |
| 808 | sde_prop[i].prop_name, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 809 | prop_count[i], *off_count); |
| 810 | rc = -EINVAL; |
| 811 | goto end; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 812 | } else if (off_count && prop_count[i] != *off_count) { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 813 | SDE_DEBUG( |
| 814 | "prop:%s count:%d is different compared to offset array:%d\n", |
| 815 | sde_prop[i].prop_name, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 816 | prop_count[i], *off_count); |
| 817 | rc = 0; |
| 818 | prop_count[i] = 0; |
| 819 | } |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 820 | if (prop_count[i] < 0) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 821 | prop_count[i] = 0; |
| 822 | if (sde_prop[i].is_mandatory) { |
| 823 | SDE_ERROR("prop:%s count:%d is negative\n", |
| 824 | sde_prop[i].prop_name, prop_count[i]); |
| 825 | rc = -EINVAL; |
| 826 | } else { |
| 827 | rc = 0; |
| 828 | SDE_DEBUG("prop:%s count:%d is negative\n", |
| 829 | sde_prop[i].prop_name, prop_count[i]); |
| 830 | } |
| 831 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 832 | } |
| 833 | |
| 834 | end: |
| 835 | return rc; |
| 836 | } |
| 837 | |
| 838 | static int _read_dt_entry(struct device_node *np, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 839 | struct sde_prop_type *sde_prop, u32 prop_size, int *prop_count, |
| 840 | bool *prop_exists, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 841 | struct sde_prop_value *prop_value) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 842 | { |
| 843 | int rc = 0, i, j; |
| 844 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 845 | for (i = 0; i < prop_size; i++) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 846 | prop_exists[i] = true; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 847 | switch (sde_prop[i].type) { |
| 848 | case PROP_TYPE_U32: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 849 | rc = of_property_read_u32(np, sde_prop[i].prop_name, |
| 850 | &PROP_VALUE_ACCESS(prop_value, i, 0)); |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 851 | SDE_DEBUG( |
| 852 | "prop id:%d prop name:%s prop type:%d value:0x%x\n", |
| 853 | i, sde_prop[i].prop_name, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 854 | sde_prop[i].type, |
| 855 | PROP_VALUE_ACCESS(prop_value, i, 0)); |
| 856 | if (rc) |
| 857 | prop_exists[i] = false; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 858 | break; |
| 859 | case PROP_TYPE_BOOL: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 860 | PROP_VALUE_ACCESS(prop_value, i, 0) = |
| 861 | of_property_read_bool(np, |
| 862 | sde_prop[i].prop_name); |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 863 | SDE_DEBUG( |
| 864 | "prop id:%d prop name:%s prop type:%d value:0x%x\n", |
| 865 | i, sde_prop[i].prop_name, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 866 | sde_prop[i].type, |
| 867 | PROP_VALUE_ACCESS(prop_value, i, 0)); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 868 | break; |
| 869 | case PROP_TYPE_U32_ARRAY: |
| 870 | rc = _parse_dt_u32_handler(np, sde_prop[i].prop_name, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 871 | &PROP_VALUE_ACCESS(prop_value, i, 0), |
| 872 | prop_count[i], sde_prop[i].is_mandatory); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 873 | if (rc && sde_prop[i].is_mandatory) { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 874 | SDE_ERROR( |
| 875 | "%s prop validation success but read failed\n", |
| 876 | sde_prop[i].prop_name); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 877 | prop_exists[i] = false; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 878 | goto end; |
| 879 | } else { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 880 | if (rc) |
| 881 | prop_exists[i] = false; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 882 | /* only for debug purpose */ |
| 883 | SDE_DEBUG("prop id:%d prop name:%s prop \"\ |
| 884 | type:%d", i, sde_prop[i].prop_name, |
| 885 | sde_prop[i].type); |
| 886 | for (j = 0; j < prop_count[i]; j++) |
| 887 | SDE_DEBUG(" value[%d]:0x%x ", j, |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 888 | PROP_VALUE_ACCESS(prop_value, i, |
| 889 | j)); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 890 | SDE_DEBUG("\n"); |
| 891 | } |
| 892 | break; |
| 893 | case PROP_TYPE_BIT_OFFSET_ARRAY: |
| 894 | rc = _parse_dt_bit_offset(np, sde_prop[i].prop_name, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 895 | prop_value, i, prop_count[i], |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 896 | sde_prop[i].is_mandatory); |
| 897 | if (rc && sde_prop[i].is_mandatory) { |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 898 | SDE_ERROR( |
| 899 | "%s prop validation success but read failed\n", |
| 900 | sde_prop[i].prop_name); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 901 | prop_exists[i] = false; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 902 | goto end; |
| 903 | } else { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 904 | if (rc) |
| 905 | prop_exists[i] = false; |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 906 | SDE_DEBUG( |
| 907 | "prop id:%d prop name:%s prop type:%d", |
| 908 | i, sde_prop[i].prop_name, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 909 | sde_prop[i].type); |
| 910 | for (j = 0; j < prop_count[i]; j++) |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 911 | SDE_DEBUG( |
| 912 | "count[%d]: bit:0x%x off:0x%x\n", j, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 913 | PROP_BITVALUE_ACCESS(prop_value, |
| 914 | i, j, 0), |
| 915 | PROP_BITVALUE_ACCESS(prop_value, |
| 916 | i, j, 1)); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 917 | SDE_DEBUG("\n"); |
| 918 | } |
| 919 | break; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 920 | case PROP_TYPE_NODE: |
| 921 | /* Node will be parsed in calling function */ |
| 922 | rc = 0; |
| 923 | break; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 924 | default: |
| 925 | SDE_DEBUG("invalid property type:%d\n", |
| 926 | sde_prop[i].type); |
| 927 | break; |
| 928 | } |
| 929 | rc = 0; |
| 930 | } |
| 931 | |
| 932 | end: |
| 933 | return rc; |
| 934 | } |
| 935 | |
| 936 | static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg, |
| 937 | struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 938 | bool *prop_exists, struct sde_prop_value *prop_value, u32 *vig_count) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 939 | { |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 940 | sblk->maxupscale = MAX_UPSCALE_RATIO; |
| 941 | sblk->maxdwnscale = MAX_DOWNSCALE_RATIO; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 942 | sspp->id = SSPP_VIG0 + *vig_count; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 943 | snprintf(sspp->name, SDE_HW_BLK_NAME_LEN, "sspp_%u", |
| 944 | sspp->id - SSPP_VIG0); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 945 | sspp->clk_ctrl = SDE_CLK_CTRL_VIG0 + *vig_count; |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 946 | sspp->type = SSPP_TYPE_VIG; |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 947 | set_bit(SDE_SSPP_QOS, &sspp->features); |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 948 | if (sde_cfg->vbif_qos_nlvl == 8) |
| 949 | set_bit(SDE_SSPP_QOS_8LVL, &sspp->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 950 | (*vig_count)++; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 951 | |
| 952 | if (!prop_value) |
| 953 | return; |
| 954 | |
| 955 | if (sde_cfg->qseed_type == SDE_SSPP_SCALER_QSEED2) { |
| 956 | set_bit(SDE_SSPP_SCALER_QSEED2, &sspp->features); |
| 957 | sblk->scaler_blk.id = SDE_SSPP_SCALER_QSEED2; |
| 958 | sblk->scaler_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 959 | VIG_QSEED_OFF, 0); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 960 | sblk->scaler_blk.len = PROP_VALUE_ACCESS(prop_value, |
| 961 | VIG_QSEED_LEN, 0); |
| 962 | snprintf(sblk->scaler_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 963 | "sspp_scaler%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 964 | } else if (sde_cfg->qseed_type == SDE_SSPP_SCALER_QSEED3) { |
| 965 | set_bit(SDE_SSPP_SCALER_QSEED3, &sspp->features); |
| 966 | sblk->scaler_blk.id = SDE_SSPP_SCALER_QSEED3; |
| 967 | sblk->scaler_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 968 | VIG_QSEED_OFF, 0); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 969 | sblk->scaler_blk.len = PROP_VALUE_ACCESS(prop_value, |
| 970 | VIG_QSEED_LEN, 0); |
| 971 | snprintf(sblk->scaler_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 972 | "sspp_scaler%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 973 | } |
| 974 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 975 | if (sde_cfg->has_sbuf) |
| 976 | set_bit(SDE_SSPP_SBUF, &sspp->features); |
| 977 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 978 | sblk->csc_blk.id = SDE_SSPP_CSC; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 979 | snprintf(sblk->csc_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 980 | "sspp_csc%u", sspp->id - SSPP_VIG0); |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 981 | if (sde_cfg->csc_type == SDE_SSPP_CSC) { |
| 982 | set_bit(SDE_SSPP_CSC, &sspp->features); |
| 983 | sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 984 | VIG_CSC_OFF, 0); |
| 985 | } else if (sde_cfg->csc_type == SDE_SSPP_CSC_10BIT) { |
| 986 | set_bit(SDE_SSPP_CSC_10BIT, &sspp->features); |
| 987 | sblk->csc_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 988 | VIG_CSC_OFF, 0); |
| 989 | } |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 990 | |
| 991 | sblk->hsic_blk.id = SDE_SSPP_HSIC; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 992 | snprintf(sblk->hsic_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 993 | "sspp_hsic%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 994 | if (prop_exists[VIG_HSIC_PROP]) { |
| 995 | sblk->hsic_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 996 | VIG_HSIC_PROP, 0); |
| 997 | sblk->hsic_blk.version = PROP_VALUE_ACCESS(prop_value, |
| 998 | VIG_HSIC_PROP, 1); |
| 999 | sblk->hsic_blk.len = 0; |
| 1000 | set_bit(SDE_SSPP_HSIC, &sspp->features); |
| 1001 | } |
| 1002 | |
| 1003 | sblk->memcolor_blk.id = SDE_SSPP_MEMCOLOR; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1004 | snprintf(sblk->memcolor_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1005 | "sspp_memcolor%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1006 | if (prop_exists[VIG_MEMCOLOR_PROP]) { |
| 1007 | sblk->memcolor_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 1008 | VIG_MEMCOLOR_PROP, 0); |
| 1009 | sblk->memcolor_blk.version = PROP_VALUE_ACCESS(prop_value, |
| 1010 | VIG_MEMCOLOR_PROP, 1); |
| 1011 | sblk->memcolor_blk.len = 0; |
| 1012 | set_bit(SDE_SSPP_MEMCOLOR, &sspp->features); |
| 1013 | } |
| 1014 | |
| 1015 | sblk->pcc_blk.id = SDE_SSPP_PCC; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1016 | snprintf(sblk->pcc_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1017 | "sspp_pcc%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1018 | if (prop_exists[VIG_PCC_PROP]) { |
| 1019 | sblk->pcc_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 1020 | VIG_PCC_PROP, 0); |
| 1021 | sblk->pcc_blk.version = PROP_VALUE_ACCESS(prop_value, |
| 1022 | VIG_PCC_PROP, 1); |
| 1023 | sblk->pcc_blk.len = 0; |
| 1024 | set_bit(SDE_SSPP_PCC, &sspp->features); |
| 1025 | } |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1026 | |
| 1027 | sblk->format_list = sde_cfg->vig_formats; |
Steve Cohen | 5742817 | 2017-07-18 10:57:17 -0400 | [diff] [blame] | 1028 | sblk->virt_format_list = sde_cfg->dma_formats; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1029 | } |
| 1030 | |
| 1031 | static void _sde_sspp_setup_rgb(struct sde_mdss_cfg *sde_cfg, |
| 1032 | struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1033 | bool *prop_exists, struct sde_prop_value *prop_value, u32 *rgb_count) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1034 | { |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 1035 | sblk->maxupscale = MAX_UPSCALE_RATIO; |
| 1036 | sblk->maxdwnscale = MAX_DOWNSCALE_RATIO; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1037 | sspp->id = SSPP_RGB0 + *rgb_count; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1038 | snprintf(sspp->name, SDE_HW_BLK_NAME_LEN, "sspp_%u", |
| 1039 | sspp->id - SSPP_VIG0); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1040 | sspp->clk_ctrl = SDE_CLK_CTRL_RGB0 + *rgb_count; |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 1041 | sspp->type = SSPP_TYPE_RGB; |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1042 | set_bit(SDE_SSPP_QOS, &sspp->features); |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 1043 | if (sde_cfg->vbif_qos_nlvl == 8) |
| 1044 | set_bit(SDE_SSPP_QOS_8LVL, &sspp->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1045 | (*rgb_count)++; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1046 | |
| 1047 | if (!prop_value) |
| 1048 | return; |
| 1049 | |
| 1050 | if (sde_cfg->qseed_type == SDE_SSPP_SCALER_QSEED2) { |
| 1051 | set_bit(SDE_SSPP_SCALER_RGB, &sspp->features); |
| 1052 | sblk->scaler_blk.id = SDE_SSPP_SCALER_QSEED2; |
| 1053 | sblk->scaler_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 1054 | RGB_SCALER_OFF, 0); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1055 | sblk->scaler_blk.len = PROP_VALUE_ACCESS(prop_value, |
| 1056 | RGB_SCALER_LEN, 0); |
| 1057 | snprintf(sblk->scaler_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1058 | "sspp_scaler%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1059 | } else if (sde_cfg->qseed_type == SDE_SSPP_SCALER_QSEED3) { |
| 1060 | set_bit(SDE_SSPP_SCALER_RGB, &sspp->features); |
| 1061 | sblk->scaler_blk.id = SDE_SSPP_SCALER_QSEED3; |
| 1062 | sblk->scaler_blk.base = PROP_VALUE_ACCESS(prop_value, |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1063 | RGB_SCALER_LEN, 0); |
| 1064 | sblk->scaler_blk.len = PROP_VALUE_ACCESS(prop_value, |
| 1065 | SSPP_SCALE_SIZE, 0); |
| 1066 | snprintf(sblk->scaler_blk.name, SDE_HW_BLK_NAME_LEN, |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1067 | "sspp_scaler%u", sspp->id - SSPP_VIG0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1068 | } |
| 1069 | |
| 1070 | sblk->pcc_blk.id = SDE_SSPP_PCC; |
| 1071 | if (prop_exists[RGB_PCC_PROP]) { |
| 1072 | sblk->pcc_blk.base = PROP_VALUE_ACCESS(prop_value, |
| 1073 | RGB_PCC_PROP, 0); |
| 1074 | sblk->pcc_blk.version = PROP_VALUE_ACCESS(prop_value, |
| 1075 | RGB_PCC_PROP, 1); |
| 1076 | sblk->pcc_blk.len = 0; |
| 1077 | set_bit(SDE_SSPP_PCC, &sspp->features); |
| 1078 | } |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1079 | |
| 1080 | sblk->format_list = sde_cfg->dma_formats; |
Steve Cohen | 5742817 | 2017-07-18 10:57:17 -0400 | [diff] [blame] | 1081 | sblk->virt_format_list = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1082 | } |
| 1083 | |
| 1084 | static void _sde_sspp_setup_cursor(struct sde_mdss_cfg *sde_cfg, |
| 1085 | struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1086 | struct sde_prop_value *prop_value, u32 *cursor_count) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1087 | { |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1088 | if (!IS_SDE_MAJOR_MINOR_SAME(sde_cfg->hwversion, SDE_HW_VER_300)) |
| 1089 | SDE_ERROR("invalid sspp type %d, xin id %d\n", |
| 1090 | sspp->type, sspp->xin_id); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1091 | set_bit(SDE_SSPP_CURSOR, &sspp->features); |
| 1092 | sblk->maxupscale = SSPP_UNITY_SCALE; |
| 1093 | sblk->maxdwnscale = SSPP_UNITY_SCALE; |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1094 | sblk->format_list = sde_cfg->cursor_formats; |
Steve Cohen | 5742817 | 2017-07-18 10:57:17 -0400 | [diff] [blame] | 1095 | sblk->virt_format_list = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1096 | sspp->id = SSPP_CURSOR0 + *cursor_count; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1097 | snprintf(sspp->name, SDE_HW_BLK_NAME_LEN, "sspp_%u", |
| 1098 | sspp->id - SSPP_VIG0); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1099 | sspp->clk_ctrl = SDE_CLK_CTRL_CURSOR0 + *cursor_count; |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 1100 | sspp->type = SSPP_TYPE_CURSOR; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1101 | (*cursor_count)++; |
| 1102 | } |
| 1103 | |
| 1104 | static void _sde_sspp_setup_dma(struct sde_mdss_cfg *sde_cfg, |
| 1105 | struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1106 | struct sde_prop_value *prop_value, u32 *dma_count) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1107 | { |
| 1108 | sblk->maxupscale = SSPP_UNITY_SCALE; |
| 1109 | sblk->maxdwnscale = SSPP_UNITY_SCALE; |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1110 | sblk->format_list = sde_cfg->dma_formats; |
Steve Cohen | 5742817 | 2017-07-18 10:57:17 -0400 | [diff] [blame] | 1111 | sblk->virt_format_list = sde_cfg->dma_formats; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1112 | sspp->id = SSPP_DMA0 + *dma_count; |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1113 | sspp->clk_ctrl = SDE_CLK_CTRL_DMA0 + *dma_count; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1114 | snprintf(sspp->name, SDE_HW_BLK_NAME_LEN, "sspp_%u", |
| 1115 | sspp->id - SSPP_VIG0); |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 1116 | sspp->type = SSPP_TYPE_DMA; |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1117 | set_bit(SDE_SSPP_QOS, &sspp->features); |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 1118 | if (sde_cfg->vbif_qos_nlvl == 8) |
| 1119 | set_bit(SDE_SSPP_QOS_8LVL, &sspp->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1120 | (*dma_count)++; |
| 1121 | } |
| 1122 | |
| 1123 | static int sde_sspp_parse_dt(struct device_node *np, |
| 1124 | struct sde_mdss_cfg *sde_cfg) |
| 1125 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1126 | int rc, prop_count[SSPP_PROP_MAX], off_count, i, j; |
| 1127 | int vig_prop_count[VIG_PROP_MAX], rgb_prop_count[RGB_PROP_MAX]; |
| 1128 | bool prop_exists[SSPP_PROP_MAX], vig_prop_exists[VIG_PROP_MAX]; |
| 1129 | bool rgb_prop_exists[RGB_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1130 | struct sde_prop_value *prop_value = NULL; |
| 1131 | struct sde_prop_value *vig_prop_value = NULL, *rgb_prop_value = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1132 | const char *type; |
| 1133 | struct sde_sspp_cfg *sspp; |
| 1134 | struct sde_sspp_sub_blks *sblk; |
| 1135 | u32 vig_count = 0, dma_count = 0, rgb_count = 0, cursor_count = 0; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1136 | struct device_node *snp = NULL; |
| 1137 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1138 | prop_value = kzalloc(SSPP_PROP_MAX * |
| 1139 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1140 | if (!prop_value) { |
| 1141 | rc = -ENOMEM; |
| 1142 | goto end; |
| 1143 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1144 | |
| 1145 | rc = _validate_dt_entry(np, sspp_prop, ARRAY_SIZE(sspp_prop), |
| 1146 | prop_count, &off_count); |
| 1147 | if (rc) |
| 1148 | goto end; |
| 1149 | |
| 1150 | rc = _read_dt_entry(np, sspp_prop, ARRAY_SIZE(sspp_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1151 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1152 | if (rc) |
| 1153 | goto end; |
| 1154 | |
| 1155 | sde_cfg->sspp_count = off_count; |
| 1156 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1157 | /* get vig feature dt properties if they exist */ |
| 1158 | snp = of_get_child_by_name(np, sspp_prop[SSPP_VIG_BLOCKS].prop_name); |
| 1159 | if (snp) { |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1160 | vig_prop_value = kzalloc(VIG_PROP_MAX * |
| 1161 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1162 | if (!vig_prop_value) { |
| 1163 | rc = -ENOMEM; |
| 1164 | goto end; |
| 1165 | } |
| 1166 | rc = _validate_dt_entry(snp, vig_prop, ARRAY_SIZE(vig_prop), |
| 1167 | vig_prop_count, NULL); |
| 1168 | if (rc) |
| 1169 | goto end; |
| 1170 | rc = _read_dt_entry(snp, vig_prop, ARRAY_SIZE(vig_prop), |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1171 | vig_prop_count, vig_prop_exists, |
| 1172 | vig_prop_value); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1173 | } |
| 1174 | |
| 1175 | /* get rgb feature dt properties if they exist */ |
| 1176 | snp = of_get_child_by_name(np, sspp_prop[SSPP_RGB_BLOCKS].prop_name); |
| 1177 | if (snp) { |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1178 | rgb_prop_value = kzalloc(RGB_PROP_MAX * |
| 1179 | sizeof(struct sde_prop_value), |
| 1180 | GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1181 | if (!rgb_prop_value) { |
| 1182 | rc = -ENOMEM; |
| 1183 | goto end; |
| 1184 | } |
| 1185 | rc = _validate_dt_entry(snp, rgb_prop, ARRAY_SIZE(rgb_prop), |
| 1186 | rgb_prop_count, NULL); |
| 1187 | if (rc) |
| 1188 | goto end; |
| 1189 | rc = _read_dt_entry(snp, rgb_prop, ARRAY_SIZE(rgb_prop), |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1190 | rgb_prop_count, rgb_prop_exists, |
| 1191 | rgb_prop_value); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1192 | } |
| 1193 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1194 | for (i = 0; i < off_count; i++) { |
| 1195 | sspp = sde_cfg->sspp + i; |
| 1196 | sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); |
| 1197 | if (!sblk) { |
| 1198 | rc = -ENOMEM; |
| 1199 | /* catalog deinit will release the allocated blocks */ |
| 1200 | goto end; |
| 1201 | } |
| 1202 | sspp->sblk = sblk; |
| 1203 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1204 | sspp->base = PROP_VALUE_ACCESS(prop_value, SSPP_OFF, i); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1205 | sspp->len = PROP_VALUE_ACCESS(prop_value, SSPP_SIZE, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1206 | sblk->maxlinewidth = sde_cfg->max_sspp_linewidth; |
| 1207 | |
| 1208 | set_bit(SDE_SSPP_SRC, &sspp->features); |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 1209 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 1210 | if (sde_cfg->has_cdp) |
| 1211 | set_bit(SDE_SSPP_CDP, &sspp->features); |
| 1212 | |
Alan Kwong | 2349d74 | 2017-04-20 08:27:30 -0700 | [diff] [blame] | 1213 | if (sde_cfg->ts_prefill_rev == 1) { |
| 1214 | set_bit(SDE_SSPP_TS_PREFILL, &sspp->features); |
| 1215 | } else if (sde_cfg->ts_prefill_rev == 2) { |
| 1216 | set_bit(SDE_SSPP_TS_PREFILL, &sspp->features); |
| 1217 | set_bit(SDE_SSPP_TS_PREFILL_REC1, &sspp->features); |
| 1218 | } |
| 1219 | |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 1220 | sblk->smart_dma_priority = |
| 1221 | PROP_VALUE_ACCESS(prop_value, SSPP_SMART_DMA, i); |
| 1222 | |
| 1223 | if (sblk->smart_dma_priority && sde_cfg->smart_dma_rev) |
| 1224 | set_bit(sde_cfg->smart_dma_rev, &sspp->features); |
| 1225 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1226 | sblk->src_blk.id = SDE_SSPP_SRC; |
| 1227 | |
| 1228 | of_property_read_string_index(np, |
| 1229 | sspp_prop[SSPP_TYPE].prop_name, i, &type); |
| 1230 | if (!strcmp(type, "vig")) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1231 | _sde_sspp_setup_vig(sde_cfg, sspp, sblk, |
| 1232 | vig_prop_exists, vig_prop_value, &vig_count); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1233 | } else if (!strcmp(type, "rgb")) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1234 | _sde_sspp_setup_rgb(sde_cfg, sspp, sblk, |
| 1235 | rgb_prop_exists, rgb_prop_value, &rgb_count); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1236 | } else if (!strcmp(type, "cursor")) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1237 | /* No prop values for cursor pipes */ |
| 1238 | _sde_sspp_setup_cursor(sde_cfg, sspp, sblk, NULL, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1239 | &cursor_count); |
| 1240 | } else if (!strcmp(type, "dma")) { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1241 | /* No prop values for DMA pipes */ |
| 1242 | _sde_sspp_setup_dma(sde_cfg, sspp, sblk, NULL, |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1243 | &dma_count); |
| 1244 | } else { |
| 1245 | SDE_ERROR("invalid sspp type:%s\n", type); |
| 1246 | rc = -EINVAL; |
| 1247 | goto end; |
| 1248 | } |
| 1249 | |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1250 | snprintf(sblk->src_blk.name, SDE_HW_BLK_NAME_LEN, "sspp_src_%u", |
| 1251 | sspp->id - SSPP_VIG0); |
| 1252 | |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 1253 | if (sspp->clk_ctrl >= SDE_CLK_CTRL_MAX) { |
| 1254 | SDE_ERROR("%s: invalid clk ctrl: %d\n", |
| 1255 | sblk->src_blk.name, sspp->clk_ctrl); |
| 1256 | rc = -EINVAL; |
| 1257 | goto end; |
| 1258 | } |
| 1259 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1260 | sblk->maxhdeciexp = MAX_HORZ_DECIMATION; |
| 1261 | sblk->maxvdeciexp = MAX_VERT_DECIMATION; |
| 1262 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1263 | sspp->xin_id = PROP_VALUE_ACCESS(prop_value, SSPP_XIN, i); |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1264 | sblk->pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1265 | sblk->src_blk.len = PROP_VALUE_ACCESS(prop_value, SSPP_SIZE, 0); |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1266 | |
Veera Sundaram Sankaran | 02dd6ac | 2016-12-22 15:08:29 -0800 | [diff] [blame] | 1267 | if (PROP_VALUE_ACCESS(prop_value, SSPP_EXCL_RECT, i) == 1) |
| 1268 | set_bit(SDE_SSPP_EXCL_RECT, &sspp->features); |
| 1269 | |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 1270 | if (prop_exists[SSPP_MAX_PER_PIPE_BW]) |
| 1271 | sblk->max_per_pipe_bw = PROP_VALUE_ACCESS(prop_value, |
| 1272 | SSPP_MAX_PER_PIPE_BW, i); |
| 1273 | else |
| 1274 | sblk->max_per_pipe_bw = DEFAULT_MAX_PER_PIPE_BW; |
| 1275 | |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1276 | for (j = 0; j < sde_cfg->mdp_count; j++) { |
| 1277 | sde_cfg->mdp[j].clk_ctrls[sspp->clk_ctrl].reg_off = |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1278 | PROP_BITVALUE_ACCESS(prop_value, |
| 1279 | SSPP_CLK_CTRL, i, 0); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1280 | sde_cfg->mdp[j].clk_ctrls[sspp->clk_ctrl].bit_off = |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1281 | PROP_BITVALUE_ACCESS(prop_value, |
| 1282 | SSPP_CLK_CTRL, i, 1); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1283 | } |
| 1284 | |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1285 | SDE_DEBUG( |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 1286 | "xin:%d ram:%d clk%d:%x/%d\n", |
Alan Kwong | 41b099e | 2016-10-12 17:10:11 -0400 | [diff] [blame] | 1287 | sspp->xin_id, |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1288 | sblk->pixel_ram_size, |
| 1289 | sspp->clk_ctrl, |
| 1290 | sde_cfg->mdp[0].clk_ctrls[sspp->clk_ctrl].reg_off, |
| 1291 | sde_cfg->mdp[0].clk_ctrls[sspp->clk_ctrl].bit_off); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1292 | } |
| 1293 | |
| 1294 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1295 | kfree(prop_value); |
| 1296 | kfree(vig_prop_value); |
| 1297 | kfree(rgb_prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1298 | return rc; |
| 1299 | } |
| 1300 | |
| 1301 | static int sde_ctl_parse_dt(struct device_node *np, |
| 1302 | struct sde_mdss_cfg *sde_cfg) |
| 1303 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1304 | int rc, prop_count[HW_PROP_MAX], i; |
| 1305 | bool prop_exists[HW_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1306 | struct sde_prop_value *prop_value = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1307 | struct sde_ctl_cfg *ctl; |
| 1308 | u32 off_count; |
| 1309 | |
| 1310 | if (!sde_cfg) { |
| 1311 | SDE_ERROR("invalid argument input param\n"); |
| 1312 | rc = -EINVAL; |
| 1313 | goto end; |
| 1314 | } |
| 1315 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1316 | prop_value = kzalloc(HW_PROP_MAX * |
| 1317 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1318 | if (!prop_value) { |
| 1319 | rc = -ENOMEM; |
| 1320 | goto end; |
| 1321 | } |
| 1322 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1323 | rc = _validate_dt_entry(np, ctl_prop, ARRAY_SIZE(ctl_prop), prop_count, |
| 1324 | &off_count); |
| 1325 | if (rc) |
| 1326 | goto end; |
| 1327 | |
| 1328 | sde_cfg->ctl_count = off_count; |
| 1329 | |
| 1330 | rc = _read_dt_entry(np, ctl_prop, ARRAY_SIZE(ctl_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1331 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1332 | if (rc) |
| 1333 | goto end; |
| 1334 | |
| 1335 | for (i = 0; i < off_count; i++) { |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 1336 | const char *disp_pref = NULL; |
| 1337 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1338 | ctl = sde_cfg->ctl + i; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1339 | ctl->base = PROP_VALUE_ACCESS(prop_value, HW_OFF, i); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1340 | ctl->len = PROP_VALUE_ACCESS(prop_value, HW_LEN, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1341 | ctl->id = CTL_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1342 | snprintf(ctl->name, SDE_HW_BLK_NAME_LEN, "ctl_%u", |
| 1343 | ctl->id - CTL_0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1344 | |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 1345 | of_property_read_string_index(np, |
| 1346 | ctl_prop[HW_DISP].prop_name, i, &disp_pref); |
| 1347 | if (disp_pref && !strcmp(disp_pref, "primary")) |
| 1348 | set_bit(SDE_CTL_PRIMARY_PREF, &ctl->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1349 | if (i < MAX_SPLIT_DISPLAY_CTL) |
| 1350 | set_bit(SDE_CTL_SPLIT_DISPLAY, &ctl->features); |
| 1351 | if (i < MAX_PP_SPLIT_DISPLAY_CTL) |
| 1352 | set_bit(SDE_CTL_PINGPONG_SPLIT, &ctl->features); |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 1353 | if (sde_cfg->has_sbuf) |
| 1354 | set_bit(SDE_CTL_SBUF, &ctl->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1355 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1356 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1357 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1358 | return rc; |
| 1359 | } |
| 1360 | |
| 1361 | static int sde_mixer_parse_dt(struct device_node *np, |
| 1362 | struct sde_mdss_cfg *sde_cfg) |
| 1363 | { |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1364 | int rc, prop_count[MIXER_PROP_MAX], i, j; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1365 | int blocks_prop_count[MIXER_BLOCKS_PROP_MAX]; |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1366 | int blend_prop_count[MIXER_BLEND_PROP_MAX]; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1367 | bool prop_exists[MIXER_PROP_MAX]; |
| 1368 | bool blocks_prop_exists[MIXER_BLOCKS_PROP_MAX]; |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1369 | bool blend_prop_exists[MIXER_BLEND_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1370 | struct sde_prop_value *prop_value = NULL, *blocks_prop_value = NULL; |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1371 | struct sde_prop_value *blend_prop_value = NULL; |
| 1372 | u32 off_count, blend_off_count, max_blendstages, lm_pair_mask; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1373 | struct sde_lm_cfg *mixer; |
| 1374 | struct sde_lm_sub_blks *sblk; |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1375 | int pp_count, dspp_count, ds_count, mixer_count; |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 1376 | u32 pp_idx, dspp_idx, ds_idx; |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1377 | u32 mixer_base; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1378 | struct device_node *snp = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1379 | |
| 1380 | if (!sde_cfg) { |
| 1381 | SDE_ERROR("invalid argument input param\n"); |
| 1382 | rc = -EINVAL; |
| 1383 | goto end; |
| 1384 | } |
| 1385 | max_blendstages = sde_cfg->max_mixer_blendstages; |
| 1386 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1387 | prop_value = kzalloc(MIXER_PROP_MAX * |
| 1388 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1389 | if (!prop_value) { |
| 1390 | rc = -ENOMEM; |
| 1391 | goto end; |
| 1392 | } |
| 1393 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1394 | rc = _validate_dt_entry(np, mixer_prop, ARRAY_SIZE(mixer_prop), |
| 1395 | prop_count, &off_count); |
| 1396 | if (rc) |
| 1397 | goto end; |
| 1398 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1399 | rc = _read_dt_entry(np, mixer_prop, ARRAY_SIZE(mixer_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1400 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1401 | if (rc) |
| 1402 | goto end; |
| 1403 | |
| 1404 | pp_count = sde_cfg->pingpong_count; |
| 1405 | dspp_count = sde_cfg->dspp_count; |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 1406 | ds_count = sde_cfg->ds_count; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1407 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1408 | /* get mixer feature dt properties if they exist */ |
| 1409 | snp = of_get_child_by_name(np, mixer_prop[MIXER_BLOCKS].prop_name); |
| 1410 | if (snp) { |
| 1411 | blocks_prop_value = kzalloc(MIXER_BLOCKS_PROP_MAX * |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1412 | MAX_SDE_HW_BLK * sizeof(struct sde_prop_value), |
| 1413 | GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1414 | if (!blocks_prop_value) { |
| 1415 | rc = -ENOMEM; |
| 1416 | goto end; |
| 1417 | } |
| 1418 | rc = _validate_dt_entry(snp, mixer_blocks_prop, |
| 1419 | ARRAY_SIZE(mixer_blocks_prop), blocks_prop_count, NULL); |
| 1420 | if (rc) |
| 1421 | goto end; |
| 1422 | rc = _read_dt_entry(snp, mixer_blocks_prop, |
| 1423 | ARRAY_SIZE(mixer_blocks_prop), |
| 1424 | blocks_prop_count, blocks_prop_exists, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1425 | blocks_prop_value); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1426 | } |
| 1427 | |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1428 | /* get the blend_op register offsets */ |
| 1429 | blend_prop_value = kzalloc(MIXER_BLEND_PROP_MAX * |
| 1430 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 1431 | if (!blend_prop_value) { |
| 1432 | rc = -ENOMEM; |
| 1433 | goto end; |
| 1434 | } |
| 1435 | rc = _validate_dt_entry(np, mixer_blend_prop, |
| 1436 | ARRAY_SIZE(mixer_blend_prop), blend_prop_count, |
| 1437 | &blend_off_count); |
| 1438 | if (rc) |
| 1439 | goto end; |
| 1440 | |
| 1441 | rc = _read_dt_entry(np, mixer_blend_prop, ARRAY_SIZE(mixer_blend_prop), |
| 1442 | blend_prop_count, blend_prop_exists, blend_prop_value); |
| 1443 | if (rc) |
| 1444 | goto end; |
| 1445 | |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1446 | for (i = 0, mixer_count = 0, pp_idx = 0, dspp_idx = 0, |
| 1447 | ds_idx = 0; i < off_count; i++) { |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 1448 | const char *disp_pref = NULL; |
| 1449 | |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1450 | mixer_base = PROP_VALUE_ACCESS(prop_value, MIXER_OFF, i); |
| 1451 | if (!mixer_base) |
| 1452 | continue; |
| 1453 | |
| 1454 | mixer = sde_cfg->mixer + mixer_count; |
| 1455 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1456 | sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); |
| 1457 | if (!sblk) { |
| 1458 | rc = -ENOMEM; |
| 1459 | /* catalog deinit will release the allocated blocks */ |
| 1460 | goto end; |
| 1461 | } |
| 1462 | mixer->sblk = sblk; |
Kalyan Thota | 72ea3ec | 2019-03-18 11:52:12 +0530 | [diff] [blame] | 1463 | mixer->lm_pair_mask = 0xFFFFFFFF; |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1464 | mixer->base = mixer_base; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1465 | mixer->len = PROP_VALUE_ACCESS(prop_value, MIXER_LEN, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1466 | mixer->id = LM_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1467 | snprintf(mixer->name, SDE_HW_BLK_NAME_LEN, "lm_%u", |
| 1468 | mixer->id - LM_0); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1469 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1470 | if (!prop_exists[MIXER_LEN]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1471 | mixer->len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 1472 | |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1473 | lm_pair_mask = PROP_VALUE_ACCESS(prop_value, |
| 1474 | MIXER_PAIR_MASK, i); |
| 1475 | if (lm_pair_mask) |
| 1476 | mixer->lm_pair_mask = 1 << lm_pair_mask; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1477 | |
| 1478 | sblk->maxblendstages = max_blendstages; |
| 1479 | sblk->maxwidth = sde_cfg->max_mixer_width; |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1480 | |
| 1481 | for (j = 0; j < blend_off_count; j++) |
| 1482 | sblk->blendstage_base[j] = |
| 1483 | PROP_VALUE_ACCESS(blend_prop_value, |
| 1484 | MIXER_BLEND_OP_OFF, j); |
| 1485 | |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 1486 | if (sde_cfg->has_src_split) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1487 | set_bit(SDE_MIXER_SOURCESPLIT, &mixer->features); |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 1488 | if (sde_cfg->has_dim_layer) |
| 1489 | set_bit(SDE_DIM_LAYER, &mixer->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1490 | |
Jeykumar Sankaran | 6f215d4 | 2017-09-12 16:15:23 -0700 | [diff] [blame] | 1491 | of_property_read_string_index(np, |
| 1492 | mixer_prop[MIXER_DISP].prop_name, i, &disp_pref); |
| 1493 | if (disp_pref && !strcmp(disp_pref, "primary")) |
| 1494 | set_bit(SDE_DISP_PRIMARY_PREF, &mixer->features); |
| 1495 | |
| 1496 | mixer->pingpong = pp_count > 0 ? pp_idx + PINGPONG_0 |
| 1497 | : PINGPONG_MAX; |
| 1498 | mixer->dspp = dspp_count > 0 ? dspp_idx + DSPP_0 |
| 1499 | : DSPP_MAX; |
| 1500 | mixer->ds = ds_count > 0 ? ds_idx + DS_0 : DS_MAX; |
| 1501 | pp_count--; |
| 1502 | dspp_count--; |
| 1503 | ds_count--; |
| 1504 | pp_idx++; |
| 1505 | dspp_idx++; |
| 1506 | ds_idx++; |
| 1507 | |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1508 | mixer_count++; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1509 | |
| 1510 | sblk->gc.id = SDE_MIXER_GC; |
| 1511 | if (blocks_prop_value && blocks_prop_exists[MIXER_GC_PROP]) { |
| 1512 | sblk->gc.base = PROP_VALUE_ACCESS(blocks_prop_value, |
| 1513 | MIXER_GC_PROP, 0); |
| 1514 | sblk->gc.version = PROP_VALUE_ACCESS(blocks_prop_value, |
| 1515 | MIXER_GC_PROP, 1); |
| 1516 | sblk->gc.len = 0; |
| 1517 | set_bit(SDE_MIXER_GC, &mixer->features); |
| 1518 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1519 | } |
Jeykumar Sankaran | 32c5f60 | 2017-09-13 14:03:10 -0700 | [diff] [blame] | 1520 | sde_cfg->mixer_count = mixer_count; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1521 | |
| 1522 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1523 | kfree(prop_value); |
| 1524 | kfree(blocks_prop_value); |
Veera Sundaram Sankaran | 370b991 | 2017-01-10 18:03:42 -0800 | [diff] [blame] | 1525 | kfree(blend_prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1526 | return rc; |
| 1527 | } |
| 1528 | |
| 1529 | static int sde_intf_parse_dt(struct device_node *np, |
| 1530 | struct sde_mdss_cfg *sde_cfg) |
| 1531 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1532 | int rc, prop_count[INTF_PROP_MAX], i; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1533 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1534 | bool prop_exists[INTF_PROP_MAX]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1535 | u32 off_count; |
| 1536 | u32 dsi_count = 0, none_count = 0, hdmi_count = 0, dp_count = 0; |
| 1537 | const char *type; |
| 1538 | struct sde_intf_cfg *intf; |
| 1539 | |
| 1540 | if (!sde_cfg) { |
| 1541 | SDE_ERROR("invalid argument\n"); |
| 1542 | rc = -EINVAL; |
| 1543 | goto end; |
| 1544 | } |
| 1545 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1546 | prop_value = kzalloc(INTF_PROP_MAX * |
| 1547 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1548 | if (!prop_value) { |
| 1549 | rc = -ENOMEM; |
| 1550 | goto end; |
| 1551 | } |
| 1552 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1553 | rc = _validate_dt_entry(np, intf_prop, ARRAY_SIZE(intf_prop), |
| 1554 | prop_count, &off_count); |
| 1555 | if (rc) |
| 1556 | goto end; |
| 1557 | |
| 1558 | sde_cfg->intf_count = off_count; |
| 1559 | |
| 1560 | rc = _read_dt_entry(np, intf_prop, ARRAY_SIZE(intf_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1561 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1562 | if (rc) |
| 1563 | goto end; |
| 1564 | |
| 1565 | for (i = 0; i < off_count; i++) { |
| 1566 | intf = sde_cfg->intf + i; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1567 | intf->base = PROP_VALUE_ACCESS(prop_value, INTF_OFF, i); |
| 1568 | intf->len = PROP_VALUE_ACCESS(prop_value, INTF_LEN, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1569 | intf->id = INTF_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1570 | snprintf(intf->name, SDE_HW_BLK_NAME_LEN, "intf_%u", |
| 1571 | intf->id - INTF_0); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 1572 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1573 | if (!prop_exists[INTF_LEN]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1574 | intf->len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 1575 | |
| 1576 | intf->prog_fetch_lines_worst_case = |
Alan Kwong | 8ff3540 | 2017-06-05 19:41:40 -0400 | [diff] [blame] | 1577 | !prop_exists[INTF_PREFETCH] ? |
| 1578 | sde_cfg->perf.min_prefill_lines : |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1579 | PROP_VALUE_ACCESS(prop_value, INTF_PREFETCH, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1580 | |
| 1581 | of_property_read_string_index(np, |
| 1582 | intf_prop[INTF_TYPE].prop_name, i, &type); |
| 1583 | if (!strcmp(type, "dsi")) { |
| 1584 | intf->type = INTF_DSI; |
| 1585 | intf->controller_id = dsi_count; |
| 1586 | dsi_count++; |
| 1587 | } else if (!strcmp(type, "hdmi")) { |
| 1588 | intf->type = INTF_HDMI; |
| 1589 | intf->controller_id = hdmi_count; |
| 1590 | hdmi_count++; |
| 1591 | } else if (!strcmp(type, "dp")) { |
| 1592 | intf->type = INTF_DP; |
| 1593 | intf->controller_id = dp_count; |
| 1594 | dp_count++; |
| 1595 | } else { |
| 1596 | intf->type = INTF_NONE; |
| 1597 | intf->controller_id = none_count; |
| 1598 | none_count++; |
| 1599 | } |
Alan Kwong | 4aacd53 | 2017-02-04 18:51:33 -0800 | [diff] [blame] | 1600 | |
| 1601 | if (sde_cfg->has_sbuf) |
| 1602 | set_bit(SDE_INTF_ROT_START, &intf->features); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1603 | } |
| 1604 | |
| 1605 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1606 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1607 | return rc; |
| 1608 | } |
| 1609 | |
| 1610 | static int sde_wb_parse_dt(struct device_node *np, struct sde_mdss_cfg *sde_cfg) |
| 1611 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1612 | int rc, prop_count[WB_PROP_MAX], i, j; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1613 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1614 | bool prop_exists[WB_PROP_MAX]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1615 | u32 off_count; |
| 1616 | struct sde_wb_cfg *wb; |
| 1617 | struct sde_wb_sub_blocks *sblk; |
| 1618 | |
| 1619 | if (!sde_cfg) { |
| 1620 | SDE_ERROR("invalid argument\n"); |
| 1621 | rc = -EINVAL; |
| 1622 | goto end; |
| 1623 | } |
| 1624 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1625 | prop_value = kzalloc(WB_PROP_MAX * |
| 1626 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1627 | if (!prop_value) { |
| 1628 | rc = -ENOMEM; |
| 1629 | goto end; |
| 1630 | } |
| 1631 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1632 | rc = _validate_dt_entry(np, wb_prop, ARRAY_SIZE(wb_prop), prop_count, |
| 1633 | &off_count); |
| 1634 | if (rc) |
| 1635 | goto end; |
| 1636 | |
| 1637 | sde_cfg->wb_count = off_count; |
| 1638 | |
| 1639 | rc = _read_dt_entry(np, wb_prop, ARRAY_SIZE(wb_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1640 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1641 | if (rc) |
| 1642 | goto end; |
| 1643 | |
| 1644 | for (i = 0; i < off_count; i++) { |
| 1645 | wb = sde_cfg->wb + i; |
| 1646 | sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); |
| 1647 | if (!sblk) { |
| 1648 | rc = -ENOMEM; |
| 1649 | /* catalog deinit will release the allocated blocks */ |
| 1650 | goto end; |
| 1651 | } |
| 1652 | wb->sblk = sblk; |
| 1653 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1654 | wb->base = PROP_VALUE_ACCESS(prop_value, WB_OFF, i); |
| 1655 | wb->id = WB_0 + PROP_VALUE_ACCESS(prop_value, WB_ID, i); |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 1656 | snprintf(wb->name, SDE_HW_BLK_NAME_LEN, "wb_%u", |
| 1657 | wb->id - WB_0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1658 | wb->clk_ctrl = SDE_CLK_CTRL_WB0 + |
| 1659 | PROP_VALUE_ACCESS(prop_value, WB_ID, i); |
| 1660 | wb->xin_id = PROP_VALUE_ACCESS(prop_value, WB_XIN_ID, i); |
Alan Kwong | d22ecec | 2017-05-02 14:41:17 -0700 | [diff] [blame] | 1661 | |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 1662 | if (wb->clk_ctrl >= SDE_CLK_CTRL_MAX) { |
| 1663 | SDE_ERROR("%s: invalid clk ctrl: %d\n", |
| 1664 | wb->name, wb->clk_ctrl); |
| 1665 | rc = -EINVAL; |
| 1666 | goto end; |
| 1667 | } |
| 1668 | |
Alan Kwong | d22ecec | 2017-05-02 14:41:17 -0700 | [diff] [blame] | 1669 | if (IS_SDE_MAJOR_MINOR_SAME((sde_cfg->hwversion), |
| 1670 | SDE_HW_VER_170)) |
| 1671 | wb->vbif_idx = VBIF_NRT; |
| 1672 | else |
| 1673 | wb->vbif_idx = VBIF_RT; |
| 1674 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1675 | wb->len = PROP_VALUE_ACCESS(prop_value, WB_LEN, 0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1676 | if (!prop_exists[WB_LEN]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1677 | wb->len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 1678 | sblk->maxlinewidth = sde_cfg->max_wb_linewidth; |
| 1679 | |
Alan Kwong | 1462733 | 2016-10-12 16:44:00 -0400 | [diff] [blame] | 1680 | if (wb->id >= LINE_MODE_WB_OFFSET) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1681 | set_bit(SDE_WB_LINE_MODE, &wb->features); |
| 1682 | else |
| 1683 | set_bit(SDE_WB_BLOCK_MODE, &wb->features); |
| 1684 | set_bit(SDE_WB_TRAFFIC_SHAPER, &wb->features); |
| 1685 | set_bit(SDE_WB_YUV_CONFIG, &wb->features); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1686 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 1687 | if (sde_cfg->has_cdp) |
| 1688 | set_bit(SDE_WB_CDP, &wb->features); |
| 1689 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 1690 | set_bit(SDE_WB_QOS, &wb->features); |
| 1691 | if (sde_cfg->vbif_qos_nlvl == 8) |
| 1692 | set_bit(SDE_WB_QOS_8LVL, &wb->features); |
| 1693 | |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1694 | if (sde_cfg->has_wb_ubwc) |
| 1695 | set_bit(SDE_WB_UBWC, &wb->features); |
| 1696 | |
Jayant Shekhar | e19c8d0 | 2018-01-17 14:01:50 +0530 | [diff] [blame] | 1697 | set_bit(SDE_WB_XY_ROI_OFFSET, &wb->features); |
| 1698 | |
Prabhanjan Kandula | 7f9b8d4 | 2018-04-23 19:02:00 -0700 | [diff] [blame] | 1699 | if (sde_cfg->has_cwb_support) |
| 1700 | set_bit(SDE_WB_HAS_CWB, &wb->features); |
| 1701 | |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1702 | for (j = 0; j < sde_cfg->mdp_count; j++) { |
| 1703 | sde_cfg->mdp[j].clk_ctrls[wb->clk_ctrl].reg_off = |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1704 | PROP_BITVALUE_ACCESS(prop_value, |
| 1705 | WB_CLK_CTRL, i, 0); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1706 | sde_cfg->mdp[j].clk_ctrls[wb->clk_ctrl].bit_off = |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1707 | PROP_BITVALUE_ACCESS(prop_value, |
| 1708 | WB_CLK_CTRL, i, 1); |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1709 | } |
| 1710 | |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 1711 | wb->format_list = sde_cfg->wb_formats; |
| 1712 | |
Alan Kwong | 04780ec | 2016-10-12 16:05:17 -0400 | [diff] [blame] | 1713 | SDE_DEBUG( |
| 1714 | "wb:%d xin:%d vbif:%d clk%d:%x/%d\n", |
| 1715 | wb->id - WB_0, |
| 1716 | wb->xin_id, |
| 1717 | wb->vbif_idx, |
| 1718 | wb->clk_ctrl, |
| 1719 | sde_cfg->mdp[0].clk_ctrls[wb->clk_ctrl].reg_off, |
| 1720 | sde_cfg->mdp[0].clk_ctrls[wb->clk_ctrl].bit_off); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1721 | } |
| 1722 | |
| 1723 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1724 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 1725 | return rc; |
| 1726 | } |
| 1727 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1728 | static void _sde_dspp_setup_blocks(struct sde_mdss_cfg *sde_cfg, |
| 1729 | struct sde_dspp_cfg *dspp, struct sde_dspp_sub_blks *sblk, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 1730 | bool *prop_exists, struct sde_prop_value *prop_value) |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 1731 | { |
| 1732 | sblk->igc.id = SDE_DSPP_IGC; |
| 1733 | if (prop_exists[DSPP_IGC_PROP]) { |
| 1734 | sblk->igc.base = PROP_VALUE_ACCESS(prop_value, |
| 1735 | DSPP_IGC_PROP, 0); |
| 1736 | sblk->igc.version = PROP_VALUE_ACCESS(prop_value, |
| 1737 | DSPP_IGC_PROP, 1); |
| 1738 | sblk->igc.len = 0; |
| 1739 | set_bit(SDE_DSPP_IGC, &dspp->features); |
| 1740 | } |
| 1741 | |
| 1742 | sblk->pcc.id = SDE_DSPP_PCC; |
| 1743 | if (prop_exists[DSPP_PCC_PROP]) { |
| 1744 | sblk->pcc.base = PROP_VALUE_ACCESS(prop_value, |
| 1745 | DSPP_PCC_PROP, 0); |
| 1746 | sblk->pcc.version = PROP_VALUE_ACCESS(prop_value, |
| 1747 | DSPP_PCC_PROP, 1); |
| 1748 | sblk->pcc.len = 0; |
| 1749 | set_bit(SDE_DSPP_PCC, &dspp->features); |
| 1750 | } |
| 1751 | |
| 1752 | sblk->gc.id = SDE_DSPP_GC; |
| 1753 | if (prop_exists[DSPP_GC_PROP]) { |
| 1754 | sblk->gc.base = PROP_VALUE_ACCESS(prop_value, DSPP_GC_PROP, 0); |
| 1755 | sblk->gc.version = PROP_VALUE_ACCESS(prop_value, |
| 1756 | DSPP_GC_PROP, 1); |
| 1757 | sblk->gc.len = 0; |
| 1758 | set_bit(SDE_DSPP_GC, &dspp->features); |
| 1759 | } |
| 1760 | |
| 1761 | sblk->gamut.id = SDE_DSPP_GAMUT; |
| 1762 | if (prop_exists[DSPP_GAMUT_PROP]) { |
| 1763 | sblk->gamut.base = PROP_VALUE_ACCESS(prop_value, |
| 1764 | DSPP_GAMUT_PROP, 0); |
| 1765 | sblk->gamut.version = PROP_VALUE_ACCESS(prop_value, |
| 1766 | DSPP_GAMUT_PROP, 1); |
| 1767 | sblk->gamut.len = 0; |
| 1768 | set_bit(SDE_DSPP_GAMUT, &dspp->features); |
| 1769 | } |
| 1770 | |
| 1771 | sblk->dither.id = SDE_DSPP_DITHER; |
| 1772 | if (prop_exists[DSPP_DITHER_PROP]) { |
| 1773 | sblk->dither.base = PROP_VALUE_ACCESS(prop_value, |
| 1774 | DSPP_DITHER_PROP, 0); |
| 1775 | sblk->dither.version = PROP_VALUE_ACCESS(prop_value, |
| 1776 | DSPP_DITHER_PROP, 1); |
| 1777 | sblk->dither.len = 0; |
| 1778 | set_bit(SDE_DSPP_DITHER, &dspp->features); |
| 1779 | } |
| 1780 | |
| 1781 | sblk->hist.id = SDE_DSPP_HIST; |
| 1782 | if (prop_exists[DSPP_HIST_PROP]) { |
| 1783 | sblk->hist.base = PROP_VALUE_ACCESS(prop_value, |
| 1784 | DSPP_HIST_PROP, 0); |
| 1785 | sblk->hist.version = PROP_VALUE_ACCESS(prop_value, |
| 1786 | DSPP_HIST_PROP, 1); |
| 1787 | sblk->hist.len = 0; |
| 1788 | set_bit(SDE_DSPP_HIST, &dspp->features); |
| 1789 | } |
| 1790 | |
| 1791 | sblk->hsic.id = SDE_DSPP_HSIC; |
| 1792 | if (prop_exists[DSPP_HSIC_PROP]) { |
| 1793 | sblk->hsic.base = PROP_VALUE_ACCESS(prop_value, |
| 1794 | DSPP_HSIC_PROP, 0); |
| 1795 | sblk->hsic.version = PROP_VALUE_ACCESS(prop_value, |
| 1796 | DSPP_HSIC_PROP, 1); |
| 1797 | sblk->hsic.len = 0; |
| 1798 | set_bit(SDE_DSPP_HSIC, &dspp->features); |
| 1799 | } |
| 1800 | |
| 1801 | sblk->memcolor.id = SDE_DSPP_MEMCOLOR; |
| 1802 | if (prop_exists[DSPP_MEMCOLOR_PROP]) { |
| 1803 | sblk->memcolor.base = PROP_VALUE_ACCESS(prop_value, |
| 1804 | DSPP_MEMCOLOR_PROP, 0); |
| 1805 | sblk->memcolor.version = PROP_VALUE_ACCESS(prop_value, |
| 1806 | DSPP_MEMCOLOR_PROP, 1); |
| 1807 | sblk->memcolor.len = 0; |
| 1808 | set_bit(SDE_DSPP_MEMCOLOR, &dspp->features); |
| 1809 | } |
| 1810 | |
| 1811 | sblk->sixzone.id = SDE_DSPP_SIXZONE; |
| 1812 | if (prop_exists[DSPP_SIXZONE_PROP]) { |
| 1813 | sblk->sixzone.base = PROP_VALUE_ACCESS(prop_value, |
| 1814 | DSPP_SIXZONE_PROP, 0); |
| 1815 | sblk->sixzone.version = PROP_VALUE_ACCESS(prop_value, |
| 1816 | DSPP_SIXZONE_PROP, 1); |
| 1817 | sblk->sixzone.len = 0; |
| 1818 | set_bit(SDE_DSPP_SIXZONE, &dspp->features); |
| 1819 | } |
| 1820 | |
| 1821 | sblk->vlut.id = SDE_DSPP_VLUT; |
| 1822 | if (prop_exists[DSPP_VLUT_PROP]) { |
| 1823 | sblk->vlut.base = PROP_VALUE_ACCESS(prop_value, |
| 1824 | DSPP_VLUT_PROP, 0); |
| 1825 | sblk->vlut.version = PROP_VALUE_ACCESS(prop_value, |
| 1826 | DSPP_VLUT_PROP, 1); |
| 1827 | sblk->sixzone.len = 0; |
| 1828 | set_bit(SDE_DSPP_VLUT, &dspp->features); |
| 1829 | } |
| 1830 | } |
| 1831 | |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 1832 | static void _sde_inline_rot_parse_dt(struct device_node *np, |
| 1833 | struct sde_mdss_cfg *sde_cfg, struct sde_rot_cfg *rot) |
| 1834 | { |
| 1835 | int rc, prop_count[INLINE_ROT_PROP_MAX], i, j, index; |
| 1836 | struct sde_prop_value *prop_value = NULL; |
| 1837 | bool prop_exists[INLINE_ROT_PROP_MAX]; |
| 1838 | u32 off_count, sspp_count = 0, wb_count = 0; |
| 1839 | const char *type; |
| 1840 | |
| 1841 | prop_value = kzalloc(INLINE_ROT_PROP_MAX * |
| 1842 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 1843 | if (!prop_value) |
| 1844 | return; |
| 1845 | |
| 1846 | rc = _validate_dt_entry(np, inline_rot_prop, |
| 1847 | ARRAY_SIZE(inline_rot_prop), prop_count, &off_count); |
| 1848 | if (rc) |
| 1849 | goto end; |
| 1850 | |
| 1851 | rc = _read_dt_entry(np, inline_rot_prop, ARRAY_SIZE(inline_rot_prop), |
| 1852 | prop_count, prop_exists, prop_value); |
| 1853 | if (rc) |
| 1854 | goto end; |
| 1855 | |
| 1856 | for (i = 0; i < off_count; i++) { |
| 1857 | rot->vbif_cfg[i].xin_id = PROP_VALUE_ACCESS(prop_value, |
| 1858 | INLINE_ROT_XIN, i); |
| 1859 | of_property_read_string_index(np, |
| 1860 | inline_rot_prop[INLINE_ROT_XIN_TYPE].prop_name, |
| 1861 | i, &type); |
| 1862 | |
| 1863 | if (!strcmp(type, "sspp")) { |
| 1864 | rot->vbif_cfg[i].num = INLINE_ROT0_SSPP + sspp_count; |
| 1865 | rot->vbif_cfg[i].is_read = true; |
| 1866 | rot->vbif_cfg[i].clk_ctrl = |
| 1867 | SDE_CLK_CTRL_INLINE_ROT0_SSPP |
| 1868 | + sspp_count; |
| 1869 | sspp_count++; |
| 1870 | } else if (!strcmp(type, "wb")) { |
| 1871 | rot->vbif_cfg[i].num = INLINE_ROT0_WB + wb_count; |
| 1872 | rot->vbif_cfg[i].is_read = false; |
| 1873 | rot->vbif_cfg[i].clk_ctrl = |
| 1874 | SDE_CLK_CTRL_INLINE_ROT0_WB |
| 1875 | + wb_count; |
| 1876 | wb_count++; |
| 1877 | } else { |
| 1878 | SDE_ERROR("invalid rotator vbif type:%s\n", type); |
| 1879 | goto end; |
| 1880 | } |
| 1881 | |
| 1882 | index = rot->vbif_cfg[i].clk_ctrl; |
| 1883 | if (index < 0 || index >= SDE_CLK_CTRL_MAX) { |
| 1884 | SDE_ERROR("invalid clk_ctrl enum:%d\n", index); |
| 1885 | goto end; |
| 1886 | } |
| 1887 | |
| 1888 | for (j = 0; j < sde_cfg->mdp_count; j++) { |
| 1889 | sde_cfg->mdp[j].clk_ctrls[index].reg_off = |
| 1890 | PROP_BITVALUE_ACCESS(prop_value, |
| 1891 | INLINE_ROT_CLK_CTRL, i, 0); |
| 1892 | sde_cfg->mdp[j].clk_ctrls[index].bit_off = |
| 1893 | PROP_BITVALUE_ACCESS(prop_value, |
| 1894 | INLINE_ROT_CLK_CTRL, i, 1); |
| 1895 | } |
| 1896 | |
| 1897 | SDE_DEBUG("rot- xin:%d, num:%d, rd:%d, clk:%d:0x%x/%d\n", |
| 1898 | rot->vbif_cfg[i].xin_id, |
| 1899 | rot->vbif_cfg[i].num, |
| 1900 | rot->vbif_cfg[i].is_read, |
| 1901 | rot->vbif_cfg[i].clk_ctrl, |
| 1902 | sde_cfg->mdp[0].clk_ctrls[index].reg_off, |
| 1903 | sde_cfg->mdp[0].clk_ctrls[index].bit_off); |
| 1904 | } |
| 1905 | |
| 1906 | rot->vbif_idx = VBIF_RT; |
| 1907 | rot->xin_count = off_count; |
| 1908 | |
| 1909 | end: |
| 1910 | kfree(prop_value); |
| 1911 | } |
| 1912 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 1913 | static int sde_rot_parse_dt(struct device_node *np, |
| 1914 | struct sde_mdss_cfg *sde_cfg) |
| 1915 | { |
| 1916 | struct sde_rot_cfg *rot; |
| 1917 | struct platform_device *pdev; |
| 1918 | struct of_phandle_args phargs; |
| 1919 | struct llcc_slice_desc *slice; |
| 1920 | int rc = 0, i; |
| 1921 | |
| 1922 | if (!sde_cfg) { |
| 1923 | SDE_ERROR("invalid argument\n"); |
| 1924 | rc = -EINVAL; |
| 1925 | goto end; |
| 1926 | } |
| 1927 | |
| 1928 | for (i = 0; i < ROT_MAX; i++) { |
| 1929 | rot = sde_cfg->rot + sde_cfg->rot_count; |
| 1930 | rot->base = 0; |
| 1931 | rot->len = 0; |
| 1932 | |
| 1933 | rc = of_parse_phandle_with_args(np, |
| 1934 | "qcom,sde-inline-rotator", "#list-cells", |
| 1935 | i, &phargs); |
| 1936 | if (rc) { |
| 1937 | rc = 0; |
| 1938 | break; |
| 1939 | } else if (!phargs.np || !phargs.args_count) { |
| 1940 | rc = -EINVAL; |
| 1941 | break; |
| 1942 | } |
| 1943 | |
| 1944 | rot->id = ROT_0 + phargs.args[0]; |
| 1945 | |
| 1946 | pdev = of_find_device_by_node(phargs.np); |
| 1947 | if (pdev) { |
| 1948 | slice = llcc_slice_getd(&pdev->dev, "rotator"); |
| 1949 | if (IS_ERR_OR_NULL(slice)) { |
| 1950 | rot->pdev = NULL; |
| 1951 | SDE_ERROR("failed to get system cache %ld\n", |
| 1952 | PTR_ERR(slice)); |
| 1953 | } else { |
| 1954 | rot->scid = llcc_get_slice_id(slice); |
| 1955 | rot->slice_size = llcc_get_slice_size(slice); |
| 1956 | rot->pdev = pdev; |
| 1957 | llcc_slice_putd(slice); |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 1958 | SDE_DEBUG("rot:%d scid:%d slice_size:%zukb\n", |
| 1959 | rot->id, rot->scid, |
| 1960 | rot->slice_size); |
Veera Sundaram Sankaran | 1e71ccb | 2017-05-24 18:48:50 -0700 | [diff] [blame] | 1961 | _sde_inline_rot_parse_dt(np, sde_cfg, rot); |
| 1962 | sde_cfg->rot_count++; |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 1963 | } |
| 1964 | } else { |
| 1965 | rot->pdev = NULL; |
| 1966 | SDE_ERROR("invalid sde rotator node\n"); |
| 1967 | } |
| 1968 | |
| 1969 | of_node_put(phargs.np); |
| 1970 | } |
| 1971 | |
| 1972 | if (sde_cfg->rot_count) { |
| 1973 | sde_cfg->has_sbuf = true; |
| 1974 | sde_cfg->sbuf_headroom = DEFAULT_SBUF_HEADROOM; |
Clarence Ip | 8dece62 | 2017-12-22 18:25:25 -0500 | [diff] [blame] | 1975 | sde_cfg->sbuf_prefill = DEFAULT_SBUF_PREFILL; |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 1976 | } |
| 1977 | |
| 1978 | end: |
| 1979 | return rc; |
| 1980 | } |
| 1981 | |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 1982 | static int sde_dspp_top_parse_dt(struct device_node *np, |
| 1983 | struct sde_mdss_cfg *sde_cfg) |
| 1984 | { |
| 1985 | int rc, prop_count[DSPP_TOP_PROP_MAX]; |
| 1986 | bool prop_exists[DSPP_TOP_PROP_MAX]; |
| 1987 | struct sde_prop_value *prop_value = NULL; |
| 1988 | u32 off_count; |
| 1989 | |
| 1990 | if (!sde_cfg) { |
| 1991 | SDE_ERROR("invalid argument\n"); |
| 1992 | rc = -EINVAL; |
| 1993 | goto end; |
| 1994 | } |
| 1995 | |
| 1996 | prop_value = kzalloc(DSPP_TOP_PROP_MAX * |
| 1997 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 1998 | if (!prop_value) { |
| 1999 | rc = -ENOMEM; |
| 2000 | goto end; |
| 2001 | } |
| 2002 | |
| 2003 | rc = _validate_dt_entry(np, dspp_top_prop, ARRAY_SIZE(dspp_top_prop), |
| 2004 | prop_count, &off_count); |
| 2005 | if (rc) |
| 2006 | goto end; |
| 2007 | |
| 2008 | rc = _read_dt_entry(np, dspp_top_prop, ARRAY_SIZE(dspp_top_prop), |
| 2009 | prop_count, prop_exists, prop_value); |
| 2010 | if (rc) |
| 2011 | goto end; |
| 2012 | |
| 2013 | if (off_count != 1) { |
| 2014 | SDE_ERROR("invalid dspp_top off_count:%d\n", off_count); |
| 2015 | rc = -EINVAL; |
| 2016 | goto end; |
| 2017 | } |
| 2018 | |
| 2019 | sde_cfg->dspp_top.base = |
| 2020 | PROP_VALUE_ACCESS(prop_value, DSPP_TOP_OFF, 0); |
| 2021 | sde_cfg->dspp_top.len = |
| 2022 | PROP_VALUE_ACCESS(prop_value, DSPP_TOP_SIZE, 0); |
| 2023 | snprintf(sde_cfg->dspp_top.name, SDE_HW_BLK_NAME_LEN, "dspp_top"); |
| 2024 | |
| 2025 | end: |
| 2026 | kfree(prop_value); |
| 2027 | return rc; |
| 2028 | } |
| 2029 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2030 | static int sde_dspp_parse_dt(struct device_node *np, |
| 2031 | struct sde_mdss_cfg *sde_cfg) |
| 2032 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2033 | int rc, prop_count[DSPP_PROP_MAX], i; |
| 2034 | int ad_prop_count[AD_PROP_MAX]; |
| 2035 | bool prop_exists[DSPP_PROP_MAX], ad_prop_exists[AD_PROP_MAX]; |
| 2036 | bool blocks_prop_exists[DSPP_BLOCKS_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2037 | struct sde_prop_value *ad_prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2038 | int blocks_prop_count[DSPP_BLOCKS_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2039 | struct sde_prop_value *prop_value = NULL, *blocks_prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2040 | u32 off_count, ad_off_count; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2041 | struct sde_dspp_cfg *dspp; |
| 2042 | struct sde_dspp_sub_blks *sblk; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2043 | struct device_node *snp = NULL; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2044 | |
| 2045 | if (!sde_cfg) { |
| 2046 | SDE_ERROR("invalid argument\n"); |
| 2047 | rc = -EINVAL; |
| 2048 | goto end; |
| 2049 | } |
| 2050 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2051 | prop_value = kzalloc(DSPP_PROP_MAX * |
| 2052 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2053 | if (!prop_value) { |
| 2054 | rc = -ENOMEM; |
| 2055 | goto end; |
| 2056 | } |
| 2057 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2058 | rc = _validate_dt_entry(np, dspp_prop, ARRAY_SIZE(dspp_prop), |
| 2059 | prop_count, &off_count); |
| 2060 | if (rc) |
| 2061 | goto end; |
| 2062 | |
| 2063 | sde_cfg->dspp_count = off_count; |
| 2064 | |
| 2065 | rc = _read_dt_entry(np, dspp_prop, ARRAY_SIZE(dspp_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2066 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2067 | if (rc) |
| 2068 | goto end; |
| 2069 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2070 | /* Parse AD dtsi entries */ |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2071 | ad_prop_value = kzalloc(AD_PROP_MAX * |
| 2072 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2073 | if (!ad_prop_value) { |
| 2074 | rc = -ENOMEM; |
| 2075 | goto end; |
| 2076 | } |
| 2077 | rc = _validate_dt_entry(np, ad_prop, ARRAY_SIZE(ad_prop), |
| 2078 | ad_prop_count, &ad_off_count); |
| 2079 | if (rc) |
| 2080 | goto end; |
| 2081 | rc = _read_dt_entry(np, ad_prop, ARRAY_SIZE(ad_prop), ad_prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2082 | ad_prop_exists, ad_prop_value); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2083 | if (rc) |
| 2084 | goto end; |
| 2085 | |
| 2086 | /* get DSPP feature dt properties if they exist */ |
| 2087 | snp = of_get_child_by_name(np, dspp_prop[DSPP_BLOCKS].prop_name); |
| 2088 | if (snp) { |
| 2089 | blocks_prop_value = kzalloc(DSPP_BLOCKS_PROP_MAX * |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2090 | MAX_SDE_HW_BLK * sizeof(struct sde_prop_value), |
| 2091 | GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2092 | if (!blocks_prop_value) { |
| 2093 | rc = -ENOMEM; |
| 2094 | goto end; |
| 2095 | } |
| 2096 | rc = _validate_dt_entry(snp, dspp_blocks_prop, |
| 2097 | ARRAY_SIZE(dspp_blocks_prop), blocks_prop_count, NULL); |
| 2098 | if (rc) |
| 2099 | goto end; |
| 2100 | rc = _read_dt_entry(snp, dspp_blocks_prop, |
| 2101 | ARRAY_SIZE(dspp_blocks_prop), blocks_prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2102 | blocks_prop_exists, blocks_prop_value); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2103 | if (rc) |
| 2104 | goto end; |
| 2105 | } |
| 2106 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2107 | for (i = 0; i < off_count; i++) { |
| 2108 | dspp = sde_cfg->dspp + i; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2109 | dspp->base = PROP_VALUE_ACCESS(prop_value, DSPP_OFF, i); |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 2110 | dspp->len = PROP_VALUE_ACCESS(prop_value, DSPP_SIZE, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2111 | dspp->id = DSPP_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2112 | snprintf(dspp->name, SDE_HW_BLK_NAME_LEN, "dspp_%u", |
| 2113 | dspp->id - DSPP_0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2114 | |
| 2115 | sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); |
| 2116 | if (!sblk) { |
| 2117 | rc = -ENOMEM; |
| 2118 | /* catalog deinit will release the allocated blocks */ |
| 2119 | goto end; |
| 2120 | } |
| 2121 | dspp->sblk = sblk; |
| 2122 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2123 | if (blocks_prop_value) |
| 2124 | _sde_dspp_setup_blocks(sde_cfg, dspp, sblk, |
| 2125 | blocks_prop_exists, blocks_prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2126 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2127 | sblk->ad.id = SDE_DSPP_AD; |
Gopikrishnaiah Anandan | 9ba4378 | 2017-01-31 18:23:08 -0800 | [diff] [blame] | 2128 | sde_cfg->ad_count = ad_off_count; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2129 | if (ad_prop_value && (i < ad_off_count) && |
| 2130 | ad_prop_exists[AD_OFF]) { |
| 2131 | sblk->ad.base = PROP_VALUE_ACCESS(ad_prop_value, |
| 2132 | AD_OFF, i); |
| 2133 | sblk->ad.version = PROP_VALUE_ACCESS(ad_prop_value, |
| 2134 | AD_VERSION, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2135 | set_bit(SDE_DSPP_AD, &dspp->features); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2136 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2137 | } |
| 2138 | |
| 2139 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2140 | kfree(prop_value); |
| 2141 | kfree(ad_prop_value); |
| 2142 | kfree(blocks_prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2143 | return rc; |
| 2144 | } |
| 2145 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 2146 | static int sde_ds_parse_dt(struct device_node *np, |
| 2147 | struct sde_mdss_cfg *sde_cfg) |
| 2148 | { |
| 2149 | int rc, prop_count[DS_PROP_MAX], top_prop_count[DS_TOP_PROP_MAX], i; |
| 2150 | struct sde_prop_value *prop_value = NULL, *top_prop_value = NULL; |
| 2151 | bool prop_exists[DS_PROP_MAX], top_prop_exists[DS_TOP_PROP_MAX]; |
| 2152 | u32 off_count = 0, top_off_count = 0; |
| 2153 | struct sde_ds_cfg *ds; |
| 2154 | struct sde_ds_top_cfg *ds_top = NULL; |
| 2155 | |
| 2156 | if (!sde_cfg) { |
| 2157 | SDE_ERROR("invalid argument\n"); |
| 2158 | rc = -EINVAL; |
| 2159 | goto end; |
| 2160 | } |
| 2161 | |
| 2162 | if (!sde_cfg->mdp[0].has_dest_scaler) { |
| 2163 | SDE_DEBUG("dest scaler feature not supported\n"); |
| 2164 | rc = 0; |
| 2165 | goto end; |
| 2166 | } |
| 2167 | |
| 2168 | /* Parse the dest scaler top register offset and capabilities */ |
| 2169 | top_prop_value = kzalloc(DS_TOP_PROP_MAX * |
| 2170 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 2171 | if (!top_prop_value) { |
| 2172 | rc = -ENOMEM; |
| 2173 | goto end; |
| 2174 | } |
| 2175 | |
| 2176 | rc = _validate_dt_entry(np, ds_top_prop, |
| 2177 | ARRAY_SIZE(ds_top_prop), |
| 2178 | top_prop_count, &top_off_count); |
| 2179 | if (rc) |
| 2180 | goto end; |
| 2181 | |
| 2182 | rc = _read_dt_entry(np, ds_top_prop, |
| 2183 | ARRAY_SIZE(ds_top_prop), top_prop_count, |
| 2184 | top_prop_exists, top_prop_value); |
| 2185 | if (rc) |
| 2186 | goto end; |
| 2187 | |
| 2188 | /* Parse the offset of each dest scaler block */ |
| 2189 | prop_value = kzalloc(DS_PROP_MAX * |
| 2190 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 2191 | if (!prop_value) { |
| 2192 | rc = -ENOMEM; |
| 2193 | goto end; |
| 2194 | } |
| 2195 | |
| 2196 | rc = _validate_dt_entry(np, ds_prop, ARRAY_SIZE(ds_prop), prop_count, |
| 2197 | &off_count); |
| 2198 | if (rc) |
| 2199 | goto end; |
| 2200 | |
| 2201 | sde_cfg->ds_count = off_count; |
| 2202 | |
| 2203 | rc = _read_dt_entry(np, ds_prop, ARRAY_SIZE(ds_prop), prop_count, |
| 2204 | prop_exists, prop_value); |
| 2205 | if (rc) |
| 2206 | goto end; |
| 2207 | |
| 2208 | if (!off_count) |
| 2209 | goto end; |
| 2210 | |
| 2211 | ds_top = kzalloc(sizeof(struct sde_ds_top_cfg), GFP_KERNEL); |
| 2212 | if (!ds_top) { |
| 2213 | rc = -ENOMEM; |
| 2214 | goto end; |
| 2215 | } |
| 2216 | |
| 2217 | ds_top->id = DS_TOP; |
| 2218 | snprintf(ds_top->name, SDE_HW_BLK_NAME_LEN, "ds_top_%u", |
| 2219 | ds_top->id - DS_TOP); |
| 2220 | ds_top->base = PROP_VALUE_ACCESS(top_prop_value, DS_TOP_OFF, 0); |
| 2221 | ds_top->len = PROP_VALUE_ACCESS(top_prop_value, DS_TOP_LEN, 0); |
| 2222 | ds_top->maxupscale = MAX_UPSCALE_RATIO; |
| 2223 | |
| 2224 | ds_top->maxinputwidth = PROP_VALUE_ACCESS(top_prop_value, |
| 2225 | DS_TOP_INPUT_LINEWIDTH, 0); |
| 2226 | if (!top_prop_exists[DS_TOP_INPUT_LINEWIDTH]) |
| 2227 | ds_top->maxinputwidth = DEFAULT_SDE_LINE_WIDTH; |
| 2228 | |
| 2229 | ds_top->maxoutputwidth = PROP_VALUE_ACCESS(top_prop_value, |
| 2230 | DS_TOP_OUTPUT_LINEWIDTH, 0); |
| 2231 | if (!top_prop_exists[DS_TOP_OUTPUT_LINEWIDTH]) |
| 2232 | ds_top->maxoutputwidth = DEFAULT_SDE_OUTPUT_LINE_WIDTH; |
| 2233 | |
| 2234 | for (i = 0; i < off_count; i++) { |
| 2235 | ds = sde_cfg->ds + i; |
| 2236 | ds->top = ds_top; |
| 2237 | ds->base = PROP_VALUE_ACCESS(prop_value, DS_OFF, i); |
| 2238 | ds->id = DS_0 + i; |
| 2239 | ds->len = PROP_VALUE_ACCESS(prop_value, DS_LEN, 0); |
| 2240 | snprintf(ds->name, SDE_HW_BLK_NAME_LEN, "ds_%u", |
| 2241 | ds->id - DS_0); |
| 2242 | |
| 2243 | if (!prop_exists[DS_LEN]) |
| 2244 | ds->len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 2245 | |
| 2246 | if (sde_cfg->qseed_type == SDE_SSPP_SCALER_QSEED3) |
| 2247 | set_bit(SDE_SSPP_SCALER_QSEED3, &ds->features); |
| 2248 | } |
| 2249 | |
| 2250 | end: |
| 2251 | kfree(top_prop_value); |
| 2252 | kfree(prop_value); |
| 2253 | return rc; |
| 2254 | }; |
| 2255 | |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 2256 | static int sde_dsc_parse_dt(struct device_node *np, |
| 2257 | struct sde_mdss_cfg *sde_cfg) |
| 2258 | { |
| 2259 | int rc, prop_count[MAX_BLOCKS], i; |
| 2260 | struct sde_prop_value *prop_value = NULL; |
| 2261 | bool prop_exists[DSC_PROP_MAX]; |
| 2262 | u32 off_count; |
| 2263 | struct sde_dsc_cfg *dsc; |
| 2264 | |
| 2265 | if (!sde_cfg) { |
| 2266 | SDE_ERROR("invalid argument\n"); |
| 2267 | rc = -EINVAL; |
| 2268 | goto end; |
| 2269 | } |
| 2270 | |
| 2271 | prop_value = kzalloc(DSC_PROP_MAX * |
| 2272 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 2273 | if (!prop_value) { |
| 2274 | rc = -ENOMEM; |
| 2275 | goto end; |
| 2276 | } |
| 2277 | |
| 2278 | rc = _validate_dt_entry(np, dsc_prop, ARRAY_SIZE(dsc_prop), prop_count, |
| 2279 | &off_count); |
| 2280 | if (rc) |
| 2281 | goto end; |
| 2282 | |
| 2283 | sde_cfg->dsc_count = off_count; |
| 2284 | |
| 2285 | rc = _read_dt_entry(np, dsc_prop, ARRAY_SIZE(dsc_prop), prop_count, |
| 2286 | prop_exists, prop_value); |
| 2287 | if (rc) |
| 2288 | goto end; |
| 2289 | |
| 2290 | for (i = 0; i < off_count; i++) { |
| 2291 | dsc = sde_cfg->dsc + i; |
| 2292 | dsc->base = PROP_VALUE_ACCESS(prop_value, DSC_OFF, i); |
| 2293 | dsc->id = DSC_0 + i; |
| 2294 | dsc->len = PROP_VALUE_ACCESS(prop_value, DSC_LEN, 0); |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2295 | snprintf(dsc->name, SDE_HW_BLK_NAME_LEN, "dsc_%u", |
| 2296 | dsc->id - DSC_0); |
| 2297 | |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 2298 | if (!prop_exists[DSC_LEN]) |
| 2299 | dsc->len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 2300 | } |
| 2301 | |
| 2302 | end: |
| 2303 | kfree(prop_value); |
| 2304 | return rc; |
| 2305 | }; |
| 2306 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2307 | static int sde_cdm_parse_dt(struct device_node *np, |
| 2308 | struct sde_mdss_cfg *sde_cfg) |
| 2309 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2310 | int rc, prop_count[HW_PROP_MAX], i; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2311 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2312 | bool prop_exists[HW_PROP_MAX]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2313 | u32 off_count; |
| 2314 | struct sde_cdm_cfg *cdm; |
| 2315 | |
| 2316 | if (!sde_cfg) { |
| 2317 | SDE_ERROR("invalid argument\n"); |
| 2318 | rc = -EINVAL; |
| 2319 | goto end; |
| 2320 | } |
| 2321 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2322 | prop_value = kzalloc(HW_PROP_MAX * |
| 2323 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2324 | if (!prop_value) { |
| 2325 | rc = -ENOMEM; |
| 2326 | goto end; |
| 2327 | } |
| 2328 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2329 | rc = _validate_dt_entry(np, cdm_prop, ARRAY_SIZE(cdm_prop), prop_count, |
| 2330 | &off_count); |
| 2331 | if (rc) |
| 2332 | goto end; |
| 2333 | |
| 2334 | sde_cfg->cdm_count = off_count; |
| 2335 | |
| 2336 | rc = _read_dt_entry(np, cdm_prop, ARRAY_SIZE(cdm_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2337 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2338 | if (rc) |
| 2339 | goto end; |
| 2340 | |
| 2341 | for (i = 0; i < off_count; i++) { |
| 2342 | cdm = sde_cfg->cdm + i; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2343 | cdm->base = PROP_VALUE_ACCESS(prop_value, HW_OFF, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2344 | cdm->id = CDM_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2345 | snprintf(cdm->name, SDE_HW_BLK_NAME_LEN, "cdm_%u", |
| 2346 | cdm->id - CDM_0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2347 | cdm->len = PROP_VALUE_ACCESS(prop_value, HW_LEN, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2348 | |
| 2349 | /* intf3 and wb2 for cdm block */ |
| 2350 | cdm->wb_connect = sde_cfg->wb_count ? BIT(WB_2) : BIT(31); |
Narender Ankam | c7ce0b0 | 2020-03-16 17:40:34 +0530 | [diff] [blame^] | 2351 | cdm->intf_connect = sde_cfg->intf_count ? BIT(INTF_0) : BIT(31); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2352 | } |
| 2353 | |
| 2354 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2355 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2356 | return rc; |
| 2357 | } |
| 2358 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2359 | static int sde_vbif_parse_dt(struct device_node *np, |
| 2360 | struct sde_mdss_cfg *sde_cfg) |
| 2361 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2362 | int rc, prop_count[VBIF_PROP_MAX], i, j, k; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2363 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2364 | bool prop_exists[VBIF_PROP_MAX]; |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 2365 | u32 off_count, vbif_len; |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2366 | struct sde_vbif_cfg *vbif; |
| 2367 | |
| 2368 | if (!sde_cfg) { |
| 2369 | SDE_ERROR("invalid argument\n"); |
| 2370 | rc = -EINVAL; |
| 2371 | goto end; |
| 2372 | } |
| 2373 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2374 | prop_value = kzalloc(VBIF_PROP_MAX * |
| 2375 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2376 | if (!prop_value) { |
| 2377 | rc = -ENOMEM; |
| 2378 | goto end; |
| 2379 | } |
| 2380 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2381 | rc = _validate_dt_entry(np, vbif_prop, ARRAY_SIZE(vbif_prop), |
| 2382 | prop_count, &off_count); |
| 2383 | if (rc) |
| 2384 | goto end; |
| 2385 | |
| 2386 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_DYNAMIC_OT_RD_LIMIT], 1, |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 2387 | &prop_count[VBIF_DYNAMIC_OT_RD_LIMIT], NULL); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2388 | if (rc) |
| 2389 | goto end; |
| 2390 | |
| 2391 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_DYNAMIC_OT_WR_LIMIT], 1, |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 2392 | &prop_count[VBIF_DYNAMIC_OT_WR_LIMIT], NULL); |
| 2393 | if (rc) |
| 2394 | goto end; |
| 2395 | |
| 2396 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_QOS_RT_REMAP], 1, |
| 2397 | &prop_count[VBIF_QOS_RT_REMAP], NULL); |
| 2398 | if (rc) |
| 2399 | goto end; |
| 2400 | |
| 2401 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_QOS_NRT_REMAP], 1, |
| 2402 | &prop_count[VBIF_QOS_NRT_REMAP], NULL); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2403 | if (rc) |
| 2404 | goto end; |
| 2405 | |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 2406 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_MEMTYPE_0], 1, |
| 2407 | &prop_count[VBIF_MEMTYPE_0], NULL); |
| 2408 | if (rc) |
| 2409 | goto end; |
| 2410 | |
| 2411 | rc = _validate_dt_entry(np, &vbif_prop[VBIF_MEMTYPE_1], 1, |
| 2412 | &prop_count[VBIF_MEMTYPE_1], NULL); |
| 2413 | if (rc) |
| 2414 | goto end; |
| 2415 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2416 | sde_cfg->vbif_count = off_count; |
| 2417 | |
| 2418 | rc = _read_dt_entry(np, vbif_prop, ARRAY_SIZE(vbif_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2419 | prop_exists, prop_value); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2420 | if (rc) |
| 2421 | goto end; |
| 2422 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2423 | vbif_len = PROP_VALUE_ACCESS(prop_value, VBIF_LEN, 0); |
| 2424 | if (!prop_exists[VBIF_LEN]) |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2425 | vbif_len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 2426 | |
| 2427 | for (i = 0; i < off_count; i++) { |
| 2428 | vbif = sde_cfg->vbif + i; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2429 | vbif->base = PROP_VALUE_ACCESS(prop_value, VBIF_OFF, i); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2430 | vbif->len = vbif_len; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2431 | vbif->id = VBIF_0 + PROP_VALUE_ACCESS(prop_value, VBIF_ID, i); |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2432 | snprintf(vbif->name, SDE_HW_BLK_NAME_LEN, "vbif_%u", |
| 2433 | vbif->id - VBIF_0); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2434 | |
| 2435 | SDE_DEBUG("vbif:%d\n", vbif->id - VBIF_0); |
| 2436 | |
| 2437 | vbif->xin_halt_timeout = VBIF_XIN_HALT_TIMEOUT; |
| 2438 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2439 | vbif->default_ot_rd_limit = PROP_VALUE_ACCESS(prop_value, |
| 2440 | VBIF_DEFAULT_OT_RD_LIMIT, 0); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2441 | SDE_DEBUG("default_ot_rd_limit=%u\n", |
| 2442 | vbif->default_ot_rd_limit); |
| 2443 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2444 | vbif->default_ot_wr_limit = PROP_VALUE_ACCESS(prop_value, |
| 2445 | VBIF_DEFAULT_OT_WR_LIMIT, 0); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2446 | SDE_DEBUG("default_ot_wr_limit=%u\n", |
| 2447 | vbif->default_ot_wr_limit); |
| 2448 | |
| 2449 | vbif->dynamic_ot_rd_tbl.count = |
| 2450 | prop_count[VBIF_DYNAMIC_OT_RD_LIMIT] / 2; |
| 2451 | SDE_DEBUG("dynamic_ot_rd_tbl.count=%u\n", |
| 2452 | vbif->dynamic_ot_rd_tbl.count); |
| 2453 | if (vbif->dynamic_ot_rd_tbl.count) { |
| 2454 | vbif->dynamic_ot_rd_tbl.cfg = kcalloc( |
| 2455 | vbif->dynamic_ot_rd_tbl.count, |
| 2456 | sizeof(struct sde_vbif_dynamic_ot_cfg), |
| 2457 | GFP_KERNEL); |
| 2458 | if (!vbif->dynamic_ot_rd_tbl.cfg) { |
| 2459 | rc = -ENOMEM; |
| 2460 | goto end; |
| 2461 | } |
| 2462 | } |
| 2463 | |
| 2464 | for (j = 0, k = 0; j < vbif->dynamic_ot_rd_tbl.count; j++) { |
| 2465 | vbif->dynamic_ot_rd_tbl.cfg[j].pps = (u64) |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2466 | PROP_VALUE_ACCESS(prop_value, |
| 2467 | VBIF_DYNAMIC_OT_RD_LIMIT, k++); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2468 | vbif->dynamic_ot_rd_tbl.cfg[j].ot_limit = |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2469 | PROP_VALUE_ACCESS(prop_value, |
| 2470 | VBIF_DYNAMIC_OT_RD_LIMIT, k++); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2471 | SDE_DEBUG("dynamic_ot_rd_tbl[%d].cfg=<%llu %u>\n", j, |
| 2472 | vbif->dynamic_ot_rd_tbl.cfg[j].pps, |
| 2473 | vbif->dynamic_ot_rd_tbl.cfg[j].ot_limit); |
| 2474 | } |
| 2475 | |
| 2476 | vbif->dynamic_ot_wr_tbl.count = |
| 2477 | prop_count[VBIF_DYNAMIC_OT_WR_LIMIT] / 2; |
| 2478 | SDE_DEBUG("dynamic_ot_wr_tbl.count=%u\n", |
| 2479 | vbif->dynamic_ot_wr_tbl.count); |
| 2480 | if (vbif->dynamic_ot_wr_tbl.count) { |
| 2481 | vbif->dynamic_ot_wr_tbl.cfg = kcalloc( |
| 2482 | vbif->dynamic_ot_wr_tbl.count, |
| 2483 | sizeof(struct sde_vbif_dynamic_ot_cfg), |
| 2484 | GFP_KERNEL); |
| 2485 | if (!vbif->dynamic_ot_wr_tbl.cfg) { |
| 2486 | rc = -ENOMEM; |
| 2487 | goto end; |
| 2488 | } |
| 2489 | } |
| 2490 | |
| 2491 | for (j = 0, k = 0; j < vbif->dynamic_ot_wr_tbl.count; j++) { |
| 2492 | vbif->dynamic_ot_wr_tbl.cfg[j].pps = (u64) |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2493 | PROP_VALUE_ACCESS(prop_value, |
| 2494 | VBIF_DYNAMIC_OT_WR_LIMIT, k++); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2495 | vbif->dynamic_ot_wr_tbl.cfg[j].ot_limit = |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2496 | PROP_VALUE_ACCESS(prop_value, |
| 2497 | VBIF_DYNAMIC_OT_WR_LIMIT, k++); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2498 | SDE_DEBUG("dynamic_ot_wr_tbl[%d].cfg=<%llu %u>\n", j, |
| 2499 | vbif->dynamic_ot_wr_tbl.cfg[j].pps, |
| 2500 | vbif->dynamic_ot_wr_tbl.cfg[j].ot_limit); |
| 2501 | } |
| 2502 | |
| 2503 | if (vbif->default_ot_rd_limit || vbif->default_ot_wr_limit || |
| 2504 | vbif->dynamic_ot_rd_tbl.count || |
| 2505 | vbif->dynamic_ot_wr_tbl.count) |
| 2506 | set_bit(SDE_VBIF_QOS_OTLIM, &vbif->features); |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 2507 | |
| 2508 | vbif->qos_rt_tbl.npriority_lvl = |
| 2509 | prop_count[VBIF_QOS_RT_REMAP]; |
| 2510 | SDE_DEBUG("qos_rt_tbl.npriority_lvl=%u\n", |
| 2511 | vbif->qos_rt_tbl.npriority_lvl); |
| 2512 | if (vbif->qos_rt_tbl.npriority_lvl == sde_cfg->vbif_qos_nlvl) { |
| 2513 | vbif->qos_rt_tbl.priority_lvl = kcalloc( |
| 2514 | vbif->qos_rt_tbl.npriority_lvl, sizeof(u32), |
| 2515 | GFP_KERNEL); |
| 2516 | if (!vbif->qos_rt_tbl.priority_lvl) { |
| 2517 | rc = -ENOMEM; |
| 2518 | goto end; |
| 2519 | } |
| 2520 | } else if (vbif->qos_rt_tbl.npriority_lvl) { |
| 2521 | vbif->qos_rt_tbl.npriority_lvl = 0; |
| 2522 | vbif->qos_rt_tbl.priority_lvl = NULL; |
| 2523 | SDE_ERROR("invalid qos rt table\n"); |
| 2524 | } |
| 2525 | |
| 2526 | for (j = 0; j < vbif->qos_rt_tbl.npriority_lvl; j++) { |
| 2527 | vbif->qos_rt_tbl.priority_lvl[j] = |
| 2528 | PROP_VALUE_ACCESS(prop_value, |
| 2529 | VBIF_QOS_RT_REMAP, j); |
| 2530 | SDE_DEBUG("lvl[%d]=%u\n", j, |
| 2531 | vbif->qos_rt_tbl.priority_lvl[j]); |
| 2532 | } |
| 2533 | |
| 2534 | vbif->qos_nrt_tbl.npriority_lvl = |
| 2535 | prop_count[VBIF_QOS_NRT_REMAP]; |
| 2536 | SDE_DEBUG("qos_nrt_tbl.npriority_lvl=%u\n", |
| 2537 | vbif->qos_nrt_tbl.npriority_lvl); |
| 2538 | |
| 2539 | if (vbif->qos_nrt_tbl.npriority_lvl == sde_cfg->vbif_qos_nlvl) { |
| 2540 | vbif->qos_nrt_tbl.priority_lvl = kcalloc( |
| 2541 | vbif->qos_nrt_tbl.npriority_lvl, sizeof(u32), |
| 2542 | GFP_KERNEL); |
| 2543 | if (!vbif->qos_nrt_tbl.priority_lvl) { |
| 2544 | rc = -ENOMEM; |
| 2545 | goto end; |
| 2546 | } |
| 2547 | } else if (vbif->qos_nrt_tbl.npriority_lvl) { |
| 2548 | vbif->qos_nrt_tbl.npriority_lvl = 0; |
| 2549 | vbif->qos_nrt_tbl.priority_lvl = NULL; |
| 2550 | SDE_ERROR("invalid qos nrt table\n"); |
| 2551 | } |
| 2552 | |
| 2553 | for (j = 0; j < vbif->qos_nrt_tbl.npriority_lvl; j++) { |
| 2554 | vbif->qos_nrt_tbl.priority_lvl[j] = |
| 2555 | PROP_VALUE_ACCESS(prop_value, |
| 2556 | VBIF_QOS_NRT_REMAP, j); |
| 2557 | SDE_DEBUG("lvl[%d]=%u\n", j, |
| 2558 | vbif->qos_nrt_tbl.priority_lvl[j]); |
| 2559 | } |
| 2560 | |
| 2561 | if (vbif->qos_rt_tbl.npriority_lvl || |
| 2562 | vbif->qos_nrt_tbl.npriority_lvl) |
| 2563 | set_bit(SDE_VBIF_QOS_REMAP, &vbif->features); |
Clarence Ip | 7f0de63 | 2017-05-31 14:59:14 -0400 | [diff] [blame] | 2564 | |
| 2565 | vbif->memtype_count = prop_count[VBIF_MEMTYPE_0] + |
| 2566 | prop_count[VBIF_MEMTYPE_1]; |
| 2567 | if (vbif->memtype_count > MAX_XIN_COUNT) { |
| 2568 | vbif->memtype_count = 0; |
| 2569 | SDE_ERROR("too many memtype defs, ignoring entries\n"); |
| 2570 | } |
| 2571 | for (j = 0, k = 0; j < prop_count[VBIF_MEMTYPE_0]; j++) |
| 2572 | vbif->memtype[k++] = PROP_VALUE_ACCESS( |
| 2573 | prop_value, VBIF_MEMTYPE_0, j); |
| 2574 | for (j = 0; j < prop_count[VBIF_MEMTYPE_1]; j++) |
| 2575 | vbif->memtype[k++] = PROP_VALUE_ACCESS( |
| 2576 | prop_value, VBIF_MEMTYPE_1, j); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2577 | } |
| 2578 | |
| 2579 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2580 | kfree(prop_value); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 2581 | return rc; |
| 2582 | } |
| 2583 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2584 | static int sde_pp_parse_dt(struct device_node *np, struct sde_mdss_cfg *sde_cfg) |
| 2585 | { |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2586 | int rc, prop_count[PP_PROP_MAX], i; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2587 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2588 | bool prop_exists[PP_PROP_MAX]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2589 | u32 off_count; |
| 2590 | struct sde_pingpong_cfg *pp; |
| 2591 | struct sde_pingpong_sub_blks *sblk; |
| 2592 | |
| 2593 | if (!sde_cfg) { |
| 2594 | SDE_ERROR("invalid argument\n"); |
| 2595 | rc = -EINVAL; |
| 2596 | goto end; |
| 2597 | } |
| 2598 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2599 | prop_value = kzalloc(PP_PROP_MAX * |
| 2600 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2601 | if (!prop_value) { |
| 2602 | rc = -ENOMEM; |
| 2603 | goto end; |
| 2604 | } |
| 2605 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2606 | rc = _validate_dt_entry(np, pp_prop, ARRAY_SIZE(pp_prop), prop_count, |
| 2607 | &off_count); |
| 2608 | if (rc) |
| 2609 | goto end; |
| 2610 | |
| 2611 | sde_cfg->pingpong_count = off_count; |
| 2612 | |
| 2613 | rc = _read_dt_entry(np, pp_prop, ARRAY_SIZE(pp_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2614 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2615 | if (rc) |
| 2616 | goto end; |
| 2617 | |
| 2618 | for (i = 0; i < off_count; i++) { |
| 2619 | pp = sde_cfg->pingpong + i; |
| 2620 | sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); |
| 2621 | if (!sblk) { |
| 2622 | rc = -ENOMEM; |
| 2623 | /* catalog deinit will release the allocated blocks */ |
| 2624 | goto end; |
| 2625 | } |
| 2626 | pp->sblk = sblk; |
| 2627 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2628 | pp->base = PROP_VALUE_ACCESS(prop_value, PP_OFF, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2629 | pp->id = PINGPONG_0 + i; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2630 | snprintf(pp->name, SDE_HW_BLK_NAME_LEN, "pingpong_%u", |
| 2631 | pp->id - PINGPONG_0); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2632 | pp->len = PROP_VALUE_ACCESS(prop_value, PP_LEN, 0); |
Kalyan Thota | a02db2c | 2018-04-27 11:39:18 +0530 | [diff] [blame] | 2633 | pp->te_source = PROP_VALUE_ACCESS(prop_value, TE_SOURCE, i); |
| 2634 | if (!prop_exists[TE_SOURCE] || |
| 2635 | pp->te_source > SDE_VSYNC_SOURCE_WD_TIMER_0) |
| 2636 | pp->te_source = SDE_VSYNC0_SOURCE_GPIO; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2637 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2638 | sblk->te.base = PROP_VALUE_ACCESS(prop_value, TE_OFF, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2639 | sblk->te.id = SDE_PINGPONG_TE; |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2640 | snprintf(sblk->te.name, SDE_HW_BLK_NAME_LEN, "te_%u", |
| 2641 | pp->id - PINGPONG_0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2642 | set_bit(SDE_PINGPONG_TE, &pp->features); |
| 2643 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2644 | sblk->te2.base = PROP_VALUE_ACCESS(prop_value, TE2_OFF, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2645 | if (sblk->te2.base) { |
| 2646 | sblk->te2.id = SDE_PINGPONG_TE2; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 2647 | snprintf(sblk->te2.name, SDE_HW_BLK_NAME_LEN, "te2_%u", |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2648 | pp->id - PINGPONG_0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2649 | set_bit(SDE_PINGPONG_TE2, &pp->features); |
| 2650 | set_bit(SDE_PINGPONG_SPLIT, &pp->features); |
| 2651 | } |
| 2652 | |
Clarence Ip | 8e69ad0 | 2016-12-09 09:43:57 -0500 | [diff] [blame] | 2653 | if (PROP_VALUE_ACCESS(prop_value, PP_SLAVE, i)) |
| 2654 | set_bit(SDE_PINGPONG_SLAVE, &pp->features); |
| 2655 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2656 | sblk->dsc.base = PROP_VALUE_ACCESS(prop_value, DSC_OFF, i); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2657 | if (sblk->dsc.base) { |
| 2658 | sblk->dsc.id = SDE_PINGPONG_DSC; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 2659 | snprintf(sblk->dsc.name, SDE_HW_BLK_NAME_LEN, "dsc_%u", |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2660 | pp->id - PINGPONG_0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2661 | set_bit(SDE_PINGPONG_DSC, &pp->features); |
| 2662 | } |
Ping Li | 8430ee1 | 2017-02-24 14:14:44 -0800 | [diff] [blame] | 2663 | |
| 2664 | sblk->dither.base = PROP_VALUE_ACCESS(prop_value, DITHER_OFF, |
| 2665 | i); |
| 2666 | if (sblk->dither.base) { |
| 2667 | sblk->dither.id = SDE_PINGPONG_DITHER; |
| 2668 | snprintf(sblk->dither.name, SDE_HW_BLK_NAME_LEN, |
| 2669 | "dither_%u", pp->id); |
| 2670 | set_bit(SDE_PINGPONG_DITHER, &pp->features); |
| 2671 | } |
| 2672 | sblk->dither.len = PROP_VALUE_ACCESS(prop_value, DITHER_LEN, 0); |
| 2673 | sblk->dither.version = PROP_VALUE_ACCESS(prop_value, DITHER_VER, |
| 2674 | 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2675 | } |
| 2676 | |
| 2677 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2678 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2679 | return rc; |
| 2680 | } |
| 2681 | |
| 2682 | static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) |
| 2683 | { |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 2684 | int rc, dma_rc, len, prop_count[SDE_PROP_MAX]; |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2685 | struct sde_prop_value *prop_value = NULL; |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2686 | bool prop_exists[SDE_PROP_MAX]; |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2687 | const char *type; |
| 2688 | |
| 2689 | if (!cfg) { |
| 2690 | SDE_ERROR("invalid argument\n"); |
| 2691 | rc = -EINVAL; |
| 2692 | goto end; |
| 2693 | } |
| 2694 | |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2695 | prop_value = kzalloc(SDE_PROP_MAX * |
| 2696 | sizeof(struct sde_prop_value), GFP_KERNEL); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2697 | if (!prop_value) { |
| 2698 | rc = -ENOMEM; |
| 2699 | goto end; |
| 2700 | } |
| 2701 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2702 | rc = _validate_dt_entry(np, sde_prop, ARRAY_SIZE(sde_prop), prop_count, |
| 2703 | &len); |
| 2704 | if (rc) |
| 2705 | goto end; |
| 2706 | |
| 2707 | rc = _read_dt_entry(np, sde_prop, ARRAY_SIZE(sde_prop), prop_count, |
Clarence Ip | 613fd8a | 2016-11-29 19:01:39 -0500 | [diff] [blame] | 2708 | prop_exists, prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2709 | if (rc) |
| 2710 | goto end; |
| 2711 | |
| 2712 | cfg->mdss_count = 1; |
| 2713 | cfg->mdss[0].base = MDSS_BASE_OFFSET; |
| 2714 | cfg->mdss[0].id = MDP_TOP; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 2715 | snprintf(cfg->mdss[0].name, SDE_HW_BLK_NAME_LEN, "mdss_%u", |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2716 | cfg->mdss[0].id - MDP_TOP); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2717 | |
| 2718 | cfg->mdp_count = 1; |
| 2719 | cfg->mdp[0].id = MDP_TOP; |
Lloyd Atkinson | 7715873 | 2016-10-23 13:02:00 -0400 | [diff] [blame] | 2720 | snprintf(cfg->mdp[0].name, SDE_HW_BLK_NAME_LEN, "top_%u", |
Lloyd Atkinson | ac4b6e0 | 2017-03-23 11:43:48 -0700 | [diff] [blame] | 2721 | cfg->mdp[0].id - MDP_TOP); |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2722 | cfg->mdp[0].base = PROP_VALUE_ACCESS(prop_value, SDE_OFF, 0); |
| 2723 | cfg->mdp[0].len = PROP_VALUE_ACCESS(prop_value, SDE_LEN, 0); |
| 2724 | if (!prop_exists[SDE_LEN]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2725 | cfg->mdp[0].len = DEFAULT_SDE_HW_BLOCK_LEN; |
| 2726 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2727 | cfg->max_sspp_linewidth = PROP_VALUE_ACCESS(prop_value, |
| 2728 | SSPP_LINEWIDTH, 0); |
| 2729 | if (!prop_exists[SSPP_LINEWIDTH]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2730 | cfg->max_sspp_linewidth = DEFAULT_SDE_LINE_WIDTH; |
| 2731 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2732 | cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value, |
| 2733 | MIXER_LINEWIDTH, 0); |
| 2734 | if (!prop_exists[MIXER_LINEWIDTH]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2735 | cfg->max_mixer_width = DEFAULT_SDE_LINE_WIDTH; |
| 2736 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2737 | cfg->max_mixer_blendstages = PROP_VALUE_ACCESS(prop_value, |
| 2738 | MIXER_BLEND, 0); |
| 2739 | if (!prop_exists[MIXER_BLEND]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2740 | cfg->max_mixer_blendstages = DEFAULT_SDE_MIXER_BLENDSTAGES; |
| 2741 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2742 | cfg->max_wb_linewidth = PROP_VALUE_ACCESS(prop_value, WB_LINEWIDTH, 0); |
| 2743 | if (!prop_exists[WB_LINEWIDTH]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2744 | cfg->max_wb_linewidth = DEFAULT_SDE_LINE_WIDTH; |
| 2745 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2746 | cfg->mdp[0].highest_bank_bit = PROP_VALUE_ACCESS(prop_value, |
| 2747 | BANK_BIT, 0); |
| 2748 | if (!prop_exists[BANK_BIT]) |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2749 | cfg->mdp[0].highest_bank_bit = DEFAULT_SDE_HIGHEST_BANK_BIT; |
| 2750 | |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 2751 | cfg->ubwc_version = PROP_VALUE_ACCESS(prop_value, UBWC_VERSION, 0); |
| 2752 | if (!prop_exists[UBWC_VERSION]) |
| 2753 | cfg->ubwc_version = DEFAULT_SDE_UBWC_VERSION; |
| 2754 | |
| 2755 | cfg->mdp[0].ubwc_static = PROP_VALUE_ACCESS(prop_value, UBWC_STATIC, 0); |
| 2756 | if (!prop_exists[UBWC_STATIC]) |
| 2757 | cfg->mdp[0].ubwc_static = DEFAULT_SDE_UBWC_STATIC; |
| 2758 | |
| 2759 | cfg->mdp[0].ubwc_swizzle = PROP_VALUE_ACCESS(prop_value, |
| 2760 | UBWC_SWIZZLE, 0); |
| 2761 | if (!prop_exists[UBWC_SWIZZLE]) |
| 2762 | cfg->mdp[0].ubwc_swizzle = DEFAULT_SDE_UBWC_SWIZZLE; |
| 2763 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 2764 | cfg->mdp[0].has_dest_scaler = |
| 2765 | PROP_VALUE_ACCESS(prop_value, DEST_SCALER, 0); |
| 2766 | |
Sravanthi Kollukuduru | 15421d8 | 2017-10-26 12:05:04 +0530 | [diff] [blame] | 2767 | cfg->mdp[0].smart_panel_align_mode = |
| 2768 | PROP_VALUE_ACCESS(prop_value, SMART_PANEL_ALIGN_MODE, 0); |
| 2769 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2770 | rc = of_property_read_string(np, sde_prop[QSEED_TYPE].prop_name, &type); |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2771 | if (!rc && !strcmp(type, "qseedv3")) { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2772 | cfg->qseed_type = SDE_SSPP_SCALER_QSEED3; |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2773 | } else if (!rc && !strcmp(type, "qseedv2")) { |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2774 | cfg->qseed_type = SDE_SSPP_SCALER_QSEED2; |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2775 | } else if (rc) { |
| 2776 | SDE_DEBUG("invalid QSEED configuration\n"); |
| 2777 | rc = 0; |
| 2778 | } |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2779 | |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 2780 | rc = of_property_read_string(np, sde_prop[CSC_TYPE].prop_name, &type); |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2781 | if (!rc && !strcmp(type, "csc")) { |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 2782 | cfg->csc_type = SDE_SSPP_CSC; |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2783 | } else if (!rc && !strcmp(type, "csc-10bit")) { |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 2784 | cfg->csc_type = SDE_SSPP_CSC_10BIT; |
Dhaval Patel | 0aee097 | 2017-02-08 19:00:58 -0800 | [diff] [blame] | 2785 | } else if (rc) { |
| 2786 | SDE_DEBUG("invalid csc configuration\n"); |
| 2787 | rc = 0; |
| 2788 | } |
Dhaval Patel | 5aad745 | 2017-01-12 09:59:31 -0800 | [diff] [blame] | 2789 | |
Jeykumar Sankaran | 2e65503 | 2017-02-04 14:05:45 -0800 | [diff] [blame] | 2790 | /* |
| 2791 | * Current SDE support only Smart DMA 2.0. |
| 2792 | * No support for Smart DMA 1.0 yet. |
| 2793 | */ |
| 2794 | cfg->smart_dma_rev = 0; |
| 2795 | dma_rc = of_property_read_string(np, sde_prop[SMART_DMA_REV].prop_name, |
| 2796 | &type); |
| 2797 | if (!dma_rc && !strcmp(type, "smart_dma_v2")) { |
| 2798 | cfg->smart_dma_rev = SDE_SSPP_SMART_DMA_V2; |
| 2799 | } else if (!dma_rc && !strcmp(type, "smart_dma_v1")) { |
| 2800 | SDE_ERROR("smart dma 1.0 is not supported in SDE\n"); |
| 2801 | cfg->smart_dma_rev = 0; |
| 2802 | } |
| 2803 | |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2804 | cfg->has_src_split = PROP_VALUE_ACCESS(prop_value, SRC_SPLIT, 0); |
Veera Sundaram Sankaran | 3171ff8 | 2017-01-04 14:34:47 -0800 | [diff] [blame] | 2805 | cfg->has_dim_layer = PROP_VALUE_ACCESS(prop_value, DIM_LAYER, 0); |
Veera Sundaram Sankaran | c9efbec | 2017-03-29 18:59:05 -0700 | [diff] [blame] | 2806 | cfg->has_idle_pc = PROP_VALUE_ACCESS(prop_value, IDLE_PC, 0); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2807 | end: |
Benet Clark | 37809e6 | 2016-10-24 10:14:00 -0700 | [diff] [blame] | 2808 | kfree(prop_value); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 2809 | return rc; |
| 2810 | } |
| 2811 | |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 2812 | static int sde_parse_reg_dma_dt(struct device_node *np, |
| 2813 | struct sde_mdss_cfg *sde_cfg) |
| 2814 | { |
| 2815 | u32 val; |
| 2816 | int rc = 0; |
| 2817 | int i = 0; |
| 2818 | |
| 2819 | sde_cfg->reg_dma_count = 0; |
| 2820 | for (i = 0; i < REG_DMA_PROP_MAX; i++) { |
| 2821 | rc = of_property_read_u32(np, reg_dma_prop[i].prop_name, |
| 2822 | &val); |
| 2823 | if (rc) |
| 2824 | break; |
| 2825 | switch (i) { |
| 2826 | case REG_DMA_OFF: |
| 2827 | sde_cfg->dma_cfg.base = val; |
| 2828 | break; |
| 2829 | case REG_DMA_VERSION: |
| 2830 | sde_cfg->dma_cfg.version = val; |
| 2831 | break; |
| 2832 | case REG_DMA_TRIGGER_OFF: |
| 2833 | sde_cfg->dma_cfg.trigger_sel_off = val; |
| 2834 | break; |
| 2835 | default: |
| 2836 | break; |
| 2837 | } |
| 2838 | } |
| 2839 | if (!rc && i == REG_DMA_PROP_MAX) |
| 2840 | sde_cfg->reg_dma_count = 1; |
| 2841 | /* reg dma is optional feature hence return 0 */ |
| 2842 | return 0; |
| 2843 | } |
| 2844 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 2845 | static int sde_perf_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) |
| 2846 | { |
| 2847 | int rc, len, prop_count[PERF_PROP_MAX]; |
| 2848 | struct sde_prop_value *prop_value = NULL; |
| 2849 | bool prop_exists[PERF_PROP_MAX]; |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 2850 | const char *str = NULL; |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 2851 | int j, k; |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 2852 | |
| 2853 | if (!cfg) { |
| 2854 | SDE_ERROR("invalid argument\n"); |
| 2855 | rc = -EINVAL; |
| 2856 | goto end; |
| 2857 | } |
| 2858 | |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 2859 | prop_value = kzalloc(PERF_PROP_MAX * |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 2860 | sizeof(struct sde_prop_value), GFP_KERNEL); |
| 2861 | if (!prop_value) { |
| 2862 | rc = -ENOMEM; |
| 2863 | goto end; |
| 2864 | } |
| 2865 | |
| 2866 | rc = _validate_dt_entry(np, sde_perf_prop, ARRAY_SIZE(sde_perf_prop), |
| 2867 | prop_count, &len); |
| 2868 | if (rc) |
| 2869 | goto freeprop; |
| 2870 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 2871 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_DANGER_LUT], 1, |
| 2872 | &prop_count[PERF_DANGER_LUT], NULL); |
| 2873 | if (rc) |
| 2874 | goto freeprop; |
| 2875 | |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 2876 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_LINEAR], 1, |
| 2877 | &prop_count[PERF_SAFE_LUT_LINEAR], NULL); |
| 2878 | if (rc) |
| 2879 | goto freeprop; |
| 2880 | |
| 2881 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_MACROTILE], 1, |
| 2882 | &prop_count[PERF_SAFE_LUT_MACROTILE], NULL); |
| 2883 | if (rc) |
| 2884 | goto freeprop; |
| 2885 | |
| 2886 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_NRT], 1, |
| 2887 | &prop_count[PERF_SAFE_LUT_NRT], NULL); |
| 2888 | if (rc) |
| 2889 | goto freeprop; |
| 2890 | |
| 2891 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_CWB], 1, |
| 2892 | &prop_count[PERF_SAFE_LUT_CWB], NULL); |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 2893 | if (rc) |
| 2894 | goto freeprop; |
| 2895 | |
| 2896 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_LINEAR], 1, |
| 2897 | &prop_count[PERF_QOS_LUT_LINEAR], NULL); |
| 2898 | if (rc) |
| 2899 | goto freeprop; |
| 2900 | |
| 2901 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_MACROTILE], 1, |
| 2902 | &prop_count[PERF_QOS_LUT_MACROTILE], NULL); |
| 2903 | if (rc) |
| 2904 | goto freeprop; |
| 2905 | |
| 2906 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_NRT], 1, |
| 2907 | &prop_count[PERF_QOS_LUT_NRT], NULL); |
| 2908 | if (rc) |
| 2909 | goto freeprop; |
| 2910 | |
| 2911 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_CWB], 1, |
| 2912 | &prop_count[PERF_QOS_LUT_CWB], NULL); |
| 2913 | if (rc) |
| 2914 | goto freeprop; |
| 2915 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 2916 | rc = _validate_dt_entry(np, &sde_perf_prop[PERF_CDP_SETTING], 1, |
| 2917 | &prop_count[PERF_CDP_SETTING], NULL); |
| 2918 | if (rc) |
| 2919 | goto freeprop; |
| 2920 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 2921 | rc = _read_dt_entry(np, sde_perf_prop, ARRAY_SIZE(sde_perf_prop), |
| 2922 | prop_count, prop_exists, prop_value); |
| 2923 | if (rc) |
| 2924 | goto freeprop; |
| 2925 | |
| 2926 | cfg->perf.max_bw_low = |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 2927 | prop_exists[PERF_MAX_BW_LOW] ? |
| 2928 | PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_LOW, 0) : |
| 2929 | DEFAULT_MAX_BW_LOW; |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 2930 | cfg->perf.max_bw_high = |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 2931 | prop_exists[PERF_MAX_BW_HIGH] ? |
| 2932 | PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_HIGH, 0) : |
| 2933 | DEFAULT_MAX_BW_HIGH; |
Narendra Muppalla | a50934b | 2017-08-15 19:43:37 -0700 | [diff] [blame] | 2934 | cfg->perf.min_core_ib = |
| 2935 | prop_exists[PERF_MIN_CORE_IB] ? |
| 2936 | PROP_VALUE_ACCESS(prop_value, PERF_MIN_CORE_IB, 0) : |
| 2937 | DEFAULT_MAX_BW_LOW; |
| 2938 | cfg->perf.min_llcc_ib = |
| 2939 | prop_exists[PERF_MIN_LLCC_IB] ? |
| 2940 | PROP_VALUE_ACCESS(prop_value, PERF_MIN_LLCC_IB, 0) : |
| 2941 | DEFAULT_MAX_BW_LOW; |
| 2942 | cfg->perf.min_dram_ib = |
| 2943 | prop_exists[PERF_MIN_DRAM_IB] ? |
| 2944 | PROP_VALUE_ACCESS(prop_value, PERF_MIN_DRAM_IB, 0) : |
| 2945 | DEFAULT_MAX_BW_LOW; |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 2946 | |
| 2947 | /* |
| 2948 | * The following performance parameters (e.g. core_ib_ff) are |
| 2949 | * mapped directly as device tree string constants. |
| 2950 | */ |
| 2951 | rc = of_property_read_string(np, |
| 2952 | sde_perf_prop[PERF_CORE_IB_FF].prop_name, &str); |
| 2953 | cfg->perf.core_ib_ff = rc ? DEFAULT_CORE_IB_FF : str; |
| 2954 | rc = of_property_read_string(np, |
| 2955 | sde_perf_prop[PERF_CORE_CLK_FF].prop_name, &str); |
| 2956 | cfg->perf.core_clk_ff = rc ? DEFAULT_CORE_CLK_FF : str; |
| 2957 | rc = of_property_read_string(np, |
| 2958 | sde_perf_prop[PERF_COMP_RATIO_RT].prop_name, &str); |
| 2959 | cfg->perf.comp_ratio_rt = rc ? DEFAULT_COMP_RATIO_RT : str; |
| 2960 | rc = of_property_read_string(np, |
| 2961 | sde_perf_prop[PERF_COMP_RATIO_NRT].prop_name, &str); |
| 2962 | cfg->perf.comp_ratio_nrt = rc ? DEFAULT_COMP_RATIO_NRT : str; |
| 2963 | rc = 0; |
| 2964 | |
| 2965 | cfg->perf.undersized_prefill_lines = |
| 2966 | prop_exists[PERF_UNDERSIZED_PREFILL_LINES] ? |
| 2967 | PROP_VALUE_ACCESS(prop_value, |
| 2968 | PERF_UNDERSIZED_PREFILL_LINES, 0) : |
| 2969 | DEFAULT_UNDERSIZED_PREFILL_LINES; |
| 2970 | cfg->perf.xtra_prefill_lines = |
| 2971 | prop_exists[PERF_XTRA_PREFILL_LINES] ? |
| 2972 | PROP_VALUE_ACCESS(prop_value, |
| 2973 | PERF_XTRA_PREFILL_LINES, 0) : |
| 2974 | DEFAULT_XTRA_PREFILL_LINES; |
| 2975 | cfg->perf.dest_scale_prefill_lines = |
| 2976 | prop_exists[PERF_DEST_SCALE_PREFILL_LINES] ? |
| 2977 | PROP_VALUE_ACCESS(prop_value, |
| 2978 | PERF_DEST_SCALE_PREFILL_LINES, 0) : |
| 2979 | DEFAULT_DEST_SCALE_PREFILL_LINES; |
| 2980 | cfg->perf.macrotile_prefill_lines = |
| 2981 | prop_exists[PERF_MACROTILE_PREFILL_LINES] ? |
| 2982 | PROP_VALUE_ACCESS(prop_value, |
| 2983 | PERF_MACROTILE_PREFILL_LINES, 0) : |
| 2984 | DEFAULT_MACROTILE_PREFILL_LINES; |
| 2985 | cfg->perf.yuv_nv12_prefill_lines = |
| 2986 | prop_exists[PERF_YUV_NV12_PREFILL_LINES] ? |
| 2987 | PROP_VALUE_ACCESS(prop_value, |
| 2988 | PERF_YUV_NV12_PREFILL_LINES, 0) : |
| 2989 | DEFAULT_YUV_NV12_PREFILL_LINES; |
| 2990 | cfg->perf.linear_prefill_lines = |
| 2991 | prop_exists[PERF_LINEAR_PREFILL_LINES] ? |
| 2992 | PROP_VALUE_ACCESS(prop_value, |
| 2993 | PERF_LINEAR_PREFILL_LINES, 0) : |
| 2994 | DEFAULT_LINEAR_PREFILL_LINES; |
| 2995 | cfg->perf.downscaling_prefill_lines = |
| 2996 | prop_exists[PERF_DOWNSCALING_PREFILL_LINES] ? |
| 2997 | PROP_VALUE_ACCESS(prop_value, |
| 2998 | PERF_DOWNSCALING_PREFILL_LINES, 0) : |
| 2999 | DEFAULT_DOWNSCALING_PREFILL_LINES; |
| 3000 | cfg->perf.amortizable_threshold = |
| 3001 | prop_exists[PERF_AMORTIZABLE_THRESHOLD] ? |
| 3002 | PROP_VALUE_ACCESS(prop_value, |
| 3003 | PERF_AMORTIZABLE_THRESHOLD, 0) : |
| 3004 | DEFAULT_AMORTIZABLE_THRESHOLD; |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 3005 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 3006 | if (prop_exists[PERF_DANGER_LUT] && prop_count[PERF_DANGER_LUT] <= |
| 3007 | SDE_QOS_LUT_USAGE_MAX) { |
| 3008 | for (j = 0; j < prop_count[PERF_DANGER_LUT]; j++) { |
| 3009 | cfg->perf.danger_lut_tbl[j] = |
| 3010 | PROP_VALUE_ACCESS(prop_value, |
| 3011 | PERF_DANGER_LUT, j); |
| 3012 | SDE_DEBUG("danger usage:%d lut:0x%x\n", |
| 3013 | j, cfg->perf.danger_lut_tbl[j]); |
| 3014 | } |
| 3015 | } |
| 3016 | |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 3017 | for (j = 0; j < SDE_QOS_LUT_USAGE_MAX; j++) { |
| 3018 | static const u32 safe_key[SDE_QOS_LUT_USAGE_MAX] = { |
| 3019 | [SDE_QOS_LUT_USAGE_LINEAR] = |
| 3020 | PERF_SAFE_LUT_LINEAR, |
| 3021 | [SDE_QOS_LUT_USAGE_MACROTILE] = |
| 3022 | PERF_SAFE_LUT_MACROTILE, |
| 3023 | [SDE_QOS_LUT_USAGE_NRT] = |
| 3024 | PERF_SAFE_LUT_NRT, |
| 3025 | [SDE_QOS_LUT_USAGE_CWB] = |
| 3026 | PERF_SAFE_LUT_CWB, |
| 3027 | }; |
| 3028 | const u32 entry_size = 2; |
| 3029 | int m, count; |
| 3030 | int key = safe_key[j]; |
| 3031 | |
| 3032 | if (!prop_exists[key]) |
| 3033 | continue; |
| 3034 | |
| 3035 | count = prop_count[key] / entry_size; |
| 3036 | |
| 3037 | cfg->perf.sfe_lut_tbl[j].entries = kcalloc(count, |
| 3038 | sizeof(struct sde_qos_lut_entry), GFP_KERNEL); |
| 3039 | if (!cfg->perf.sfe_lut_tbl[j].entries) { |
| 3040 | rc = -ENOMEM; |
| 3041 | goto freeprop; |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 3042 | } |
Ingrid Gallardo | 3b720fc | 2017-10-06 17:23:55 -0700 | [diff] [blame] | 3043 | |
| 3044 | for (k = 0, m = 0; k < count; k++, m += entry_size) { |
| 3045 | u64 lut_lo; |
| 3046 | |
| 3047 | cfg->perf.sfe_lut_tbl[j].entries[k].fl = |
| 3048 | PROP_VALUE_ACCESS(prop_value, key, m); |
| 3049 | lut_lo = PROP_VALUE_ACCESS(prop_value, key, m + 1); |
| 3050 | cfg->perf.sfe_lut_tbl[j].entries[k].lut = lut_lo; |
| 3051 | SDE_DEBUG("safe usage:%d.%d fl:%d lut:0x%llx\n", |
| 3052 | j, k, |
| 3053 | cfg->perf.sfe_lut_tbl[j].entries[k].fl, |
| 3054 | cfg->perf.sfe_lut_tbl[j].entries[k].lut); |
| 3055 | } |
| 3056 | cfg->perf.sfe_lut_tbl[j].nentry = count; |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 3057 | } |
| 3058 | |
| 3059 | for (j = 0; j < SDE_QOS_LUT_USAGE_MAX; j++) { |
| 3060 | static const u32 prop_key[SDE_QOS_LUT_USAGE_MAX] = { |
| 3061 | [SDE_QOS_LUT_USAGE_LINEAR] = |
| 3062 | PERF_QOS_LUT_LINEAR, |
| 3063 | [SDE_QOS_LUT_USAGE_MACROTILE] = |
| 3064 | PERF_QOS_LUT_MACROTILE, |
| 3065 | [SDE_QOS_LUT_USAGE_NRT] = |
| 3066 | PERF_QOS_LUT_NRT, |
| 3067 | [SDE_QOS_LUT_USAGE_CWB] = |
| 3068 | PERF_QOS_LUT_CWB, |
| 3069 | }; |
| 3070 | const u32 entry_size = 3; |
| 3071 | int m, count; |
| 3072 | int key = prop_key[j]; |
| 3073 | |
| 3074 | if (!prop_exists[key]) |
| 3075 | continue; |
| 3076 | |
| 3077 | count = prop_count[key] / entry_size; |
| 3078 | |
| 3079 | cfg->perf.qos_lut_tbl[j].entries = kcalloc(count, |
| 3080 | sizeof(struct sde_qos_lut_entry), GFP_KERNEL); |
| 3081 | if (!cfg->perf.qos_lut_tbl[j].entries) { |
| 3082 | rc = -ENOMEM; |
Dhaval Patel | e4da9d74 | 2017-06-19 16:51:21 -0700 | [diff] [blame] | 3083 | goto freeprop; |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 3084 | } |
| 3085 | |
| 3086 | for (k = 0, m = 0; k < count; k++, m += entry_size) { |
| 3087 | u64 lut_hi, lut_lo; |
| 3088 | |
| 3089 | cfg->perf.qos_lut_tbl[j].entries[k].fl = |
| 3090 | PROP_VALUE_ACCESS(prop_value, key, m); |
| 3091 | lut_hi = PROP_VALUE_ACCESS(prop_value, key, m + 1); |
| 3092 | lut_lo = PROP_VALUE_ACCESS(prop_value, key, m + 2); |
| 3093 | cfg->perf.qos_lut_tbl[j].entries[k].lut = |
| 3094 | (lut_hi << 32) | lut_lo; |
| 3095 | SDE_DEBUG("usage:%d.%d fl:%d lut:0x%llx\n", |
| 3096 | j, k, |
| 3097 | cfg->perf.qos_lut_tbl[j].entries[k].fl, |
| 3098 | cfg->perf.qos_lut_tbl[j].entries[k].lut); |
| 3099 | } |
| 3100 | cfg->perf.qos_lut_tbl[j].nentry = count; |
| 3101 | } |
| 3102 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 3103 | if (prop_exists[PERF_CDP_SETTING]) { |
| 3104 | const u32 prop_size = 2; |
| 3105 | u32 count = prop_count[PERF_CDP_SETTING] / prop_size; |
| 3106 | |
| 3107 | count = min_t(u32, count, SDE_PERF_CDP_USAGE_MAX); |
| 3108 | |
| 3109 | for (j = 0; j < count; j++) { |
| 3110 | cfg->perf.cdp_cfg[j].rd_enable = |
| 3111 | PROP_VALUE_ACCESS(prop_value, |
| 3112 | PERF_CDP_SETTING, j * prop_size); |
| 3113 | cfg->perf.cdp_cfg[j].wr_enable = |
| 3114 | PROP_VALUE_ACCESS(prop_value, |
| 3115 | PERF_CDP_SETTING, j * prop_size + 1); |
| 3116 | SDE_DEBUG("cdp usage:%d rd:%d wr:%d\n", |
| 3117 | j, cfg->perf.cdp_cfg[j].rd_enable, |
| 3118 | cfg->perf.cdp_cfg[j].wr_enable); |
| 3119 | } |
| 3120 | |
| 3121 | cfg->has_cdp = true; |
| 3122 | } |
| 3123 | |
Lloyd Atkinson | 1fb32ea | 2017-10-10 17:10:28 -0400 | [diff] [blame] | 3124 | cfg->perf.cpu_mask = |
| 3125 | prop_exists[PERF_CPU_MASK] ? |
| 3126 | PROP_VALUE_ACCESS(prop_value, PERF_CPU_MASK, 0) : |
| 3127 | DEFAULT_CPU_MASK; |
| 3128 | cfg->perf.cpu_dma_latency = |
| 3129 | prop_exists[PERF_CPU_DMA_LATENCY] ? |
| 3130 | PROP_VALUE_ACCESS(prop_value, PERF_CPU_DMA_LATENCY, 0) : |
| 3131 | DEFAULT_CPU_DMA_LATENCY; |
| 3132 | |
Alan Kwong | 9aa061c | 2016-11-06 21:17:12 -0500 | [diff] [blame] | 3133 | freeprop: |
| 3134 | kfree(prop_value); |
| 3135 | end: |
| 3136 | return rc; |
| 3137 | } |
| 3138 | |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3139 | static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, |
| 3140 | uint32_t hw_rev) |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 3141 | { |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 3142 | int rc = 0; |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3143 | uint32_t dma_list_size, vig_list_size, wb2_list_size; |
| 3144 | uint32_t cursor_list_size = 0; |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3145 | uint32_t index = 0; |
| 3146 | |
| 3147 | if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_300)) { |
| 3148 | cursor_list_size = ARRAY_SIZE(cursor_formats); |
| 3149 | sde_cfg->cursor_formats = kcalloc(cursor_list_size, |
| 3150 | sizeof(struct sde_format_extended), GFP_KERNEL); |
| 3151 | if (!sde_cfg->cursor_formats) { |
| 3152 | rc = -ENOMEM; |
| 3153 | goto end; |
| 3154 | } |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3155 | index = sde_copy_formats(sde_cfg->cursor_formats, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3156 | cursor_list_size, 0, cursor_formats, |
| 3157 | ARRAY_SIZE(cursor_formats)); |
| 3158 | } |
| 3159 | |
| 3160 | dma_list_size = ARRAY_SIZE(plane_formats); |
| 3161 | vig_list_size = ARRAY_SIZE(plane_formats_yuv); |
| 3162 | wb2_list_size = ARRAY_SIZE(wb2_formats); |
| 3163 | |
| 3164 | dma_list_size += ARRAY_SIZE(rgb_10bit_formats); |
| 3165 | vig_list_size += ARRAY_SIZE(rgb_10bit_formats) |
| 3166 | + ARRAY_SIZE(tp10_ubwc_formats) |
| 3167 | + ARRAY_SIZE(p010_formats); |
Jayant Shekhar | 2b72ce2 | 2017-09-12 11:26:44 +0530 | [diff] [blame] | 3168 | if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) || |
| 3169 | (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410))) |
abeykun | d2debcb | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3170 | vig_list_size += ARRAY_SIZE(p010_ubwc_formats); |
| 3171 | |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3172 | wb2_list_size += ARRAY_SIZE(rgb_10bit_formats) |
| 3173 | + ARRAY_SIZE(tp10_ubwc_formats); |
| 3174 | |
| 3175 | sde_cfg->dma_formats = kcalloc(dma_list_size, |
| 3176 | sizeof(struct sde_format_extended), GFP_KERNEL); |
| 3177 | if (!sde_cfg->dma_formats) { |
| 3178 | rc = -ENOMEM; |
| 3179 | goto end; |
| 3180 | } |
| 3181 | |
| 3182 | sde_cfg->vig_formats = kcalloc(vig_list_size, |
| 3183 | sizeof(struct sde_format_extended), GFP_KERNEL); |
| 3184 | if (!sde_cfg->vig_formats) { |
| 3185 | rc = -ENOMEM; |
| 3186 | goto end; |
| 3187 | } |
| 3188 | |
| 3189 | sde_cfg->wb_formats = kcalloc(wb2_list_size, |
| 3190 | sizeof(struct sde_format_extended), GFP_KERNEL); |
| 3191 | if (!sde_cfg->wb_formats) { |
| 3192 | SDE_ERROR("failed to allocate wb format list\n"); |
| 3193 | rc = -ENOMEM; |
| 3194 | goto end; |
| 3195 | } |
| 3196 | |
Srikanth Rajagopalan | 203b278 | 2017-07-05 22:08:52 -0700 | [diff] [blame] | 3197 | if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_300) || |
| 3198 | IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_301) || |
| 3199 | IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) || |
Ch Ganesh Kumar | 54957b6 | 2017-12-05 15:29:16 +0530 | [diff] [blame] | 3200 | IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_401) || |
| 3201 | IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410)) |
Srikanth Rajagopalan | 203b278 | 2017-07-05 22:08:52 -0700 | [diff] [blame] | 3202 | sde_cfg->has_hdr = true; |
| 3203 | |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3204 | index = sde_copy_formats(sde_cfg->dma_formats, dma_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3205 | 0, plane_formats, ARRAY_SIZE(plane_formats)); |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3206 | index += sde_copy_formats(sde_cfg->dma_formats, dma_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3207 | index, rgb_10bit_formats, |
| 3208 | ARRAY_SIZE(rgb_10bit_formats)); |
| 3209 | |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3210 | index = sde_copy_formats(sde_cfg->vig_formats, vig_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3211 | 0, plane_formats_yuv, ARRAY_SIZE(plane_formats_yuv)); |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3212 | index += sde_copy_formats(sde_cfg->vig_formats, vig_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3213 | index, rgb_10bit_formats, |
| 3214 | ARRAY_SIZE(rgb_10bit_formats)); |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3215 | index += sde_copy_formats(sde_cfg->vig_formats, vig_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3216 | index, p010_formats, ARRAY_SIZE(p010_formats)); |
Jayant Shekhar | 2b72ce2 | 2017-09-12 11:26:44 +0530 | [diff] [blame] | 3217 | if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) || |
| 3218 | (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410))) |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3219 | index += sde_copy_formats(sde_cfg->vig_formats, |
abeykun | d2debcb | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3220 | vig_list_size, index, p010_ubwc_formats, |
| 3221 | ARRAY_SIZE(p010_ubwc_formats)); |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3222 | |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3223 | index += sde_copy_formats(sde_cfg->vig_formats, vig_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3224 | index, tp10_ubwc_formats, |
| 3225 | ARRAY_SIZE(tp10_ubwc_formats)); |
| 3226 | |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3227 | index = sde_copy_formats(sde_cfg->wb_formats, wb2_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3228 | 0, wb2_formats, ARRAY_SIZE(wb2_formats)); |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3229 | index += sde_copy_formats(sde_cfg->wb_formats, wb2_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3230 | index, rgb_10bit_formats, |
| 3231 | ARRAY_SIZE(rgb_10bit_formats)); |
Jeykumar Sankaran | f55e65b | 2017-05-10 21:46:14 -0700 | [diff] [blame] | 3232 | index += sde_copy_formats(sde_cfg->wb_formats, wb2_list_size, |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3233 | index, tp10_ubwc_formats, |
| 3234 | ARRAY_SIZE(tp10_ubwc_formats)); |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3235 | end: |
| 3236 | return rc; |
| 3237 | } |
| 3238 | |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 3239 | static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3240 | { |
| 3241 | int rc = 0; |
| 3242 | |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 3243 | if (!sde_cfg) |
| 3244 | return -EINVAL; |
| 3245 | |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 3246 | rc = sde_hardware_format_caps(sde_cfg, hw_rev); |
| 3247 | |
Benjamin Chan | beaaf6f | 2017-09-08 15:25:50 -0400 | [diff] [blame] | 3248 | if (IS_MSM8996_TARGET(hw_rev)) { |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 3249 | /* update msm8996 target here */ |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 3250 | sde_cfg->perf.min_prefill_lines = 21; |
Benjamin Chan | beaaf6f | 2017-09-08 15:25:50 -0400 | [diff] [blame] | 3251 | } else if (IS_MSM8998_TARGET(hw_rev)) { |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 3252 | /* update msm8998 target here */ |
| 3253 | sde_cfg->has_wb_ubwc = true; |
| 3254 | sde_cfg->perf.min_prefill_lines = 25; |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 3255 | sde_cfg->vbif_qos_nlvl = 4; |
Alan Kwong | 2349d74 | 2017-04-20 08:27:30 -0700 | [diff] [blame] | 3256 | sde_cfg->ts_prefill_rev = 1; |
Veera Sundaram Sankaran | 5ffc26c | 2018-03-07 14:24:52 -0800 | [diff] [blame] | 3257 | } else if (IS_SDM845_TARGET(hw_rev)) { |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 3258 | /* update sdm845 target here */ |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 3259 | sde_cfg->has_wb_ubwc = true; |
Prabhanjan Kandula | 7f9b8d4 | 2018-04-23 19:02:00 -0700 | [diff] [blame] | 3260 | sde_cfg->has_cwb_support = true; |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 3261 | sde_cfg->perf.min_prefill_lines = 24; |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 3262 | sde_cfg->vbif_qos_nlvl = 8; |
Alan Kwong | 2349d74 | 2017-04-20 08:27:30 -0700 | [diff] [blame] | 3263 | sde_cfg->ts_prefill_rev = 2; |
Veera Sundaram Sankaran | 5ffc26c | 2018-03-07 14:24:52 -0800 | [diff] [blame] | 3264 | sde_cfg->sui_misr_supported = true; |
| 3265 | sde_cfg->sui_block_xin_mask = 0x3F71; |
| 3266 | } else if (IS_SDM670_TARGET(hw_rev)) { |
| 3267 | /* update sdm670 target here */ |
| 3268 | sde_cfg->has_wb_ubwc = true; |
| 3269 | sde_cfg->perf.min_prefill_lines = 24; |
| 3270 | sde_cfg->vbif_qos_nlvl = 8; |
| 3271 | sde_cfg->ts_prefill_rev = 2; |
Jayant Shekhar | 888c92c | 2018-08-21 11:08:23 +0530 | [diff] [blame] | 3272 | sde_cfg->sui_misr_supported = true; |
| 3273 | sde_cfg->sui_block_xin_mask = 0x3F71; |
Benjamin Chan | beaaf6f | 2017-09-08 15:25:50 -0400 | [diff] [blame] | 3274 | } else { |
| 3275 | SDE_ERROR("unsupported chipset id:%X\n", hw_rev); |
Alan Kwong | 6259a38 | 2017-04-04 06:18:02 -0700 | [diff] [blame] | 3276 | sde_cfg->perf.min_prefill_lines = 0xffff; |
Benjamin Chan | beaaf6f | 2017-09-08 15:25:50 -0400 | [diff] [blame] | 3277 | rc = -ENODEV; |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 3278 | } |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3279 | |
| 3280 | return rc; |
Dhaval Patel | 1964fb9 | 2016-10-13 19:28:08 -0700 | [diff] [blame] | 3281 | } |
| 3282 | |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 3283 | static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg, |
| 3284 | uint32_t hw_rev) |
| 3285 | { |
| 3286 | int rc = 0, i; |
| 3287 | u32 max_horz_deci = 0, max_vert_deci = 0; |
| 3288 | |
| 3289 | if (!sde_cfg) |
| 3290 | return -EINVAL; |
| 3291 | |
| 3292 | for (i = 0; i < sde_cfg->sspp_count; i++) { |
| 3293 | if (sde_cfg->sspp[i].sblk) { |
| 3294 | max_horz_deci = max(max_horz_deci, |
| 3295 | sde_cfg->sspp[i].sblk->maxhdeciexp); |
| 3296 | max_vert_deci = max(max_vert_deci, |
| 3297 | sde_cfg->sspp[i].sblk->maxvdeciexp); |
| 3298 | } |
Veera Sundaram Sankaran | 7b121cb | 2018-03-02 08:43:04 -0800 | [diff] [blame] | 3299 | |
| 3300 | /* |
Veera Sundaram Sankaran | 5636250 | 2018-03-15 14:41:53 -0700 | [diff] [blame] | 3301 | * set sec-ui blocked SSPP feature flag based on blocked |
Veera Sundaram Sankaran | 7b121cb | 2018-03-02 08:43:04 -0800 | [diff] [blame] | 3302 | * xin-mask if sec-ui-misr feature is enabled; |
Veera Sundaram Sankaran | 7b121cb | 2018-03-02 08:43:04 -0800 | [diff] [blame] | 3303 | */ |
Veera Sundaram Sankaran | 5636250 | 2018-03-15 14:41:53 -0700 | [diff] [blame] | 3304 | if (sde_cfg->sui_misr_supported |
| 3305 | && (sde_cfg->sui_block_xin_mask |
| 3306 | & BIT(sde_cfg->sspp[i].xin_id))) |
| 3307 | set_bit(SDE_SSPP_BLOCK_SEC_UI, |
Veera Sundaram Sankaran | 7b121cb | 2018-03-02 08:43:04 -0800 | [diff] [blame] | 3308 | &sde_cfg->sspp[i].features); |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 3309 | } |
| 3310 | |
| 3311 | /* this should be updated based on HW rev in future */ |
| 3312 | sde_cfg->max_lm_per_display = MAX_LM_PER_DISPLAY; |
| 3313 | |
| 3314 | if (max_horz_deci) |
| 3315 | sde_cfg->max_display_width = sde_cfg->max_sspp_linewidth * |
| 3316 | max_horz_deci; |
| 3317 | else |
| 3318 | sde_cfg->max_display_width = sde_cfg->max_mixer_width * |
| 3319 | sde_cfg->max_lm_per_display; |
| 3320 | |
| 3321 | if (max_vert_deci) |
| 3322 | sde_cfg->max_display_height = |
| 3323 | MAX_DISPLAY_HEIGHT_WITH_DECIMATION * max_vert_deci; |
| 3324 | else |
| 3325 | sde_cfg->max_display_height = MAX_DISPLAY_HEIGHT; |
| 3326 | |
| 3327 | sde_cfg->min_display_height = MIN_DISPLAY_HEIGHT; |
| 3328 | sde_cfg->min_display_width = MIN_DISPLAY_WIDTH; |
| 3329 | |
| 3330 | return rc; |
| 3331 | } |
| 3332 | |
Clarence Ip | 17162b5 | 2016-11-24 17:06:29 -0500 | [diff] [blame] | 3333 | void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 3334 | { |
| 3335 | int i; |
| 3336 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3337 | if (!sde_cfg) |
| 3338 | return; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 3339 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3340 | for (i = 0; i < sde_cfg->sspp_count; i++) |
| 3341 | kfree(sde_cfg->sspp[i].sblk); |
| 3342 | |
| 3343 | for (i = 0; i < sde_cfg->mixer_count; i++) |
| 3344 | kfree(sde_cfg->mixer[i].sblk); |
| 3345 | |
| 3346 | for (i = 0; i < sde_cfg->wb_count; i++) |
| 3347 | kfree(sde_cfg->wb[i].sblk); |
| 3348 | |
| 3349 | for (i = 0; i < sde_cfg->dspp_count; i++) |
| 3350 | kfree(sde_cfg->dspp[i].sblk); |
| 3351 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 3352 | if (sde_cfg->ds_count) |
| 3353 | kfree(sde_cfg->ds[0].top); |
| 3354 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3355 | for (i = 0; i < sde_cfg->pingpong_count; i++) |
| 3356 | kfree(sde_cfg->pingpong[i].sblk); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 3357 | |
| 3358 | for (i = 0; i < sde_cfg->vbif_count; i++) { |
| 3359 | kfree(sde_cfg->vbif[i].dynamic_ot_rd_tbl.cfg); |
| 3360 | kfree(sde_cfg->vbif[i].dynamic_ot_wr_tbl.cfg); |
Alan Kwong | a62eeb8 | 2017-04-19 08:57:55 -0700 | [diff] [blame] | 3361 | kfree(sde_cfg->vbif[i].qos_rt_tbl.priority_lvl); |
| 3362 | kfree(sde_cfg->vbif[i].qos_nrt_tbl.priority_lvl); |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 3363 | } |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3364 | |
Alan Kwong | dce56da | 2017-04-27 15:50:34 -0700 | [diff] [blame] | 3365 | for (i = 0; i < SDE_QOS_LUT_USAGE_MAX; i++) |
| 3366 | kfree(sde_cfg->perf.qos_lut_tbl[i].entries); |
| 3367 | |
abeykun | f35ff33 | 2016-12-20 13:06:09 -0500 | [diff] [blame] | 3368 | kfree(sde_cfg->dma_formats); |
| 3369 | kfree(sde_cfg->cursor_formats); |
| 3370 | kfree(sde_cfg->vig_formats); |
| 3371 | kfree(sde_cfg->wb_formats); |
| 3372 | |
Clarence Ip | 17162b5 | 2016-11-24 17:06:29 -0500 | [diff] [blame] | 3373 | kfree(sde_cfg); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3374 | } |
| 3375 | |
| 3376 | /************************************************************* |
| 3377 | * hardware catalog init |
| 3378 | *************************************************************/ |
| 3379 | struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev) |
| 3380 | { |
| 3381 | int rc; |
| 3382 | struct sde_mdss_cfg *sde_cfg; |
| 3383 | struct device_node *np = dev->dev->of_node; |
| 3384 | |
| 3385 | sde_cfg = kzalloc(sizeof(*sde_cfg), GFP_KERNEL); |
| 3386 | if (!sde_cfg) |
| 3387 | return ERR_PTR(-ENOMEM); |
| 3388 | |
| 3389 | sde_cfg->hwversion = hw_rev; |
| 3390 | |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 3391 | rc = _sde_hardware_pre_caps(sde_cfg, hw_rev); |
Clarence Ip | 32bcb00 | 2017-03-13 12:26:44 -0700 | [diff] [blame] | 3392 | if (rc) |
| 3393 | goto end; |
| 3394 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3395 | rc = sde_parse_dt(np, sde_cfg); |
| 3396 | if (rc) |
| 3397 | goto end; |
| 3398 | |
Alan Kwong | 143f50c | 2017-04-28 07:34:28 -0700 | [diff] [blame] | 3399 | rc = sde_perf_parse_dt(np, sde_cfg); |
| 3400 | if (rc) |
| 3401 | goto end; |
| 3402 | |
Alan Kwong | 4dd64c8 | 2017-02-04 18:41:51 -0800 | [diff] [blame] | 3403 | rc = sde_rot_parse_dt(np, sde_cfg); |
| 3404 | if (rc) |
| 3405 | goto end; |
| 3406 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3407 | rc = sde_ctl_parse_dt(np, sde_cfg); |
| 3408 | if (rc) |
| 3409 | goto end; |
| 3410 | |
| 3411 | rc = sde_sspp_parse_dt(np, sde_cfg); |
| 3412 | if (rc) |
| 3413 | goto end; |
| 3414 | |
Rajesh Yadav | ec93afb | 2017-06-08 19:28:33 +0530 | [diff] [blame] | 3415 | rc = sde_dspp_top_parse_dt(np, sde_cfg); |
| 3416 | if (rc) |
| 3417 | goto end; |
| 3418 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3419 | rc = sde_dspp_parse_dt(np, sde_cfg); |
| 3420 | if (rc) |
| 3421 | goto end; |
| 3422 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 3423 | rc = sde_ds_parse_dt(np, sde_cfg); |
| 3424 | if (rc) |
| 3425 | goto end; |
| 3426 | |
Jeykumar Sankaran | 5c2f070 | 2017-03-09 18:03:15 -0800 | [diff] [blame] | 3427 | rc = sde_dsc_parse_dt(np, sde_cfg); |
| 3428 | if (rc) |
| 3429 | goto end; |
| 3430 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3431 | rc = sde_pp_parse_dt(np, sde_cfg); |
| 3432 | if (rc) |
| 3433 | goto end; |
| 3434 | |
Sravanthi Kollukuduru | acdc591 | 2017-06-22 14:53:00 +0530 | [diff] [blame] | 3435 | /* mixer parsing should be done after dspp, |
| 3436 | * ds and pp for mapping setup |
| 3437 | */ |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3438 | rc = sde_mixer_parse_dt(np, sde_cfg); |
| 3439 | if (rc) |
| 3440 | goto end; |
| 3441 | |
| 3442 | rc = sde_intf_parse_dt(np, sde_cfg); |
| 3443 | if (rc) |
| 3444 | goto end; |
| 3445 | |
| 3446 | rc = sde_wb_parse_dt(np, sde_cfg); |
| 3447 | if (rc) |
| 3448 | goto end; |
| 3449 | |
| 3450 | /* cdm parsing should be done after intf and wb for mapping setup */ |
| 3451 | rc = sde_cdm_parse_dt(np, sde_cfg); |
| 3452 | if (rc) |
| 3453 | goto end; |
| 3454 | |
Alan Kwong | b9d2f6f | 2016-10-12 00:27:07 -0400 | [diff] [blame] | 3455 | rc = sde_vbif_parse_dt(np, sde_cfg); |
| 3456 | if (rc) |
| 3457 | goto end; |
| 3458 | |
Gopikrishnaiah Anandan | 031d8ff | 2016-12-15 16:58:45 -0800 | [diff] [blame] | 3459 | rc = sde_parse_reg_dma_dt(np, sde_cfg); |
| 3460 | if (rc) |
| 3461 | goto end; |
| 3462 | |
Dhaval Patel | 79797b1 | 2018-02-13 19:58:05 -0800 | [diff] [blame] | 3463 | rc = _sde_hardware_post_caps(sde_cfg, hw_rev); |
| 3464 | if (rc) |
| 3465 | goto end; |
| 3466 | |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3467 | return sde_cfg; |
| 3468 | |
| 3469 | end: |
| 3470 | sde_hw_catalog_deinit(sde_cfg); |
Dhaval Patel | 8bf7ff3 | 2016-07-20 18:13:24 -0700 | [diff] [blame] | 3471 | return NULL; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 3472 | } |