Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 1 | * Qualcomm Technologies, Inc. MSM VIDC |
| 2 | |
| 3 | [Root level node] |
| 4 | Venus |
| 5 | ===== |
| 6 | Required properties: |
| 7 | - compatible : one of: |
| 8 | - "qcom,msm-vidc" |
| 9 | - qcom,max-hw-load: The maximum load the hardware can support expressed in units |
| 10 | of macroblocks per second. The load is a reflection of hardware capability |
| 11 | rather than a performance guarantee. Performance is guaranteed only up to |
| 12 | advertised capability of the chipset. |
Praneeth Paladugu | 238977b | 2016-12-06 12:51:26 -0800 | [diff] [blame] | 13 | - qcom,max-hq-mbs-per-frame : Max no of mbs per frame beyond which |
| 14 | "High Quality" encoding is not supported. |
| 15 | - qcom,max-hq-frames-per-sec : Max no of frames per second beyond which |
| 16 | "High Quality" encoding is not supported. |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 17 | |
| 18 | Optional properties: |
| 19 | - reg : offset and length of the register set for the device. |
| 20 | - interrupts : should contain the vidc interrupt. |
| 21 | - qcom,platform-version : mask and shift of the platform version bits |
| 22 | in efuse register. |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 23 | - qcom,reg-presets : list of offset-value pairs for registers to be written. |
| 24 | The offsets are from the base offset specified in 'reg'. This is mainly |
| 25 | used for QoS, VBIF, etc. presets for video. |
| 26 | - qcom,qdss-presets : list of physical address and memory allocation size pairs. |
| 27 | when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be |
| 28 | written to QDSS memory. |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 29 | - *-supply: A phandle pointing to the appropriate regulator. Number of |
| 30 | regulators vary across targets. |
| 31 | - clock-names: an array of clocks that the driver is supposed to be |
| 32 | manipulating. The clocks names here correspond to the clock names used in |
| 33 | clk_get(<name>). |
| 34 | - qcom,clock-configs = an array of bitmaps of clocks' configurations. The index |
| 35 | of the bitmap corresponds to the clock at the same index in qcom,clock-names. |
| 36 | The bitmaps describes the actions that the device needs to take regarding the |
| 37 | clock (i.e. scale it based on load). |
| 38 | |
| 39 | The bitmap is defined as: |
| 40 | scalable = 0x1 (if the driver should vary the clock's frequency based on load) |
| 41 | - qcom,allowed-clock-rates = an array of supported clock rates by the chipset. |
| 42 | - qcom,clock-freq-tbl = node containing individual domain nodes, each with: |
| 43 | - qcom,codec-mask: a bitmap of supported codec types, every two bits |
| 44 | represents a codec type. |
Praneeth Paladugu | b71968b | 2015-08-19 20:47:57 -0700 | [diff] [blame] | 45 | supports mvc encoder = 0x00000001 |
| 46 | supports mvc decoder = 0x00000003 |
| 47 | supports h264 encoder = 0x00000004 |
| 48 | supports h264 decoder = 0x0000000c |
| 49 | supports mpeg1 encoder = 0x00000040 |
| 50 | supports mpeg1 decoder = 0x000000c0 |
| 51 | supports mpeg2 encoder = 0x00000100 |
| 52 | supports mpeg2 decoder = 0x00000300 |
| 53 | supports vp6 encoder = 0x00100000 |
| 54 | supports vp6 decoder = 0x00300000 |
| 55 | supports vp7 encoder = 0x00400000 |
| 56 | supports vp7 decoder = 0x00c00000 |
| 57 | supports vp8 encoder = 0x01000000 |
| 58 | supports vp8 decoder = 0x03000000 |
| 59 | supports hevc encoder = 0x04000000 |
| 60 | supports hevc decoder = 0x0c000000 |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 61 | - qcom,cycles-per-mb: number of cycles required to process each macro |
| 62 | block. |
Praneeth Paladugu | b71968b | 2015-08-19 20:47:57 -0700 | [diff] [blame] | 63 | - qcom,low-power-cycles-per-mb: number of cycles required to process each |
| 64 | macro block in low power mode. |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 65 | the required frequency to get the final frequency, the factor is |
| 66 | represented in Q16 format. |
| 67 | - qcom,sw-power-collapse = A bool indicating if video hardware core can be |
| 68 | power collapsed in idle state. |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 69 | - qcom,never-unload-fw = A bool indicating if video firmware should be not be |
| 70 | unloaded after all active sessions have closed. Once a new session starts up |
| 71 | after this, the firmware will be ready to go. This should be set on platforms |
| 72 | that desire low-latency video startup and don't mind "leakage" of some memory. |
| 73 | - qcom,use-non-secure-pil = A bool indicating which type of pil to use to load |
| 74 | the fw. |
| 75 | - qcom,fw-bias = The address at which venus fw is loaded (manually). |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 76 | - qcom,enable-thermal-mitigation = A bool to enable thermal mitigation when |
| 77 | thermal run away occurs. |
| 78 | - qcom,hfi-version = The hfi packetization version supported by venus firmware. |
| 79 | If hfi version is not specified, then packetization type will default to |
| 80 | legacy. |
| 81 | - qcom,vidc-iommu-domains = node containing individual domain nodes, each with: |
| 82 | - a unique domain name for the domain node (e.g vidc,domain-ns) |
| 83 | - qcom,vidc-domain-phandle: phandle for the domain as defined in |
| 84 | <target>-iommu-domains.dtsi (e.g msm8974-v1-iommu-domains.dtsi) |
| 85 | - qcom,vidc-buffer-types: bitmap of buffer types that can be mapped into each |
| 86 | IOMMU domain. |
| 87 | - Buffer types are defined as the following: |
| 88 | input = 0x1 |
| 89 | output = 0x2 |
| 90 | output2 = 0x4 |
| 91 | extradata input = 0x8 |
| 92 | extradata output = 0x10 |
| 93 | extradata output2 = 0x20 |
| 94 | internal scratch = 0x40 |
| 95 | internal scratch1 = 0x80 |
| 96 | internal scratch2 = 0x100 |
| 97 | internal persist = 0x200 |
| 98 | internal persist1 = 0x400 |
| 99 | internal cmd queue = 0x800 |
| 100 | - qcom,pm-qos-latency-us = The latency used to vote for QOS power manager. This |
| 101 | value is typically max(latencies of every cluster at all power levels) + 1 |
| 102 | - qcom,max-secure-instances = An int containing max number of concurrent secure |
| 103 | instances supported, accounting for venus and system wide limitations like |
| 104 | memory, performance etc. |
| 105 | - qcom,debug-timeout = A bool indicating that FW errors such as SYS_ERROR, |
| 106 | SESSION_ERROR and timeouts will be treated as Fatal. |
| 107 | |
| 108 | [Second level nodes] |
| 109 | Context Banks |
| 110 | ============= |
| 111 | Required properties: |
| 112 | - compatible : one of: |
| 113 | - "qcom,msm-vidc,context-bank" |
| 114 | - iommus : A phandle parsed by smmu driver. Number of entries will vary |
| 115 | across targets. |
| 116 | |
| 117 | Optional properties: |
| 118 | - label - string describing iommu domain usage. |
| 119 | - buffer-types : bitmap of buffer types that can be mapped into the current |
| 120 | IOMMU domain. |
| 121 | - Buffer types are defined as the following: |
| 122 | input = 0x1 |
| 123 | output = 0x2 |
| 124 | output2 = 0x4 |
| 125 | extradata input = 0x8 |
| 126 | extradata output = 0x10 |
| 127 | extradata output2 = 0x20 |
| 128 | internal scratch = 0x40 |
| 129 | internal scratch1 = 0x80 |
| 130 | internal scratch2 = 0x100 |
| 131 | internal persist = 0x200 |
| 132 | internal persist1 = 0x400 |
| 133 | internal cmd queue = 0x800 |
| 134 | - virtual-addr-pool : offset and length of virtual address pool. |
| 135 | - qcom,fw-context-bank : bool indicating firmware context bank. |
| 136 | - qcom,secure-context-bank : bool indicating secure context bank. |
| 137 | |
| 138 | Buses |
| 139 | ===== |
| 140 | Required properties: |
| 141 | - compatible : one of: |
| 142 | - "qcom,msm-vidc,bus" |
| 143 | - label : an arbitrary name |
| 144 | - qcom,bus-master : an integer descriptor of the bus master. Refer to arch/arm/\ |
| 145 | boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable masters |
| 146 | - qcom,bus-slave : an integer descriptor of the bus slave. Refer to arch/arm/\ |
| 147 | boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable slaves |
| 148 | |
| 149 | Optional properties: |
| 150 | - qcom,bus-governor : governor to use when scaling bus, generally any commonly |
| 151 | found devfreq governor might be used. In addition to those governors, the |
| 152 | custom Venus governors, "msm-vidc-ddr" or "msm-vidc-vmem" are also |
| 153 | acceptable values. |
| 154 | In the absence of this property the "performance" governor is used. |
| 155 | - qcom,bus-rage-kbps : an array of two items (<min max>) that indicate the |
| 156 | minimum and maximum acceptable votes for the bus. |
| 157 | In the absence of this property <0 INT_MAX> is used. |
| 158 | - qcom,ubwc-10bit : UBWC 10 bit content has different bus requirements, |
| 159 | this tag will be used to pick the appropriate bus as per the session profile |
| 160 | as shown below in example. |
| 161 | |
| 162 | Example: |
| 163 | |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 164 | qcom,vidc@fdc00000 { |
| 165 | compatible = "qcom,msm-vidc"; |
| 166 | reg = <0xfdc00000 0xff000>; |
| 167 | interrupts = <0 44 0>; |
| 168 | venus-supply = <&gdsc>; |
| 169 | venus-core0-supply = <&gdsc1>; |
| 170 | venus-core1-supply = <&gdsc2>; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 171 | qcom,hfi-version = "3xx"; |
| 172 | qcom,reg-presets = <0x80004 0x1>, |
| 173 | <0x80178 0x00001FFF>; |
| 174 | qcom,qdss-presets = <0xFC307000 0x1000>, |
| 175 | <0xFC322000 0x1000>; |
| 176 | qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/ |
| 177 | qcom,never-unload-fw; |
| 178 | clock-names = "foo_clk", "bar_clk", "baz_clk"; |
| 179 | qcom,clock-configs = <0x3 0x1 0x0>; |
| 180 | qcom,sw-power-collapse; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 181 | qcom,buffer-type-tz-usage-table = <0x1 0x1>, |
| 182 | <0x1fe 0x2>; |
| 183 | qcom,enable-thermal-mitigation; |
| 184 | qcom,use-non-secure-pil; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 185 | qcom,use_dynamic_bw_update; |
| 186 | qcom,fw-bias = <0xe000000>; |
Praneeth Paladugu | b71968b | 2015-08-19 20:47:57 -0700 | [diff] [blame] | 187 | qcom,allowed-clock-rates = <200000000 300000000 400000000>; |
Praneeth Paladugu | 238977b | 2016-12-06 12:51:26 -0800 | [diff] [blame] | 188 | qcom,max-hq-mbs-per-frame = <8160>; |
| 189 | qcom,max-hq-frames-per-sec = <60>; |
Praneeth Paladugu | 6e6fbdb | 2017-01-16 15:43:01 -0800 | [diff] [blame] | 190 | msm_vidc_cb1: msm_vidc_cb1 { |
| 191 | compatible = "qcom,msm-vidc,context-bank"; |
| 192 | label = "venus_ns"; |
| 193 | iommus = <&venus_smmu 0x0a>, |
| 194 | <&venus_smmu 0x0b>, |
| 195 | <&venus_smmu 0x0c>; |
| 196 | buffer-types = <0xfff>; |
| 197 | virtual-addr-pool = <0x5dc00000 0x80000000>; |
| 198 | qcom,secure-context-bank; |
| 199 | }; |
| 200 | |
| 201 | msm_vidc_cb2: msm_vidc_cb2 { |
| 202 | compatible = "qcom,msm-vidc,context-bank"; |
| 203 | qcom,fw-context-bank; |
| 204 | iommus = <&venus_smmu 0x100>, |
| 205 | <&venus_smmu 0x106>; |
| 206 | }; |
| 207 | |
| 208 | bus_cnoc { |
| 209 | compatible = "qcom,msm-vidc,bus"; |
| 210 | label = "venus-cnoc"; |
| 211 | qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>; |
| 212 | qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>; |
| 213 | qcom,bus-governor = "performance"; |
| 214 | qcom,bus-range-kbps = <1 1>; |
| 215 | }; |
| 216 | |
| 217 | venus_bus_ddr { |
| 218 | compatible = "qcom,msm-vidc,bus"; |
| 219 | label = "venus-ddr"; |
| 220 | qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; |
| 221 | qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; |
| 222 | qcom,bus-governor = "msm-vidc-ddr"; |
| 223 | qcom,bus-range-kbps = <1000 3388000>; |
| 224 | }; |
| 225 | qcom,profile-dec-ubwc-10bit { |
| 226 | qcom,codec-mask = <0xffffffff>; |
| 227 | qcom,ubwc-10bit; |
| 228 | qcom,load-busfreq-tbl = |
| 229 | <979200 2446336>, /* UHD30D */ |
| 230 | <864000 2108416>, /* 720p240D */ |
| 231 | <489600 1207296>, /* 1080p60D */ |
| 232 | <432000 1058816>, /* 720p120D */ |
| 233 | <244800 616448>, /* 1080p30D */ |
| 234 | <216000 534528>, /* 720p60D */ |
| 235 | <108000 271360>, /* 720p30D */ |
| 236 | <0 0>; |
| 237 | }; |
| 238 | }; |