blob: 175054abd630d59cbae7e4698adaba474adaf250 [file] [log] [blame]
Saeed Bishara651c74c2008-06-22 22:45:06 +02001/*
2 * arch/arm/mach-kirkwood/rd88f6281-setup.c
3 *
4 * Marvell RD-88F6281 Reference Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand.h>
18#include <linux/timer.h>
19#include <linux/ata_platform.h>
20#include <linux/mv643xx_eth.h>
Lennert Buytenhek81600eea92008-07-14 14:29:40 +020021#include <linux/ethtool.h>
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +020022#include <net/dsa.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020023#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/pci.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/kirkwood.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020027#include <plat/orion_nand.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020028#include "common.h"
29
30static struct mtd_partition rd88f6281_nand_parts[] = {
31 {
32 .name = "u-boot",
33 .offset = 0,
34 .size = SZ_1M
35 }, {
36 .name = "uImage",
37 .offset = MTDPART_OFS_NXTBLK,
38 .size = SZ_2M
39 }, {
40 .name = "root",
41 .offset = MTDPART_OFS_NXTBLK,
42 .size = MTDPART_SIZ_FULL
43 },
44};
45
46static struct resource rd88f6281_nand_resource = {
47 .flags = IORESOURCE_MEM,
48 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
49 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
50 KIRKWOOD_NAND_MEM_SIZE - 1,
51};
52
53static struct orion_nand_data rd88f6281_nand_data = {
54 .parts = rd88f6281_nand_parts,
55 .nr_parts = ARRAY_SIZE(rd88f6281_nand_parts),
56 .cle = 0,
57 .ale = 1,
58 .width = 8,
Saeed Bishara5b235382008-06-05 13:19:30 +020059 .chip_delay = 25,
Saeed Bishara651c74c2008-06-22 22:45:06 +020060};
61
62static struct platform_device rd88f6281_nand_flash = {
63 .name = "orion_nand",
64 .id = -1,
65 .dev = {
66 .platform_data = &rd88f6281_nand_data,
67 },
68 .resource = &rd88f6281_nand_resource,
69 .num_resources = 1,
70};
71
72static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020073 .phy_addr = MV643XX_ETH_PHY_NONE,
Lennert Buytenhek81600eea92008-07-14 14:29:40 +020074 .speed = SPEED_1000,
75 .duplex = DUPLEX_FULL,
Saeed Bishara651c74c2008-06-22 22:45:06 +020076};
77
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +020078static struct dsa_platform_data rd88f6281_switch_data = {
79 .port_names[0] = "lan1",
80 .port_names[1] = "lan2",
81 .port_names[2] = "lan3",
82 .port_names[3] = "lan4",
83 .port_names[4] = "wan",
84 .port_names[5] = "cpu",
85};
86
Saeed Bishara651c74c2008-06-22 22:45:06 +020087static struct mv_sata_platform_data rd88f6281_sata_data = {
88 .n_ports = 2,
89};
90
91static void __init rd88f6281_init(void)
92{
93 /*
94 * Basic setup. Needs to be called early.
95 */
96 kirkwood_init();
97
98 kirkwood_ehci_init();
99 kirkwood_ge00_init(&rd88f6281_ge00_data);
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200100 kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
Saeed Bishara651c74c2008-06-22 22:45:06 +0200101 kirkwood_rtc_init();
102 kirkwood_sata_init(&rd88f6281_sata_data);
103 kirkwood_uart0_init();
Saeed Bishara651c74c2008-06-22 22:45:06 +0200104
105 platform_device_register(&rd88f6281_nand_flash);
106}
107
108static int __init rd88f6281_pci_init(void)
109{
110 if (machine_is_rd88f6281())
111 kirkwood_pcie_init();
112
113 return 0;
114}
115subsys_initcall(rd88f6281_pci_init);
116
117MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
118 /* Maintainer: Saeed Bishara <saeed@marvell.com> */
119 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
120 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
121 .boot_params = 0x00000100,
122 .init_machine = rd88f6281_init,
123 .map_io = kirkwood_map_io,
124 .init_irq = kirkwood_init_irq,
125 .timer = &kirkwood_timer,
126MACHINE_END