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Stanislav Samsonov794d15b2008-06-22 22:45:10 +02001/*
2 * arch/arm/mach-mv78xx0/db78x00-bp-setup.c
3 *
4 * Marvell DB-78x00-BP Development Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/ata_platform.h>
15#include <linux/mv643xx_eth.h>
Lennert Buytenhek04185fc2008-10-08 23:41:19 +020016#include <linux/ethtool.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010017#include <mach/mv78xx0.h>
Stanislav Samsonov794d15b2008-06-22 22:45:10 +020018#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20#include "common.h"
21
22static struct mv643xx_eth_platform_data db78x00_ge00_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020023 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
Stanislav Samsonov794d15b2008-06-22 22:45:10 +020024};
25
26static struct mv643xx_eth_platform_data db78x00_ge01_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020027 .phy_addr = MV643XX_ETH_PHY_ADDR(9),
Stanislav Samsonov794d15b2008-06-22 22:45:10 +020028};
29
30static struct mv643xx_eth_platform_data db78x00_ge10_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020031 .phy_addr = MV643XX_ETH_PHY_NONE,
Lennert Buytenhek04185fc2008-10-08 23:41:19 +020032 .speed = SPEED_1000,
33 .duplex = DUPLEX_FULL,
Stanislav Samsonov794d15b2008-06-22 22:45:10 +020034};
35
36static struct mv643xx_eth_platform_data db78x00_ge11_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020037 .phy_addr = MV643XX_ETH_PHY_NONE,
Lennert Buytenhek04185fc2008-10-08 23:41:19 +020038 .speed = SPEED_1000,
39 .duplex = DUPLEX_FULL,
Stanislav Samsonov794d15b2008-06-22 22:45:10 +020040};
41
42static struct mv_sata_platform_data db78x00_sata_data = {
43 .n_ports = 2,
44};
45
46static void __init db78x00_init(void)
47{
48 /*
49 * Basic MV78xx0 setup. Needs to be called early.
50 */
51 mv78xx0_init();
52
53 /*
54 * Partition on-chip peripherals between the two CPU cores.
55 */
56 if (mv78xx0_core_index() == 0) {
57 mv78xx0_ehci0_init();
58 mv78xx0_ehci1_init();
59 mv78xx0_ehci2_init();
60 mv78xx0_ge00_init(&db78x00_ge00_data);
61 mv78xx0_ge01_init(&db78x00_ge01_data);
62 mv78xx0_ge10_init(&db78x00_ge10_data);
63 mv78xx0_ge11_init(&db78x00_ge11_data);
64 mv78xx0_sata_init(&db78x00_sata_data);
65 mv78xx0_uart0_init();
66 mv78xx0_uart2_init();
67 } else {
68 mv78xx0_uart1_init();
69 mv78xx0_uart3_init();
70 }
71}
72
73static int __init db78x00_pci_init(void)
74{
75 if (machine_is_db78x00_bp()) {
76 /*
77 * Assign the x16 PCIe slot on the board to CPU core
78 * #0, and let CPU core #1 have the four x1 slots.
79 */
80 if (mv78xx0_core_index() == 0)
81 mv78xx0_pcie_init(0, 1);
82 else
83 mv78xx0_pcie_init(1, 0);
84 }
85
86 return 0;
87}
88subsys_initcall(db78x00_pci_init);
89
90MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
91 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
92 .phys_io = MV78XX0_REGS_PHYS_BASE,
93 .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
94 .boot_params = 0x00000100,
95 .init_machine = db78x00_init,
96 .map_io = mv78xx0_map_io,
97 .init_irq = mv78xx0_init_irq,
98 .timer = &mv78xx0_timer,
99MACHINE_END