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Quinn Jensen52c543f2007-07-09 22:06:53 +01001/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/types.h>
22#include <linux/init.h>
23#include <linux/clk.h>
24#include <linux/serial_8250.h>
Gilles Chanteperdrixd7568f72008-09-09 10:19:42 +020025#include <linux/irq.h>
Quinn Jensen52c543f2007-07-09 22:06:53 +010026
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/hardware.h>
Quinn Jensen52c543f2007-07-09 22:06:53 +010028#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
Juergen Beisertd0f349f2008-07-05 10:02:50 +020030#include <asm/mach/time.h>
Quinn Jensen52c543f2007-07-09 22:06:53 +010031#include <asm/memory.h>
32#include <asm/mach/map.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/common.h>
34#include <mach/board-mx31ads.h>
Gilles Chanteperdrix07417942008-09-09 10:19:41 +020035#include <mach/imx-uart.h>
36#include <mach/iomux-mx3.h>
Quinn Jensen52c543f2007-07-09 22:06:53 +010037
Sascha Hauer2eca0472008-10-17 16:10:38 +020038#include "devices.h"
39
Quinn Jensen52c543f2007-07-09 22:06:53 +010040/*!
41 * @file mx31ads.c
42 *
43 * @brief This file contains the board-specific initialization routines.
44 *
45 * @ingroup System
46 */
47
48#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
49/*!
50 * The serial port definition structure.
51 */
52static struct plat_serial8250_port serial_platform_data[] = {
53 {
54 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
55 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
56 .irq = EXPIO_INT_XUART_INTA,
57 .uartclk = 14745600,
58 .regshift = 0,
59 .iotype = UPIO_MEM,
60 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
61 }, {
62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
63 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
64 .irq = EXPIO_INT_XUART_INTB,
65 .uartclk = 14745600,
66 .regshift = 0,
67 .iotype = UPIO_MEM,
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
69 },
70 {},
71};
72
73static struct platform_device serial_device = {
74 .name = "serial8250",
75 .id = 0,
76 .dev = {
77 .platform_data = serial_platform_data,
78 },
79};
80
81static int __init mxc_init_extuart(void)
82{
83 return platform_device_register(&serial_device);
84}
85#else
86static inline int mxc_init_extuart(void)
87{
88 return 0;
89}
90#endif
91
Gilles Chanteperdrix07417942008-09-09 10:19:41 +020092#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
93static struct imxuart_platform_data uart_pdata = {
94 .flags = IMXUART_HAVE_RTSCTS,
95};
96
97static inline void mxc_init_imx_uart(void)
98{
99 mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
100 mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
101 mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
102 mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
103
104 mxc_register_device(&mxc_uart_device0, &uart_pdata);
105}
106#else /* !SERIAL_IMX */
107static inline void mxc_init_imx_uart(void)
108{
109}
110#endif /* !SERIAL_IMX */
111
Gilles Chanteperdrixd7568f72008-09-09 10:19:42 +0200112static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
113{
114 u32 imr_val;
115 u32 int_valid;
116 u32 expio_irq;
117
118 imr_val = __raw_readw(PBC_INTMASK_SET_REG);
119 int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val;
120
121 expio_irq = MXC_EXP_IO_BASE;
122 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
123 if ((int_valid & 1) == 0)
124 continue;
125
126 generic_handle_irq(expio_irq);
127 }
128}
129
130/*
131 * Disable an expio pin's interrupt by setting the bit in the imr.
132 * @param irq an expio virtual irq number
133 */
134static void expio_mask_irq(u32 irq)
135{
136 u32 expio = MXC_IRQ_TO_EXPIO(irq);
137 /* mask the interrupt */
138 __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
139 __raw_readw(PBC_INTMASK_CLEAR_REG);
140}
141
142/*
143 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
144 * @param irq an expanded io virtual irq number
145 */
146static void expio_ack_irq(u32 irq)
147{
148 u32 expio = MXC_IRQ_TO_EXPIO(irq);
149 /* clear the interrupt status */
150 __raw_writew(1 << expio, PBC_INTSTATUS_REG);
151}
152
153/*
154 * Enable a expio pin's interrupt by clearing the bit in the imr.
155 * @param irq a expio virtual irq number
156 */
157static void expio_unmask_irq(u32 irq)
158{
159 u32 expio = MXC_IRQ_TO_EXPIO(irq);
160 /* unmask the interrupt */
161 __raw_writew(1 << expio, PBC_INTMASK_SET_REG);
162}
163
164static struct irq_chip expio_irq_chip = {
165 .ack = expio_ack_irq,
166 .mask = expio_mask_irq,
167 .unmask = expio_unmask_irq,
168};
169
170static void __init mx31ads_init_expio(void)
171{
172 int i;
173
174 printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
175
176 /*
177 * Configure INT line as GPIO input
178 */
179 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO));
180
181 /* disable the interrupt and clear the status */
182 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
183 __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
184 for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
185 i++) {
186 set_irq_chip(i, &expio_irq_chip);
187 set_irq_handler(i, handle_level_irq);
188 set_irq_flags(i, IRQF_VALID);
189 }
190 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
191 set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
192}
193
Quinn Jensen52c543f2007-07-09 22:06:53 +0100194/*!
195 * This structure defines static mappings for the i.MX31ADS board.
196 */
197static struct map_desc mx31ads_io_desc[] __initdata = {
198 {
199 .virtual = AIPS1_BASE_ADDR_VIRT,
200 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
201 .length = AIPS1_SIZE,
Russell King9b727ab2008-09-07 12:45:01 +0100202 .type = MT_DEVICE_NONSHARED
Quinn Jensen52c543f2007-07-09 22:06:53 +0100203 }, {
204 .virtual = SPBA0_BASE_ADDR_VIRT,
205 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
206 .length = SPBA0_SIZE,
Russell King9b727ab2008-09-07 12:45:01 +0100207 .type = MT_DEVICE_NONSHARED
Quinn Jensen52c543f2007-07-09 22:06:53 +0100208 }, {
209 .virtual = AIPS2_BASE_ADDR_VIRT,
210 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
211 .length = AIPS2_SIZE,
Russell King9b727ab2008-09-07 12:45:01 +0100212 .type = MT_DEVICE_NONSHARED
Quinn Jensen52c543f2007-07-09 22:06:53 +0100213 }, {
214 .virtual = CS4_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
216 .length = CS4_SIZE / 2,
217 .type = MT_DEVICE
218 },
219};
220
221/*!
222 * Set up static virtual mappings.
223 */
224void __init mx31ads_map_io(void)
225{
226 mxc_map_io();
227 iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
228}
229
Gilles Chanteperdrixd7568f72008-09-09 10:19:42 +0200230void __init mx31ads_init_irq(void)
231{
232 mxc_init_irq();
233 mx31ads_init_expio();
234}
235
Quinn Jensen52c543f2007-07-09 22:06:53 +0100236/*!
237 * Board specific initialization.
238 */
239static void __init mxc_board_init(void)
240{
241 mxc_init_extuart();
Gilles Chanteperdrix07417942008-09-09 10:19:41 +0200242 mxc_init_imx_uart();
Quinn Jensen52c543f2007-07-09 22:06:53 +0100243}
244
Juergen Beisertd0f349f2008-07-05 10:02:50 +0200245static void __init mx31ads_timer_init(void)
246{
247 mxc_clocks_init(26000000);
248 mxc_timer_init("ipg_clk.0");
249}
250
251struct sys_timer mx31ads_timer = {
252 .init = mx31ads_timer_init,
253};
254
Quinn Jensen52c543f2007-07-09 22:06:53 +0100255/*
256 * The following uses standard kernel macros defined in arch.h in order to
257 * initialize __mach_desc_MX31ADS data structure.
258 */
259MACHINE_START(MX31ADS, "Freescale MX31ADS")
260 /* Maintainer: Freescale Semiconductor, Inc. */
261 .phys_io = AIPS1_BASE_ADDR,
262 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
263 .boot_params = PHYS_OFFSET + 0x100,
264 .map_io = mx31ads_map_io,
Gilles Chanteperdrixd7568f72008-09-09 10:19:42 +0200265 .init_irq = mx31ads_init_irq,
Quinn Jensen52c543f2007-07-09 22:06:53 +0100266 .init_machine = mxc_board_init,
Juergen Beisertd0f349f2008-07-05 10:02:50 +0200267 .timer = &mx31ads_timer,
Quinn Jensen52c543f2007-07-09 22:06:53 +0100268MACHINE_END