Chetan C R | 95b6ac4 | 2018-09-05 13:51:00 +0530 | [diff] [blame] | 1 | /* |
Tengfei Fan | 715a415 | 2019-04-12 11:41:47 +0800 | [diff] [blame] | 2 | * Copyright (c) 2016, 2018-2019, The Linux Foundation. All rights reserved. |
Chetan C R | 95b6ac4 | 2018-09-05 13:51:00 +0530 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
Chetan C R | 8d3d047 | 2018-10-15 18:42:08 +0530 | [diff] [blame] | 14 | #include <dt-bindings/clock/msm-clocks-8952.h> |
| 15 | #include "msm8937-camera-sensor-mtp.dtsi" |
| 16 | |
| 17 | &blsp1_uart2 { |
| 18 | status = "ok"; |
| 19 | pinctrl-names = "default"; |
| 20 | pinctrl-0 = <&uart_console_active>; |
| 21 | }; |
| 22 | |
| 23 | &sdhc_1 { |
| 24 | /* device core power supply */ |
| 25 | vdd-supply = <&pm8937_l8>; |
| 26 | qcom,vdd-voltage-level = <2900000 2900000>; |
| 27 | qcom,vdd-current-level = <200 570000>; |
| 28 | |
| 29 | /* device communication power supply */ |
| 30 | vdd-io-supply = <&pm8937_l5>; |
| 31 | qcom,vdd-io-always-on; |
| 32 | qcom,vdd-io-lpm-sup; |
| 33 | qcom,vdd-io-voltage-level = <1800000 1800000>; |
| 34 | qcom,vdd-io-current-level = <200 325000>; |
| 35 | |
| 36 | pinctrl-names = "active", "sleep"; |
| 37 | pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; |
| 38 | pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; |
| 39 | |
| 40 | qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 |
| 41 | 384000000>; |
| 42 | qcom,nonremovable; |
| 43 | qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; |
| 44 | |
| 45 | status = "ok"; |
| 46 | }; |
| 47 | |
| 48 | &sdhc_2 { |
| 49 | /* device core power supply */ |
| 50 | vdd-supply = <&pm8937_l11>; |
| 51 | qcom,vdd-voltage-level = <2950000 2950000>; |
| 52 | qcom,vdd-current-level = <15000 800000>; |
| 53 | |
| 54 | /* device communication power supply */ |
| 55 | vdd-io-supply = <&pm8937_l12>; |
| 56 | qcom,vdd-io-voltage-level = <1800000 2950000>; |
| 57 | qcom,vdd-io-current-level = <200 22000>; |
| 58 | |
| 59 | pinctrl-names = "active", "sleep"; |
| 60 | pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; |
| 61 | pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; |
| 62 | |
| 63 | cd-gpios = <&tlmm 67 0x1>; |
| 64 | |
| 65 | qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 |
| 66 | 200000000>; |
| 67 | qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; |
| 68 | |
| 69 | status = "ok"; |
| 70 | }; |
| 71 | |
| 72 | #include "msm8937-mdss-panels.dtsi" |
| 73 | |
| 74 | &mdss_mdp { |
| 75 | qcom,mdss-pref-prim-intf = "dsi"; |
| 76 | }; |
| 77 | |
| 78 | &mdss_dsi { |
| 79 | hw-config = "single_dsi"; |
| 80 | }; |
| 81 | |
| 82 | &mdss_dsi0 { |
| 83 | qcom,dsi-pref-prim-pan = <&dsi_truly_1080_vid>; |
| 84 | pinctrl-names = "mdss_default", "mdss_sleep"; |
| 85 | pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; |
| 86 | pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>; |
| 87 | |
| 88 | qcom,platform-te-gpio = <&tlmm 24 0>; |
| 89 | qcom,platform-reset-gpio = <&tlmm 61 0>; |
| 90 | qcom,platform-bklight-en-gpio = <&tlmm 59 0>; |
| 91 | }; |
| 92 | |
| 93 | &mdss_dsi1 { |
| 94 | status = "disabled"; |
| 95 | qcom,dsi-pref-prim-pan = <&dsi_adv7533_1080p>; |
| 96 | pinctrl-names = "mdss_default", "mdss_sleep"; |
| 97 | pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; |
| 98 | pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>; |
| 99 | |
| 100 | qcom,pluggable; |
| 101 | qcom,platform-te-gpio = <&tlmm 24 0>; |
| 102 | qcom,platform-reset-gpio = <&tlmm 61 0>; |
| 103 | qcom,platform-bklight-en-gpio = <&tlmm 59 0>; |
| 104 | }; |
| 105 | |
| 106 | &dsi_truly_1080_vid { |
| 107 | qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| 108 | qcom,mdss-dsi-pan-enable-dynamic-fps; |
| 109 | qcom,mdss-dsi-min-refresh-rate = <48>; |
| 110 | qcom,mdss-dsi-max-refresh-rate = <60>; |
| 111 | qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; |
| 112 | }; |
| 113 | |
| 114 | &dsi_truly_1080_cmd { |
| 115 | qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| 116 | qcom,ulps-enabled; |
| 117 | qcom,partial-update-enabled; |
| 118 | qcom,panel-roi-alignment = <2 2 4 2 1080 2>; |
| 119 | }; |
Chetan C R | 95b6ac4 | 2018-09-05 13:51:00 +0530 | [diff] [blame] | 120 | |
| 121 | &soc { |
Chetan C R | 8d3d047 | 2018-10-15 18:42:08 +0530 | [diff] [blame] | 122 | gpio_keys { |
| 123 | compatible = "gpio-keys"; |
| 124 | input-name = "gpio-keys"; |
| 125 | pinctrl-names = "default"; |
| 126 | pinctrl-0 = <&gpio_key_active>; |
| 127 | |
| 128 | camera_focus { |
| 129 | label = "camera_focus"; |
| 130 | gpios = <&tlmm 128 0x1>; |
| 131 | linux,input-type = <1>; |
| 132 | linux,code = <0x210>; |
| 133 | debounce-interval = <15>; |
| 134 | linux,can-disable; |
| 135 | gpio-key,wakeup; |
| 136 | }; |
| 137 | |
| 138 | camera_snapshot { |
| 139 | label = "camera_snapshot"; |
| 140 | gpios = <&tlmm 127 0x1>; |
| 141 | linux,input-type = <1>; |
| 142 | linux,code = <0x2fe>; |
| 143 | debounce-interval = <15>; |
| 144 | linux,can-disable; |
| 145 | gpio-key,wakeup; |
| 146 | }; |
| 147 | |
| 148 | vol_up { |
| 149 | label = "volume_up"; |
| 150 | gpios = <&tlmm 91 0x1>; |
| 151 | linux,input-type = <1>; |
| 152 | linux,code = <115>; |
| 153 | debounce-interval = <15>; |
| 154 | linux,can-disable; |
| 155 | gpio-key,wakeup; |
| 156 | }; |
| 157 | |
| 158 | }; |
| 159 | }; |
| 160 | |
| 161 | &pm8937_gpios { |
| 162 | nfc_clk { |
| 163 | nfc_clk_default: nfc_clk_default { |
| 164 | pins = "gpio5"; |
| 165 | function = "normal"; |
| 166 | input-enable; |
| 167 | power-source = <1>; |
| 168 | }; |
| 169 | }; |
| 170 | }; |
| 171 | |
| 172 | &i2c_5 { /* BLSP2 QUP1 (NFC) */ |
Tengfei Fan | 715a415 | 2019-04-12 11:41:47 +0800 | [diff] [blame] | 173 | #address-cells = <1>; |
| 174 | #size-cells = <0>; |
| 175 | |
Chetan C R | 8d3d047 | 2018-10-15 18:42:08 +0530 | [diff] [blame] | 176 | status = "ok"; |
| 177 | nq@28 { |
| 178 | compatible = "qcom,nq-nci"; |
| 179 | reg = <0x28>; |
| 180 | qcom,nq-irq = <&tlmm 17 0x00>; |
| 181 | qcom,nq-ven = <&tlmm 16 0x00>; |
| 182 | qcom,nq-firm = <&tlmm 130 0x00>; |
| 183 | qcom,nq-clkreq = <&pm8937_gpios 5 0x00>; |
| 184 | interrupt-parent = <&tlmm>; |
| 185 | qcom,clk-src = "BBCLK2"; |
| 186 | interrupts = <17 0>; |
| 187 | interrupt-names = "nfc_irq"; |
| 188 | pinctrl-names = "nfc_active", "nfc_suspend"; |
| 189 | pinctrl-0 = <&nfc_int_active &nfc_disable_active |
| 190 | &nfc_clk_default>; |
| 191 | pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>; |
| 192 | clocks = <&clock_gcc clk_bb_clk2_pin>; |
| 193 | clock-names = "ref_clk"; |
| 194 | }; |
| 195 | }; |
| 196 | |
| 197 | &thermal_zones { |
| 198 | quiet-therm-step { |
| 199 | status = "disabled"; |
| 200 | }; |
Chetan C R | 95b6ac4 | 2018-09-05 13:51:00 +0530 | [diff] [blame] | 201 | }; |