Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 1 | /* |
| 2 | * FB driver for the ST7735R LCD Controller |
| 3 | * |
| 4 | * Copyright (C) 2013 Noralf Tronnes |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | |
| 21 | #include "fbtft.h" |
| 22 | |
| 23 | #define DRVNAME "fb_st7735r" |
Charlie Wong Super | afe11f1 | 2015-04-04 19:30:28 +0800 | [diff] [blame] | 24 | #define DEFAULT_GAMMA "0F 1A 0F 18 2F 28 20 22 1F 1B 23 37 00 07 02 10\n" \ |
| 25 | "0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10" |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 26 | |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 27 | static int default_init_sequence[] = { |
| 28 | /* SWRESET - Software reset */ |
Helen Fornazier | c7d8532 | 2015-03-21 13:50:05 -0300 | [diff] [blame] | 29 | -1, 0x01, |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 30 | -2, 150, /* delay */ |
| 31 | |
| 32 | /* SLPOUT - Sleep out & booster on */ |
Helen Fornazier | c7d8532 | 2015-03-21 13:50:05 -0300 | [diff] [blame] | 33 | -1, 0x11, |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 34 | -2, 500, /* delay */ |
| 35 | |
| 36 | /* FRMCTR1 - frame rate control: normal mode |
| 37 | frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */ |
Helen Fornazier | c7d8532 | 2015-03-21 13:50:05 -0300 | [diff] [blame] | 38 | -1, 0xB1, 0x01, 0x2C, 0x2D, |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 39 | |
| 40 | /* FRMCTR2 - frame rate control: idle mode |
| 41 | frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */ |
Helen Fornazier | c7d8532 | 2015-03-21 13:50:05 -0300 | [diff] [blame] | 42 | -1, 0xB2, 0x01, 0x2C, 0x2D, |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 43 | |
| 44 | /* FRMCTR3 - frame rate control - partial mode |
| 45 | dot inversion mode, line inversion mode */ |
| 46 | -1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, |
| 47 | |
| 48 | /* INVCTR - display inversion control |
| 49 | no inversion */ |
| 50 | -1, 0xB4, 0x07, |
| 51 | |
| 52 | /* PWCTR1 - Power Control |
| 53 | -4.6V, AUTO mode */ |
| 54 | -1, 0xC0, 0xA2, 0x02, 0x84, |
| 55 | |
| 56 | /* PWCTR2 - Power Control |
| 57 | VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD */ |
| 58 | -1, 0xC1, 0xC5, |
| 59 | |
| 60 | /* PWCTR3 - Power Control |
| 61 | Opamp current small, Boost frequency */ |
| 62 | -1, 0xC2, 0x0A, 0x00, |
| 63 | |
| 64 | /* PWCTR4 - Power Control |
| 65 | BCLK/2, Opamp current small & Medium low */ |
Aya Mahfouz | 9f8a89e | 2015-02-19 04:55:45 +0200 | [diff] [blame] | 66 | -1, 0xC3, 0x8A, 0x2A, |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 67 | |
| 68 | /* PWCTR5 - Power Control */ |
| 69 | -1, 0xC4, 0x8A, 0xEE, |
| 70 | |
| 71 | /* VMCTR1 - Power Control */ |
| 72 | -1, 0xC5, 0x0E, |
| 73 | |
| 74 | /* INVOFF - Display inversion off */ |
| 75 | -1, 0x20, |
| 76 | |
| 77 | /* COLMOD - Interface pixel format */ |
| 78 | -1, 0x3A, 0x05, |
| 79 | |
| 80 | /* DISPON - Display On */ |
| 81 | -1, 0x29, |
| 82 | -2, 100, /* delay */ |
| 83 | |
| 84 | /* NORON - Partial off (Normal) */ |
| 85 | -1, 0x13, |
| 86 | -2, 10, /* delay */ |
| 87 | |
| 88 | /* end marker */ |
Helen Fornazier | c7d8532 | 2015-03-21 13:50:05 -0300 | [diff] [blame] | 89 | -3 |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) |
| 93 | { |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 94 | /* Column address */ |
| 95 | write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); |
| 96 | |
Masanari Iida | 92def78 | 2015-03-21 11:48:37 +0900 | [diff] [blame] | 97 | /* Row address */ |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 98 | write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); |
| 99 | |
| 100 | /* Memory write */ |
| 101 | write_reg(par, 0x2C); |
| 102 | } |
| 103 | |
Anish Bhatt | e6ea202 | 2015-09-03 00:53:33 -0700 | [diff] [blame] | 104 | #define MY BIT(7) |
| 105 | #define MX BIT(6) |
| 106 | #define MV BIT(5) |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 107 | static int set_var(struct fbtft_par *par) |
| 108 | { |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 109 | /* MADCTL - Memory data access control |
| 110 | RGB/BGR: |
| 111 | 1. Mode selection pin SRGB |
Charlie Wong Super | afe11f1 | 2015-04-04 19:30:28 +0800 | [diff] [blame] | 112 | RGB H/W pin for color filter setting: 0=RGB, 1=BGR |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 113 | 2. MADCTL RGB bit |
Charlie Wong Super | afe11f1 | 2015-04-04 19:30:28 +0800 | [diff] [blame] | 114 | RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR */ |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 115 | switch (par->info->var.rotate) { |
| 116 | case 0: |
| 117 | write_reg(par, 0x36, MX | MY | (par->bgr << 3)); |
| 118 | break; |
| 119 | case 270: |
| 120 | write_reg(par, 0x36, MY | MV | (par->bgr << 3)); |
| 121 | break; |
| 122 | case 180: |
Aya Mahfouz | 0401b42 | 2015-03-10 19:07:01 +0200 | [diff] [blame] | 123 | write_reg(par, 0x36, par->bgr << 3); |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 124 | break; |
| 125 | case 90: |
| 126 | write_reg(par, 0x36, MX | MV | (par->bgr << 3)); |
| 127 | break; |
| 128 | } |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | |
| 133 | /* |
| 134 | Gamma string format: |
| 135 | VRF0P VOS0P PK0P PK1P PK2P PK3P PK4P PK5P PK6P PK7P PK8P PK9P SELV0P SELV1P SELV62P SELV63P |
| 136 | VRF0N VOS0N PK0N PK1N PK2N PK3N PK4N PK5N PK6N PK7N PK8N PK9N SELV0N SELV1N SELV62N SELV63N |
| 137 | */ |
Anish Bhatt | 94c0a54 | 2015-09-03 00:53:37 -0700 | [diff] [blame] | 138 | #define CURVE(num, idx) curves[num * par->gamma.num_values + idx] |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 139 | static int set_gamma(struct fbtft_par *par, unsigned long *curves) |
| 140 | { |
Aya Mahfouz | 9f8a89e | 2015-02-19 04:55:45 +0200 | [diff] [blame] | 141 | int i, j; |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 142 | |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 143 | /* apply mask */ |
| 144 | for (i = 0; i < par->gamma.num_curves; i++) |
| 145 | for (j = 0; j < par->gamma.num_values; j++) |
Geert Uytterhoeven | 153fe94 | 2015-03-20 16:21:58 +0100 | [diff] [blame] | 146 | CURVE(i, j) &= 0x3f; |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 147 | |
| 148 | for (i = 0; i < par->gamma.num_curves; i++) |
| 149 | write_reg(par, 0xE0 + i, |
| 150 | CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3), |
| 151 | CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7), |
| 152 | CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11), |
Aya Mahfouz | 9f8a89e | 2015-02-19 04:55:45 +0200 | [diff] [blame] | 153 | CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15)); |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | #undef CURVE |
| 158 | |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 159 | static struct fbtft_display display = { |
| 160 | .regwidth = 8, |
| 161 | .width = 128, |
| 162 | .height = 160, |
| 163 | .init_sequence = default_init_sequence, |
| 164 | .gamma_num = 2, |
| 165 | .gamma_len = 16, |
| 166 | .gamma = DEFAULT_GAMMA, |
| 167 | .fbtftops = { |
| 168 | .set_addr_win = set_addr_win, |
| 169 | .set_var = set_var, |
| 170 | .set_gamma = set_gamma, |
| 171 | }, |
| 172 | }; |
Anish Bhatt | 1014c2c | 2015-09-03 00:53:36 -0700 | [diff] [blame] | 173 | |
Thomas Petazzoni | 735d98c | 2014-12-31 10:11:29 +0100 | [diff] [blame] | 174 | FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7735r", &display); |
| 175 | |
| 176 | MODULE_ALIAS("spi:" DRVNAME); |
| 177 | MODULE_ALIAS("platform:" DRVNAME); |
| 178 | MODULE_ALIAS("spi:st7735r"); |
| 179 | MODULE_ALIAS("platform:st7735r"); |
| 180 | |
| 181 | MODULE_DESCRIPTION("FB driver for the ST7735R LCD Controller"); |
| 182 | MODULE_AUTHOR("Noralf Tronnes"); |
| 183 | MODULE_LICENSE("GPL"); |