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Antonino A. Daplas74f6ae82005-09-09 13:10:04 -07001 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
3 *
4 * Copyright (C) 2004 Antonino Daplas<adaplas@pol.net>
5 * All Rights Reserved
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 */
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070011#include <linux/module.h>
12#include <linux/kernel.h>
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070013#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090014#include <linux/gfp.h>
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070015#include <linux/pci.h>
16#include <linux/fb.h>
17#include "i810.h"
18#include "i810_regs.h"
Adrian Bunka0aa7d02006-01-09 20:54:04 -080019#include "i810_main.h"
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070020#include "../edid.h"
21
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070022/* bit locations in the registers */
23#define SCL_DIR_MASK 0x0001
24#define SCL_DIR 0x0002
25#define SCL_VAL_MASK 0x0004
26#define SCL_VAL_OUT 0x0008
27#define SCL_VAL_IN 0x0010
28#define SDA_DIR_MASK 0x0100
29#define SDA_DIR 0x0200
30#define SDA_VAL_MASK 0x0400
31#define SDA_VAL_OUT 0x0800
32#define SDA_VAL_IN 0x1000
33
34#define DEBUG /* define this for verbose EDID parsing output */
35
36#ifdef DEBUG
37#define DPRINTK(fmt, args...) printk(fmt,## args)
38#else
39#define DPRINTK(fmt, args...)
40#endif
41
42static void i810i2c_setscl(void *data, int state)
43{
Antonino A. Daplasc019c0e2006-01-09 20:53:03 -080044 struct i810fb_i2c_chan *chan = data;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070045 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010046 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070047
Stefani Seibold748103e2011-01-03 09:28:59 +000048 if (state)
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK);
50 else
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080052 i810_readl(mmio, chan->ddc_base); /* flush posted write */
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070053}
54
55static void i810i2c_setsda(void *data, int state)
56{
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080057 struct i810fb_i2c_chan *chan = data;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070058 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010059 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070060
Stefani Seibold748103e2011-01-03 09:28:59 +000061 if (state)
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK);
63 else
64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080065 i810_readl(mmio, chan->ddc_base); /* flush posted write */
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070066}
67
68static int i810i2c_getscl(void *data)
69{
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080070 struct i810fb_i2c_chan *chan = data;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070071 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010072 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070073
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080074 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK);
75 i810_writel(mmio, chan->ddc_base, 0);
76 return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0);
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070077}
78
79static int i810i2c_getsda(void *data)
80{
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080081 struct i810fb_i2c_chan *chan = data;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070082 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010083 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070084
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080085 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK);
86 i810_writel(mmio, chan->ddc_base, 0);
87 return ((i810_readl(mmio, chan->ddc_base) & SDA_VAL_IN) != 0);
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070088}
89
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080090static int i810_setup_i2c_bus(struct i810fb_i2c_chan *chan, const char *name)
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070091{
92 int rc;
93
94 strcpy(chan->adapter.name, name);
95 chan->adapter.owner = THIS_MODULE;
96 chan->adapter.algo_data = &chan->algo;
97 chan->adapter.dev.parent = &chan->par->dev->dev;
Antonino A. Daplas5fab8512005-11-07 01:00:50 -080098 chan->algo.setsda = i810i2c_setsda;
99 chan->algo.setscl = i810i2c_setscl;
100 chan->algo.getsda = i810i2c_getsda;
101 chan->algo.getscl = i810i2c_getscl;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700102 chan->algo.udelay = 10;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700103 chan->algo.timeout = (HZ/2);
104 chan->algo.data = chan;
105
106 i2c_set_adapdata(&chan->adapter, chan);
107
108 /* Raise SCL and SDA */
109 chan->algo.setsda(chan, 1);
110 chan->algo.setscl(chan, 1);
111 udelay(20);
112
113 rc = i2c_bit_add_bus(&chan->adapter);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800114
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700115 if (rc == 0)
116 dev_dbg(&chan->par->dev->dev, "I2C bus %s registered.\n",name);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800117 else {
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700118 dev_warn(&chan->par->dev->dev, "Failed to register I2C bus "
119 "%s.\n", name);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800120 chan->par = NULL;
121 }
122
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700123 return rc;
124}
125
126void i810_create_i2c_busses(struct i810fb_par *par)
127{
128 par->chan[0].par = par;
129 par->chan[1].par = par;
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800130 par->chan[2].par = par;
131
132 par->chan[0].ddc_base = GPIOA;
133 i810_setup_i2c_bus(&par->chan[0], "I810-DDC");
134 par->chan[1].ddc_base = GPIOB;
135 i810_setup_i2c_bus(&par->chan[1], "I810-I2C");
136 par->chan[2].ddc_base = GPIOC;
137 i810_setup_i2c_bus(&par->chan[2], "I810-GPIOC");
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700138}
139
140void i810_delete_i2c_busses(struct i810fb_par *par)
141{
142 if (par->chan[0].par)
Jean Delvare32697112006-12-10 21:21:33 +0100143 i2c_del_adapter(&par->chan[0].adapter);
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700144 par->chan[0].par = NULL;
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800145
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700146 if (par->chan[1].par)
Jean Delvare32697112006-12-10 21:21:33 +0100147 i2c_del_adapter(&par->chan[1].adapter);
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700148 par->chan[1].par = NULL;
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800149
150 if (par->chan[2].par)
Jean Delvare32697112006-12-10 21:21:33 +0100151 i2c_del_adapter(&par->chan[2].adapter);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800152 par->chan[2].par = NULL;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700153}
154
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700155int i810_probe_i2c_connector(struct fb_info *info, u8 **out_edid, int conn)
156{
157 struct i810fb_par *par = info->par;
158 u8 *edid = NULL;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700159
Manuel Lauss00d340b92006-02-01 03:06:54 -0800160 DPRINTK("i810-i2c: Probe DDC%i Bus\n", conn+1);
161 if (conn < par->ddc_num) {
Antonino A. Daplase80987f2006-10-03 01:14:44 -0700162 edid = fb_ddc_read(&par->chan[conn].adapter);
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700163 } else {
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800164 const u8 *e = fb_firmware_edid(info->device);
165
166 if (e != NULL) {
167 DPRINTK("i810-i2c: Getting EDID from BIOS\n");
Alexey Dobriyanbfba7b32006-12-08 02:40:46 -0800168 edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
Antonino A. Daplas5fab8512005-11-07 01:00:50 -0800169 }
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700170 }
171
Antonino A. Daplas7c518eb2006-03-27 01:17:33 -0800172 *out_edid = edid;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700173
174 return (edid) ? 0 : 1;
175}