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gerrit-public.fairphone.software / kernel / msm-4.9 / c8f71b01a50597e298dc3214a2f2be7b8d31170c / . / include / asm-sparc64 / ttable.h
blob: c2a16e1884992a0c9bd13dbbf774731eb1fe2ecf [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]5#include <asm/utrap.h>
6
7#ifdef __ASSEMBLY__
8#include <asm/thread_info.h>
9#endif
10
11#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
12
13/* We need a "cleaned" instruction... */
14#define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
23
24#define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 clr %l6; \
32 nop;
33
34#define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 clr %l6;
42
43#define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 clr %l6; \
51 nop;
52
53#define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
57
58#define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
62
63#define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 clr %l6; \
71 nop;
72
73#define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 clr %l6;
82
83#define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 clr %l6;
92
93#define SYSCALL_TRAP(routine, systbl) \
94 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]95 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]96109: or %g7, %lo(109b), %g7; \
97 sethi %hi(systbl), %l7; \
98 ba,pt %xcc, routine; \
99 or %l7, %lo(systbl), %l7; \
100 nop; nop;
101
102#define INDIRECT_SOLARIS_SYSCALL(num) \
103 sethi %hi(109f), %g7; \
104 ba,pt %xcc, etrap; \
105109: or %g7, %lo(109b), %g7; \
106 ba,pt %xcc, tl0_solaris + 0xc; \
107 mov num, %g1; \
108 nop;nop;nop;
109
110#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]111 mov handler, %g3; \
112 ba,pt %xcc, utrap_trap; \
113 mov lvl, %g4; \
114 nop; \
115 nop; \
116 nop; \
117 nop; \
118 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]119
120#ifdef CONFIG_SUNOS_EMUL
121#define SUNOS_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sunos_sys_table)
122#else
123#define SUNOS_SYSCALL_TRAP TRAP(sunos_syscall)
124#endif
125#ifdef CONFIG_COMPAT
126#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
127#else
128#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
129#endif
130#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
131#define GETCC_TRAP TRAP(getcc)
132#define SETCC_TRAP TRAP(setcc)
133#ifdef CONFIG_SOLARIS_EMUL
134#define SOLARIS_SYSCALL_TRAP TRAP(solaris_sparc_syscall)
135#else
136#define SOLARIS_SYSCALL_TRAP TRAP(solaris_syscall)
137#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]138#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
139
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]140#ifdef CONFIG_TRACE_IRQFLAGS
141
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]142#define TRAP_IRQ(routine, level) \
143 rdpr %pil, %g2; \
144 wrpr %g0, 15, %pil; \
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]145 sethi %hi(1f-4), %g7; \
146 ba,pt %xcc, etrap_irq; \
147 or %g7, %lo(1f-4), %g7; \
148 nop; \
149 nop; \
150 nop; \
151 .subsection 2; \
1521: call trace_hardirqs_off; \
153 nop; \
154 mov level, %o0; \
155 call routine; \
156 add %sp, PTREGS_OFF, %o1; \
157 ba,a,pt %xcc, rtrap_irq; \
158 .previous;
159
160#define TICK_SMP_IRQ \
161 rdpr %pil, %g2; \
162 wrpr %g0, 15, %pil; \
163 sethi %hi(1f-4), %g7; \
164 ba,pt %xcc, etrap_irq; \
165 or %g7, %lo(1f-4), %g7; \
166 nop; \
167 nop; \
168 nop; \
169 .subsection 2; \
1701: call trace_hardirqs_off; \
171 nop; \
172 call smp_percpu_timer_interrupt; \
173 add %sp, PTREGS_OFF, %o0; \
174 ba,a,pt %xcc, rtrap_irq; \
175 .previous;
176
177#else
178
179#define TRAP_IRQ(routine, level) \
180 rdpr %pil, %g2; \
181 wrpr %g0, 15, %pil; \
182 ba,pt %xcc, etrap_irq; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]183 rd %pc, %g7; \
184 mov level, %o0; \
185 call routine; \
186 add %sp, PTREGS_OFF, %o1; \
187 ba,a,pt %xcc, rtrap_irq;
188
189#define TICK_SMP_IRQ \
190 rdpr %pil, %g2; \
191 wrpr %g0, 15, %pil; \
192 sethi %hi(109f), %g7; \
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]193 ba,pt %xcc, etrap_irq; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]194109: or %g7, %lo(109b), %g7; \
195 call smp_percpu_timer_interrupt; \
196 add %sp, PTREGS_OFF, %o0; \
197 ba,a,pt %xcc, rtrap_irq;
198
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]199#endif
200
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]201#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
202
203#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
204
205#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
206
207#define FLUSH_WINDOW_TRAP \
208 ba,pt %xcc, etrap; \
209 rd %pc, %g7; \
210 flushw; \
211 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
212 add %l1, 4, %l2; \
213 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
214 ba,pt %xcc, rtrap_clr_l6; \
215 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
216
217#ifdef CONFIG_KPROBES
218#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
219#else
220#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
221#endif
222
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]223#define SUN4V_ITSB_MISS \
224 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
225 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
226 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]227 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]228 ba,pt %xcc, sun4v_itsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]229 nop; \
230 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]231 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]232
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]233#define SUN4V_DTSB_MISS \
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]234 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
235 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
236 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]237 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]238 ba,pt %xcc, sun4v_dtsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]239 nop; \
240 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]241 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]242
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]243/* Before touching these macros, you owe it to yourself to go and
244 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
245 *
246 * For the user cases we used to use the %asi register, but
247 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
248 * now we use immediate ASI loads and stores instead. Kudos
249 * to Greg Onufer for pointing out this performance anomaly.
250 *
251 * Further note that we cannot use the g2, g4, g5, and g7 alternate
252 * globals in the spill routines, check out the save instruction in
253 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
254 * g4/g5 are the globals which are preserved by etrap processing
255 * for the caller of it. The g7 register is the return pc for
256 * etrap. Finally, g6 is the current thread register so we cannot
257 * us it in the spill handlers either. Most of these rules do not
258 * apply to fill processing, only g6 is not usable.
259 */
260
261/* Normal kernel spill */
262#define SPILL_0_NORMAL \
263 stx %l0, [%sp + STACK_BIAS + 0x00]; \
264 stx %l1, [%sp + STACK_BIAS + 0x08]; \
265 stx %l2, [%sp + STACK_BIAS + 0x10]; \
266 stx %l3, [%sp + STACK_BIAS + 0x18]; \
267 stx %l4, [%sp + STACK_BIAS + 0x20]; \
268 stx %l5, [%sp + STACK_BIAS + 0x28]; \
269 stx %l6, [%sp + STACK_BIAS + 0x30]; \
270 stx %l7, [%sp + STACK_BIAS + 0x38]; \
271 stx %i0, [%sp + STACK_BIAS + 0x40]; \
272 stx %i1, [%sp + STACK_BIAS + 0x48]; \
273 stx %i2, [%sp + STACK_BIAS + 0x50]; \
274 stx %i3, [%sp + STACK_BIAS + 0x58]; \
275 stx %i4, [%sp + STACK_BIAS + 0x60]; \
276 stx %i5, [%sp + STACK_BIAS + 0x68]; \
277 stx %i6, [%sp + STACK_BIAS + 0x70]; \
278 stx %i7, [%sp + STACK_BIAS + 0x78]; \
279 saved; retry; nop; nop; nop; nop; nop; nop; \
280 nop; nop; nop; nop; nop; nop; nop; nop;
281
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]282#define SPILL_0_NORMAL_ETRAP \
283etrap_kernel_spill: \
284 stx %l0, [%sp + STACK_BIAS + 0x00]; \
285 stx %l1, [%sp + STACK_BIAS + 0x08]; \
286 stx %l2, [%sp + STACK_BIAS + 0x10]; \
287 stx %l3, [%sp + STACK_BIAS + 0x18]; \
288 stx %l4, [%sp + STACK_BIAS + 0x20]; \
289 stx %l5, [%sp + STACK_BIAS + 0x28]; \
290 stx %l6, [%sp + STACK_BIAS + 0x30]; \
291 stx %l7, [%sp + STACK_BIAS + 0x38]; \
292 stx %i0, [%sp + STACK_BIAS + 0x40]; \
293 stx %i1, [%sp + STACK_BIAS + 0x48]; \
294 stx %i2, [%sp + STACK_BIAS + 0x50]; \
295 stx %i3, [%sp + STACK_BIAS + 0x58]; \
296 stx %i4, [%sp + STACK_BIAS + 0x60]; \
297 stx %i5, [%sp + STACK_BIAS + 0x68]; \
298 stx %i6, [%sp + STACK_BIAS + 0x70]; \
299 stx %i7, [%sp + STACK_BIAS + 0x78]; \
300 saved; \
301 sub %g1, 2, %g1; \
302 ba,pt %xcc, etrap_save; \
303 wrpr %g1, %cwp; \
304 nop; nop; nop; nop; nop; nop; nop; nop; \
305 nop; nop; nop; nop;
306
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]307/* Normal 64bit spill */
308#define SPILL_1_GENERIC(ASI) \
309 add %sp, STACK_BIAS + 0x00, %g1; \
310 stxa %l0, [%g1 + %g0] ASI; \
311 mov 0x08, %g3; \
312 stxa %l1, [%g1 + %g3] ASI; \
313 add %g1, 0x10, %g1; \
314 stxa %l2, [%g1 + %g0] ASI; \
315 stxa %l3, [%g1 + %g3] ASI; \
316 add %g1, 0x10, %g1; \
317 stxa %l4, [%g1 + %g0] ASI; \
318 stxa %l5, [%g1 + %g3] ASI; \
319 add %g1, 0x10, %g1; \
320 stxa %l6, [%g1 + %g0] ASI; \
321 stxa %l7, [%g1 + %g3] ASI; \
322 add %g1, 0x10, %g1; \
323 stxa %i0, [%g1 + %g0] ASI; \
324 stxa %i1, [%g1 + %g3] ASI; \
325 add %g1, 0x10, %g1; \
326 stxa %i2, [%g1 + %g0] ASI; \
327 stxa %i3, [%g1 + %g3] ASI; \
328 add %g1, 0x10, %g1; \
329 stxa %i4, [%g1 + %g0] ASI; \
330 stxa %i5, [%g1 + %g3] ASI; \
331 add %g1, 0x10, %g1; \
332 stxa %i6, [%g1 + %g0] ASI; \
333 stxa %i7, [%g1 + %g3] ASI; \
334 saved; \
335 retry; nop; nop; \
336 b,a,pt %xcc, spill_fixup_dax; \
337 b,a,pt %xcc, spill_fixup_mna; \
338 b,a,pt %xcc, spill_fixup;
339
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]340#define SPILL_1_GENERIC_ETRAP \
341etrap_user_spill_64bit: \
342 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
343 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
344 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
345 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
346 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
347 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
348 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
349 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
350 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
351 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
352 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
353 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
354 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
355 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
356 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
357 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
358 saved; \
359 sub %g1, 2, %g1; \
360 ba,pt %xcc, etrap_save; \
361 wrpr %g1, %cwp; \
362 nop; nop; nop; nop; nop; \
363 nop; nop; nop; nop; \
364 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
365 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
366 ba,a,pt %xcc, etrap_spill_fixup_64bit;
367
368#define SPILL_1_GENERIC_ETRAP_FIXUP \
369etrap_spill_fixup_64bit: \
370 ldub [%g6 + TI_WSAVED], %g1; \
371 sll %g1, 3, %g3; \
372 add %g6, %g3, %g3; \
373 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
374 sll %g1, 7, %g3; \
375 add %g6, %g3, %g3; \
376 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
377 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
378 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
379 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
380 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
381 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
382 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
383 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
384 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
385 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
386 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
387 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
388 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
389 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
390 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
391 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
392 add %g1, 1, %g1; \
393 stb %g1, [%g6 + TI_WSAVED]; \
394 saved; \
395 rdpr %cwp, %g1; \
396 sub %g1, 2, %g1; \
397 ba,pt %xcc, etrap_save; \
398 wrpr %g1, %cwp; \
399 nop; nop; nop
400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]401/* Normal 32bit spill */
402#define SPILL_2_GENERIC(ASI) \
403 srl %sp, 0, %sp; \
404 stwa %l0, [%sp + %g0] ASI; \
405 mov 0x04, %g3; \
406 stwa %l1, [%sp + %g3] ASI; \
407 add %sp, 0x08, %g1; \
408 stwa %l2, [%g1 + %g0] ASI; \
409 stwa %l3, [%g1 + %g3] ASI; \
410 add %g1, 0x08, %g1; \
411 stwa %l4, [%g1 + %g0] ASI; \
412 stwa %l5, [%g1 + %g3] ASI; \
413 add %g1, 0x08, %g1; \
414 stwa %l6, [%g1 + %g0] ASI; \
415 stwa %l7, [%g1 + %g3] ASI; \
416 add %g1, 0x08, %g1; \
417 stwa %i0, [%g1 + %g0] ASI; \
418 stwa %i1, [%g1 + %g3] ASI; \
419 add %g1, 0x08, %g1; \
420 stwa %i2, [%g1 + %g0] ASI; \
421 stwa %i3, [%g1 + %g3] ASI; \
422 add %g1, 0x08, %g1; \
423 stwa %i4, [%g1 + %g0] ASI; \
424 stwa %i5, [%g1 + %g3] ASI; \
425 add %g1, 0x08, %g1; \
426 stwa %i6, [%g1 + %g0] ASI; \
427 stwa %i7, [%g1 + %g3] ASI; \
428 saved; \
429 retry; nop; nop; \
430 b,a,pt %xcc, spill_fixup_dax; \
431 b,a,pt %xcc, spill_fixup_mna; \
432 b,a,pt %xcc, spill_fixup;
433
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]434#define SPILL_2_GENERIC_ETRAP \
435etrap_user_spill_32bit: \
436 srl %sp, 0, %sp; \
437 stwa %l0, [%sp + 0x00] %asi; \
438 stwa %l1, [%sp + 0x04] %asi; \
439 stwa %l2, [%sp + 0x08] %asi; \
440 stwa %l3, [%sp + 0x0c] %asi; \
441 stwa %l4, [%sp + 0x10] %asi; \
442 stwa %l5, [%sp + 0x14] %asi; \
443 stwa %l6, [%sp + 0x18] %asi; \
444 stwa %l7, [%sp + 0x1c] %asi; \
445 stwa %i0, [%sp + 0x20] %asi; \
446 stwa %i1, [%sp + 0x24] %asi; \
447 stwa %i2, [%sp + 0x28] %asi; \
448 stwa %i3, [%sp + 0x2c] %asi; \
449 stwa %i4, [%sp + 0x30] %asi; \
450 stwa %i5, [%sp + 0x34] %asi; \
451 stwa %i6, [%sp + 0x38] %asi; \
452 stwa %i7, [%sp + 0x3c] %asi; \
453 saved; \
454 sub %g1, 2, %g1; \
455 ba,pt %xcc, etrap_save; \
456 wrpr %g1, %cwp; \
457 nop; nop; nop; nop; \
458 nop; nop; nop; nop; \
459 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
460 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
461 ba,a,pt %xcc, etrap_spill_fixup_32bit;
462
463#define SPILL_2_GENERIC_ETRAP_FIXUP \
464etrap_spill_fixup_32bit: \
465 ldub [%g6 + TI_WSAVED], %g1; \
466 sll %g1, 3, %g3; \
467 add %g6, %g3, %g3; \
468 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
469 sll %g1, 7, %g3; \
470 add %g6, %g3, %g3; \
471 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
472 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
473 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
474 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
475 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
476 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
477 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
478 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
479 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
480 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
481 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
482 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
483 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
484 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
485 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
486 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
487 add %g1, 1, %g1; \
488 stb %g1, [%g6 + TI_WSAVED]; \
489 saved; \
490 rdpr %cwp, %g1; \
491 sub %g1, 2, %g1; \
492 ba,pt %xcc, etrap_save; \
493 wrpr %g1, %cwp; \
494 nop; nop; nop
495
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]496#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
497#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
498#define SPILL_3_NORMAL SPILL_0_NORMAL
499#define SPILL_4_NORMAL SPILL_0_NORMAL
500#define SPILL_5_NORMAL SPILL_0_NORMAL
501#define SPILL_6_NORMAL SPILL_0_NORMAL
502#define SPILL_7_NORMAL SPILL_0_NORMAL
503
504#define SPILL_0_OTHER SPILL_0_NORMAL
505#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
506#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
507#define SPILL_3_OTHER SPILL_3_NORMAL
508#define SPILL_4_OTHER SPILL_4_NORMAL
509#define SPILL_5_OTHER SPILL_5_NORMAL
510#define SPILL_6_OTHER SPILL_6_NORMAL
511#define SPILL_7_OTHER SPILL_7_NORMAL
512
513/* Normal kernel fill */
514#define FILL_0_NORMAL \
515 ldx [%sp + STACK_BIAS + 0x00], %l0; \
516 ldx [%sp + STACK_BIAS + 0x08], %l1; \
517 ldx [%sp + STACK_BIAS + 0x10], %l2; \
518 ldx [%sp + STACK_BIAS + 0x18], %l3; \
519 ldx [%sp + STACK_BIAS + 0x20], %l4; \
520 ldx [%sp + STACK_BIAS + 0x28], %l5; \
521 ldx [%sp + STACK_BIAS + 0x30], %l6; \
522 ldx [%sp + STACK_BIAS + 0x38], %l7; \
523 ldx [%sp + STACK_BIAS + 0x40], %i0; \
524 ldx [%sp + STACK_BIAS + 0x48], %i1; \
525 ldx [%sp + STACK_BIAS + 0x50], %i2; \
526 ldx [%sp + STACK_BIAS + 0x58], %i3; \
527 ldx [%sp + STACK_BIAS + 0x60], %i4; \
528 ldx [%sp + STACK_BIAS + 0x68], %i5; \
529 ldx [%sp + STACK_BIAS + 0x70], %i6; \
530 ldx [%sp + STACK_BIAS + 0x78], %i7; \
531 restored; retry; nop; nop; nop; nop; nop; nop; \
532 nop; nop; nop; nop; nop; nop; nop; nop;
533
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]534#define FILL_0_NORMAL_RTRAP \
535kern_rtt_fill: \
536 rdpr %cwp, %g1; \
537 sub %g1, 1, %g1; \
538 wrpr %g1, %cwp; \
539 ldx [%sp + STACK_BIAS + 0x00], %l0; \
540 ldx [%sp + STACK_BIAS + 0x08], %l1; \
541 ldx [%sp + STACK_BIAS + 0x10], %l2; \
542 ldx [%sp + STACK_BIAS + 0x18], %l3; \
543 ldx [%sp + STACK_BIAS + 0x20], %l4; \
544 ldx [%sp + STACK_BIAS + 0x28], %l5; \
545 ldx [%sp + STACK_BIAS + 0x30], %l6; \
546 ldx [%sp + STACK_BIAS + 0x38], %l7; \
547 ldx [%sp + STACK_BIAS + 0x40], %i0; \
548 ldx [%sp + STACK_BIAS + 0x48], %i1; \
549 ldx [%sp + STACK_BIAS + 0x50], %i2; \
550 ldx [%sp + STACK_BIAS + 0x58], %i3; \
551 ldx [%sp + STACK_BIAS + 0x60], %i4; \
552 ldx [%sp + STACK_BIAS + 0x68], %i5; \
553 ldx [%sp + STACK_BIAS + 0x70], %i6; \
554 ldx [%sp + STACK_BIAS + 0x78], %i7; \
555 restored; \
556 add %g1, 1, %g1; \
557 ba,pt %xcc, kern_rtt_restore; \
558 wrpr %g1, %cwp; \
559 nop; nop; nop; nop; nop; \
560 nop; nop; nop; nop;
561
562
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]563/* Normal 64bit fill */
564#define FILL_1_GENERIC(ASI) \
565 add %sp, STACK_BIAS + 0x00, %g1; \
566 ldxa [%g1 + %g0] ASI, %l0; \
567 mov 0x08, %g2; \
568 mov 0x10, %g3; \
569 ldxa [%g1 + %g2] ASI, %l1; \
570 mov 0x18, %g5; \
571 ldxa [%g1 + %g3] ASI, %l2; \
572 ldxa [%g1 + %g5] ASI, %l3; \
573 add %g1, 0x20, %g1; \
574 ldxa [%g1 + %g0] ASI, %l4; \
575 ldxa [%g1 + %g2] ASI, %l5; \
576 ldxa [%g1 + %g3] ASI, %l6; \
577 ldxa [%g1 + %g5] ASI, %l7; \
578 add %g1, 0x20, %g1; \
579 ldxa [%g1 + %g0] ASI, %i0; \
580 ldxa [%g1 + %g2] ASI, %i1; \
581 ldxa [%g1 + %g3] ASI, %i2; \
582 ldxa [%g1 + %g5] ASI, %i3; \
583 add %g1, 0x20, %g1; \
584 ldxa [%g1 + %g0] ASI, %i4; \
585 ldxa [%g1 + %g2] ASI, %i5; \
586 ldxa [%g1 + %g3] ASI, %i6; \
587 ldxa [%g1 + %g5] ASI, %i7; \
588 restored; \
589 retry; nop; nop; nop; nop; \
590 b,a,pt %xcc, fill_fixup_dax; \
591 b,a,pt %xcc, fill_fixup_mna; \
592 b,a,pt %xcc, fill_fixup;
593
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]594#define FILL_1_GENERIC_RTRAP \
595user_rtt_fill_64bit: \
596 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
597 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
598 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
599 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
600 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
601 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
602 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
603 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
604 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
605 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
606 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
607 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
608 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
609 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
610 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
611 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
612 ba,pt %xcc, user_rtt_pre_restore; \
613 restored; \
614 nop; nop; nop; nop; nop; nop; \
615 nop; nop; nop; nop; nop; \
616 ba,a,pt %xcc, user_rtt_fill_fixup; \
617 ba,a,pt %xcc, user_rtt_fill_fixup; \
618 ba,a,pt %xcc, user_rtt_fill_fixup;
619
620
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]621/* Normal 32bit fill */
622#define FILL_2_GENERIC(ASI) \
623 srl %sp, 0, %sp; \
624 lduwa [%sp + %g0] ASI, %l0; \
625 mov 0x04, %g2; \
626 mov 0x08, %g3; \
627 lduwa [%sp + %g2] ASI, %l1; \
628 mov 0x0c, %g5; \
629 lduwa [%sp + %g3] ASI, %l2; \
630 lduwa [%sp + %g5] ASI, %l3; \
631 add %sp, 0x10, %g1; \
632 lduwa [%g1 + %g0] ASI, %l4; \
633 lduwa [%g1 + %g2] ASI, %l5; \
634 lduwa [%g1 + %g3] ASI, %l6; \
635 lduwa [%g1 + %g5] ASI, %l7; \
636 add %g1, 0x10, %g1; \
637 lduwa [%g1 + %g0] ASI, %i0; \
638 lduwa [%g1 + %g2] ASI, %i1; \
639 lduwa [%g1 + %g3] ASI, %i2; \
640 lduwa [%g1 + %g5] ASI, %i3; \
641 add %g1, 0x10, %g1; \
642 lduwa [%g1 + %g0] ASI, %i4; \
643 lduwa [%g1 + %g2] ASI, %i5; \
644 lduwa [%g1 + %g3] ASI, %i6; \
645 lduwa [%g1 + %g5] ASI, %i7; \
646 restored; \
647 retry; nop; nop; nop; nop; \
648 b,a,pt %xcc, fill_fixup_dax; \
649 b,a,pt %xcc, fill_fixup_mna; \
650 b,a,pt %xcc, fill_fixup;
651
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]652#define FILL_2_GENERIC_RTRAP \
653user_rtt_fill_32bit: \
654 srl %sp, 0, %sp; \
655 lduwa [%sp + 0x00] %asi, %l0; \
656 lduwa [%sp + 0x04] %asi, %l1; \
657 lduwa [%sp + 0x08] %asi, %l2; \
658 lduwa [%sp + 0x0c] %asi, %l3; \
659 lduwa [%sp + 0x10] %asi, %l4; \
660 lduwa [%sp + 0x14] %asi, %l5; \
661 lduwa [%sp + 0x18] %asi, %l6; \
662 lduwa [%sp + 0x1c] %asi, %l7; \
663 lduwa [%sp + 0x20] %asi, %i0; \
664 lduwa [%sp + 0x24] %asi, %i1; \
665 lduwa [%sp + 0x28] %asi, %i2; \
666 lduwa [%sp + 0x2c] %asi, %i3; \
667 lduwa [%sp + 0x30] %asi, %i4; \
668 lduwa [%sp + 0x34] %asi, %i5; \
669 lduwa [%sp + 0x38] %asi, %i6; \
670 lduwa [%sp + 0x3c] %asi, %i7; \
671 ba,pt %xcc, user_rtt_pre_restore; \
672 restored; \
673 nop; nop; nop; nop; nop; \
674 nop; nop; nop; nop; nop; \
675 ba,a,pt %xcc, user_rtt_fill_fixup; \
676 ba,a,pt %xcc, user_rtt_fill_fixup; \
677 ba,a,pt %xcc, user_rtt_fill_fixup;
678
679
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]680#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
681#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
682#define FILL_3_NORMAL FILL_0_NORMAL
683#define FILL_4_NORMAL FILL_0_NORMAL
684#define FILL_5_NORMAL FILL_0_NORMAL
685#define FILL_6_NORMAL FILL_0_NORMAL
686#define FILL_7_NORMAL FILL_0_NORMAL
687
688#define FILL_0_OTHER FILL_0_NORMAL
689#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
690#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
691#define FILL_3_OTHER FILL_3_NORMAL
692#define FILL_4_OTHER FILL_4_NORMAL
693#define FILL_5_OTHER FILL_5_NORMAL
694#define FILL_6_OTHER FILL_6_NORMAL
695#define FILL_7_OTHER FILL_7_NORMAL
696
697#endif /* !(_SPARC64_TTABLE_H) */