Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 1 | #ifndef _SPARC64_PTRACE_H |
| 2 | #define _SPARC64_PTRACE_H |
| 3 | |
| 4 | #include <asm/pstate.h> |
| 5 | |
| 6 | /* This struct defines the way the registers are stored on the |
| 7 | * stack during a system call and basically all traps. |
| 8 | */ |
| 9 | |
| 10 | /* This magic value must have the low 9 bits clear, |
| 11 | * as that is where we encode the %tt value, see below. |
| 12 | */ |
| 13 | #define PT_REGS_MAGIC 0x57ac6c00 |
| 14 | |
| 15 | #ifndef __ASSEMBLY__ |
| 16 | |
| 17 | #include <linux/types.h> |
| 18 | |
| 19 | struct pt_regs { |
| 20 | unsigned long u_regs[16]; /* globals and ins */ |
| 21 | unsigned long tstate; |
| 22 | unsigned long tpc; |
| 23 | unsigned long tnpc; |
| 24 | unsigned int y; |
| 25 | |
| 26 | /* We encode a magic number, PT_REGS_MAGIC, along |
| 27 | * with the %tt (trap type) register value at trap |
| 28 | * entry time. The magic number allows us to identify |
| 29 | * accurately a trap stack frame in the stack |
| 30 | * unwinder, and the %tt value allows us to test |
| 31 | * things like "in a system call" etc. for an arbitray |
| 32 | * process. |
| 33 | * |
| 34 | * The PT_REGS_MAGIC is choosen such that it can be |
| 35 | * loaded completely using just a sethi instruction. |
| 36 | */ |
| 37 | unsigned int magic; |
| 38 | }; |
| 39 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 40 | struct pt_regs32 { |
| 41 | unsigned int psr; |
| 42 | unsigned int pc; |
| 43 | unsigned int npc; |
| 44 | unsigned int y; |
| 45 | unsigned int u_regs[16]; /* globals and ins */ |
| 46 | }; |
| 47 | |
| 48 | #define UREG_G0 0 |
| 49 | #define UREG_G1 1 |
| 50 | #define UREG_G2 2 |
| 51 | #define UREG_G3 3 |
| 52 | #define UREG_G4 4 |
| 53 | #define UREG_G5 5 |
| 54 | #define UREG_G6 6 |
| 55 | #define UREG_G7 7 |
| 56 | #define UREG_I0 8 |
| 57 | #define UREG_I1 9 |
| 58 | #define UREG_I2 10 |
| 59 | #define UREG_I3 11 |
| 60 | #define UREG_I4 12 |
| 61 | #define UREG_I5 13 |
| 62 | #define UREG_I6 14 |
| 63 | #define UREG_I7 15 |
| 64 | #define UREG_FP UREG_I6 |
| 65 | #define UREG_RETPC UREG_I7 |
| 66 | |
| 67 | /* A V9 register window */ |
| 68 | struct reg_window { |
| 69 | unsigned long locals[8]; |
| 70 | unsigned long ins[8]; |
| 71 | }; |
| 72 | |
| 73 | /* A 32-bit register window. */ |
| 74 | struct reg_window32 { |
| 75 | unsigned int locals[8]; |
| 76 | unsigned int ins[8]; |
| 77 | }; |
| 78 | |
| 79 | /* A V9 Sparc stack frame */ |
| 80 | struct sparc_stackf { |
| 81 | unsigned long locals[8]; |
| 82 | unsigned long ins[6]; |
| 83 | struct sparc_stackf *fp; |
| 84 | unsigned long callers_pc; |
| 85 | char *structptr; |
| 86 | unsigned long xargs[6]; |
| 87 | unsigned long xxargs[1]; |
| 88 | }; |
| 89 | |
| 90 | /* A 32-bit Sparc stack frame */ |
| 91 | struct sparc_stackf32 { |
| 92 | unsigned int locals[8]; |
| 93 | unsigned int ins[6]; |
| 94 | unsigned int fp; |
| 95 | unsigned int callers_pc; |
| 96 | unsigned int structptr; |
| 97 | unsigned int xargs[6]; |
| 98 | unsigned int xxargs[1]; |
| 99 | }; |
| 100 | |
| 101 | struct sparc_trapf { |
| 102 | unsigned long locals[8]; |
| 103 | unsigned long ins[8]; |
| 104 | unsigned long _unused; |
| 105 | struct pt_regs *regs; |
| 106 | }; |
| 107 | |
| 108 | #define TRACEREG_SZ sizeof(struct pt_regs) |
| 109 | #define STACKFRAME_SZ sizeof(struct sparc_stackf) |
| 110 | |
| 111 | #define TRACEREG32_SZ sizeof(struct pt_regs32) |
| 112 | #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) |
| 113 | |
| 114 | #ifdef __KERNEL__ |
| 115 | |
David S. Miller | 6717c28 | 2008-07-31 20:32:35 -0700 | [diff] [blame] | 116 | static inline int pt_regs_trap_type(struct pt_regs *regs) |
| 117 | { |
| 118 | return regs->magic & 0x1ff; |
| 119 | } |
| 120 | |
| 121 | static inline bool pt_regs_is_syscall(struct pt_regs *regs) |
| 122 | { |
| 123 | return (regs->tstate & TSTATE_SYSCALL); |
| 124 | } |
| 125 | |
| 126 | static inline bool pt_regs_clear_syscall(struct pt_regs *regs) |
| 127 | { |
| 128 | return (regs->tstate &= ~TSTATE_SYSCALL); |
| 129 | } |
| 130 | |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 131 | struct global_reg_snapshot { |
| 132 | unsigned long tstate; |
| 133 | unsigned long tpc; |
| 134 | unsigned long tnpc; |
| 135 | unsigned long o7; |
| 136 | unsigned long i7; |
David S. Miller | 5afe273 | 2008-07-30 21:57:59 -0700 | [diff] [blame] | 137 | unsigned long rpc; |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 138 | struct thread_info *thread; |
| 139 | unsigned long pad1; |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | #define __ARCH_WANT_COMPAT_SYS_PTRACE |
| 143 | |
| 144 | #define force_successful_syscall_return() \ |
| 145 | do { current_thread_info()->syscall_noerror = 1; \ |
| 146 | } while (0) |
| 147 | #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) |
| 148 | #define instruction_pointer(regs) ((regs)->tpc) |
David S. Miller | ac76cfd | 2008-07-27 01:59:21 -0700 | [diff] [blame] | 149 | #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 150 | #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) |
| 151 | #ifdef CONFIG_SMP |
| 152 | extern unsigned long profile_pc(struct pt_regs *); |
| 153 | #else |
| 154 | #define profile_pc(regs) instruction_pointer(regs) |
| 155 | #endif |
| 156 | extern void show_regs(struct pt_regs *); |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 157 | #endif |
| 158 | |
| 159 | #else /* __ASSEMBLY__ */ |
| 160 | /* For assembly code. */ |
| 161 | #define TRACEREG_SZ 0xa0 |
| 162 | #define STACKFRAME_SZ 0xc0 |
| 163 | |
| 164 | #define TRACEREG32_SZ 0x50 |
| 165 | #define STACKFRAME32_SZ 0x60 |
| 166 | #endif |
| 167 | |
| 168 | #ifdef __KERNEL__ |
| 169 | #define STACK_BIAS 2047 |
| 170 | #endif |
| 171 | |
| 172 | /* These are for pt_regs. */ |
| 173 | #define PT_V9_G0 0x00 |
| 174 | #define PT_V9_G1 0x08 |
| 175 | #define PT_V9_G2 0x10 |
| 176 | #define PT_V9_G3 0x18 |
| 177 | #define PT_V9_G4 0x20 |
| 178 | #define PT_V9_G5 0x28 |
| 179 | #define PT_V9_G6 0x30 |
| 180 | #define PT_V9_G7 0x38 |
| 181 | #define PT_V9_I0 0x40 |
| 182 | #define PT_V9_I1 0x48 |
| 183 | #define PT_V9_I2 0x50 |
| 184 | #define PT_V9_I3 0x58 |
| 185 | #define PT_V9_I4 0x60 |
| 186 | #define PT_V9_I5 0x68 |
| 187 | #define PT_V9_I6 0x70 |
| 188 | #define PT_V9_FP PT_V9_I6 |
| 189 | #define PT_V9_I7 0x78 |
| 190 | #define PT_V9_TSTATE 0x80 |
| 191 | #define PT_V9_TPC 0x88 |
| 192 | #define PT_V9_TNPC 0x90 |
| 193 | #define PT_V9_Y 0x98 |
| 194 | #define PT_V9_MAGIC 0x9c |
| 195 | #define PT_TSTATE PT_V9_TSTATE |
| 196 | #define PT_TPC PT_V9_TPC |
| 197 | #define PT_TNPC PT_V9_TNPC |
| 198 | |
| 199 | /* These for pt_regs32. */ |
| 200 | #define PT_PSR 0x0 |
| 201 | #define PT_PC 0x4 |
| 202 | #define PT_NPC 0x8 |
| 203 | #define PT_Y 0xc |
| 204 | #define PT_G0 0x10 |
| 205 | #define PT_WIM PT_G0 |
| 206 | #define PT_G1 0x14 |
| 207 | #define PT_G2 0x18 |
| 208 | #define PT_G3 0x1c |
| 209 | #define PT_G4 0x20 |
| 210 | #define PT_G5 0x24 |
| 211 | #define PT_G6 0x28 |
| 212 | #define PT_G7 0x2c |
| 213 | #define PT_I0 0x30 |
| 214 | #define PT_I1 0x34 |
| 215 | #define PT_I2 0x38 |
| 216 | #define PT_I3 0x3c |
| 217 | #define PT_I4 0x40 |
| 218 | #define PT_I5 0x44 |
| 219 | #define PT_I6 0x48 |
| 220 | #define PT_FP PT_I6 |
| 221 | #define PT_I7 0x4c |
| 222 | |
| 223 | /* Reg_window offsets */ |
| 224 | #define RW_V9_L0 0x00 |
| 225 | #define RW_V9_L1 0x08 |
| 226 | #define RW_V9_L2 0x10 |
| 227 | #define RW_V9_L3 0x18 |
| 228 | #define RW_V9_L4 0x20 |
| 229 | #define RW_V9_L5 0x28 |
| 230 | #define RW_V9_L6 0x30 |
| 231 | #define RW_V9_L7 0x38 |
| 232 | #define RW_V9_I0 0x40 |
| 233 | #define RW_V9_I1 0x48 |
| 234 | #define RW_V9_I2 0x50 |
| 235 | #define RW_V9_I3 0x58 |
| 236 | #define RW_V9_I4 0x60 |
| 237 | #define RW_V9_I5 0x68 |
| 238 | #define RW_V9_I6 0x70 |
| 239 | #define RW_V9_I7 0x78 |
| 240 | |
| 241 | #define RW_L0 0x00 |
| 242 | #define RW_L1 0x04 |
| 243 | #define RW_L2 0x08 |
| 244 | #define RW_L3 0x0c |
| 245 | #define RW_L4 0x10 |
| 246 | #define RW_L5 0x14 |
| 247 | #define RW_L6 0x18 |
| 248 | #define RW_L7 0x1c |
| 249 | #define RW_I0 0x20 |
| 250 | #define RW_I1 0x24 |
| 251 | #define RW_I2 0x28 |
| 252 | #define RW_I3 0x2c |
| 253 | #define RW_I4 0x30 |
| 254 | #define RW_I5 0x34 |
| 255 | #define RW_I6 0x38 |
| 256 | #define RW_I7 0x3c |
| 257 | |
| 258 | /* Stack_frame offsets */ |
| 259 | #define SF_V9_L0 0x00 |
| 260 | #define SF_V9_L1 0x08 |
| 261 | #define SF_V9_L2 0x10 |
| 262 | #define SF_V9_L3 0x18 |
| 263 | #define SF_V9_L4 0x20 |
| 264 | #define SF_V9_L5 0x28 |
| 265 | #define SF_V9_L6 0x30 |
| 266 | #define SF_V9_L7 0x38 |
| 267 | #define SF_V9_I0 0x40 |
| 268 | #define SF_V9_I1 0x48 |
| 269 | #define SF_V9_I2 0x50 |
| 270 | #define SF_V9_I3 0x58 |
| 271 | #define SF_V9_I4 0x60 |
| 272 | #define SF_V9_I5 0x68 |
| 273 | #define SF_V9_FP 0x70 |
| 274 | #define SF_V9_PC 0x78 |
| 275 | #define SF_V9_RETP 0x80 |
| 276 | #define SF_V9_XARG0 0x88 |
| 277 | #define SF_V9_XARG1 0x90 |
| 278 | #define SF_V9_XARG2 0x98 |
| 279 | #define SF_V9_XARG3 0xa0 |
| 280 | #define SF_V9_XARG4 0xa8 |
| 281 | #define SF_V9_XARG5 0xb0 |
| 282 | #define SF_V9_XXARG 0xb8 |
| 283 | |
| 284 | #define SF_L0 0x00 |
| 285 | #define SF_L1 0x04 |
| 286 | #define SF_L2 0x08 |
| 287 | #define SF_L3 0x0c |
| 288 | #define SF_L4 0x10 |
| 289 | #define SF_L5 0x14 |
| 290 | #define SF_L6 0x18 |
| 291 | #define SF_L7 0x1c |
| 292 | #define SF_I0 0x20 |
| 293 | #define SF_I1 0x24 |
| 294 | #define SF_I2 0x28 |
| 295 | #define SF_I3 0x2c |
| 296 | #define SF_I4 0x30 |
| 297 | #define SF_I5 0x34 |
| 298 | #define SF_FP 0x38 |
| 299 | #define SF_PC 0x3c |
| 300 | #define SF_RETP 0x40 |
| 301 | #define SF_XARG0 0x44 |
| 302 | #define SF_XARG1 0x48 |
| 303 | #define SF_XARG2 0x4c |
| 304 | #define SF_XARG3 0x50 |
| 305 | #define SF_XARG4 0x54 |
| 306 | #define SF_XARG5 0x58 |
| 307 | #define SF_XXARG 0x5c |
| 308 | |
| 309 | #ifdef __KERNEL__ |
| 310 | |
| 311 | /* global_reg_snapshot offsets */ |
| 312 | #define GR_SNAP_TSTATE 0x00 |
| 313 | #define GR_SNAP_TPC 0x08 |
| 314 | #define GR_SNAP_TNPC 0x10 |
| 315 | #define GR_SNAP_O7 0x18 |
| 316 | #define GR_SNAP_I7 0x20 |
David S. Miller | 5afe273 | 2008-07-30 21:57:59 -0700 | [diff] [blame] | 317 | #define GR_SNAP_RPC 0x28 |
| 318 | #define GR_SNAP_THREAD 0x30 |
| 319 | #define GR_SNAP_PAD1 0x38 |
Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 320 | |
| 321 | #endif /* __KERNEL__ */ |
| 322 | |
| 323 | /* Stuff for the ptrace system call */ |
| 324 | #define PTRACE_SPARC_DETACH 11 |
| 325 | #define PTRACE_GETREGS 12 |
| 326 | #define PTRACE_SETREGS 13 |
| 327 | #define PTRACE_GETFPREGS 14 |
| 328 | #define PTRACE_SETFPREGS 15 |
| 329 | #define PTRACE_READDATA 16 |
| 330 | #define PTRACE_WRITEDATA 17 |
| 331 | #define PTRACE_READTEXT 18 |
| 332 | #define PTRACE_WRITETEXT 19 |
| 333 | #define PTRACE_GETFPAREGS 20 |
| 334 | #define PTRACE_SETFPAREGS 21 |
| 335 | |
| 336 | /* There are for debugging 64-bit processes, either from a 32 or 64 bit |
| 337 | * parent. Thus their complements are for debugging 32-bit processes only. |
| 338 | */ |
| 339 | |
| 340 | #define PTRACE_GETREGS64 22 |
| 341 | #define PTRACE_SETREGS64 23 |
| 342 | /* PTRACE_SYSCALL is 24 */ |
| 343 | #define PTRACE_GETFPREGS64 25 |
| 344 | #define PTRACE_SETFPREGS64 26 |
| 345 | |
| 346 | #endif /* !(_SPARC64_PTRACE_H) */ |