blob: 79443e0dbf962586526ffda570057379dcec791c [file] [log] [blame]
Michael Chana4636962009-06-08 18:14:43 -07001/* cnic_if.h: Broadcom CNIC core network driver.
2 *
Michael Chan42bb8d52011-01-03 15:21:46 +00003 * Copyright (c) 2006-2011 Broadcom Corporation
Michael Chana4636962009-06-08 18:14:43 -07004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 */
10
11
12#ifndef CNIC_IF_H
13#define CNIC_IF_H
14
Michael Chan415199f2011-07-20 14:55:24 +000015#define CNIC_MODULE_VERSION "2.5.7"
16#define CNIC_MODULE_RELDATE "July 20, 2011"
Michael Chana4636962009-06-08 18:14:43 -070017
18#define CNIC_ULP_RDMA 0
19#define CNIC_ULP_ISCSI 1
Michael Chane1928c82010-12-23 07:43:04 +000020#define CNIC_ULP_FCOE 2
21#define CNIC_ULP_L4 3
22#define MAX_CNIC_ULP_TYPE_EXT 3
23#define MAX_CNIC_ULP_TYPE 4
Michael Chana4636962009-06-08 18:14:43 -070024
25struct kwqe {
26 u32 kwqe_op_flag;
27
Michael Chane1928c82010-12-23 07:43:04 +000028#define KWQE_QID_SHIFT 8
Michael Chana4636962009-06-08 18:14:43 -070029#define KWQE_OPCODE_MASK 0x00ff0000
30#define KWQE_OPCODE_SHIFT 16
Michael Chana4636962009-06-08 18:14:43 -070031#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
Michael Chane1928c82010-12-23 07:43:04 +000032#define KWQE_LAYER_MASK 0x70000000
33#define KWQE_LAYER_SHIFT 28
34#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
35#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
36#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
37#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
38#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
39#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
Michael Chana4636962009-06-08 18:14:43 -070040
41 u32 kwqe_info0;
42 u32 kwqe_info1;
43 u32 kwqe_info2;
44 u32 kwqe_info3;
45 u32 kwqe_info4;
46 u32 kwqe_info5;
47 u32 kwqe_info6;
48};
49
50struct kwqe_16 {
51 u32 kwqe_info0;
52 u32 kwqe_info1;
53 u32 kwqe_info2;
54 u32 kwqe_info3;
55};
56
57struct kcqe {
58 u32 kcqe_info0;
59 u32 kcqe_info1;
60 u32 kcqe_info2;
61 u32 kcqe_info3;
62 u32 kcqe_info4;
63 u32 kcqe_info5;
64 u32 kcqe_info6;
65 u32 kcqe_op_flag;
66 #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
67 #define KCQE_FLAGS_LAYER_MASK (0x7<<28)
68 #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
69 #define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
70 #define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
71 #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
72 #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
73 #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
Michael Chane1928c82010-12-23 07:43:04 +000074 #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
Michael Chana4636962009-06-08 18:14:43 -070075 #define KCQE_FLAGS_NEXT (1<<31)
76 #define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
77 #define KCQE_FLAGS_OPCODE_SHIFT (16)
78 #define KCQE_OPCODE(op) \
79 (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
80};
81
82#define MAX_CNIC_CTL_DATA 64
83#define MAX_DRV_CTL_DATA 64
84
85#define CNIC_CTL_STOP_CMD 1
86#define CNIC_CTL_START_CMD 2
87#define CNIC_CTL_COMPLETION_CMD 3
Dmitry Kravkovfab0dc82011-03-31 17:04:22 -070088#define CNIC_CTL_STOP_ISCSI_CMD 4
Michael Chana4636962009-06-08 18:14:43 -070089
90#define DRV_CTL_IO_WR_CMD 0x101
91#define DRV_CTL_IO_RD_CMD 0x102
92#define DRV_CTL_CTX_WR_CMD 0x103
93#define DRV_CTL_CTXTBL_WR_CMD 0x104
Dmitry Kravkovc2bff632010-10-06 03:33:18 +000094#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
Michael Chan993ac7b2009-10-10 13:46:56 +000095#define DRV_CTL_START_L2_CMD 0x106
96#define DRV_CTL_STOP_L2_CMD 0x107
Dmitry Kravkovc2bff632010-10-06 03:33:18 +000097#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
Dmitry Kravkovfab0dc82011-03-31 17:04:22 -070098#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
Michael Chana4636962009-06-08 18:14:43 -070099
100struct cnic_ctl_completion {
101 u32 cid;
Vlad Zolotarov619c5cb2011-06-14 14:33:44 +0300102 u8 opcode;
103 u8 error;
Michael Chana4636962009-06-08 18:14:43 -0700104};
105
Michael Chana4636962009-06-08 18:14:43 -0700106struct cnic_ctl_info {
107 int cmd;
108 union {
109 struct cnic_ctl_completion comp;
110 char bytes[MAX_CNIC_CTL_DATA];
111 } data;
112};
113
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000114struct drv_ctl_spq_credit {
115 u32 credit_count;
116};
117
Michael Chana4636962009-06-08 18:14:43 -0700118struct drv_ctl_io {
119 u32 cid_addr;
120 u32 offset;
121 u32 data;
122 dma_addr_t dma_addr;
123};
124
Michael Chan993ac7b2009-10-10 13:46:56 +0000125struct drv_ctl_l2_ring {
126 u32 client_id;
127 u32 cid;
128};
129
Michael Chana4636962009-06-08 18:14:43 -0700130struct drv_ctl_info {
131 int cmd;
132 union {
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000133 struct drv_ctl_spq_credit credit;
Michael Chana4636962009-06-08 18:14:43 -0700134 struct drv_ctl_io io;
Michael Chan993ac7b2009-10-10 13:46:56 +0000135 struct drv_ctl_l2_ring ring;
Michael Chana4636962009-06-08 18:14:43 -0700136 char bytes[MAX_DRV_CTL_DATA];
137 } data;
138};
139
140struct cnic_ops {
141 struct module *cnic_owner;
142 /* Calls to these functions are protected by RCU. When
143 * unregistering, we wait for any calls to complete before
144 * continuing.
145 */
146 int (*cnic_handler)(void *, void *);
147 int (*cnic_ctl)(void *, struct cnic_ctl_info *);
148};
149
150#define MAX_CNIC_VEC 8
151
152struct cnic_irq {
153 unsigned int vector;
154 void *status_blk;
155 u32 status_blk_num;
Dmitry Kravkov523224a2010-10-06 03:23:26 +0000156 u32 status_blk_num2;
Michael Chana4636962009-06-08 18:14:43 -0700157 u32 irq_flags;
158#define CNIC_IRQ_FL_MSIX 0x00000001
159};
160
161struct cnic_eth_dev {
162 struct module *drv_owner;
163 u32 drv_state;
164#define CNIC_DRV_STATE_REGD 0x00000001
165#define CNIC_DRV_STATE_USING_MSIX 0x00000002
Vladislav Zolotarov2ba45142011-01-31 14:39:17 +0000166#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
167#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
168#define CNIC_DRV_STATE_NO_FCOE 0x00000010
Michael Chana4636962009-06-08 18:14:43 -0700169 u32 chip_id;
170 u32 max_kwqe_pending;
171 struct pci_dev *pdev;
172 void __iomem *io_base;
Michael Chan993ac7b2009-10-10 13:46:56 +0000173 void __iomem *io_base2;
Vlad Zolotarov619c5cb2011-06-14 14:33:44 +0300174 const void *iro_arr;
Michael Chana4636962009-06-08 18:14:43 -0700175
176 u32 ctx_tbl_offset;
177 u32 ctx_tbl_len;
178 int ctx_blk_size;
179 u32 starting_cid;
180 u32 max_iscsi_conn;
181 u32 max_fcoe_conn;
182 u32 max_rdma_conn;
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000183 u32 fcoe_init_cid;
Vladislav Zolotarovbf61ee12011-07-21 07:56:51 +0000184 u32 fcoe_wwn_port_name_hi;
185 u32 fcoe_wwn_port_name_lo;
186 u32 fcoe_wwn_node_name_hi;
187 u32 fcoe_wwn_node_name_lo;
188
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000189 u16 iscsi_l2_client_id;
190 u16 iscsi_l2_cid;
Vladislav Zolotarov2ba45142011-01-31 14:39:17 +0000191 u8 iscsi_mac[ETH_ALEN];
Michael Chana4636962009-06-08 18:14:43 -0700192
193 int num_irq;
194 struct cnic_irq irq_arr[MAX_CNIC_VEC];
195 int (*drv_register_cnic)(struct net_device *,
196 struct cnic_ops *, void *);
197 int (*drv_unregister_cnic)(struct net_device *);
198 int (*drv_submit_kwqes_32)(struct net_device *,
199 struct kwqe *[], u32);
200 int (*drv_submit_kwqes_16)(struct net_device *,
201 struct kwqe_16 *[], u32);
202 int (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
203 unsigned long reserved1[2];
204};
205
206struct cnic_sockaddr {
207 union {
208 struct sockaddr_in v4;
209 struct sockaddr_in6 v6;
210 } local;
211 union {
212 struct sockaddr_in v4;
213 struct sockaddr_in6 v6;
214 } remote;
215};
216
217struct cnic_sock {
218 struct cnic_dev *dev;
219 void *context;
220 u32 src_ip[4];
221 u32 dst_ip[4];
222 u16 src_port;
223 u16 dst_port;
224 u16 vlan_id;
225 unsigned char old_ha[6];
226 unsigned char ha[6];
227 u32 mtu;
228 u32 cid;
229 u32 l5_cid;
230 u32 pg_cid;
231 int ulp_type;
232
233 u32 ka_timeout;
234 u32 ka_interval;
235 u8 ka_max_probe_count;
236 u8 tos;
237 u8 ttl;
238 u8 snd_seq_scale;
239 u32 rcv_buf;
240 u32 snd_buf;
241 u32 seed;
242
243 unsigned long tcp_flags;
244#define SK_TCP_NO_DELAY_ACK 0x1
245#define SK_TCP_KEEP_ALIVE 0x2
246#define SK_TCP_NAGLE 0x4
247#define SK_TCP_TIMESTAMP 0x8
248#define SK_TCP_SACK 0x10
249#define SK_TCP_SEG_SCALING 0x20
250 unsigned long flags;
251#define SK_F_INUSE 0
252#define SK_F_OFFLD_COMPLETE 1
253#define SK_F_OFFLD_SCHED 2
254#define SK_F_PG_OFFLD_COMPLETE 3
255#define SK_F_CONNECT_START 4
256#define SK_F_IPV6 5
257#define SK_F_CLOSING 7
258
259 atomic_t ref_count;
260 u32 state;
261 struct kwqe kwqe1;
262 struct kwqe kwqe2;
263 struct kwqe kwqe3;
264};
265
266struct cnic_dev {
267 struct net_device *netdev;
268 struct pci_dev *pcidev;
269 void __iomem *regview;
270 struct list_head list;
271
272 int (*register_device)(struct cnic_dev *dev, int ulp_type,
273 void *ulp_ctx);
274 int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
275 int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
276 u32 num_wqes);
277 int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
278 u32 num_wqes);
279
280 int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
281 void *);
282 int (*cm_destroy)(struct cnic_sock *);
283 int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
284 int (*cm_abort)(struct cnic_sock *);
285 int (*cm_close)(struct cnic_sock *);
286 struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
287 int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
288 char *data, u16 data_size);
289 unsigned long flags;
290#define CNIC_F_CNIC_UP 1
291#define CNIC_F_BNX2_CLASS 3
292#define CNIC_F_BNX2X_CLASS 4
293 atomic_t ref_count;
294 u8 mac_addr[6];
295
296 int max_iscsi_conn;
297 int max_fcoe_conn;
298 int max_rdma_conn;
299
300 void *cnic_priv;
301};
302
303#define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
304#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
305#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
306#define CNIC_RD(dev, off) readl(dev->regview + off)
307#define CNIC_RD16(dev, off) readw(dev->regview + off)
308
309struct cnic_ulp_ops {
310 /* Calls to these functions are protected by RCU. When
311 * unregistering, we wait for any calls to complete before
312 * continuing.
313 */
314
315 void (*cnic_init)(struct cnic_dev *dev);
316 void (*cnic_exit)(struct cnic_dev *dev);
317 void (*cnic_start)(void *ulp_ctx);
318 void (*cnic_stop)(void *ulp_ctx);
319 void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
320 u32 num_cqes);
Michael Chan415199f2011-07-20 14:55:24 +0000321 void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
Michael Chana4636962009-06-08 18:14:43 -0700322 void (*cm_connect_complete)(struct cnic_sock *);
323 void (*cm_close_complete)(struct cnic_sock *);
324 void (*cm_abort_complete)(struct cnic_sock *);
325 void (*cm_remote_close)(struct cnic_sock *);
326 void (*cm_remote_abort)(struct cnic_sock *);
Michael Chan939b82e2010-12-23 07:42:58 +0000327 int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
Michael Chana4636962009-06-08 18:14:43 -0700328 char *data, u16 data_size);
329 struct module *owner;
Michael Chan7fc1ece2009-08-14 15:49:47 +0000330 atomic_t ref_count;
Michael Chana4636962009-06-08 18:14:43 -0700331};
332
333extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
334
335extern int cnic_unregister_driver(int ulp_type);
336
Michael Chane2ee3612009-06-13 17:43:02 -0700337extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev);
Michael Chan993ac7b2009-10-10 13:46:56 +0000338extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev);
Michael Chane2ee3612009-06-13 17:43:02 -0700339
Michael Chana4636962009-06-08 18:14:43 -0700340#endif