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Alan Cox7e45b0e2006-09-29 18:30:05 +01001/*
2 * pata_winbond.c - Winbond VLB ATA controllers
3 * (C) 2006 Red Hat <alan@redhat.com>
4 *
5 * Support for the Winbond 83759A when operating in advanced mode.
6 * Multichip mode is not currently supported.
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/pci.h>
12#include <linux/init.h>
13#include <linux/blkdev.h>
14#include <linux/delay.h>
15#include <scsi/scsi_host.h>
16#include <linux/libata.h>
17#include <linux/platform_device.h>
18
19#define DRV_NAME "pata_winbond"
20#define DRV_VERSION "0.0.1"
21
22#define NR_HOST 4 /* Two winbond controllers, two channels each */
23
24struct winbond_data {
25 unsigned long config;
26 struct platform_device *platform_dev;
27};
28
29static struct ata_host *winbond_host[NR_HOST];
30static struct winbond_data winbond_data[NR_HOST];
31static int nr_winbond_host;
32
33#ifdef MODULE
34static int probe_winbond = 1;
35#else
36static int probe_winbond;
37#endif
38
39static spinlock_t winbond_lock = SPIN_LOCK_UNLOCKED;
40
41static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
42{
43 unsigned long flags;
44 spin_lock_irqsave(&winbond_lock, flags);
45 outb(reg, port + 0x01);
46 outb(val, port + 0x02);
47 spin_unlock_irqrestore(&winbond_lock, flags);
48}
49
50static u8 winbond_readcfg(unsigned long port, u8 reg)
51{
52 u8 val;
53
54 unsigned long flags;
55 spin_lock_irqsave(&winbond_lock, flags);
56 outb(reg, port + 0x01);
57 val = inb(port + 0x02);
58 spin_unlock_irqrestore(&winbond_lock, flags);
59
60 return val;
61}
62
63static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
64{
65 struct ata_timing t;
66 struct winbond_data *winbond = ap->host->private_data;
67 int active, recovery;
68 u8 reg;
69 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
70
71 reg = winbond_readcfg(winbond->config, 0x81);
72
73 /* Get the timing data in cycles */
74 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
75 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
76 else
77 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
78
79 active = (FIT(t.active, 3, 17) - 1) & 0x0F;
80 recovery = (FIT(t.recover, 1, 15) + 1) & 0x0F;
81 timing = (active << 4) | recovery;
82 winbond_writecfg(winbond->config, timing, reg);
83
84 /* Load the setup timing */
85
86 reg = 0x35;
87 if (adev->class != ATA_DEV_ATA)
88 reg |= 0x08; /* FIFO off */
89 if (!ata_pio_need_iordy(adev))
90 reg |= 0x02; /* IORDY off */
91 reg |= (FIT(t.setup, 0, 3) << 6);
92 winbond_writecfg(winbond->config, timing + 1, reg);
93}
94
95
96static void winbond_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data)
97{
98 struct ata_port *ap = adev->ap;
99 int slop = buflen & 3;
100
101 if (ata_id_has_dword_io(adev->id)) {
102 if (write_data)
103 outsl(ap->ioaddr.data_addr, buf, buflen >> 2);
104 else
105 insl(ap->ioaddr.data_addr, buf, buflen >> 2);
106
107 if (unlikely(slop)) {
108 u32 pad;
109 if (write_data) {
110 memcpy(&pad, buf + buflen - slop, slop);
111 outl(le32_to_cpu(pad), ap->ioaddr.data_addr);
112 } else {
113 pad = cpu_to_le16(inl(ap->ioaddr.data_addr));
114 memcpy(buf + buflen - slop, &pad, slop);
115 }
116 }
117 } else
118 ata_pio_data_xfer(adev, buf, buflen, write_data);
119}
120
121static struct scsi_host_template winbond_sht = {
122 .module = THIS_MODULE,
123 .name = DRV_NAME,
124 .ioctl = ata_scsi_ioctl,
125 .queuecommand = ata_scsi_queuecmd,
126 .can_queue = ATA_DEF_QUEUE,
127 .this_id = ATA_SHT_THIS_ID,
128 .sg_tablesize = LIBATA_MAX_PRD,
129 .max_sectors = ATA_MAX_SECTORS,
130 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
131 .emulated = ATA_SHT_EMULATED,
132 .use_clustering = ATA_SHT_USE_CLUSTERING,
133 .proc_name = DRV_NAME,
134 .dma_boundary = ATA_DMA_BOUNDARY,
135 .slave_configure = ata_scsi_slave_config,
Tejun Heoc972b602006-11-29 12:10:46 +0900136 .slave_destroy = ata_scsi_slave_destroy,
Alan Cox7e45b0e2006-09-29 18:30:05 +0100137 .bios_param = ata_std_bios_param,
138};
139
140static struct ata_port_operations winbond_port_ops = {
141 .port_disable = ata_port_disable,
142 .set_piomode = winbond_set_piomode,
143
144 .tf_load = ata_tf_load,
145 .tf_read = ata_tf_read,
146 .check_status = ata_check_status,
147 .exec_command = ata_exec_command,
148 .dev_select = ata_std_dev_select,
149
150 .freeze = ata_bmdma_freeze,
151 .thaw = ata_bmdma_thaw,
152 .error_handler = ata_bmdma_error_handler,
153 .post_internal_cmd = ata_bmdma_post_internal_cmd,
154
155 .qc_prep = ata_qc_prep,
156 .qc_issue = ata_qc_issue_prot,
157
158 .data_xfer = winbond_data_xfer,
159
160 .irq_handler = ata_interrupt,
161 .irq_clear = ata_bmdma_irq_clear,
162
163 .port_start = ata_port_start,
164 .port_stop = ata_port_stop,
165 .host_stop = ata_host_stop
166};
167
168/**
169 * winbond_init_one - attach a winbond interface
170 * @type: Type to display
171 * @io: I/O port start
172 * @irq: interrupt line
173 * @fast: True if on a > 33Mhz VLB
174 *
175 * Register a VLB bus IDE interface. Such interfaces are PIO and we
176 * assume do not support IRQ sharing.
177 */
178
179static __init int winbond_init_one(unsigned long port)
180{
181 struct ata_probe_ent ae;
182 struct platform_device *pdev;
183 int ret;
184 u8 reg;
185 int i;
186
187 reg = winbond_readcfg(port, 0x81);
188 reg |= 0x80; /* jumpered mode off */
189 winbond_writecfg(port, 0x81, reg);
190 reg = winbond_readcfg(port, 0x83);
191 reg |= 0xF0; /* local control */
192 winbond_writecfg(port, 0x83, reg);
193 reg = winbond_readcfg(port, 0x85);
194 reg |= 0xF0; /* programmable timing */
195 winbond_writecfg(port, 0x85, reg);
196
197 reg = winbond_readcfg(port, 0x81);
198
199 if (!(reg & 0x03)) /* Disabled */
200 return 0;
201
202 for (i = 0; i < 2 ; i ++) {
203
204 if (reg & (1 << i)) {
205 /*
206 * Fill in a probe structure first of all
207 */
208
209 pdev = platform_device_register_simple(DRV_NAME, nr_winbond_host, NULL, 0);
210 if (pdev == NULL)
211 return -ENOMEM;
212
213 memset(&ae, 0, sizeof(struct ata_probe_ent));
214 INIT_LIST_HEAD(&ae.node);
215 ae.dev = &pdev->dev;
216
217 ae.port_ops = &winbond_port_ops;
218 ae.pio_mask = 0x1F;
219
220 ae.sht = &winbond_sht;
221
222 ae.n_ports = 1;
223 ae.irq = 14 + i;
224 ae.irq_flags = 0;
225 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
226 ae.port[0].cmd_addr = 0x1F0 - (0x80 * i);
227 ae.port[0].altstatus_addr = ae.port[0].cmd_addr + 0x0206;
228 ae.port[0].ctl_addr = ae.port[0].altstatus_addr;
229 ata_std_ports(&ae.port[0]);
230 /*
231 * Hook in a private data structure per channel
232 */
233 ae.private_data = &winbond_data[nr_winbond_host];
234 winbond_data[nr_winbond_host].config = port;
235 winbond_data[nr_winbond_host].platform_dev = pdev;
236
237 ret = ata_device_add(&ae);
238 if (ret == 0) {
239 platform_device_unregister(pdev);
240 return -ENODEV;
241 }
242 winbond_host[nr_winbond_host++] = dev_get_drvdata(&pdev->dev);
243 }
244 }
245
246 return 0;
247}
248
249/**
250 * winbond_init - attach winbond interfaces
251 *
252 * Attach winbond IDE interfaces by scanning the ports it may occupy.
253 */
254
255static __init int winbond_init(void)
256{
257 static const unsigned long config[2] = { 0x130, 0x1B0 };
258
259 int ct = 0;
260 int i;
261
262 if (probe_winbond == 0)
263 return -ENODEV;
264
265 /*
266 * Check both base addresses
267 */
268
269 for (i = 0; i < 2; i++) {
270 if (probe_winbond & (1<<i)) {
271 int ret = 0;
272 unsigned long port = config[i];
273
274 if (request_region(port, 2, "pata_winbond")) {
275 ret = winbond_init_one(port);
276 if(ret <= 0)
277 release_region(port, 2);
278 else ct+= ret;
279 }
280 }
281 }
282 if (ct != 0)
283 return 0;
284 return -ENODEV;
285}
286
287static __exit void winbond_exit(void)
288{
289 int i;
290
291 for (i = 0; i < nr_winbond_host; i++) {
292 ata_host_remove(winbond_host[i]);
293 release_region(winbond_data[i].config, 2);
294 platform_device_unregister(winbond_data[i].platform_dev);
295 }
296}
297
298MODULE_AUTHOR("Alan Cox");
299MODULE_DESCRIPTION("low-level driver for Winbond VL ATA");
300MODULE_LICENSE("GPL");
301MODULE_VERSION(DRV_VERSION);
302
303module_init(winbond_init);
304module_exit(winbond_exit);
305
306module_param(probe_winbond, int, 0);
307