blob: 4b28261c66f5cd0ba941a103cef640c148c75d89 [file] [log] [blame]
Michael Hennerichdc26aec2008-11-18 17:48:22 +08001/*
2 * File: arch/blackfin/mach-bf538/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/irq.h>
38#include <linux/interrupt.h>
39#include <asm/bfin5xx_spi.h>
40#include <asm/dma.h>
41#include <asm/gpio.h>
42#include <asm/nand.h>
43#include <asm/portmux.h>
44#include <asm/dpmc.h>
45#include <linux/input.h>
46
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080050const char bfin_board_name[] = "ADI BF538-EZKIT";
Michael Hennerichdc26aec2008-11-18 17:48:22 +080051
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
56
57#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
58static struct platform_device rtc_device = {
59 .name = "rtc-bfin",
60 .id = -1,
61};
62#endif
63
64#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
65static struct resource bfin_uart_resources[] = {
66#ifdef CONFIG_SERIAL_BFIN_UART0
67 {
68 .start = 0xFFC00400,
69 .end = 0xFFC004FF,
70 .flags = IORESOURCE_MEM,
71 },
72#endif
73#ifdef CONFIG_SERIAL_BFIN_UART1
74 {
75 .start = 0xFFC02000,
76 .end = 0xFFC020FF,
77 .flags = IORESOURCE_MEM,
78 },
79#endif
80#ifdef CONFIG_SERIAL_BFIN_UART2
81 {
82 .start = 0xFFC02100,
83 .end = 0xFFC021FF,
84 .flags = IORESOURCE_MEM,
85 },
86#endif
87};
88
89static struct platform_device bfin_uart_device = {
90 .name = "bfin-uart",
91 .id = 1,
92 .num_resources = ARRAY_SIZE(bfin_uart_resources),
93 .resource = bfin_uart_resources,
94};
95#endif
96
97#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
98static struct resource bfin_sir_resources[] = {
99#ifdef CONFIG_BFIN_SIR0
100 {
101 .start = 0xFFC00400,
102 .end = 0xFFC004FF,
103 .flags = IORESOURCE_MEM,
104 },
105#endif
106#ifdef CONFIG_BFIN_SIR1
107 {
108 .start = 0xFFC02000,
109 .end = 0xFFC020FF,
110 .flags = IORESOURCE_MEM,
111 },
112#endif
113#ifdef CONFIG_BFIN_SIR2
114 {
115 .start = 0xFFC02100,
116 .end = 0xFFC021FF,
117 .flags = IORESOURCE_MEM,
118 },
119#endif
120};
121
122static struct platform_device bfin_sir_device = {
123 .name = "bfin_sir",
124 .id = 0,
125 .num_resources = ARRAY_SIZE(bfin_sir_resources),
126 .resource = bfin_sir_resources,
127};
128#endif
129
130/*
131 * USB-LAN EzExtender board
132 * Driver needs to know address, irq and flag pin.
133 */
134#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
135static struct resource smc91x_resources[] = {
136 {
137 .name = "smc91x-regs",
138 .start = 0x20310300,
139 .end = 0x20310300 + 16,
140 .flags = IORESOURCE_MEM,
141 }, {
142 .start = IRQ_PF0,
143 .end = IRQ_PF0,
144 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
145 },
146};
147static struct platform_device smc91x_device = {
148 .name = "smc91x",
149 .id = 0,
150 .num_resources = ARRAY_SIZE(smc91x_resources),
151 .resource = smc91x_resources,
152};
153#endif
154
155#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
156/* all SPI peripherals info goes here */
157#if defined(CONFIG_MTD_M25P80) \
158 || defined(CONFIG_MTD_M25P80_MODULE)
159/* SPI flash chip (m25p16) */
160static struct mtd_partition bfin_spi_flash_partitions[] = {
161 {
162 .name = "bootloader(spi)",
163 .size = 0x00040000,
164 .offset = 0,
165 .mask_flags = MTD_CAP_ROM
166 }, {
167 .name = "linux kernel(spi)",
168 .size = 0x1c0000,
169 .offset = 0x40000
170 }
171};
172
173static struct flash_platform_data bfin_spi_flash_data = {
174 .name = "m25p80",
175 .parts = bfin_spi_flash_partitions,
176 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
177 .type = "m25p16",
178};
179
180static struct bfin5xx_spi_chip spi_flash_chip_info = {
181 .enable_dma = 0, /* use dma transfer with this chip*/
182 .bits_per_word = 8,
183 .cs_change_per_word = 0,
184};
185#endif
186
187#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
188#include <linux/spi/ad7879.h>
189static const struct ad7879_platform_data bfin_ad7879_ts_info = {
190 .model = 7879, /* Model = AD7879 */
191 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
192 .pressure_max = 10000,
193 .pressure_min = 0,
194 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
195 .acquisition_time = 1, /* 4us acquisition time per sample */
196 .median = 2, /* do 8 measurements */
197 .averaging = 1, /* take the average of 4 middle samples */
198 .pen_down_acc_interval = 255, /* 9.4 ms */
199 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
200 .gpio_default = 1, /* During initialization set GPIO = HIGH */
201};
202#endif
203
204#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
205static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
206 .enable_dma = 0,
207 .bits_per_word = 16,
208};
209#endif
210
211#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
212#include <asm/bfin-lq035q1.h>
213
214static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
215 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
216 .use_bl = 0, /* let something else control the LCD Blacklight */
217 .gpio_bl = GPIO_PF7,
218};
219
220static struct resource bfin_lq035q1_resources[] = {
221 {
222 .start = IRQ_PPI_ERROR,
223 .end = IRQ_PPI_ERROR,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct platform_device bfin_lq035q1_device = {
229 .name = "bfin-lq035q1",
230 .id = -1,
231 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
232 .resource = bfin_lq035q1_resources,
233 .dev = {
234 .platform_data = &bfin_lq035q1_data,
235 },
236};
237#endif
238
239#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
240static struct bfin5xx_spi_chip spidev_chip_info = {
241 .enable_dma = 0,
242 .bits_per_word = 8,
243};
244#endif
245
246#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
247static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
248 .enable_dma = 0,
249 .bits_per_word = 8,
250};
251#endif
252
253static struct spi_board_info bf538_spi_board_info[] __initdata = {
254#if defined(CONFIG_MTD_M25P80) \
255 || defined(CONFIG_MTD_M25P80_MODULE)
256 {
257 /* the modalias must be the same as spi device driver name */
258 .modalias = "m25p80", /* Name of spi_driver for this device */
259 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
260 .bus_num = 0, /* Framework bus number */
261 .chip_select = 1, /* SPI_SSEL1*/
262 .platform_data = &bfin_spi_flash_data,
263 .controller_data = &spi_flash_chip_info,
264 .mode = SPI_MODE_3,
265 },
266#endif
267#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
268 {
269 .modalias = "ad7879",
270 .platform_data = &bfin_ad7879_ts_info,
271 .irq = IRQ_PF3,
272 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
273 .bus_num = 0,
274 .chip_select = 1,
275 .controller_data = &spi_ad7879_chip_info,
276 .mode = SPI_CPHA | SPI_CPOL,
277 },
278#endif
279#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
280 {
281 .modalias = "bfin-lq035q1-spi",
282 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
283 .bus_num = 0,
284 .chip_select = 2,
285 .controller_data = &lq035q1_spi_chip_info,
286 .mode = SPI_CPHA | SPI_CPOL,
287 },
288#endif
289#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
290 {
291 .modalias = "spidev",
292 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
293 .bus_num = 0,
294 .chip_select = 1,
295 .controller_data = &spidev_chip_info,
296 },
297#endif
298};
299
300/* SPI (0) */
301static struct resource bfin_spi0_resource[] = {
302 [0] = {
303 .start = SPI0_REGBASE,
304 .end = SPI0_REGBASE + 0xFF,
305 .flags = IORESOURCE_MEM,
306 },
307 [1] = {
308 .start = CH_SPI0,
309 .end = CH_SPI0,
310 .flags = IORESOURCE_IRQ,
311 }
312};
313
314/* SPI (1) */
315static struct resource bfin_spi1_resource[] = {
316 [0] = {
317 .start = SPI1_REGBASE,
318 .end = SPI1_REGBASE + 0xFF,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = {
322 .start = CH_SPI1,
323 .end = CH_SPI1,
324 .flags = IORESOURCE_IRQ,
325 }
326};
327
328/* SPI (2) */
329static struct resource bfin_spi2_resource[] = {
330 [0] = {
331 .start = SPI2_REGBASE,
332 .end = SPI2_REGBASE + 0xFF,
333 .flags = IORESOURCE_MEM,
334 },
335 [1] = {
336 .start = CH_SPI2,
337 .end = CH_SPI2,
338 .flags = IORESOURCE_IRQ,
339 }
340};
341
342/* SPI controller data */
343static struct bfin5xx_spi_master bf538_spi_master_info0 = {
344 .num_chipselect = 8,
345 .enable_dma = 1, /* master has the ability to do dma transfer */
346 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
347};
348
349static struct platform_device bf538_spi_master0 = {
350 .name = "bfin-spi",
351 .id = 0, /* Bus number */
352 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
353 .resource = bfin_spi0_resource,
354 .dev = {
355 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
356 },
357};
358
359static struct bfin5xx_spi_master bf538_spi_master_info1 = {
360 .num_chipselect = 8,
361 .enable_dma = 1, /* master has the ability to do dma transfer */
362 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
363};
364
365static struct platform_device bf538_spi_master1 = {
366 .name = "bfin-spi",
367 .id = 1, /* Bus number */
368 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
369 .resource = bfin_spi1_resource,
370 .dev = {
371 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
372 },
373};
374
375static struct bfin5xx_spi_master bf538_spi_master_info2 = {
376 .num_chipselect = 8,
377 .enable_dma = 1, /* master has the ability to do dma transfer */
378 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
379};
380
381static struct platform_device bf538_spi_master2 = {
382 .name = "bfin-spi",
383 .id = 2, /* Bus number */
384 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
385 .resource = bfin_spi2_resource,
386 .dev = {
387 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
388 },
389};
390
391#endif /* spi master and devices */
392
393#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
394static struct resource bfin_twi0_resource[] = {
395 [0] = {
396 .start = TWI0_REGBASE,
397 .end = TWI0_REGBASE + 0xFF,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = IRQ_TWI0,
402 .end = IRQ_TWI0,
403 .flags = IORESOURCE_IRQ,
404 },
405};
406
407static struct platform_device i2c_bfin_twi0_device = {
408 .name = "i2c-bfin-twi",
409 .id = 0,
410 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
411 .resource = bfin_twi0_resource,
412};
413
414#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
415static struct resource bfin_twi1_resource[] = {
416 [0] = {
417 .start = TWI1_REGBASE,
418 .end = TWI1_REGBASE + 0xFF,
419 .flags = IORESOURCE_MEM,
420 },
421 [1] = {
422 .start = IRQ_TWI1,
423 .end = IRQ_TWI1,
424 .flags = IORESOURCE_IRQ,
425 },
426};
427
428static struct platform_device i2c_bfin_twi1_device = {
429 .name = "i2c-bfin-twi",
430 .id = 1,
431 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
432 .resource = bfin_twi1_resource,
433};
434#endif
435#endif
436
Mike Frysingerc97618d2009-01-07 23:14:38 +0800437static struct resource bfin_gpios_resources = {
438 .start = 0,
439 .end = MAX_BLACKFIN_GPIOS - 1,
440 .flags = IORESOURCE_IRQ,
441};
442
443static struct platform_device bfin_gpios_device = {
444 .name = "simple-gpio",
445 .id = -1,
446 .num_resources = 1,
447 .resource = &bfin_gpios_resources,
448};
449
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800450#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
451#include <linux/gpio_keys.h>
452
453static struct gpio_keys_button bfin_gpio_keys_table[] = {
454 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
455};
456
457static struct gpio_keys_platform_data bfin_gpio_keys_data = {
458 .buttons = bfin_gpio_keys_table,
459 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
460};
461
462static struct platform_device bfin_device_gpiokeys = {
463 .name = "gpio-keys",
464 .dev = {
465 .platform_data = &bfin_gpio_keys_data,
466 },
467};
468#endif
469
470static const unsigned int cclk_vlev_datasheet[] =
471{
472/*
473 * Internal VLEV BF538SBBC1533
474 ****temporarily using these values until data sheet is updated
475 */
476 VRPAIR(VLEV_100, 150000000),
477 VRPAIR(VLEV_100, 250000000),
478 VRPAIR(VLEV_110, 276000000),
479 VRPAIR(VLEV_115, 301000000),
480 VRPAIR(VLEV_120, 525000000),
481 VRPAIR(VLEV_125, 550000000),
482 VRPAIR(VLEV_130, 600000000),
483};
484
485static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
486 .tuple_tab = cclk_vlev_datasheet,
487 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
488 .vr_settling_time = 25 /* us */,
489};
490
491static struct platform_device bfin_dpmc = {
492 .name = "bfin dpmc",
493 .dev = {
494 .platform_data = &bfin_dmpc_vreg_data,
495 },
496};
497
498static struct platform_device *cm_bf538_devices[] __initdata = {
499
500 &bfin_dpmc,
501
502#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
503 &rtc_device,
504#endif
505
506#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
507 &bfin_uart_device,
508#endif
509
510#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
511 &bf538_spi_master0,
512 &bf538_spi_master1,
513 &bf538_spi_master2,
514#endif
515
516#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
517 &i2c_bfin_twi0_device,
518 &i2c_bfin_twi1_device,
519#endif
520
521#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
522 &bfin_sir_device,
523#endif
524
525#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
526 &smc91x_device,
527#endif
528
529#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
530 &bfin_lq035q1_device,
531#endif
532
533#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
534 &bfin_device_gpiokeys,
535#endif
Mike Frysingerc97618d2009-01-07 23:14:38 +0800536
537 &bfin_gpios_device,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800538};
539
540static int __init ezkit_init(void)
541{
542 printk(KERN_INFO "%s(): registering device resources\n", __func__);
543 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
544
545#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
546 spi_register_board_info(bf538_spi_board_info,
547 ARRAY_SIZE(bf538_spi_board_info));
548#endif
549
550 return 0;
551}
552
553arch_initcall(ezkit_init);