Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 1 | /* |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * NO LICENSE TO ANY ALACRITECH PATENT CLAIM IS GRANTED BY ANY COPYRIGHT |
| 30 | * LICENSE TO THIS OR OTHER SOFTWARE. THIS SOFTWARE MAY BE COVERED BY |
| 31 | * ALACRITECH PATENTS INCLUDING BUT NOT LIMITED TO U.S. PATENT NOS. 6,226,680, |
| 32 | * 6,247,060, 6,334,153, 6,389,479, 6,393,487, 6,427,171, 6,427,173 |
| 33 | * and 6,434,620. |
| 34 | * THIS SOFTWARE IS NOT SUBJECT TO THE GNU GENERAL PUBLIC LICENSE (GPL). |
| 35 | * |
| 36 | * The views and conclusions contained in the software and |
| 37 | * documentation are those of the authors and should not be |
| 38 | * interpreted as representing official policies, either |
| 39 | * expressed or implied, of Alacritech, Inc. |
| 40 | */ |
| 41 | #ifndef _SLIC_DUMP_H_ |
| 42 | #define _SLIC_DUMP_H_ |
| 43 | |
| 44 | #define DEBUG_SUCCESS 0 |
| 45 | |
| 46 | /*********************************************************************** |
| 47 | * |
| 48 | * Utility processor register locations |
| 49 | * |
| 50 | **********************************************************************/ |
| 51 | #define UTILITY_RESET 0x0 |
| 52 | #define UTILITY_ISP_ADDR 0x4 /* Interrupt status Pointer */ |
| 53 | #define UTILITY_ISR_ADDR 0x8 /* Interrupt status Register */ |
| 54 | #define UTILITY_ICR_ADDR 0xc /* Interrupt Control Register */ |
| 55 | #define UTILITY_CPR_ADDR 0x10 /* Command Pointer Register */ |
| 56 | #define UTILITY_DPR_ADDR 0x14 /* Data Pointer Register */ |
| 57 | #define UTILITY_DMP_TRQ 0x18 /* Dump queue onto ALU for analyser */ |
| 58 | #define UTILITY_UPP_ADDR 0x1c /* Bits 63-32 of cmd/data pointer */ |
| 59 | |
| 60 | /*********************************************************************** |
| 61 | * |
| 62 | * INIC status register bits |
| 63 | * |
| 64 | ***********************************************************************/ |
| 65 | #define SLIC_ISR_CC 0x10000000 /* Command complete - synchronous */ |
| 66 | #define SLIC_ISR_ERR 0x01000000 /* Command Error - synchronous */ |
| 67 | #define SLIC_ISR_CMD_MASK 0x11000000 /* Command status mask */ |
| 68 | #define SLIC_ISR_TPH 0x00080000 /* Transmit processor halted - async */ |
| 69 | #define SLIC_ISR_RPH 0x00040000 /* Receive processor halted - async */ |
| 70 | |
| 71 | /*********************************************************************** |
| 72 | * |
| 73 | * INIC Control register values |
| 74 | * |
| 75 | ***********************************************************************/ |
| 76 | #define SLIC_ICR_OFF 0 /* Interrupts disabled */ |
| 77 | #define SLIC_ICR_ON 1 /* Interrupts enabled */ |
| 78 | #define SLIC_ICR_MASK 2 /* Interrupts masked */ |
| 79 | |
| 80 | #define WRITE_DREG(reg, value, flush) \ |
| 81 | { \ |
| 82 | writel((value), (reg)); \ |
| 83 | if ((flush)) { \ |
| 84 | mb(); \ |
| 85 | } \ |
| 86 | } |
| 87 | |
| 88 | /************************************************************************ |
| 89 | * |
| 90 | * Command Format |
| 91 | * |
| 92 | * Each command contains a command byte which is defined as follows: |
| 93 | * |
| 94 | * bits: 7-3 2 1-0 |
| 95 | * ---------------------------------------------- |
| 96 | * command Alt. Proc Processor |
| 97 | * |
| 98 | ************************************************************************/ |
| 99 | |
| 100 | /* |
| 101 | * Macro to create the command byte given the command, Alt. Proc, and |
| 102 | * Processor values. Note that the macro assumes that the values are |
| 103 | * preshifted. That is, the values for alt. proc are 0 for transmit and |
| 104 | * 4 for receive. |
| 105 | */ |
| 106 | #define COMMAND_BYTE(command, alt_proc, proc) ((command) | (alt_proc) | (proc)) |
| 107 | |
| 108 | /* |
| 109 | * Command values |
| 110 | */ |
| 111 | #define CMD_HALT 0x0 /* Send a halt to the INIC */ |
| 112 | #define CMD_RUN 0x8 /* Start the halted INIC */ |
| 113 | #define CMD_STEP 0x10 /* Single step the inic */ |
| 114 | #define CMD_BREAK 0x18 /* Set a breakpoint - 8 byte command */ |
| 115 | #define CMD_RESET_BREAK 0x20 /* Reset a breakpoint - 8 byte cmd */ |
| 116 | #define CMD_DUMP 0x28 /* Dump INIC memory - 8 byte command */ |
| 117 | #define CMD_LOAD 0x30 /* Load INIC memory - 8 byte command */ |
| 118 | #define CMD_MAP 0x38 /* Map out a ROM instruction - 8 BC */ |
| 119 | #define CMD_CAM_OPS 0x38 /* perform ops on specific CAM */ |
| 120 | #define CMD_XMT 0x40 /* Transmit frame */ |
| 121 | #define CMD_RCV 0x48 /* Receive frame */ |
| 122 | |
| 123 | /* |
| 124 | * Alt. Proc values |
| 125 | * |
| 126 | * When the proc value is set to the utility processor, the Alt. Proc |
| 127 | * specifies which processor handles the debugging. |
| 128 | */ |
| 129 | #define ALT_PROC_TRANSMIT 0x0 |
| 130 | #define ALT_PROC_RECEIVE 0x4 |
| 131 | |
| 132 | /* |
| 133 | * Proc values |
| 134 | */ |
| 135 | #define PROC_INVALID 0x0 |
| 136 | #define PROC_NONE 0x0 /* Gigabit use */ |
| 137 | #define PROC_TRANSMIT 0x1 |
| 138 | #define PROC_RECEIVE 0x2 |
| 139 | #define PROC_UTILITY 0x3 |
| 140 | |
| 141 | /****************************************************************** |
| 142 | * |
| 143 | * 8 byte command structure definitions |
| 144 | * |
| 145 | ******************************************************************/ |
| 146 | |
| 147 | /* |
| 148 | * Break and Reset Break command structure |
| 149 | */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 150 | struct BREAK { |
| 151 | unsigned char command; /* Command word defined above */ |
| 152 | unsigned char resvd; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 153 | ushort count; /* Number of executions before break */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 154 | u32 addr; /* Address of break point */ |
| 155 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 156 | |
| 157 | /* |
| 158 | * Dump and Load command structure |
| 159 | */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 160 | struct dump_cmd { |
| 161 | unsigned char cmd; /* Command word defined above */ |
| 162 | unsigned char desc; /* Descriptor values - defined below */ |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 163 | ushort count; /* number of 4 byte words to be transferred */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 164 | u32 addr; /* start address of dump or load */ |
| 165 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 166 | |
| 167 | /* |
| 168 | * Receive or Transmit a frame. |
| 169 | */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 170 | struct RCV_OR_XMT_FRAME { |
| 171 | unsigned char command; /* Command word defined above */ |
| 172 | unsigned char MacId; /* Mac ID of interface - transmit only */ |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 173 | ushort count; /* Length of frame in bytes */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 174 | u32 pad; /* not used */ |
| 175 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 176 | |
| 177 | /* |
| 178 | * Values of desc field in DUMP_OR_LOAD structure |
| 179 | */ |
| 180 | #define DESC_RFILE 0x0 /* Register file */ |
| 181 | #define DESC_SRAM 0x1 /* SRAM */ |
| 182 | #define DESC_DRAM 0x2 /* DRAM */ |
| 183 | #define DESC_QUEUE 0x3 /* queues */ |
| 184 | #define DESC_REG 0x4 /* General registers (pc, status, etc) */ |
| 185 | #define DESC_SENSE 0x5 /* Sense register */ |
| 186 | |
| 187 | /* Descriptor field definitions for CMD_DUMP_CAM */ |
| 188 | #define DUMP_CAM_A 0 |
| 189 | #define DUMP_CAM_B 1 /* unused at present */ |
| 190 | #define DUMP_CAM_C 2 |
| 191 | #define DUMP_CAM_D 3 |
| 192 | #define SEARCH_CAM_A 4 |
| 193 | #define SEARCH_CAM_C 5 |
| 194 | |
| 195 | /* |
| 196 | * Map command to replace a command in ROM with a command in WCS |
| 197 | */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 198 | struct MAP { |
| 199 | unsigned char command; /* Command word defined above */ |
| 200 | unsigned char not_used[3]; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 201 | ushort map_to; /* Instruction address in WCS */ |
| 202 | ushort map_out; /* Instruction address in ROM */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 203 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 204 | |
| 205 | /* |
| 206 | * Misc definitions |
| 207 | */ |
| 208 | #define SLIC_MAX_QUEUE 32 /* Total # of queues on the INIC (0-31)*/ |
| 209 | #define SLIC_4MAX_REG 512 /* Total # of 4-port file-registers */ |
| 210 | #define SLIC_1MAX_REG 384 /* Total # of file-registers */ |
| 211 | #define SLIC_GBMAX_REG 1024 /* Total # of Gbit file-registers */ |
| 212 | #define SLIC_NUM_REG 32 /* non-file-registers = NUM_REG in tm-simba.h */ |
| 213 | #define SLIC_GB_CAMA_SZE 32 |
| 214 | #define SLIC_GB_CAMB_SZE 16 |
| 215 | #define SLIC_GB_CAMAB_SZE 32 |
| 216 | #define SLIC_GB_CAMC_SZE 16 |
| 217 | #define SLIC_GB_CAMD_SZE 16 |
| 218 | #define SLIC_GB_CAMCD_SZE 32 |
| 219 | |
| 220 | /* |
| 221 | * Coredump header structure |
| 222 | */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 223 | struct CORE_Q { |
| 224 | u32 queueOff; /* Offset of queue */ |
| 225 | u32 queuesize; /* size of queue */ |
| 226 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 227 | |
| 228 | #define DRIVER_NAME_SIZE 32 |
| 229 | |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 230 | struct sliccore_hdr { |
Lior Dotan | 68cf95f | 2008-10-07 14:14:04 +0200 | [diff] [blame] | 231 | unsigned char driver_version[DRIVER_NAME_SIZE]; /* Driver version string */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 232 | u32 RcvRegOff; /* Offset of receive registers */ |
| 233 | u32 RcvRegsize; /* size of receive registers */ |
| 234 | u32 XmtRegOff; /* Offset of transmit registers */ |
| 235 | u32 XmtRegsize; /* size of transmit registers */ |
| 236 | u32 FileRegOff; /* Offset of register file */ |
| 237 | u32 FileRegsize; /* size of register file */ |
| 238 | u32 SramOff; /* Offset of Sram */ |
| 239 | u32 Sramsize; /* size of Sram */ |
| 240 | u32 DramOff; /* Offset of Dram */ |
| 241 | u32 Dramsize; /* size of Dram */ |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 242 | CORE_Q queues[SLIC_MAX_QUEUE]; /* size and offsets of queues */ |
Lior Dotan | e9eff9d | 2008-10-04 07:10:28 +0300 | [diff] [blame] | 243 | u32 CamAMOff; /* Offset of CAM A contents */ |
| 244 | u32 CamASize; /* Size of Cam A */ |
| 245 | u32 CamBMOff; /* Offset of CAM B contents */ |
| 246 | u32 CamBSize; /* Size of Cam B */ |
| 247 | u32 CamCMOff; /* Offset of CAM C contents */ |
| 248 | u32 CamCSize; /* Size of Cam C */ |
| 249 | u32 CamDMOff; /* Offset of CAM D contents */ |
| 250 | u32 CamDSize; /* Size of Cam D */ |
| 251 | }; |
Greg Kroah-Hartman | 4d6f6af | 2008-03-19 14:27:25 -0700 | [diff] [blame] | 252 | |
| 253 | /* |
| 254 | * definitions needed for our kernel-mode gdb stub. |
| 255 | */ |
| 256 | /*********************************************************************** |
| 257 | * |
| 258 | * Definitions & Typedefs |
| 259 | * |
| 260 | **********************************************************************/ |
| 261 | #define BUFMAX 0x20000 /* 128k - size of input/output buffer */ |
| 262 | #define BUFMAXP2 5 /* 2**5 (32) 4K pages */ |
| 263 | |
| 264 | #define IOCTL_SIMBA_BREAK _IOW('s', 0, unsigned long) |
| 265 | /* #define IOCTL_SIMBA_INIT _IOW('s', 1, unsigned long) */ |
| 266 | #define IOCTL_SIMBA_KILL_TGT_PROC _IOW('s', 2, unsigned long) |
| 267 | |
| 268 | /*********************************************************************** |
| 269 | * |
| 270 | * Global variables |
| 271 | * |
| 272 | ***********************************************************************/ |
| 273 | |
| 274 | #define THREADRECEIVE 1 /* bit 0 of StoppedThreads */ |
| 275 | #define THREADTRANSMIT 2 /* bit 1 of StoppedThreads */ |
| 276 | #define THREADBOTH 3 /* bit 0 and 1.. */ |
| 277 | |
| 278 | #endif /* _SLIC_DUMP_H */ |