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Christian Daudt8ac49e02012-11-19 09:46:10 -08001/*
Markus Mayere3b62ff2013-08-02 13:12:21 -07002 * Copyright (C) 2012-2013 Broadcom Corporation
Christian Daudt8ac49e02012-11-19 09:46:10 -08003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Matt Porter5401cc42013-06-06 01:41:35 -040014#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
Matt Porter74375652013-06-06 01:41:34 -040017#include "skeleton.dtsi"
Christian Daudt8ac49e02012-11-19 09:46:10 -080018
19/ {
20 model = "BCM11351 SoC";
Christian Daudt15e22dd2013-07-30 16:27:10 -070021 compatible = "brcm,bcm11351";
Christian Daudt8ac49e02012-11-19 09:46:10 -080022 interrupt-parent = <&gic>;
23
24 chosen {
25 bootargs = "console=ttyS0,115200n8";
26 };
27
28 gic: interrupt-controller@3ff00100 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 #address-cells = <0>;
32 interrupt-controller;
33 reg = <0x3ff01000 0x1000>,
34 <0x3ff00100 0x100>;
35 };
36
Christian Daudt7f6c62e2013-03-13 15:05:37 -070037 smc@0x3404c000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070038 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
Matt Porterd22dc5e2013-06-11 14:45:58 -040039 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
Christian Daudt7f6c62e2013-03-13 15:05:37 -070040 };
41
Christian Daudt8ac49e02012-11-19 09:46:10 -080042 uart@3e000000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070043 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
Christian Daudt8ac49e02012-11-19 09:46:10 -080044 status = "disabled";
45 reg = <0x3e000000 0x1000>;
Tim Kryger740309b2013-12-05 11:20:38 -080046 clocks = <&uartb_clk>;
Matt Porter5401cc42013-06-06 01:41:35 -040047 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080048 reg-shift = <2>;
49 reg-io-width = <4>;
50 };
51
Tim Kryger84491c02013-09-23 10:49:57 -070052 uart@3e001000 {
53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
54 status = "disabled";
55 reg = <0x3e001000 0x1000>;
Tim Kryger740309b2013-12-05 11:20:38 -080056 clocks = <&uartb2_clk>;
Tim Kryger84491c02013-09-23 10:49:57 -070057 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 };
61
62 uart@3e002000 {
63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
64 status = "disabled";
65 reg = <0x3e002000 0x1000>;
Tim Kryger740309b2013-12-05 11:20:38 -080066 clocks = <&uartb3_clk>;
Tim Kryger84491c02013-09-23 10:49:57 -070067 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
68 reg-shift = <2>;
69 reg-io-width = <4>;
70 };
71
72 uart@3e003000 {
73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
74 status = "disabled";
75 reg = <0x3e003000 0x1000>;
Tim Kryger740309b2013-12-05 11:20:38 -080076 clocks = <&uartb4_clk>;
Tim Kryger84491c02013-09-23 10:49:57 -070077 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
78 reg-shift = <2>;
79 reg-io-width = <4>;
80 };
81
Christian Daudt8ac49e02012-11-19 09:46:10 -080082 L2: l2-cache {
Christian Daudt15e22dd2013-07-30 16:27:10 -070083 compatible = "brcm,bcm11351-a2-pl310-cache";
Christian Daudt3b656fe2013-05-09 22:21:01 +010084 reg = <0x3ff20000 0x1000>;
85 cache-unified;
86 cache-level = <2>;
Christian Daudt8ac49e02012-11-19 09:46:10 -080087 };
Christian Daudt5f03dc22013-03-13 14:27:28 -070088
Markus Mayere3b62ff2013-08-02 13:12:21 -070089 watchdog@35002f40 {
90 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
91 reg = <0x35002f40 0x6c>;
92 };
93
Christian Daudt5f03dc22013-03-13 14:27:28 -070094 timer@35006000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -070095 compatible = "brcm,kona-timer";
Christian Daudt5f03dc22013-03-13 14:27:28 -070096 reg = <0x35006000 0x1000>;
Matt Porter5401cc42013-06-06 01:41:35 -040097 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
Tim Kryger788db612013-12-05 11:20:44 -080098 clocks = <&hub_timer_clk>;
Christian Daudt5f03dc22013-03-13 14:27:28 -070099 };
100
Markus Mayerd394c7b2013-09-10 11:07:03 -0700101 gpio: gpio@35003000 {
102 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
103 reg = <0x35003000 0x800>;
104 interrupts =
105 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
106 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
107 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
108 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
109 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
110 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
111 #gpio-cells = <2>;
112 #interrupt-cells = <2>;
113 gpio-controller;
114 interrupt-controller;
115 };
116
Christian Daudtd7358f82013-08-07 22:37:47 -0700117 sdio1: sdio@3f180000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700118 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700119 reg = <0x3f180000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
Tim Kryger92f5d822013-12-05 11:20:40 -0800121 clocks = <&sdio1_clk>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700122 status = "disabled";
123 };
124
Christian Daudtd7358f82013-08-07 22:37:47 -0700125 sdio2: sdio@3f190000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700126 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700127 reg = <0x3f190000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400128 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
Tim Kryger92f5d822013-12-05 11:20:40 -0800129 clocks = <&sdio2_clk>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700130 status = "disabled";
131 };
132
Christian Daudtd7358f82013-08-07 22:37:47 -0700133 sdio3: sdio@3f1a0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700134 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700135 reg = <0x3f1a0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400136 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
Tim Kryger92f5d822013-12-05 11:20:40 -0800137 clocks = <&sdio3_clk>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700138 status = "disabled";
139 };
140
Christian Daudtd7358f82013-08-07 22:37:47 -0700141 sdio4: sdio@3f1b0000 {
Christian Daudt15e22dd2013-07-30 16:27:10 -0700142 compatible = "brcm,kona-sdhci";
Christian Daudt2dbfe742013-05-10 00:10:07 -0700143 reg = <0x3f1b0000 0x10000>;
Matt Porter9c0dae02013-09-19 13:18:26 -0400144 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
Tim Kryger92f5d822013-12-05 11:20:40 -0800145 clocks = <&sdio4_clk>;
Christian Daudt2dbfe742013-05-10 00:10:07 -0700146 status = "disabled";
147 };
148
Sherman Yin67a57be2013-12-20 18:13:36 -0800149 pinctrl@35004800 {
Sherman Yina2530062014-01-23 12:44:47 -0800150 compatible = "brcm,bcm11351-pinctrl";
Sherman Yin67a57be2013-12-20 18:13:36 -0800151 reg = <0x35004800 0x430>;
152 };
Linus Torvaldsf8a504c2014-01-30 18:08:27 -0800153
Tim Krygerdfc4334b2013-12-06 15:45:27 -0800154 i2c@3e016000 {
155 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
156 reg = <0x3e016000 0x80>;
157 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
158 #address-cells = <1>;
159 #size-cells = <0>;
160 clocks = <&bsc1_clk>;
161 status = "disabled";
162 };
163
164 i2c@3e017000 {
165 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
166 reg = <0x3e017000 0x80>;
167 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 clocks = <&bsc2_clk>;
171 status = "disabled";
172 };
173
174 i2c@3e018000 {
175 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
176 reg = <0x3e018000 0x80>;
177 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 clocks = <&bsc3_clk>;
181 status = "disabled";
182 };
183
184 i2c@3500d000 {
185 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
186 reg = <0x3500d000 0x80>;
187 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 clocks = <&pmu_bsc_clk>;
191 status = "disabled";
192 };
193
Tim Kryger0bd898b2013-12-05 11:20:37 -0800194 clocks {
195 bsc1_clk: bsc1 {
196 compatible = "fixed-clock";
197 clock-frequency = <13000000>;
198 #clock-cells = <0>;
199 };
200
201 bsc2_clk: bsc2 {
202 compatible = "fixed-clock";
203 clock-frequency = <13000000>;
204 #clock-cells = <0>;
205 };
206
207 bsc3_clk: bsc3 {
208 compatible = "fixed-clock";
209 clock-frequency = <13000000>;
210 #clock-cells = <0>;
211 };
212
213 pmu_bsc_clk: pmu_bsc {
214 compatible = "fixed-clock";
215 clock-frequency = <13000000>;
216 #clock-cells = <0>;
217 };
218
219 hub_timer_clk: hub_timer {
220 compatible = "fixed-clock";
221 clock-frequency = <32768>;
222 #clock-cells = <0>;
223 };
224
225 pwm_clk: pwm {
226 compatible = "fixed-clock";
227 clock-frequency = <26000000>;
228 #clock-cells = <0>;
229 };
230
231 sdio1_clk: sdio1 {
232 compatible = "fixed-clock";
233 clock-frequency = <48000000>;
234 #clock-cells = <0>;
235 };
236
237 sdio2_clk: sdio2 {
238 compatible = "fixed-clock";
239 clock-frequency = <48000000>;
240 #clock-cells = <0>;
241 };
242
243 sdio3_clk: sdio3 {
244 compatible = "fixed-clock";
245 clock-frequency = <48000000>;
246 #clock-cells = <0>;
247 };
248
249 sdio4_clk: sdio4 {
250 compatible = "fixed-clock";
251 clock-frequency = <48000000>;
252 #clock-cells = <0>;
253 };
254
255 tmon_1m_clk: tmon_1m {
256 compatible = "fixed-clock";
257 clock-frequency = <1000000>;
258 #clock-cells = <0>;
259 };
260
261 uartb_clk: uartb {
262 compatible = "fixed-clock";
263 clock-frequency = <13000000>;
264 #clock-cells = <0>;
265 };
266
267 uartb2_clk: uartb2 {
268 compatible = "fixed-clock";
269 clock-frequency = <13000000>;
270 #clock-cells = <0>;
271 };
272
273 uartb3_clk: uartb3 {
274 compatible = "fixed-clock";
275 clock-frequency = <13000000>;
276 #clock-cells = <0>;
277 };
278
279 uartb4_clk: uartb4 {
280 compatible = "fixed-clock";
281 clock-frequency = <13000000>;
282 #clock-cells = <0>;
283 };
284
285 usb_otg_ahb_clk: usb_otg_ahb {
286 compatible = "fixed-clock";
287 clock-frequency = <52000000>;
288 #clock-cells = <0>;
289 };
290 };
Matt Porterd97f7992013-12-19 09:23:10 -0500291
292 usbotg: usb@3f120000 {
293 compatible = "snps,dwc2";
294 reg = <0x3f120000 0x10000>;
295 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
296 clocks = <&usb_otg_ahb_clk>;
297 clock-names = "otg";
298 phys = <&usbphy>;
299 phy-names = "usb2-phy";
300 status = "disabled";
301 };
302
303 usbphy: usb-phy@3f130000 {
304 compatible = "brcm,kona-usb2-phy";
305 reg = <0x3f130000 0x28>;
306 #phy-cells = <0>;
307 status = "disabled";
308 };
Christian Daudt8ac49e02012-11-19 09:46:10 -0800309};