blob: 7db1a89fdd9559fda27bf19a17c114e2b4643d56 [file] [log] [blame]
Bing Zhao5e6e3a92011-03-21 18:00:50 -07001/*
2 * Marvell Wireless LAN device driver: 802.11n
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include "decl.h"
21#include "ioctl.h"
22#include "util.h"
23#include "fw.h"
24#include "main.h"
25#include "wmm.h"
26#include "11n.h"
27
28/*
29 * Fills HT capability information field, AMPDU Parameters field, HT extended
30 * capability field, and supported MCS set fields.
31 *
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070032 * HT capability information field, AMPDU Parameters field, supported MCS set
33 * fields are retrieved from cfg80211 stack
Bing Zhao5e6e3a92011-03-21 18:00:50 -070034 *
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070035 * RD responder bit to set to clear in the extended capability header.
Bing Zhao5e6e3a92011-03-21 18:00:50 -070036 */
37void
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070038mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
Bing Zhao5e6e3a92011-03-21 18:00:50 -070039 struct mwifiex_ie_types_htcap *ht_cap)
40{
Bing Zhao5e6e3a92011-03-21 18:00:50 -070041 uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070042 struct ieee80211_supported_band *sband =
43 priv->wdev->wiphy->bands[radio_type];
Bing Zhao5e6e3a92011-03-21 18:00:50 -070044
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070045 ht_cap->ht_cap.ampdu_params_info =
46 (sband->ht_cap.ampdu_factor &
Yogesh Ashok Powar84266842012-03-13 19:22:34 -070047 IEEE80211_HT_AMPDU_PARM_FACTOR) |
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070048 ((sband->ht_cap.ampdu_density <<
49 IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
50 IEEE80211_HT_AMPDU_PARM_DENSITY);
Bing Zhao5e6e3a92011-03-21 18:00:50 -070051
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070052 memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
Yogesh Ashok Powar84266842012-03-13 19:22:34 -070053 sizeof(sband->ht_cap.mcs));
Bing Zhao5e6e3a92011-03-21 18:00:50 -070054
Bing Zhaoeecd8252011-03-28 17:55:41 -070055 if (priv->bss_mode == NL80211_IFTYPE_STATION ||
Amitkumar Karward35f1032013-01-02 16:56:00 -080056 (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
57 (priv->adapter->sec_chan_offset !=
58 IEEE80211_HT_PARAM_CHA_SEC_NONE)))
Bing Zhao5e6e3a92011-03-21 18:00:50 -070059 /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
60 SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
61
62 /* Clear RD responder bit */
Amitkumar Karwara3731652011-04-15 20:50:41 -070063 ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
Bing Zhao5e6e3a92011-03-21 18:00:50 -070064
Amitkumar Karwara46b7b52011-04-27 19:13:12 -070065 ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
Bing Zhao5e6e3a92011-03-21 18:00:50 -070066 ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
67}
68
69/*
Bing Zhao5e6e3a92011-03-21 18:00:50 -070070 * This function returns the pointer to an entry in BA Stream
71 * table which matches the requested BA status.
72 */
73static struct mwifiex_tx_ba_stream_tbl *
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -070074mwifiex_get_ba_status(struct mwifiex_private *priv,
75 enum mwifiex_ba_status ba_status)
Bing Zhao5e6e3a92011-03-21 18:00:50 -070076{
77 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
78 unsigned long flags;
79
80 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
81 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
82 if (tx_ba_tsr_tbl->ba_status == ba_status) {
83 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
84 flags);
85 return tx_ba_tsr_tbl;
86 }
87 }
88 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
89 return NULL;
90}
91
92/*
93 * This function handles the command response of delete a block
94 * ack request.
95 *
96 * The function checks the response success status and takes action
97 * accordingly (send an add BA request in case of success, or recreate
98 * the deleted stream in case of failure, if the add BA was also
99 * initiated by us).
100 */
101int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
102 struct host_cmd_ds_command *resp)
103{
104 int tid;
105 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
Joe Perches2c208892012-06-04 12:44:17 +0000106 struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700107 uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
108
109 tid = del_ba_param_set >> DELBA_TID_POS;
110 if (del_ba->del_result == BA_RESULT_SUCCESS) {
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700111 mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
112 TYPE_DELBA_SENT,
113 INITIATOR_BIT(del_ba_param_set));
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700114
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700115 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700116 if (tx_ba_tbl)
117 mwifiex_send_addba(priv, tx_ba_tbl->tid,
118 tx_ba_tbl->ra);
119 } else { /*
120 * In case of failure, recreate the deleted stream in case
121 * we initiated the ADDBA
122 */
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700123 if (!INITIATOR_BIT(del_ba_param_set))
124 return 0;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700125
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700126 mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
127 BA_SETUP_INPROGRESS);
128
129 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
130
131 if (tx_ba_tbl)
132 mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
133 TYPE_DELBA_SENT, true);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700134 }
135
136 return 0;
137}
138
139/*
140 * This function handles the command response of add a block
141 * ack request.
142 *
143 * Handling includes changing the header fields to CPU formats, checking
144 * the response success status and taking actions accordingly (delete the
145 * BA stream table in case of failure).
146 */
147int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
148 struct host_cmd_ds_command *resp)
149{
150 int tid;
Joe Perches2c208892012-06-04 12:44:17 +0000151 struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700152 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
153
154 add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
155 & SSN_MASK);
156
157 tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
158 & IEEE80211_ADDBA_PARAM_TID_MASK)
159 >> BLOCKACKPARAM_TID_POS;
160 if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700161 tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid,
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700162 add_ba_rsp->peer_mac_addr);
163 if (tx_ba_tbl) {
164 dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700165 tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700166 } else {
167 dev_err(priv->adapter->dev, "BA stream not created\n");
168 }
169 } else {
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700170 mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
171 TYPE_DELBA_SENT, true);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700172 if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
173 priv->aggr_prio_tbl[tid].ampdu_ap =
174 BA_STREAM_NOT_ALLOWED;
175 }
176
177 return 0;
178}
179
180/*
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700181 * This function prepares command of reconfigure Tx buffer.
182 *
183 * Preparation includes -
184 * - Setting command ID, action and proper size
185 * - Setting Tx buffer size (for SET only)
186 * - Ensuring correct endian-ness
187 */
188int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
189 struct host_cmd_ds_command *cmd, int cmd_action,
Amitkumar Karwara5ffddb2011-06-20 15:21:48 -0700190 u16 *buf_size)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700191{
192 struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
193 u16 action = (u16) cmd_action;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700194
195 cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
196 cmd->size =
197 cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
198 tx_buf->action = cpu_to_le16(action);
199 switch (action) {
200 case HostCmd_ACT_GEN_SET:
Amitkumar Karwara5ffddb2011-06-20 15:21:48 -0700201 dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
202 tx_buf->buff_size = cpu_to_le16(*buf_size);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700203 break;
204 case HostCmd_ACT_GEN_GET:
205 default:
206 tx_buf->buff_size = 0;
207 break;
208 }
209 return 0;
210}
211
212/*
213 * This function prepares command of AMSDU aggregation control.
214 *
215 * Preparation includes -
216 * - Setting command ID, action and proper size
217 * - Setting AMSDU control parameters (for SET only)
218 * - Ensuring correct endian-ness
219 */
Amitkumar Karwar572e8f32011-04-13 17:27:08 -0700220int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
Amitkumar Karwara5ffddb2011-06-20 15:21:48 -0700221 int cmd_action,
222 struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700223{
224 struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
225 &cmd->params.amsdu_aggr_ctrl;
226 u16 action = (u16) cmd_action;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700227
228 cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
229 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
230 + S_DS_GEN);
231 amsdu_ctrl->action = cpu_to_le16(action);
232 switch (action) {
233 case HostCmd_ACT_GEN_SET:
234 amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
235 amsdu_ctrl->curr_buf_size = 0;
236 break;
237 case HostCmd_ACT_GEN_GET:
238 default:
239 amsdu_ctrl->curr_buf_size = 0;
240 break;
241 }
242 return 0;
243}
244
245/*
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700246 * This function prepares 11n configuration command.
247 *
248 * Preparation includes -
249 * - Setting command ID, action and proper size
250 * - Setting HT Tx capability and HT Tx information fields
251 * - Ensuring correct endian-ness
252 */
Yogesh Ashok Powara5f39052013-02-15 21:44:30 -0800253int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv,
254 struct host_cmd_ds_command *cmd, u16 cmd_action,
Amitkumar Karwara5ffddb2011-06-20 15:21:48 -0700255 struct mwifiex_ds_11n_tx_cfg *txcfg)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700256{
257 struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700258
259 cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
260 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
261 htcfg->action = cpu_to_le16(cmd_action);
262 htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
263 htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
Yogesh Ashok Powara5f39052013-02-15 21:44:30 -0800264
265 if (priv->adapter->is_hw_11ac_capable)
266 htcfg->misc_config = cpu_to_le16(txcfg->misc_config);
267
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700268 return 0;
269}
270
271/*
272 * This function appends an 11n TLV to a buffer.
273 *
274 * Buffer allocation is responsibility of the calling
275 * function. No size validation is made here.
276 *
277 * The function fills up the following sections, if applicable -
278 * - HT capability IE
279 * - HT information IE (with channel list)
280 * - 20/40 BSS Coexistence IE
281 * - HT Extended Capabilities IE
282 */
283int
284mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
285 struct mwifiex_bssdescriptor *bss_desc,
286 u8 **buffer)
287{
288 struct mwifiex_ie_types_htcap *ht_cap;
289 struct mwifiex_ie_types_htinfo *ht_info;
290 struct mwifiex_ie_types_chan_list_param_set *chan_list;
291 struct mwifiex_ie_types_2040bssco *bss_co_2040;
292 struct mwifiex_ie_types_extcap *ext_cap;
293 int ret_len = 0;
Amitkumar Karwara46b7b52011-04-27 19:13:12 -0700294 struct ieee80211_supported_band *sband;
Avinash Patil68f95b092013-08-23 16:48:22 -0700295 struct ieee_types_header *hdr;
Amitkumar Karwara46b7b52011-04-27 19:13:12 -0700296 u8 radio_type;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700297
298 if (!buffer || !*buffer)
299 return ret_len;
300
Amitkumar Karwara46b7b52011-04-27 19:13:12 -0700301 radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
302 sband = priv->wdev->wiphy->bands[radio_type];
303
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700304 if (bss_desc->bcn_ht_cap) {
305 ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
306 memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
307 ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
308 ht_cap->header.len =
309 cpu_to_le16(sizeof(struct ieee80211_ht_cap));
310 memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
Amitkumar Karwarc99b1862014-03-04 18:43:13 -0800311 (u8 *)bss_desc->bcn_ht_cap,
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700312 le16_to_cpu(ht_cap->header.len));
313
Amitkumar Karwara46b7b52011-04-27 19:13:12 -0700314 mwifiex_fill_cap_info(priv, radio_type, ht_cap);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700315
316 *buffer += sizeof(struct mwifiex_ie_types_htcap);
317 ret_len += sizeof(struct mwifiex_ie_types_htcap);
318 }
319
Johannes Berg074d46d2012-03-15 19:45:16 +0100320 if (bss_desc->bcn_ht_oper) {
Bing Zhaoeecd8252011-03-28 17:55:41 -0700321 if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700322 ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
323 memset(ht_info, 0,
324 sizeof(struct mwifiex_ie_types_htinfo));
325 ht_info->header.type =
Johannes Berg074d46d2012-03-15 19:45:16 +0100326 cpu_to_le16(WLAN_EID_HT_OPERATION);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700327 ht_info->header.len =
Johannes Berg074d46d2012-03-15 19:45:16 +0100328 cpu_to_le16(
329 sizeof(struct ieee80211_ht_operation));
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700330
331 memcpy((u8 *) ht_info +
332 sizeof(struct mwifiex_ie_types_header),
Johannes Berg074d46d2012-03-15 19:45:16 +0100333 (u8 *) bss_desc->bcn_ht_oper +
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700334 sizeof(struct ieee_types_header),
335 le16_to_cpu(ht_info->header.len));
336
Amitkumar Karwara46b7b52011-04-27 19:13:12 -0700337 if (!(sband->ht_cap.cap &
338 IEEE80211_HT_CAP_SUP_WIDTH_20_40))
Johannes Berg074d46d2012-03-15 19:45:16 +0100339 ht_info->ht_oper.ht_param &=
Marc Yang6d2bd912011-03-25 19:47:02 -0700340 ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
341 IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700342
343 *buffer += sizeof(struct mwifiex_ie_types_htinfo);
344 ret_len += sizeof(struct mwifiex_ie_types_htinfo);
345 }
346
347 chan_list =
348 (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
349 memset(chan_list, 0,
350 sizeof(struct mwifiex_ie_types_chan_list_param_set));
351 chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
352 chan_list->header.len = cpu_to_le16(
353 sizeof(struct mwifiex_ie_types_chan_list_param_set) -
354 sizeof(struct mwifiex_ie_types_header));
355 chan_list->chan_scan_param[0].chan_number =
Johannes Berg074d46d2012-03-15 19:45:16 +0100356 bss_desc->bcn_ht_oper->primary_chan;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700357 chan_list->chan_scan_param[0].radio_type =
358 mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
359
Yogesh Ashok Powar84266842012-03-13 19:22:34 -0700360 if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
Johannes Berg074d46d2012-03-15 19:45:16 +0100361 bss_desc->bcn_ht_oper->ht_param &
Yogesh Ashok Powar84266842012-03-13 19:22:34 -0700362 IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700363 SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
364 radio_type,
Johannes Berg074d46d2012-03-15 19:45:16 +0100365 (bss_desc->bcn_ht_oper->ht_param &
Marc Yang6d2bd912011-03-25 19:47:02 -0700366 IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700367
368 *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
369 ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
370 }
371
372 if (bss_desc->bcn_bss_co_2040) {
373 bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
374 memset(bss_co_2040, 0,
375 sizeof(struct mwifiex_ie_types_2040bssco));
376 bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
377 bss_co_2040->header.len =
378 cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
379
380 memcpy((u8 *) bss_co_2040 +
381 sizeof(struct mwifiex_ie_types_header),
Joe Perches2c208892012-06-04 12:44:17 +0000382 bss_desc->bcn_bss_co_2040 +
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700383 sizeof(struct ieee_types_header),
384 le16_to_cpu(bss_co_2040->header.len));
385
386 *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
387 ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
388 }
389
390 if (bss_desc->bcn_ext_cap) {
Avinash Patil68f95b092013-08-23 16:48:22 -0700391 hdr = (void *)bss_desc->bcn_ext_cap;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700392 ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
393 memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
394 ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
Avinash Patil68f95b092013-08-23 16:48:22 -0700395 ext_cap->header.len = cpu_to_le16(hdr->len);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700396
Avinash Patil68f95b092013-08-23 16:48:22 -0700397 memcpy((u8 *)ext_cap->ext_capab,
Joe Perches2c208892012-06-04 12:44:17 +0000398 bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700399 le16_to_cpu(ext_cap->header.len));
400
Avinash Patil587b36d2013-08-23 16:48:23 -0700401 if (hdr->len > 3 &&
402 ext_cap->ext_capab[3] & WLAN_EXT_CAPA4_INTERWORKING_ENABLED)
403 priv->hs2_enabled = true;
404 else
405 priv->hs2_enabled = false;
406
Avinash Patil68f95b092013-08-23 16:48:22 -0700407 *buffer += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
408 ret_len += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700409 }
410
411 return ret_len;
412}
413
414/*
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700415 * This function checks if the given pointer is valid entry of
416 * Tx BA Stream table.
417 */
418static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
419 struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
420{
421 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
422
423 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
424 if (tx_ba_tsr_tbl == tx_tbl_ptr)
425 return true;
426 }
427
428 return false;
429}
430
431/*
432 * This function deletes the given entry in Tx BA Stream table.
433 *
434 * The function also performs a validity check on the supplied
435 * pointer before trying to delete.
436 */
437void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
438 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
439{
440 if (!tx_ba_tsr_tbl &&
Yogesh Ashok Powar84266842012-03-13 19:22:34 -0700441 mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700442 return;
443
444 dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
445
446 list_del(&tx_ba_tsr_tbl->list);
447
448 kfree(tx_ba_tsr_tbl);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700449}
450
451/*
452 * This function deletes all the entries in Tx BA Stream table.
453 */
454void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
455{
456 int i;
457 struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
458 unsigned long flags;
459
460 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
461 list_for_each_entry_safe(del_tbl_ptr, tmp_node,
462 &priv->tx_ba_stream_tbl_ptr, list)
463 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
464 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
465
466 INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
467
468 for (i = 0; i < MAX_NUM_TID; ++i)
469 priv->aggr_prio_tbl[i].ampdu_ap =
470 priv->aggr_prio_tbl[i].ampdu_user;
471}
472
473/*
474 * This function returns the pointer to an entry in BA Stream
475 * table which matches the given RA/TID pair.
476 */
477struct mwifiex_tx_ba_stream_tbl *
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700478mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700479{
480 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
484 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
dingtianhongfcad7662013-12-26 19:41:27 +0800485 if (ether_addr_equal_unaligned(tx_ba_tsr_tbl->ra, ra) &&
Yogesh Ashok Powar84266842012-03-13 19:22:34 -0700486 tx_ba_tsr_tbl->tid == tid) {
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700487 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
488 flags);
489 return tx_ba_tsr_tbl;
490 }
491 }
492 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
493 return NULL;
494}
495
496/*
497 * This function creates an entry in Tx BA stream table for the
498 * given RA/TID pair.
499 */
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700500void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
501 enum mwifiex_ba_status ba_status)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700502{
503 struct mwifiex_tx_ba_stream_tbl *new_node;
504 unsigned long flags;
505
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700506 if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700507 new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
508 GFP_ATOMIC);
Joe Perches0d2e7a52013-02-03 17:28:14 +0000509 if (!new_node)
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700510 return;
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700511
512 INIT_LIST_HEAD(&new_node->list);
513
514 new_node->tid = tid;
515 new_node->ba_status = ba_status;
516 memcpy(new_node->ra, ra, ETH_ALEN);
517
518 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
519 list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
520 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
521 }
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700522}
523
524/*
525 * This function sends an add BA request to the given TID/RA pair.
526 */
527int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
528{
529 struct host_cmd_ds_11n_addba_req add_ba_req;
530 static u8 dialog_tok;
531 int ret;
532
533 dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
534
535 add_ba_req.block_ack_param_set = cpu_to_le16(
536 (u16) ((tid << BLOCKACKPARAM_TID_POS) |
537 (priv->add_ba_param.
538 tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
539 IMMEDIATE_BLOCK_ACK));
540 add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
541
542 ++dialog_tok;
543
544 if (dialog_tok == 0)
545 dialog_tok = 1;
546
547 add_ba_req.dialog_token = dialog_tok;
548 memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
549
550 /* We don't wait for the response of this command */
Amitkumar Karwar600f5d92011-04-13 17:27:06 -0700551 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
552 0, 0, &add_ba_req);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700553
554 return ret;
555}
556
557/*
558 * This function sends a delete BA request to the given TID/RA pair.
559 */
560int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
561 int initiator)
562{
563 struct host_cmd_ds_11n_delba delba;
564 int ret;
565 uint16_t del_ba_param_set;
566
567 memset(&delba, 0, sizeof(delba));
568 delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
569
570 del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
571 if (initiator)
572 del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
573 else
574 del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
575
576 memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
577
578 /* We don't wait for the response of this command */
Amitkumar Karwar600f5d92011-04-13 17:27:06 -0700579 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
580 HostCmd_ACT_GEN_SET, 0, &delba);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700581
582 return ret;
583}
584
585/*
586 * This function handles the command response of a delete BA request.
587 */
588void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
589{
590 struct host_cmd_ds_11n_delba *cmd_del_ba =
591 (struct host_cmd_ds_11n_delba *) del_ba;
592 uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
593 int tid;
594
595 tid = del_ba_param_set >> DELBA_TID_POS;
596
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700597 mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
598 TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700599}
600
601/*
602 * This function retrieves the Rx reordering table.
603 */
604int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
605 struct mwifiex_ds_rx_reorder_tbl *buf)
606{
607 int i;
608 struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
609 struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
610 int count = 0;
611 unsigned long flags;
612
613 spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
614 list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
615 list) {
616 rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
617 memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
618 rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
619 rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
620 for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
621 if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
622 rx_reo_tbl->buffer[i] = true;
623 else
624 rx_reo_tbl->buffer[i] = false;
625 }
626 rx_reo_tbl++;
627 count++;
628
629 if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
630 break;
631 }
632 spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
633
634 return count;
635}
636
637/*
638 * This function retrieves the Tx BA stream table.
639 */
640int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
641 struct mwifiex_ds_tx_ba_stream_tbl *buf)
642{
643 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
644 struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
645 int count = 0;
646 unsigned long flags;
647
648 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
649 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
650 rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
651 dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
Yogesh Ashok Powar84266842012-03-13 19:22:34 -0700652 __func__, rx_reo_tbl->tid);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700653 memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
654 rx_reo_tbl++;
655 count++;
656 if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
657 break;
658 }
659 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
660
661 return count;
662}
Avinash Patil3e238a12012-08-03 18:06:11 -0700663
664/*
665 * This function retrieves the entry for specific tx BA stream table by RA and
666 * deletes it.
667 */
668void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra)
669{
670 struct mwifiex_tx_ba_stream_tbl *tbl, *tmp;
671 unsigned long flags;
672
673 if (!ra)
674 return;
675
676 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
677 list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) {
678 if (!memcmp(tbl->ra, ra, ETH_ALEN)) {
679 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
680 flags);
681 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl);
682 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
683 }
684 }
685 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
686
687 return;
688}
Avinash Patil04abc0a2013-03-27 19:10:31 -0700689
690/* This function initializes the BlockACK setup information for given
691 * mwifiex_private structure.
692 */
693void mwifiex_set_ba_params(struct mwifiex_private *priv)
694{
695 priv->add_ba_param.timeout = MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT;
696
697 if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
698 priv->add_ba_param.tx_win_size =
699 MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE;
700 priv->add_ba_param.rx_win_size =
701 MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE;
702 } else {
703 priv->add_ba_param.tx_win_size =
704 MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
705 priv->add_ba_param.rx_win_size =
706 MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
707 }
708
709 return;
710}