Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2009 Jerome Glisse. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the |
| 7 | * "Software"), to deal in the Software without restriction, including |
| 8 | * without limitation the rights to use, copy, modify, merge, publish, |
| 9 | * distribute, sub license, and/or sell copies of the Software, and to |
| 10 | * permit persons to whom the Software is furnished to do so, subject to |
| 11 | * the following conditions: |
| 12 | * |
| 13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 16 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 17 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 18 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 19 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 20 | * |
| 21 | * The above copyright notice and this permission notice (including the |
| 22 | * next paragraph) shall be included in all copies or substantial portions |
| 23 | * of the Software. |
| 24 | * |
| 25 | */ |
| 26 | /* |
| 27 | * Authors: |
| 28 | * Jerome Glisse <glisse@freedesktop.org> |
| 29 | * Dave Airlie |
| 30 | */ |
| 31 | #include <linux/seq_file.h> |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 32 | #include <linux/atomic.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 33 | #include <linux/wait.h> |
| 34 | #include <linux/list.h> |
| 35 | #include <linux/kref.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 36 | #include <linux/slab.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 37 | #include <drm/drmP.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 38 | #include "radeon_reg.h" |
| 39 | #include "radeon.h" |
Dave Airlie | 99ee7fa | 2010-11-23 11:47:49 +1000 | [diff] [blame] | 40 | #include "radeon_trace.h" |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 41 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 42 | /* |
| 43 | * Fences |
| 44 | * Fences mark an event in the GPUs pipeline and are used |
| 45 | * for GPU/CPU synchronization. When the fence is written, |
| 46 | * it is expected that all buffers associated with that fence |
| 47 | * are no longer in use by the associated ring on the GPU and |
| 48 | * that the the relevant GPU caches have been flushed. Whether |
| 49 | * we use a scratch register or memory location depends on the asic |
| 50 | * and whether writeback is enabled. |
| 51 | */ |
| 52 | |
| 53 | /** |
| 54 | * radeon_fence_write - write a fence value |
| 55 | * |
| 56 | * @rdev: radeon_device pointer |
| 57 | * @seq: sequence number to write |
| 58 | * @ring: ring index the fence is associated with |
| 59 | * |
| 60 | * Writes a fence value to memory or a scratch register (all asics). |
| 61 | */ |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 62 | static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) |
Alex Deucher | b81157d | 2011-06-13 17:39:06 -0400 | [diff] [blame] | 63 | { |
Christian König | bf66625 | 2012-07-09 10:52:39 +0200 | [diff] [blame] | 64 | struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; |
| 65 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { |
| 66 | *drv->cpu_addr = cpu_to_le32(seq); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 67 | } else { |
Christian König | bf66625 | 2012-07-09 10:52:39 +0200 | [diff] [blame] | 68 | WREG32(drv->scratch_reg, seq); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 69 | } |
Alex Deucher | b81157d | 2011-06-13 17:39:06 -0400 | [diff] [blame] | 70 | } |
| 71 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 72 | /** |
| 73 | * radeon_fence_read - read a fence value |
| 74 | * |
| 75 | * @rdev: radeon_device pointer |
| 76 | * @ring: ring index the fence is associated with |
| 77 | * |
| 78 | * Reads a fence value from memory or a scratch register (all asics). |
| 79 | * Returns the value of the fence read from memory or register. |
| 80 | */ |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 81 | static u32 radeon_fence_read(struct radeon_device *rdev, int ring) |
Alex Deucher | b81157d | 2011-06-13 17:39:06 -0400 | [diff] [blame] | 82 | { |
Christian König | bf66625 | 2012-07-09 10:52:39 +0200 | [diff] [blame] | 83 | struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 84 | u32 seq = 0; |
Alex Deucher | b81157d | 2011-06-13 17:39:06 -0400 | [diff] [blame] | 85 | |
Christian König | bf66625 | 2012-07-09 10:52:39 +0200 | [diff] [blame] | 86 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { |
| 87 | seq = le32_to_cpu(*drv->cpu_addr); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 88 | } else { |
Christian König | bf66625 | 2012-07-09 10:52:39 +0200 | [diff] [blame] | 89 | seq = RREG32(drv->scratch_reg); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 90 | } |
Alex Deucher | b81157d | 2011-06-13 17:39:06 -0400 | [diff] [blame] | 91 | return seq; |
| 92 | } |
| 93 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 94 | /** |
| 95 | * radeon_fence_emit - emit a fence on the requested ring |
| 96 | * |
| 97 | * @rdev: radeon_device pointer |
| 98 | * @fence: radeon fence object |
| 99 | * @ring: ring index the fence is associated with |
| 100 | * |
| 101 | * Emits a fence command on the requested ring (all asics). |
| 102 | * Returns 0 on success, -ENOMEM on failure. |
| 103 | */ |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 104 | int radeon_fence_emit(struct radeon_device *rdev, |
| 105 | struct radeon_fence **fence, |
| 106 | int ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 107 | { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 108 | /* we are protected by the ring emission mutex */ |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 109 | *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL); |
| 110 | if ((*fence) == NULL) { |
| 111 | return -ENOMEM; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 112 | } |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 113 | kref_init(&((*fence)->kref)); |
| 114 | (*fence)->rdev = rdev; |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 115 | (*fence)->seq = ++rdev->fence_drv[ring].sync_seq[ring]; |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 116 | (*fence)->ring = ring; |
| 117 | radeon_fence_ring_emit(rdev, ring, *fence); |
| 118 | trace_radeon_fence_emit(rdev->ddev, (*fence)->seq); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 119 | return 0; |
| 120 | } |
| 121 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 122 | /** |
| 123 | * radeon_fence_process - process a fence |
| 124 | * |
| 125 | * @rdev: radeon_device pointer |
| 126 | * @ring: ring index the fence is associated with |
| 127 | * |
| 128 | * Checks the current fence value and wakes the fence queue |
| 129 | * if the sequence number has increased (all asics). |
| 130 | */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 131 | void radeon_fence_process(struct radeon_device *rdev, int ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 132 | { |
Christian König | f492c17 | 2012-09-13 10:33:47 +0200 | [diff] [blame] | 133 | uint64_t seq, last_seq, last_emitted; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 134 | unsigned count_loop = 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 135 | bool wake = false; |
| 136 | |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 137 | /* Note there is a scenario here for an infinite loop but it's |
| 138 | * very unlikely to happen. For it to happen, the current polling |
| 139 | * process need to be interrupted by another process and another |
| 140 | * process needs to update the last_seq btw the atomic read and |
| 141 | * xchg of the current process. |
| 142 | * |
| 143 | * More over for this to go in infinite loop there need to be |
| 144 | * continuously new fence signaled ie radeon_fence_read needs |
| 145 | * to return a different value each time for both the currently |
| 146 | * polling process and the other process that xchg the last_seq |
| 147 | * btw atomic read and xchg of the current process. And the |
| 148 | * value the other process set as last seq must be higher than |
| 149 | * the seq value we just read. Which means that current process |
| 150 | * need to be interrupted after radeon_fence_read and before |
| 151 | * atomic xchg. |
| 152 | * |
| 153 | * To be even more safe we count the number of time we loop and |
| 154 | * we bail after 10 loop just accepting the fact that we might |
| 155 | * have temporarly set the last_seq not to the true real last |
| 156 | * seq but to an older one. |
| 157 | */ |
| 158 | last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); |
| 159 | do { |
Christian König | f492c17 | 2012-09-13 10:33:47 +0200 | [diff] [blame] | 160 | last_emitted = rdev->fence_drv[ring].sync_seq[ring]; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 161 | seq = radeon_fence_read(rdev, ring); |
| 162 | seq |= last_seq & 0xffffffff00000000LL; |
| 163 | if (seq < last_seq) { |
Christian König | f492c17 | 2012-09-13 10:33:47 +0200 | [diff] [blame] | 164 | seq &= 0xffffffff; |
| 165 | seq |= last_emitted & 0xffffffff00000000LL; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 166 | } |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 167 | |
Christian König | f492c17 | 2012-09-13 10:33:47 +0200 | [diff] [blame] | 168 | if (seq <= last_seq || seq > last_emitted) { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 169 | break; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 170 | } |
| 171 | /* If we loop over we don't want to return without |
| 172 | * checking if a fence is signaled as it means that the |
| 173 | * seq we just read is different from the previous on. |
| 174 | */ |
| 175 | wake = true; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 176 | last_seq = seq; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 177 | if ((count_loop++) > 10) { |
| 178 | /* We looped over too many time leave with the |
| 179 | * fact that we might have set an older fence |
| 180 | * seq then the current real last seq as signaled |
| 181 | * by the hw. |
| 182 | */ |
| 183 | break; |
| 184 | } |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 185 | } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); |
| 186 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 187 | if (wake) { |
| 188 | rdev->fence_drv[ring].last_activity = jiffies; |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 189 | wake_up_all(&rdev->fence_queue); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 190 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 191 | } |
| 192 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 193 | /** |
| 194 | * radeon_fence_destroy - destroy a fence |
| 195 | * |
| 196 | * @kref: fence kref |
| 197 | * |
| 198 | * Frees the fence object (all asics). |
| 199 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 200 | static void radeon_fence_destroy(struct kref *kref) |
| 201 | { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 202 | struct radeon_fence *fence; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 203 | |
| 204 | fence = container_of(kref, struct radeon_fence, kref); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 205 | kfree(fence); |
| 206 | } |
| 207 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 208 | /** |
| 209 | * radeon_fence_seq_signaled - check if a fence sequeuce number has signaled |
| 210 | * |
| 211 | * @rdev: radeon device pointer |
| 212 | * @seq: sequence number |
| 213 | * @ring: ring index the fence is associated with |
| 214 | * |
| 215 | * Check if the last singled fence sequnce number is >= the requested |
| 216 | * sequence number (all asics). |
| 217 | * Returns true if the fence has signaled (current fence value |
| 218 | * is >= requested value) or false if it has not (current fence |
| 219 | * value is < the requested value. Helper function for |
| 220 | * radeon_fence_signaled(). |
| 221 | */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 222 | static bool radeon_fence_seq_signaled(struct radeon_device *rdev, |
| 223 | u64 seq, unsigned ring) |
| 224 | { |
| 225 | if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { |
| 226 | return true; |
| 227 | } |
| 228 | /* poll new last sequence at least once */ |
| 229 | radeon_fence_process(rdev, ring); |
| 230 | if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { |
| 231 | return true; |
| 232 | } |
| 233 | return false; |
| 234 | } |
| 235 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 236 | /** |
| 237 | * radeon_fence_signaled - check if a fence has signaled |
| 238 | * |
| 239 | * @fence: radeon fence object |
| 240 | * |
| 241 | * Check if the requested fence has signaled (all asics). |
| 242 | * Returns true if the fence has signaled or false if it has not. |
| 243 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 244 | bool radeon_fence_signaled(struct radeon_fence *fence) |
| 245 | { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 246 | if (!fence) { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 247 | return true; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 248 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 249 | if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) { |
| 250 | return true; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 251 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 252 | if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) { |
| 253 | fence->seq = RADEON_FENCE_SIGNALED_SEQ; |
| 254 | return true; |
| 255 | } |
| 256 | return false; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 257 | } |
| 258 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 259 | /** |
| 260 | * radeon_fence_wait_seq - wait for a specific sequence number |
| 261 | * |
| 262 | * @rdev: radeon device pointer |
| 263 | * @target_seq: sequence number we want to wait for |
| 264 | * @ring: ring index the fence is associated with |
| 265 | * @intr: use interruptable sleep |
| 266 | * @lock_ring: whether the ring should be locked or not |
| 267 | * |
| 268 | * Wait for the requested sequence number to be written (all asics). |
| 269 | * @intr selects whether to use interruptable (true) or non-interruptable |
| 270 | * (false) sleep when waiting for the sequence number. Helper function |
| 271 | * for radeon_fence_wait(), et al. |
| 272 | * Returns 0 if the sequence number has passed, error for all other cases. |
| 273 | * -EDEADLK is returned when a GPU lockup has been detected and the ring is |
| 274 | * marked as not ready so no further jobs get scheduled until a successful |
| 275 | * reset. |
| 276 | */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 277 | static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq, |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 278 | unsigned ring, bool intr, bool lock_ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 279 | { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 280 | unsigned long timeout, last_activity; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 281 | uint64_t seq; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 282 | unsigned i; |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 283 | bool signaled; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 284 | int r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 285 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 286 | while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) { |
| 287 | if (!rdev->ring[ring].ready) { |
| 288 | return -EBUSY; |
| 289 | } |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 290 | |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 291 | timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 292 | if (time_after(rdev->fence_drv[ring].last_activity, timeout)) { |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 293 | /* the normal case, timeout is somewhere before last_activity */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 294 | timeout = rdev->fence_drv[ring].last_activity - timeout; |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 295 | } else { |
| 296 | /* either jiffies wrapped around, or no fence was signaled in the last 500ms |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 297 | * anyway we will just wait for the minimum amount and then check for a lockup |
| 298 | */ |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 299 | timeout = 1; |
| 300 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 301 | seq = atomic64_read(&rdev->fence_drv[ring].last_seq); |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 302 | /* Save current last activity valuee, used to check for GPU lockups */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 303 | last_activity = rdev->fence_drv[ring].last_activity; |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 304 | |
| 305 | trace_radeon_fence_wait_begin(rdev->ddev, seq); |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 306 | radeon_irq_kms_sw_irq_get(rdev, ring); |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 307 | if (intr) { |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 308 | r = wait_event_interruptible_timeout(rdev->fence_queue, |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 309 | (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)), |
| 310 | timeout); |
| 311 | } else { |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 312 | r = wait_event_timeout(rdev->fence_queue, |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 313 | (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)), |
| 314 | timeout); |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 315 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 316 | radeon_irq_kms_sw_irq_put(rdev, ring); |
Jerome Glisse | 90aca4d | 2010-03-09 14:45:12 +0000 | [diff] [blame] | 317 | if (unlikely(r < 0)) { |
Thomas Hellstrom | 5cc6fba | 2009-12-07 18:36:19 +0100 | [diff] [blame] | 318 | return r; |
Jerome Glisse | 90aca4d | 2010-03-09 14:45:12 +0000 | [diff] [blame] | 319 | } |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 320 | trace_radeon_fence_wait_end(rdev->ddev, seq); |
Christian König | 25a9e35 | 2012-05-02 15:11:10 +0200 | [diff] [blame] | 321 | |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 322 | if (unlikely(!signaled)) { |
| 323 | /* we were interrupted for some reason and fence |
| 324 | * isn't signaled yet, resume waiting */ |
| 325 | if (r) { |
| 326 | continue; |
| 327 | } |
Christian König | 25a9e35 | 2012-05-02 15:11:10 +0200 | [diff] [blame] | 328 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 329 | /* check if sequence value has changed since last_activity */ |
| 330 | if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) { |
| 331 | continue; |
| 332 | } |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 333 | |
| 334 | if (lock_ring) { |
| 335 | mutex_lock(&rdev->ring_lock); |
| 336 | } |
| 337 | |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 338 | /* test if somebody else has already decided that this is a lockup */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 339 | if (last_activity != rdev->fence_drv[ring].last_activity) { |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 340 | if (lock_ring) { |
| 341 | mutex_unlock(&rdev->ring_lock); |
| 342 | } |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 343 | continue; |
| 344 | } |
| 345 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 346 | if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) { |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 347 | /* good news we believe it's a lockup */ |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 348 | dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n", |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 349 | target_seq, seq); |
| 350 | |
| 351 | /* change last activity so nobody else think there is a lockup */ |
| 352 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 353 | rdev->fence_drv[i].last_activity = jiffies; |
| 354 | } |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 355 | |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 356 | /* mark the ring as not ready any more */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 357 | rdev->ring[ring].ready = false; |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 358 | if (lock_ring) { |
| 359 | mutex_unlock(&rdev->ring_lock); |
| 360 | } |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 361 | return -EDEADLK; |
Christian König | 36abaca | 2012-05-02 15:11:13 +0200 | [diff] [blame] | 362 | } |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 363 | |
| 364 | if (lock_ring) { |
| 365 | mutex_unlock(&rdev->ring_lock); |
| 366 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 367 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 368 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 369 | return 0; |
| 370 | } |
| 371 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 372 | /** |
| 373 | * radeon_fence_wait - wait for a fence to signal |
| 374 | * |
| 375 | * @fence: radeon fence object |
| 376 | * @intr: use interruptable sleep |
| 377 | * |
| 378 | * Wait for the requested fence to signal (all asics). |
| 379 | * @intr selects whether to use interruptable (true) or non-interruptable |
| 380 | * (false) sleep when waiting for the fence. |
| 381 | * Returns 0 if the fence has passed, error for all other cases. |
| 382 | */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 383 | int radeon_fence_wait(struct radeon_fence *fence, bool intr) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 384 | { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 385 | int r; |
| 386 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 387 | if (fence == NULL) { |
| 388 | WARN(1, "Querying an invalid fence : %p !\n", fence); |
| 389 | return -EINVAL; |
Christian König | 25a9e35 | 2012-05-02 15:11:10 +0200 | [diff] [blame] | 390 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 391 | |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 392 | r = radeon_fence_wait_seq(fence->rdev, fence->seq, |
| 393 | fence->ring, intr, true); |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 394 | if (r) { |
| 395 | return r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 396 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 397 | fence->seq = RADEON_FENCE_SIGNALED_SEQ; |
| 398 | return 0; |
| 399 | } |
| 400 | |
Lauri Kasanen | 1109ca0 | 2012-08-31 13:43:50 -0400 | [diff] [blame] | 401 | static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq) |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 402 | { |
| 403 | unsigned i; |
| 404 | |
| 405 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 406 | if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) { |
| 407 | return true; |
| 408 | } |
| 409 | } |
| 410 | return false; |
| 411 | } |
| 412 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 413 | /** |
| 414 | * radeon_fence_wait_any_seq - wait for a sequence number on any ring |
| 415 | * |
| 416 | * @rdev: radeon device pointer |
| 417 | * @target_seq: sequence number(s) we want to wait for |
| 418 | * @intr: use interruptable sleep |
| 419 | * |
| 420 | * Wait for the requested sequence number(s) to be written by any ring |
| 421 | * (all asics). Sequnce number array is indexed by ring id. |
| 422 | * @intr selects whether to use interruptable (true) or non-interruptable |
| 423 | * (false) sleep when waiting for the sequence number. Helper function |
| 424 | * for radeon_fence_wait_any(), et al. |
| 425 | * Returns 0 if the sequence number has passed, error for all other cases. |
| 426 | */ |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 427 | static int radeon_fence_wait_any_seq(struct radeon_device *rdev, |
| 428 | u64 *target_seq, bool intr) |
| 429 | { |
| 430 | unsigned long timeout, last_activity, tmp; |
| 431 | unsigned i, ring = RADEON_NUM_RINGS; |
| 432 | bool signaled; |
| 433 | int r; |
| 434 | |
| 435 | for (i = 0, last_activity = 0; i < RADEON_NUM_RINGS; ++i) { |
| 436 | if (!target_seq[i]) { |
| 437 | continue; |
| 438 | } |
| 439 | |
| 440 | /* use the most recent one as indicator */ |
| 441 | if (time_after(rdev->fence_drv[i].last_activity, last_activity)) { |
| 442 | last_activity = rdev->fence_drv[i].last_activity; |
| 443 | } |
| 444 | |
| 445 | /* For lockup detection just pick the lowest ring we are |
| 446 | * actively waiting for |
| 447 | */ |
| 448 | if (i < ring) { |
| 449 | ring = i; |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | /* nothing to wait for ? */ |
| 454 | if (ring == RADEON_NUM_RINGS) { |
Christian König | 246fa34 | 2012-07-11 17:12:11 +0200 | [diff] [blame] | 455 | return -ENOENT; |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 456 | } |
| 457 | |
| 458 | while (!radeon_fence_any_seq_signaled(rdev, target_seq)) { |
| 459 | timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT; |
| 460 | if (time_after(last_activity, timeout)) { |
| 461 | /* the normal case, timeout is somewhere before last_activity */ |
| 462 | timeout = last_activity - timeout; |
| 463 | } else { |
| 464 | /* either jiffies wrapped around, or no fence was signaled in the last 500ms |
| 465 | * anyway we will just wait for the minimum amount and then check for a lockup |
| 466 | */ |
| 467 | timeout = 1; |
| 468 | } |
| 469 | |
| 470 | trace_radeon_fence_wait_begin(rdev->ddev, target_seq[ring]); |
| 471 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 472 | if (target_seq[i]) { |
| 473 | radeon_irq_kms_sw_irq_get(rdev, i); |
| 474 | } |
| 475 | } |
| 476 | if (intr) { |
| 477 | r = wait_event_interruptible_timeout(rdev->fence_queue, |
| 478 | (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)), |
| 479 | timeout); |
| 480 | } else { |
| 481 | r = wait_event_timeout(rdev->fence_queue, |
| 482 | (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)), |
| 483 | timeout); |
| 484 | } |
| 485 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 486 | if (target_seq[i]) { |
| 487 | radeon_irq_kms_sw_irq_put(rdev, i); |
| 488 | } |
| 489 | } |
| 490 | if (unlikely(r < 0)) { |
| 491 | return r; |
| 492 | } |
| 493 | trace_radeon_fence_wait_end(rdev->ddev, target_seq[ring]); |
| 494 | |
| 495 | if (unlikely(!signaled)) { |
| 496 | /* we were interrupted for some reason and fence |
| 497 | * isn't signaled yet, resume waiting */ |
| 498 | if (r) { |
| 499 | continue; |
| 500 | } |
| 501 | |
| 502 | mutex_lock(&rdev->ring_lock); |
| 503 | for (i = 0, tmp = 0; i < RADEON_NUM_RINGS; ++i) { |
| 504 | if (time_after(rdev->fence_drv[i].last_activity, tmp)) { |
| 505 | tmp = rdev->fence_drv[i].last_activity; |
| 506 | } |
| 507 | } |
| 508 | /* test if somebody else has already decided that this is a lockup */ |
| 509 | if (last_activity != tmp) { |
| 510 | last_activity = tmp; |
| 511 | mutex_unlock(&rdev->ring_lock); |
| 512 | continue; |
| 513 | } |
| 514 | |
| 515 | if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) { |
| 516 | /* good news we believe it's a lockup */ |
| 517 | dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx)\n", |
| 518 | target_seq[ring]); |
| 519 | |
| 520 | /* change last activity so nobody else think there is a lockup */ |
| 521 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 522 | rdev->fence_drv[i].last_activity = jiffies; |
| 523 | } |
| 524 | |
| 525 | /* mark the ring as not ready any more */ |
| 526 | rdev->ring[ring].ready = false; |
| 527 | mutex_unlock(&rdev->ring_lock); |
| 528 | return -EDEADLK; |
| 529 | } |
| 530 | mutex_unlock(&rdev->ring_lock); |
| 531 | } |
| 532 | } |
| 533 | return 0; |
| 534 | } |
| 535 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 536 | /** |
| 537 | * radeon_fence_wait_any - wait for a fence to signal on any ring |
| 538 | * |
| 539 | * @rdev: radeon device pointer |
| 540 | * @fences: radeon fence object(s) |
| 541 | * @intr: use interruptable sleep |
| 542 | * |
| 543 | * Wait for any requested fence to signal (all asics). Fence |
| 544 | * array is indexed by ring id. @intr selects whether to use |
| 545 | * interruptable (true) or non-interruptable (false) sleep when |
| 546 | * waiting for the fences. Used by the suballocator. |
| 547 | * Returns 0 if any fence has passed, error for all other cases. |
| 548 | */ |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 549 | int radeon_fence_wait_any(struct radeon_device *rdev, |
| 550 | struct radeon_fence **fences, |
| 551 | bool intr) |
| 552 | { |
| 553 | uint64_t seq[RADEON_NUM_RINGS]; |
| 554 | unsigned i; |
| 555 | int r; |
| 556 | |
| 557 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 558 | seq[i] = 0; |
| 559 | |
| 560 | if (!fences[i]) { |
| 561 | continue; |
| 562 | } |
| 563 | |
| 564 | if (fences[i]->seq == RADEON_FENCE_SIGNALED_SEQ) { |
| 565 | /* something was allready signaled */ |
| 566 | return 0; |
| 567 | } |
| 568 | |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 569 | seq[i] = fences[i]->seq; |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 570 | } |
| 571 | |
| 572 | r = radeon_fence_wait_any_seq(rdev, seq, intr); |
| 573 | if (r) { |
| 574 | return r; |
| 575 | } |
| 576 | return 0; |
| 577 | } |
| 578 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 579 | /** |
| 580 | * radeon_fence_wait_next_locked - wait for the next fence to signal |
| 581 | * |
| 582 | * @rdev: radeon device pointer |
| 583 | * @ring: ring index the fence is associated with |
| 584 | * |
| 585 | * Wait for the next fence on the requested ring to signal (all asics). |
| 586 | * Returns 0 if the next fence has passed, error for all other cases. |
| 587 | * Caller must hold ring lock. |
| 588 | */ |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 589 | int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring) |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 590 | { |
| 591 | uint64_t seq; |
| 592 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 593 | seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 594 | if (seq >= rdev->fence_drv[ring].sync_seq[ring]) { |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 595 | /* nothing to wait for, last_seq is |
| 596 | already the last emited fence */ |
| 597 | return -ENOENT; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 598 | } |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 599 | return radeon_fence_wait_seq(rdev, seq, ring, false, false); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 600 | } |
| 601 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 602 | /** |
| 603 | * radeon_fence_wait_empty_locked - wait for all fences to signal |
| 604 | * |
| 605 | * @rdev: radeon device pointer |
| 606 | * @ring: ring index the fence is associated with |
| 607 | * |
| 608 | * Wait for all fences on the requested ring to signal (all asics). |
| 609 | * Returns 0 if the fences have passed, error for all other cases. |
| 610 | * Caller must hold ring lock. |
| 611 | */ |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 612 | int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 613 | { |
Christian König | 7ecc45e | 2012-06-29 11:33:12 +0200 | [diff] [blame] | 614 | uint64_t seq = rdev->fence_drv[ring].sync_seq[ring]; |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 615 | int r; |
Christian König | 7ecc45e | 2012-06-29 11:33:12 +0200 | [diff] [blame] | 616 | |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 617 | r = radeon_fence_wait_seq(rdev, seq, ring, false, false); |
| 618 | if (r) { |
Christian König | 7ecc45e | 2012-06-29 11:33:12 +0200 | [diff] [blame] | 619 | if (r == -EDEADLK) { |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 620 | return -EDEADLK; |
Christian König | 7ecc45e | 2012-06-29 11:33:12 +0200 | [diff] [blame] | 621 | } |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 622 | dev_err(rdev->dev, "error waiting for ring[%d] to become idle (%d)\n", |
| 623 | ring, r); |
Christian König | 7ecc45e | 2012-06-29 11:33:12 +0200 | [diff] [blame] | 624 | } |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 625 | return 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 626 | } |
| 627 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 628 | /** |
| 629 | * radeon_fence_ref - take a ref on a fence |
| 630 | * |
| 631 | * @fence: radeon fence object |
| 632 | * |
| 633 | * Take a reference on a fence (all asics). |
| 634 | * Returns the fence. |
| 635 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 636 | struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence) |
| 637 | { |
| 638 | kref_get(&fence->kref); |
| 639 | return fence; |
| 640 | } |
| 641 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 642 | /** |
| 643 | * radeon_fence_unref - remove a ref on a fence |
| 644 | * |
| 645 | * @fence: radeon fence object |
| 646 | * |
| 647 | * Remove a reference on a fence (all asics). |
| 648 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 649 | void radeon_fence_unref(struct radeon_fence **fence) |
| 650 | { |
| 651 | struct radeon_fence *tmp = *fence; |
| 652 | |
| 653 | *fence = NULL; |
| 654 | if (tmp) { |
Paul Bolle | cdb650a | 2011-02-27 01:34:08 +0100 | [diff] [blame] | 655 | kref_put(&tmp->kref, radeon_fence_destroy); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 656 | } |
| 657 | } |
| 658 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 659 | /** |
| 660 | * radeon_fence_count_emitted - get the count of emitted fences |
| 661 | * |
| 662 | * @rdev: radeon device pointer |
| 663 | * @ring: ring index the fence is associated with |
| 664 | * |
| 665 | * Get the number of fences emitted on the requested ring (all asics). |
| 666 | * Returns the number of emitted fences on the ring. Used by the |
| 667 | * dynpm code to ring track activity. |
| 668 | */ |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 669 | unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 670 | { |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 671 | uint64_t emitted; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 672 | |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 673 | /* We are not protected by ring lock when reading the last sequence |
| 674 | * but it's ok to report slightly wrong fence count here. |
| 675 | */ |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 676 | radeon_fence_process(rdev, ring); |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 677 | emitted = rdev->fence_drv[ring].sync_seq[ring] |
| 678 | - atomic64_read(&rdev->fence_drv[ring].last_seq); |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 679 | /* to avoid 32bits warp around */ |
| 680 | if (emitted > 0x10000000) { |
| 681 | emitted = 0x10000000; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 682 | } |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 683 | return (unsigned)emitted; |
Christian König | 47492a2 | 2011-10-20 12:38:09 +0200 | [diff] [blame] | 684 | } |
| 685 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 686 | /** |
| 687 | * radeon_fence_need_sync - do we need a semaphore |
| 688 | * |
| 689 | * @fence: radeon fence object |
| 690 | * @dst_ring: which ring to check against |
| 691 | * |
| 692 | * Check if the fence needs to be synced against another ring |
| 693 | * (all asics). If so, we need to emit a semaphore. |
| 694 | * Returns true if we need to sync with another ring, false if |
| 695 | * not. |
| 696 | */ |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 697 | bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring) |
| 698 | { |
| 699 | struct radeon_fence_driver *fdrv; |
| 700 | |
| 701 | if (!fence) { |
| 702 | return false; |
| 703 | } |
| 704 | |
| 705 | if (fence->ring == dst_ring) { |
| 706 | return false; |
| 707 | } |
| 708 | |
| 709 | /* we are protected by the ring mutex */ |
| 710 | fdrv = &fence->rdev->fence_drv[dst_ring]; |
| 711 | if (fence->seq <= fdrv->sync_seq[fence->ring]) { |
| 712 | return false; |
| 713 | } |
| 714 | |
| 715 | return true; |
| 716 | } |
| 717 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 718 | /** |
| 719 | * radeon_fence_note_sync - record the sync point |
| 720 | * |
| 721 | * @fence: radeon fence object |
| 722 | * @dst_ring: which ring to check against |
| 723 | * |
| 724 | * Note the sequence number at which point the fence will |
| 725 | * be synced with the requested ring (all asics). |
| 726 | */ |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 727 | void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring) |
| 728 | { |
| 729 | struct radeon_fence_driver *dst, *src; |
| 730 | unsigned i; |
| 731 | |
| 732 | if (!fence) { |
| 733 | return; |
| 734 | } |
| 735 | |
| 736 | if (fence->ring == dst_ring) { |
| 737 | return; |
| 738 | } |
| 739 | |
| 740 | /* we are protected by the ring mutex */ |
| 741 | src = &fence->rdev->fence_drv[fence->ring]; |
| 742 | dst = &fence->rdev->fence_drv[dst_ring]; |
| 743 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 744 | if (i == dst_ring) { |
| 745 | continue; |
| 746 | } |
| 747 | dst->sync_seq[i] = max(dst->sync_seq[i], src->sync_seq[i]); |
| 748 | } |
| 749 | } |
| 750 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 751 | /** |
| 752 | * radeon_fence_driver_start_ring - make the fence driver |
| 753 | * ready for use on the requested ring. |
| 754 | * |
| 755 | * @rdev: radeon device pointer |
| 756 | * @ring: ring index to start the fence driver on |
| 757 | * |
| 758 | * Make the fence driver ready for processing (all asics). |
| 759 | * Not all asics have all rings, so each asic will only |
| 760 | * start the fence driver on the rings it has. |
| 761 | * Returns 0 for success, errors for failure. |
| 762 | */ |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 763 | int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 764 | { |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 765 | uint64_t index; |
| 766 | int r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 767 | |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 768 | radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); |
Jerome Glisse | 86a1881 | 2012-12-12 16:43:15 -0500 | [diff] [blame] | 769 | if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) { |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 770 | rdev->fence_drv[ring].scratch_reg = 0; |
| 771 | index = R600_WB_EVENT_OFFSET + ring * 4; |
| 772 | } else { |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 773 | r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg); |
| 774 | if (r) { |
| 775 | dev_err(rdev->dev, "fence failed to get scratch register\n"); |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 776 | return r; |
| 777 | } |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 778 | index = RADEON_WB_SCRATCH_OFFSET + |
| 779 | rdev->fence_drv[ring].scratch_reg - |
| 780 | rdev->scratch.reg_base; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 781 | } |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 782 | rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; |
| 783 | rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; |
Christian König | 31be618 | 2012-07-07 13:10:39 +0200 | [diff] [blame] | 784 | radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 785 | rdev->fence_drv[ring].initialized = true; |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 786 | dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n", |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 787 | ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 788 | return 0; |
| 789 | } |
| 790 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 791 | /** |
| 792 | * radeon_fence_driver_init_ring - init the fence driver |
| 793 | * for the requested ring. |
| 794 | * |
| 795 | * @rdev: radeon device pointer |
| 796 | * @ring: ring index to start the fence driver on |
| 797 | * |
| 798 | * Init the fence driver for the requested ring (all asics). |
| 799 | * Helper function for radeon_fence_driver_init(). |
| 800 | */ |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 801 | static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring) |
| 802 | { |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 803 | int i; |
| 804 | |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 805 | rdev->fence_drv[ring].scratch_reg = -1; |
| 806 | rdev->fence_drv[ring].cpu_addr = NULL; |
| 807 | rdev->fence_drv[ring].gpu_addr = 0; |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 808 | for (i = 0; i < RADEON_NUM_RINGS; ++i) |
| 809 | rdev->fence_drv[ring].sync_seq[i] = 0; |
Jerome Glisse | bb63556 | 2012-05-09 15:34:46 +0200 | [diff] [blame] | 810 | atomic64_set(&rdev->fence_drv[ring].last_seq, 0); |
Jerome Glisse | 3b7a2b2 | 2012-05-09 15:34:47 +0200 | [diff] [blame] | 811 | rdev->fence_drv[ring].last_activity = jiffies; |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 812 | rdev->fence_drv[ring].initialized = false; |
| 813 | } |
| 814 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 815 | /** |
| 816 | * radeon_fence_driver_init - init the fence driver |
| 817 | * for all possible rings. |
| 818 | * |
| 819 | * @rdev: radeon device pointer |
| 820 | * |
| 821 | * Init the fence driver for all possible rings (all asics). |
| 822 | * Not all asics have all rings, so each asic will only |
| 823 | * start the fence driver on the rings it has using |
| 824 | * radeon_fence_driver_start_ring(). |
| 825 | * Returns 0 for success. |
| 826 | */ |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 827 | int radeon_fence_driver_init(struct radeon_device *rdev) |
| 828 | { |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 829 | int ring; |
| 830 | |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 831 | init_waitqueue_head(&rdev->fence_queue); |
Jerome Glisse | 30eb77f | 2011-11-20 20:45:34 +0000 | [diff] [blame] | 832 | for (ring = 0; ring < RADEON_NUM_RINGS; ring++) { |
| 833 | radeon_fence_driver_init_ring(rdev, ring); |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 834 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 835 | if (radeon_debugfs_fence_init(rdev)) { |
Jerome Glisse | 0a0c759 | 2009-12-11 20:36:19 +0100 | [diff] [blame] | 836 | dev_err(rdev->dev, "fence debugfs file creation failed\n"); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 837 | } |
| 838 | return 0; |
| 839 | } |
| 840 | |
Alex Deucher | d66b7ec | 2012-07-17 14:02:37 -0400 | [diff] [blame] | 841 | /** |
| 842 | * radeon_fence_driver_fini - tear down the fence driver |
| 843 | * for all possible rings. |
| 844 | * |
| 845 | * @rdev: radeon device pointer |
| 846 | * |
| 847 | * Tear down the fence driver for all possible rings (all asics). |
| 848 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 849 | void radeon_fence_driver_fini(struct radeon_device *rdev) |
| 850 | { |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 851 | int ring, r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 852 | |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 853 | mutex_lock(&rdev->ring_lock); |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 854 | for (ring = 0; ring < RADEON_NUM_RINGS; ring++) { |
| 855 | if (!rdev->fence_drv[ring].initialized) |
| 856 | continue; |
Jerome Glisse | 5f8f635 | 2012-12-17 11:04:32 -0500 | [diff] [blame] | 857 | r = radeon_fence_wait_empty_locked(rdev, ring); |
| 858 | if (r) { |
| 859 | /* no need to trigger GPU reset as we are unloading */ |
| 860 | radeon_fence_driver_force_completion(rdev); |
| 861 | } |
Jerome Glisse | 0085c950 | 2012-05-09 15:34:55 +0200 | [diff] [blame] | 862 | wake_up_all(&rdev->fence_queue); |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 863 | radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 864 | rdev->fence_drv[ring].initialized = false; |
| 865 | } |
Christian König | 8a47cc9 | 2012-05-09 15:34:48 +0200 | [diff] [blame] | 866 | mutex_unlock(&rdev->ring_lock); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 867 | } |
| 868 | |
Jerome Glisse | 76903b9 | 2012-12-17 10:29:06 -0500 | [diff] [blame] | 869 | /** |
| 870 | * radeon_fence_driver_force_completion - force all fence waiter to complete |
| 871 | * |
| 872 | * @rdev: radeon device pointer |
| 873 | * |
| 874 | * In case of GPU reset failure make sure no process keep waiting on fence |
| 875 | * that will never complete. |
| 876 | */ |
| 877 | void radeon_fence_driver_force_completion(struct radeon_device *rdev) |
| 878 | { |
| 879 | int ring; |
| 880 | |
| 881 | for (ring = 0; ring < RADEON_NUM_RINGS; ring++) { |
| 882 | if (!rdev->fence_drv[ring].initialized) |
| 883 | continue; |
| 884 | radeon_fence_write(rdev, rdev->fence_drv[ring].sync_seq[ring], ring); |
| 885 | } |
| 886 | } |
| 887 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 888 | |
| 889 | /* |
| 890 | * Fence debugfs |
| 891 | */ |
| 892 | #if defined(CONFIG_DEBUG_FS) |
| 893 | static int radeon_debugfs_fence_info(struct seq_file *m, void *data) |
| 894 | { |
| 895 | struct drm_info_node *node = (struct drm_info_node *)m->private; |
| 896 | struct drm_device *dev = node->minor->dev; |
| 897 | struct radeon_device *rdev = dev->dev_private; |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 898 | int i, j; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 899 | |
Alex Deucher | 7465280 | 2011-08-25 13:39:48 -0400 | [diff] [blame] | 900 | for (i = 0; i < RADEON_NUM_RINGS; ++i) { |
| 901 | if (!rdev->fence_drv[i].initialized) |
| 902 | continue; |
| 903 | |
| 904 | seq_printf(m, "--- ring %d ---\n", i); |
Dave Airlie | d3029b4 | 2012-05-09 17:27:29 +0100 | [diff] [blame] | 905 | seq_printf(m, "Last signaled fence 0x%016llx\n", |
| 906 | (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq)); |
Christian König | 68e250b | 2012-05-10 15:57:31 +0200 | [diff] [blame] | 907 | seq_printf(m, "Last emitted 0x%016llx\n", |
| 908 | rdev->fence_drv[i].sync_seq[i]); |
| 909 | |
| 910 | for (j = 0; j < RADEON_NUM_RINGS; ++j) { |
| 911 | if (i != j && rdev->fence_drv[j].initialized) |
| 912 | seq_printf(m, "Last sync to ring %d 0x%016llx\n", |
| 913 | j, rdev->fence_drv[i].sync_seq[j]); |
| 914 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 915 | } |
| 916 | return 0; |
| 917 | } |
| 918 | |
| 919 | static struct drm_info_list radeon_debugfs_fence_list[] = { |
| 920 | {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL}, |
| 921 | }; |
| 922 | #endif |
| 923 | |
| 924 | int radeon_debugfs_fence_init(struct radeon_device *rdev) |
| 925 | { |
| 926 | #if defined(CONFIG_DEBUG_FS) |
| 927 | return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1); |
| 928 | #else |
| 929 | return 0; |
| 930 | #endif |
| 931 | } |