David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 1 | /* |
| 2 | * QLogic iSCSI HBA Driver |
| 3 | * Copyright (c) 2003-2006 QLogic Corporation |
| 4 | * |
| 5 | * See LICENSE.qla4xxx for copyright and licensing details. |
| 6 | */ |
| 7 | |
| 8 | #include "ql4_def.h" |
| 9 | |
| 10 | |
| 11 | /** |
| 12 | * qla4xxx_mailbox_command - issues mailbox commands |
| 13 | * @ha: Pointer to host adapter structure. |
| 14 | * @inCount: number of mailbox registers to load. |
| 15 | * @outCount: number of mailbox registers to return. |
| 16 | * @mbx_cmd: data pointer for mailbox in registers. |
| 17 | * @mbx_sts: data pointer for mailbox out registers. |
| 18 | * |
| 19 | * This routine sssue mailbox commands and waits for completion. |
| 20 | * If outCount is 0, this routine completes successfully WITHOUT waiting |
| 21 | * for the mailbox command to complete. |
| 22 | **/ |
| 23 | int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount, |
| 24 | uint8_t outCount, uint32_t *mbx_cmd, |
| 25 | uint32_t *mbx_sts) |
| 26 | { |
| 27 | int status = QLA_ERROR; |
| 28 | uint8_t i; |
| 29 | u_long wait_count; |
| 30 | uint32_t intr_status; |
| 31 | unsigned long flags = 0; |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 32 | |
| 33 | /* Make sure that pointers are valid */ |
| 34 | if (!mbx_cmd || !mbx_sts) { |
| 35 | DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts " |
| 36 | "pointer\n", ha->host_no, __func__)); |
David C Somayajulu | 477ffb9 | 2007-01-22 12:26:11 -0800 | [diff] [blame] | 37 | return status; |
| 38 | } |
| 39 | /* Mailbox code active */ |
| 40 | wait_count = MBOX_TOV * 100; |
| 41 | |
| 42 | while (wait_count--) { |
| 43 | mutex_lock(&ha->mbox_sem); |
| 44 | if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) { |
| 45 | set_bit(AF_MBOX_COMMAND, &ha->flags); |
| 46 | mutex_unlock(&ha->mbox_sem); |
| 47 | break; |
| 48 | } |
| 49 | mutex_unlock(&ha->mbox_sem); |
| 50 | if (!wait_count) { |
| 51 | DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n", |
| 52 | ha->host_no, __func__)); |
| 53 | return status; |
| 54 | } |
| 55 | msleep(10); |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | /* To prevent overwriting mailbox registers for a command that has |
| 59 | * not yet been serviced, check to see if a previously issued |
| 60 | * mailbox command is interrupting. |
| 61 | * ----------------------------------------------------------------- |
| 62 | */ |
| 63 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 64 | intr_status = readl(&ha->reg->ctrl_status); |
| 65 | if (intr_status & CSR_SCSI_PROCESSOR_INTR) { |
| 66 | /* Service existing interrupt */ |
| 67 | qla4xxx_interrupt_service_routine(ha, intr_status); |
| 68 | clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags); |
| 69 | } |
| 70 | |
| 71 | /* Send the mailbox command to the firmware */ |
| 72 | ha->mbox_status_count = outCount; |
| 73 | for (i = 0; i < outCount; i++) |
| 74 | ha->mbox_status[i] = 0; |
| 75 | |
| 76 | /* Load all mailbox registers, except mailbox 0. */ |
| 77 | for (i = 1; i < inCount; i++) |
| 78 | writel(mbx_cmd[i], &ha->reg->mailbox[i]); |
| 79 | |
| 80 | /* Wakeup firmware */ |
| 81 | writel(mbx_cmd[0], &ha->reg->mailbox[0]); |
| 82 | readl(&ha->reg->mailbox[0]); |
| 83 | writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status); |
| 84 | readl(&ha->reg->ctrl_status); |
| 85 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 86 | |
| 87 | /* Wait for completion */ |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 88 | |
| 89 | /* |
| 90 | * If we don't want status, don't wait for the mailbox command to |
| 91 | * complete. For example, MBOX_CMD_RESET_FW doesn't return status, |
| 92 | * you must poll the inbound Interrupt Mask for completion. |
| 93 | */ |
| 94 | if (outCount == 0) { |
| 95 | status = QLA_SUCCESS; |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 96 | goto mbox_exit; |
| 97 | } |
| 98 | /* Wait for command to complete */ |
| 99 | wait_count = jiffies + MBOX_TOV * HZ; |
| 100 | while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) { |
| 101 | if (time_after_eq(jiffies, wait_count)) |
| 102 | break; |
| 103 | |
| 104 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 105 | intr_status = readl(&ha->reg->ctrl_status); |
| 106 | if (intr_status & INTR_PENDING) { |
| 107 | /* |
| 108 | * Service the interrupt. |
| 109 | * The ISR will save the mailbox status registers |
| 110 | * to a temporary storage location in the adapter |
| 111 | * structure. |
| 112 | */ |
| 113 | ha->mbox_status_count = outCount; |
| 114 | qla4xxx_interrupt_service_routine(ha, intr_status); |
| 115 | } |
| 116 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 117 | msleep(10); |
| 118 | } |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 119 | |
| 120 | /* Check for mailbox timeout. */ |
| 121 | if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) { |
| 122 | DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...," |
| 123 | " Scheduling Adapter Reset\n", ha->host_no, |
| 124 | mbx_cmd[0])); |
| 125 | ha->mailbox_timeout_count++; |
| 126 | mbx_sts[0] = (-1); |
| 127 | set_bit(DPC_RESET_HA, &ha->dpc_flags); |
| 128 | goto mbox_exit; |
| 129 | } |
| 130 | |
| 131 | /* |
| 132 | * Copy the mailbox out registers to the caller's mailbox in/out |
| 133 | * structure. |
| 134 | */ |
| 135 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 136 | for (i = 0; i < outCount; i++) |
| 137 | mbx_sts[i] = ha->mbox_status[i]; |
| 138 | |
| 139 | /* Set return status and error flags (if applicable). */ |
| 140 | switch (ha->mbox_status[0]) { |
| 141 | case MBOX_STS_COMMAND_COMPLETE: |
| 142 | status = QLA_SUCCESS; |
| 143 | break; |
| 144 | |
| 145 | case MBOX_STS_INTERMEDIATE_COMPLETION: |
| 146 | status = QLA_SUCCESS; |
| 147 | break; |
| 148 | |
| 149 | case MBOX_STS_BUSY: |
| 150 | DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n", |
| 151 | ha->host_no, __func__, mbx_cmd[0])); |
| 152 | ha->mailbox_timeout_count++; |
| 153 | break; |
| 154 | |
| 155 | default: |
| 156 | DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, " |
| 157 | "sts = %08X ****\n", ha->host_no, __func__, |
| 158 | mbx_cmd[0], mbx_sts[0])); |
| 159 | break; |
| 160 | } |
| 161 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 162 | |
| 163 | mbox_exit: |
David C Somayajulu | 477ffb9 | 2007-01-22 12:26:11 -0800 | [diff] [blame] | 164 | mutex_lock(&ha->mbox_sem); |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 165 | clear_bit(AF_MBOX_COMMAND, &ha->flags); |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 166 | mutex_unlock(&ha->mbox_sem); |
David C Somayajulu | 477ffb9 | 2007-01-22 12:26:11 -0800 | [diff] [blame] | 167 | clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags); |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 168 | |
| 169 | return status; |
| 170 | } |
| 171 | |
| 172 | |
| 173 | /** |
| 174 | * qla4xxx_issue_iocb - issue mailbox iocb command |
| 175 | * @ha: adapter state pointer. |
| 176 | * @buffer: buffer pointer. |
| 177 | * @phys_addr: physical address of buffer. |
| 178 | * @size: size of buffer. |
| 179 | * |
| 180 | * Issues iocbs via mailbox commands. |
| 181 | * TARGET_QUEUE_LOCK must be released. |
| 182 | * ADAPTER_STATE_LOCK must be released. |
| 183 | **/ |
| 184 | int |
| 185 | qla4xxx_issue_iocb(struct scsi_qla_host * ha, void *buffer, |
| 186 | dma_addr_t phys_addr, size_t size) |
| 187 | { |
| 188 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 189 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 190 | int status; |
| 191 | |
| 192 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 193 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 194 | mbox_cmd[0] = MBOX_CMD_EXECUTE_IOCB_A64; |
| 195 | mbox_cmd[1] = 0; |
| 196 | mbox_cmd[2] = LSDW(phys_addr); |
| 197 | mbox_cmd[3] = MSDW(phys_addr); |
| 198 | status = qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]); |
| 199 | return status; |
| 200 | } |
| 201 | |
| 202 | int qla4xxx_conn_close_sess_logout(struct scsi_qla_host * ha, |
| 203 | uint16_t fw_ddb_index, |
| 204 | uint16_t connection_id, |
| 205 | uint16_t option) |
| 206 | { |
| 207 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 208 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 209 | |
| 210 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 211 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 212 | mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT; |
| 213 | mbox_cmd[1] = fw_ddb_index; |
| 214 | mbox_cmd[2] = connection_id; |
| 215 | mbox_cmd[3] = LOGOUT_OPTION_RELOGIN; |
| 216 | if (qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]) != |
| 217 | QLA_SUCCESS) { |
| 218 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT " |
| 219 | "option %04x failed sts %04X %04X", |
| 220 | ha->host_no, __func__, |
| 221 | option, mbox_sts[0], mbox_sts[1])); |
| 222 | if (mbox_sts[0] == 0x4005) |
| 223 | DEBUG2(printk("%s reason %04X\n", __func__, |
| 224 | mbox_sts[1])); |
| 225 | } |
| 226 | return QLA_SUCCESS; |
| 227 | } |
| 228 | |
| 229 | int qla4xxx_clear_database_entry(struct scsi_qla_host * ha, |
| 230 | uint16_t fw_ddb_index) |
| 231 | { |
| 232 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 233 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 234 | |
| 235 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 236 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 237 | mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY; |
| 238 | mbox_cmd[1] = fw_ddb_index; |
| 239 | if (qla4xxx_mailbox_command(ha, 2, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 240 | QLA_SUCCESS) |
| 241 | return QLA_ERROR; |
| 242 | |
| 243 | return QLA_SUCCESS; |
| 244 | } |
| 245 | |
| 246 | /** |
| 247 | * qla4xxx_initialize_fw_cb - initializes firmware control block. |
| 248 | * @ha: Pointer to host adapter structure. |
| 249 | **/ |
| 250 | int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha) |
| 251 | { |
| 252 | struct init_fw_ctrl_blk *init_fw_cb; |
| 253 | dma_addr_t init_fw_cb_dma; |
| 254 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 255 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 256 | int status = QLA_ERROR; |
| 257 | |
| 258 | init_fw_cb = dma_alloc_coherent(&ha->pdev->dev, |
| 259 | sizeof(struct init_fw_ctrl_blk), |
| 260 | &init_fw_cb_dma, GFP_KERNEL); |
| 261 | if (init_fw_cb == NULL) { |
| 262 | DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n", |
| 263 | ha->host_no, __func__)); |
| 264 | return 10; |
| 265 | } |
| 266 | memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk)); |
| 267 | |
| 268 | /* Get Initialize Firmware Control Block. */ |
| 269 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 270 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 271 | mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK; |
| 272 | mbox_cmd[2] = LSDW(init_fw_cb_dma); |
| 273 | mbox_cmd[3] = MSDW(init_fw_cb_dma); |
| 274 | if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != |
| 275 | QLA_SUCCESS) { |
| 276 | dma_free_coherent(&ha->pdev->dev, |
| 277 | sizeof(struct init_fw_ctrl_blk), |
| 278 | init_fw_cb, init_fw_cb_dma); |
| 279 | return status; |
| 280 | } |
| 281 | |
| 282 | /* Initialize request and response queues. */ |
| 283 | qla4xxx_init_rings(ha); |
| 284 | |
| 285 | /* Fill in the request and response queue information. */ |
| 286 | init_fw_cb->ReqQConsumerIndex = cpu_to_le16(ha->request_out); |
| 287 | init_fw_cb->ComplQProducerIndex = cpu_to_le16(ha->response_in); |
| 288 | init_fw_cb->ReqQLen = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH); |
| 289 | init_fw_cb->ComplQLen = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH); |
| 290 | init_fw_cb->ReqQAddrLo = cpu_to_le32(LSDW(ha->request_dma)); |
| 291 | init_fw_cb->ReqQAddrHi = cpu_to_le32(MSDW(ha->request_dma)); |
| 292 | init_fw_cb->ComplQAddrLo = cpu_to_le32(LSDW(ha->response_dma)); |
| 293 | init_fw_cb->ComplQAddrHi = cpu_to_le32(MSDW(ha->response_dma)); |
| 294 | init_fw_cb->ShadowRegBufAddrLo = |
| 295 | cpu_to_le32(LSDW(ha->shadow_regs_dma)); |
| 296 | init_fw_cb->ShadowRegBufAddrHi = |
| 297 | cpu_to_le32(MSDW(ha->shadow_regs_dma)); |
| 298 | |
| 299 | /* Set up required options. */ |
| 300 | init_fw_cb->FwOptions |= |
| 301 | __constant_cpu_to_le16(FWOPT_SESSION_MODE | |
| 302 | FWOPT_INITIATOR_MODE); |
| 303 | init_fw_cb->FwOptions &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE); |
| 304 | |
| 305 | /* Save some info in adapter structure. */ |
| 306 | ha->firmware_options = le16_to_cpu(init_fw_cb->FwOptions); |
| 307 | ha->tcp_options = le16_to_cpu(init_fw_cb->TCPOptions); |
| 308 | ha->heartbeat_interval = init_fw_cb->HeartbeatInterval; |
| 309 | memcpy(ha->ip_address, init_fw_cb->IPAddr, |
| 310 | min(sizeof(ha->ip_address), sizeof(init_fw_cb->IPAddr))); |
| 311 | memcpy(ha->subnet_mask, init_fw_cb->SubnetMask, |
| 312 | min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->SubnetMask))); |
| 313 | memcpy(ha->gateway, init_fw_cb->GatewayIPAddr, |
| 314 | min(sizeof(ha->gateway), sizeof(init_fw_cb->GatewayIPAddr))); |
| 315 | memcpy(ha->name_string, init_fw_cb->iSCSINameString, |
| 316 | min(sizeof(ha->name_string), |
| 317 | sizeof(init_fw_cb->iSCSINameString))); |
| 318 | memcpy(ha->alias, init_fw_cb->Alias, |
| 319 | min(sizeof(ha->alias), sizeof(init_fw_cb->Alias))); |
| 320 | |
| 321 | /* Save Command Line Paramater info */ |
| 322 | ha->port_down_retry_count = le16_to_cpu(init_fw_cb->KeepAliveTimeout); |
| 323 | ha->discovery_wait = ql4xdiscoverywait; |
| 324 | |
| 325 | /* Send Initialize Firmware Control Block. */ |
| 326 | mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE; |
| 327 | mbox_cmd[1] = 0; |
| 328 | mbox_cmd[2] = LSDW(init_fw_cb_dma); |
| 329 | mbox_cmd[3] = MSDW(init_fw_cb_dma); |
| 330 | if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) == |
| 331 | QLA_SUCCESS) |
| 332 | status = QLA_SUCCESS; |
| 333 | else { |
| 334 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_INITIALIZE_FIRMWARE " |
| 335 | "failed w/ status %04X\n", ha->host_no, __func__, |
| 336 | mbox_sts[0])); |
| 337 | } |
| 338 | dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk), |
| 339 | init_fw_cb, init_fw_cb_dma); |
| 340 | |
| 341 | return status; |
| 342 | } |
| 343 | |
| 344 | /** |
| 345 | * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP |
| 346 | * @ha: Pointer to host adapter structure. |
| 347 | **/ |
| 348 | int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha) |
| 349 | { |
| 350 | struct init_fw_ctrl_blk *init_fw_cb; |
| 351 | dma_addr_t init_fw_cb_dma; |
| 352 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 353 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 354 | |
| 355 | init_fw_cb = dma_alloc_coherent(&ha->pdev->dev, |
| 356 | sizeof(struct init_fw_ctrl_blk), |
| 357 | &init_fw_cb_dma, GFP_KERNEL); |
| 358 | if (init_fw_cb == NULL) { |
| 359 | printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no, |
| 360 | __func__); |
| 361 | return 10; |
| 362 | } |
| 363 | |
| 364 | /* Get Initialize Firmware Control Block. */ |
| 365 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 366 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 367 | memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk)); |
| 368 | mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK; |
| 369 | mbox_cmd[2] = LSDW(init_fw_cb_dma); |
| 370 | mbox_cmd[3] = MSDW(init_fw_cb_dma); |
| 371 | |
| 372 | if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != |
| 373 | QLA_SUCCESS) { |
| 374 | DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n", |
| 375 | ha->host_no, __func__)); |
| 376 | dma_free_coherent(&ha->pdev->dev, |
| 377 | sizeof(struct init_fw_ctrl_blk), |
| 378 | init_fw_cb, init_fw_cb_dma); |
| 379 | return QLA_ERROR; |
| 380 | } |
| 381 | |
| 382 | /* Save IP Address. */ |
| 383 | memcpy(ha->ip_address, init_fw_cb->IPAddr, |
| 384 | min(sizeof(ha->ip_address), sizeof(init_fw_cb->IPAddr))); |
| 385 | memcpy(ha->subnet_mask, init_fw_cb->SubnetMask, |
| 386 | min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->SubnetMask))); |
| 387 | memcpy(ha->gateway, init_fw_cb->GatewayIPAddr, |
| 388 | min(sizeof(ha->gateway), sizeof(init_fw_cb->GatewayIPAddr))); |
| 389 | |
| 390 | dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk), |
| 391 | init_fw_cb, init_fw_cb_dma); |
| 392 | |
| 393 | return QLA_SUCCESS; |
| 394 | } |
| 395 | |
| 396 | /** |
| 397 | * qla4xxx_get_firmware_state - gets firmware state of HBA |
| 398 | * @ha: Pointer to host adapter structure. |
| 399 | **/ |
| 400 | int qla4xxx_get_firmware_state(struct scsi_qla_host * ha) |
| 401 | { |
| 402 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 403 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 404 | |
| 405 | /* Get firmware version */ |
| 406 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 407 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 408 | mbox_cmd[0] = MBOX_CMD_GET_FW_STATE; |
| 409 | if (qla4xxx_mailbox_command(ha, 1, 4, &mbox_cmd[0], &mbox_sts[0]) != |
| 410 | QLA_SUCCESS) { |
| 411 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ " |
| 412 | "status %04X\n", ha->host_no, __func__, |
| 413 | mbox_sts[0])); |
| 414 | return QLA_ERROR; |
| 415 | } |
| 416 | ha->firmware_state = mbox_sts[1]; |
| 417 | ha->board_id = mbox_sts[2]; |
| 418 | ha->addl_fw_state = mbox_sts[3]; |
| 419 | DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n", |
| 420 | ha->host_no, __func__, ha->firmware_state);) |
| 421 | |
| 422 | return QLA_SUCCESS; |
| 423 | } |
| 424 | |
| 425 | /** |
| 426 | * qla4xxx_get_firmware_status - retrieves firmware status |
| 427 | * @ha: Pointer to host adapter structure. |
| 428 | **/ |
| 429 | int qla4xxx_get_firmware_status(struct scsi_qla_host * ha) |
| 430 | { |
| 431 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 432 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 433 | |
| 434 | /* Get firmware version */ |
| 435 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 436 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 437 | mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS; |
| 438 | if (qla4xxx_mailbox_command(ha, 1, 3, &mbox_cmd[0], &mbox_sts[0]) != |
| 439 | QLA_SUCCESS) { |
| 440 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ " |
| 441 | "status %04X\n", ha->host_no, __func__, |
| 442 | mbox_sts[0])); |
| 443 | return QLA_ERROR; |
| 444 | } |
| 445 | |
| 446 | /* High-water mark of IOCBs */ |
| 447 | ha->iocb_hiwat = mbox_sts[2]; |
| 448 | if (ha->iocb_hiwat > IOCB_HIWAT_CUSHION) |
| 449 | ha->iocb_hiwat -= IOCB_HIWAT_CUSHION; |
| 450 | else |
| 451 | dev_info(&ha->pdev->dev, "WARNING!!! You have less than %d " |
| 452 | "firmare IOCBs available (%d).\n", |
| 453 | IOCB_HIWAT_CUSHION, ha->iocb_hiwat); |
| 454 | |
| 455 | return QLA_SUCCESS; |
| 456 | } |
| 457 | |
| 458 | /** |
| 459 | * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry |
| 460 | * @ha: Pointer to host adapter structure. |
| 461 | * @fw_ddb_index: Firmware's device database index |
| 462 | * @fw_ddb_entry: Pointer to firmware's device database entry structure |
| 463 | * @num_valid_ddb_entries: Pointer to number of valid ddb entries |
| 464 | * @next_ddb_index: Pointer to next valid device database index |
| 465 | * @fw_ddb_device_state: Pointer to device state |
| 466 | **/ |
| 467 | int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha, |
| 468 | uint16_t fw_ddb_index, |
| 469 | struct dev_db_entry *fw_ddb_entry, |
| 470 | dma_addr_t fw_ddb_entry_dma, |
| 471 | uint32_t *num_valid_ddb_entries, |
| 472 | uint32_t *next_ddb_index, |
| 473 | uint32_t *fw_ddb_device_state, |
| 474 | uint32_t *conn_err_detail, |
| 475 | uint16_t *tcp_source_port_num, |
| 476 | uint16_t *connection_id) |
| 477 | { |
| 478 | int status = QLA_ERROR; |
| 479 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 480 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 481 | |
| 482 | /* Make sure the device index is valid */ |
| 483 | if (fw_ddb_index >= MAX_DDB_ENTRIES) { |
| 484 | DEBUG2(printk("scsi%ld: %s: index [%d] out of range.\n", |
| 485 | ha->host_no, __func__, fw_ddb_index)); |
| 486 | goto exit_get_fwddb; |
| 487 | } |
| 488 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 489 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 490 | mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY; |
| 491 | mbox_cmd[1] = (uint32_t) fw_ddb_index; |
| 492 | mbox_cmd[2] = LSDW(fw_ddb_entry_dma); |
| 493 | mbox_cmd[3] = MSDW(fw_ddb_entry_dma); |
| 494 | if (qla4xxx_mailbox_command(ha, 4, 7, &mbox_cmd[0], &mbox_sts[0]) == |
| 495 | QLA_ERROR) { |
| 496 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed" |
| 497 | " with status 0x%04X\n", ha->host_no, __func__, |
| 498 | mbox_sts[0])); |
| 499 | goto exit_get_fwddb; |
| 500 | } |
| 501 | if (fw_ddb_index != mbox_sts[1]) { |
| 502 | DEBUG2(printk("scsi%ld: %s: index mismatch [%d] != [%d].\n", |
| 503 | ha->host_no, __func__, fw_ddb_index, |
| 504 | mbox_sts[1])); |
| 505 | goto exit_get_fwddb; |
| 506 | } |
| 507 | if (fw_ddb_entry) { |
| 508 | dev_info(&ha->pdev->dev, "DDB[%d] MB0 %04x Tot %d Next %d " |
| 509 | "State %04x ConnErr %08x %d.%d.%d.%d:%04d \"%s\"\n", |
| 510 | fw_ddb_index, mbox_sts[0], mbox_sts[2], mbox_sts[3], |
| 511 | mbox_sts[4], mbox_sts[5], fw_ddb_entry->ipAddr[0], |
| 512 | fw_ddb_entry->ipAddr[1], fw_ddb_entry->ipAddr[2], |
| 513 | fw_ddb_entry->ipAddr[3], |
| 514 | le16_to_cpu(fw_ddb_entry->portNumber), |
| 515 | fw_ddb_entry->iscsiName); |
| 516 | } |
| 517 | if (num_valid_ddb_entries) |
| 518 | *num_valid_ddb_entries = mbox_sts[2]; |
| 519 | if (next_ddb_index) |
| 520 | *next_ddb_index = mbox_sts[3]; |
| 521 | if (fw_ddb_device_state) |
| 522 | *fw_ddb_device_state = mbox_sts[4]; |
| 523 | |
| 524 | /* |
| 525 | * RA: This mailbox has been changed to pass connection error and |
| 526 | * details. Its true for ISP4010 as per Version E - Not sure when it |
| 527 | * was changed. Get the time2wait from the fw_dd_entry field : |
| 528 | * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY |
| 529 | * struct. |
| 530 | */ |
| 531 | if (conn_err_detail) |
| 532 | *conn_err_detail = mbox_sts[5]; |
| 533 | if (tcp_source_port_num) |
| 534 | *tcp_source_port_num = (uint16_t) mbox_sts[6] >> 16; |
| 535 | if (connection_id) |
| 536 | *connection_id = (uint16_t) mbox_sts[6] & 0x00FF; |
| 537 | status = QLA_SUCCESS; |
| 538 | |
| 539 | exit_get_fwddb: |
| 540 | return status; |
| 541 | } |
| 542 | |
| 543 | /** |
| 544 | * qla4xxx_set_fwddb_entry - sets a ddb entry. |
| 545 | * @ha: Pointer to host adapter structure. |
| 546 | * @fw_ddb_index: Firmware's device database index |
| 547 | * @fw_ddb_entry: Pointer to firmware's ddb entry structure, or NULL. |
| 548 | * |
| 549 | * This routine initializes or updates the adapter's device database |
| 550 | * entry for the specified device. It also triggers a login for the |
| 551 | * specified device. Therefore, it may also be used as a secondary |
| 552 | * login routine when a NULL pointer is specified for the fw_ddb_entry. |
| 553 | **/ |
| 554 | int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index, |
| 555 | dma_addr_t fw_ddb_entry_dma) |
| 556 | { |
| 557 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 558 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 559 | |
| 560 | /* Do not wait for completion. The firmware will send us an |
| 561 | * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status. |
| 562 | */ |
| 563 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 564 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 565 | |
| 566 | mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY; |
| 567 | mbox_cmd[1] = (uint32_t) fw_ddb_index; |
| 568 | mbox_cmd[2] = LSDW(fw_ddb_entry_dma); |
| 569 | mbox_cmd[3] = MSDW(fw_ddb_entry_dma); |
| 570 | return qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]); |
| 571 | } |
| 572 | |
| 573 | int qla4xxx_conn_open_session_login(struct scsi_qla_host * ha, |
| 574 | uint16_t fw_ddb_index) |
| 575 | { |
| 576 | int status = QLA_ERROR; |
| 577 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 578 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 579 | |
| 580 | /* Do not wait for completion. The firmware will send us an |
| 581 | * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status. |
| 582 | */ |
| 583 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 584 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 585 | mbox_cmd[0] = MBOX_CMD_CONN_OPEN_SESS_LOGIN; |
| 586 | mbox_cmd[1] = (uint32_t) fw_ddb_index; |
| 587 | mbox_cmd[2] = 0; |
| 588 | mbox_cmd[3] = 0; |
| 589 | mbox_cmd[4] = 0; |
| 590 | status = qla4xxx_mailbox_command(ha, 4, 0, &mbox_cmd[0], &mbox_sts[0]); |
| 591 | DEBUG2(printk("%s fw_ddb_index=%d status=%d mbx0_1=0x%x :0x%x\n", |
| 592 | __func__, fw_ddb_index, status, mbox_sts[0], |
| 593 | mbox_sts[1]);) |
| 594 | |
| 595 | return status; |
| 596 | } |
| 597 | |
| 598 | /** |
| 599 | * qla4xxx_get_crash_record - retrieves crash record. |
| 600 | * @ha: Pointer to host adapter structure. |
| 601 | * |
| 602 | * This routine retrieves a crash record from the QLA4010 after an 8002h aen. |
| 603 | **/ |
| 604 | void qla4xxx_get_crash_record(struct scsi_qla_host * ha) |
| 605 | { |
| 606 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 607 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 608 | struct crash_record *crash_record = NULL; |
| 609 | dma_addr_t crash_record_dma = 0; |
| 610 | uint32_t crash_record_size = 0; |
| 611 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 612 | memset(&mbox_sts, 0, sizeof(mbox_cmd)); |
| 613 | |
| 614 | /* Get size of crash record. */ |
| 615 | mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD; |
| 616 | if (qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 617 | QLA_SUCCESS) { |
| 618 | DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n", |
| 619 | ha->host_no, __func__)); |
| 620 | goto exit_get_crash_record; |
| 621 | } |
| 622 | crash_record_size = mbox_sts[4]; |
| 623 | if (crash_record_size == 0) { |
| 624 | DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n", |
| 625 | ha->host_no, __func__)); |
| 626 | goto exit_get_crash_record; |
| 627 | } |
| 628 | |
| 629 | /* Alloc Memory for Crash Record. */ |
| 630 | crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size, |
| 631 | &crash_record_dma, GFP_KERNEL); |
| 632 | if (crash_record == NULL) |
| 633 | goto exit_get_crash_record; |
| 634 | |
| 635 | /* Get Crash Record. */ |
| 636 | mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD; |
| 637 | mbox_cmd[2] = LSDW(crash_record_dma); |
| 638 | mbox_cmd[3] = MSDW(crash_record_dma); |
| 639 | mbox_cmd[4] = crash_record_size; |
| 640 | if (qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 641 | QLA_SUCCESS) |
| 642 | goto exit_get_crash_record; |
| 643 | |
| 644 | /* Dump Crash Record. */ |
| 645 | |
| 646 | exit_get_crash_record: |
| 647 | if (crash_record) |
| 648 | dma_free_coherent(&ha->pdev->dev, crash_record_size, |
| 649 | crash_record, crash_record_dma); |
| 650 | } |
| 651 | |
| 652 | /** |
| 653 | * qla4xxx_get_conn_event_log - retrieves connection event log |
| 654 | * @ha: Pointer to host adapter structure. |
| 655 | **/ |
| 656 | void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha) |
| 657 | { |
| 658 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 659 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 660 | struct conn_event_log_entry *event_log = NULL; |
| 661 | dma_addr_t event_log_dma = 0; |
| 662 | uint32_t event_log_size = 0; |
| 663 | uint32_t num_valid_entries; |
| 664 | uint32_t oldest_entry = 0; |
| 665 | uint32_t max_event_log_entries; |
| 666 | uint8_t i; |
| 667 | |
| 668 | |
| 669 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 670 | memset(&mbox_sts, 0, sizeof(mbox_cmd)); |
| 671 | |
| 672 | /* Get size of crash record. */ |
| 673 | mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG; |
| 674 | if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 675 | QLA_SUCCESS) |
| 676 | goto exit_get_event_log; |
| 677 | |
| 678 | event_log_size = mbox_sts[4]; |
| 679 | if (event_log_size == 0) |
| 680 | goto exit_get_event_log; |
| 681 | |
| 682 | /* Alloc Memory for Crash Record. */ |
| 683 | event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size, |
| 684 | &event_log_dma, GFP_KERNEL); |
| 685 | if (event_log == NULL) |
| 686 | goto exit_get_event_log; |
| 687 | |
| 688 | /* Get Crash Record. */ |
| 689 | mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG; |
| 690 | mbox_cmd[2] = LSDW(event_log_dma); |
| 691 | mbox_cmd[3] = MSDW(event_log_dma); |
| 692 | if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 693 | QLA_SUCCESS) { |
| 694 | DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event " |
| 695 | "log!\n", ha->host_no, __func__)); |
| 696 | goto exit_get_event_log; |
| 697 | } |
| 698 | |
| 699 | /* Dump Event Log. */ |
| 700 | num_valid_entries = mbox_sts[1]; |
| 701 | |
| 702 | max_event_log_entries = event_log_size / |
| 703 | sizeof(struct conn_event_log_entry); |
| 704 | |
| 705 | if (num_valid_entries > max_event_log_entries) |
| 706 | oldest_entry = num_valid_entries % max_event_log_entries; |
| 707 | |
| 708 | DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n", |
| 709 | ha->host_no, num_valid_entries)); |
| 710 | |
Andrew Vasquez | 11010fe | 2006-10-06 09:54:59 -0700 | [diff] [blame] | 711 | if (ql4xextended_error_logging == 3) { |
David Somayajulu | afaf5a2 | 2006-09-19 10:28:00 -0700 | [diff] [blame] | 712 | if (oldest_entry == 0) { |
| 713 | /* Circular Buffer has not wrapped around */ |
| 714 | for (i=0; i < num_valid_entries; i++) { |
| 715 | qla4xxx_dump_buffer((uint8_t *)event_log+ |
| 716 | (i*sizeof(*event_log)), |
| 717 | sizeof(*event_log)); |
| 718 | } |
| 719 | } |
| 720 | else { |
| 721 | /* Circular Buffer has wrapped around - |
| 722 | * display accordingly*/ |
| 723 | for (i=oldest_entry; i < max_event_log_entries; i++) { |
| 724 | qla4xxx_dump_buffer((uint8_t *)event_log+ |
| 725 | (i*sizeof(*event_log)), |
| 726 | sizeof(*event_log)); |
| 727 | } |
| 728 | for (i=0; i < oldest_entry; i++) { |
| 729 | qla4xxx_dump_buffer((uint8_t *)event_log+ |
| 730 | (i*sizeof(*event_log)), |
| 731 | sizeof(*event_log)); |
| 732 | } |
| 733 | } |
| 734 | } |
| 735 | |
| 736 | exit_get_event_log: |
| 737 | if (event_log) |
| 738 | dma_free_coherent(&ha->pdev->dev, event_log_size, event_log, |
| 739 | event_log_dma); |
| 740 | } |
| 741 | |
| 742 | /** |
| 743 | * qla4xxx_reset_lun - issues LUN Reset |
| 744 | * @ha: Pointer to host adapter structure. |
| 745 | * @db_entry: Pointer to device database entry |
| 746 | * @un_entry: Pointer to lun entry structure |
| 747 | * |
| 748 | * This routine performs a LUN RESET on the specified target/lun. |
| 749 | * The caller must ensure that the ddb_entry and lun_entry pointers |
| 750 | * are valid before calling this routine. |
| 751 | **/ |
| 752 | int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry, |
| 753 | int lun) |
| 754 | { |
| 755 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 756 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 757 | int status = QLA_SUCCESS; |
| 758 | |
| 759 | DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no, |
| 760 | ddb_entry->os_target_id, lun)); |
| 761 | |
| 762 | /* |
| 763 | * Send lun reset command to ISP, so that the ISP will return all |
| 764 | * outstanding requests with RESET status |
| 765 | */ |
| 766 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 767 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 768 | mbox_cmd[0] = MBOX_CMD_LUN_RESET; |
| 769 | mbox_cmd[1] = ddb_entry->fw_ddb_index; |
| 770 | mbox_cmd[2] = lun << 8; |
| 771 | mbox_cmd[5] = 0x01; /* Immediate Command Enable */ |
| 772 | qla4xxx_mailbox_command(ha, 6, 1, &mbox_cmd[0], &mbox_sts[0]); |
| 773 | if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE && |
| 774 | mbox_sts[0] != MBOX_STS_COMMAND_ERROR) |
| 775 | status = QLA_ERROR; |
| 776 | |
| 777 | return status; |
| 778 | } |
| 779 | |
| 780 | |
| 781 | int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr, |
| 782 | uint32_t offset, uint32_t len) |
| 783 | { |
| 784 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 785 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 786 | |
| 787 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 788 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 789 | mbox_cmd[0] = MBOX_CMD_READ_FLASH; |
| 790 | mbox_cmd[1] = LSDW(dma_addr); |
| 791 | mbox_cmd[2] = MSDW(dma_addr); |
| 792 | mbox_cmd[3] = offset; |
| 793 | mbox_cmd[4] = len; |
| 794 | if (qla4xxx_mailbox_command(ha, 5, 2, &mbox_cmd[0], &mbox_sts[0]) != |
| 795 | QLA_SUCCESS) { |
| 796 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ " |
| 797 | "status %04X %04X, offset %08x, len %08x\n", ha->host_no, |
| 798 | __func__, mbox_sts[0], mbox_sts[1], offset, len)); |
| 799 | return QLA_ERROR; |
| 800 | } |
| 801 | return QLA_SUCCESS; |
| 802 | } |
| 803 | |
| 804 | /** |
| 805 | * qla4xxx_get_fw_version - gets firmware version |
| 806 | * @ha: Pointer to host adapter structure. |
| 807 | * |
| 808 | * Retrieves the firmware version on HBA. In QLA4010, mailboxes 2 & 3 may |
| 809 | * hold an address for data. Make sure that we write 0 to those mailboxes, |
| 810 | * if unused. |
| 811 | **/ |
| 812 | int qla4xxx_get_fw_version(struct scsi_qla_host * ha) |
| 813 | { |
| 814 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 815 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 816 | |
| 817 | /* Get firmware version. */ |
| 818 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 819 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 820 | mbox_cmd[0] = MBOX_CMD_ABOUT_FW; |
| 821 | if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != |
| 822 | QLA_SUCCESS) { |
| 823 | DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ " |
| 824 | "status %04X\n", ha->host_no, __func__, mbox_sts[0])); |
| 825 | return QLA_ERROR; |
| 826 | } |
| 827 | |
| 828 | /* Save firmware version information. */ |
| 829 | ha->firmware_version[0] = mbox_sts[1]; |
| 830 | ha->firmware_version[1] = mbox_sts[2]; |
| 831 | ha->patch_number = mbox_sts[3]; |
| 832 | ha->build_number = mbox_sts[4]; |
| 833 | |
| 834 | return QLA_SUCCESS; |
| 835 | } |
| 836 | |
| 837 | int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, dma_addr_t dma_addr) |
| 838 | { |
| 839 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 840 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 841 | |
| 842 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 843 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 844 | |
| 845 | mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS; |
| 846 | mbox_cmd[2] = LSDW(dma_addr); |
| 847 | mbox_cmd[3] = MSDW(dma_addr); |
| 848 | |
| 849 | if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != |
| 850 | QLA_SUCCESS) { |
| 851 | DEBUG2(printk("scsi%ld: %s: failed status %04X\n", |
| 852 | ha->host_no, __func__, mbox_sts[0])); |
| 853 | return QLA_ERROR; |
| 854 | } |
| 855 | return QLA_SUCCESS; |
| 856 | } |
| 857 | |
| 858 | int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index) |
| 859 | { |
| 860 | uint32_t mbox_cmd[MBOX_REG_COUNT]; |
| 861 | uint32_t mbox_sts[MBOX_REG_COUNT]; |
| 862 | |
| 863 | memset(&mbox_cmd, 0, sizeof(mbox_cmd)); |
| 864 | memset(&mbox_sts, 0, sizeof(mbox_sts)); |
| 865 | |
| 866 | mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY; |
| 867 | mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES; |
| 868 | |
| 869 | if (qla4xxx_mailbox_command(ha, 2, 3, &mbox_cmd[0], &mbox_sts[0]) != |
| 870 | QLA_SUCCESS) { |
| 871 | if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) { |
| 872 | *ddb_index = mbox_sts[2]; |
| 873 | } else { |
| 874 | DEBUG2(printk("scsi%ld: %s: failed status %04X\n", |
| 875 | ha->host_no, __func__, mbox_sts[0])); |
| 876 | return QLA_ERROR; |
| 877 | } |
| 878 | } else { |
| 879 | *ddb_index = MAX_PRST_DEV_DB_ENTRIES; |
| 880 | } |
| 881 | |
| 882 | return QLA_SUCCESS; |
| 883 | } |
| 884 | |
| 885 | |
| 886 | int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port) |
| 887 | { |
| 888 | struct dev_db_entry *fw_ddb_entry; |
| 889 | dma_addr_t fw_ddb_entry_dma; |
| 890 | uint32_t ddb_index; |
| 891 | int ret_val = QLA_SUCCESS; |
| 892 | |
| 893 | |
| 894 | fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, |
| 895 | sizeof(*fw_ddb_entry), |
| 896 | &fw_ddb_entry_dma, GFP_KERNEL); |
| 897 | if (!fw_ddb_entry) { |
| 898 | DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n", |
| 899 | ha->host_no, __func__)); |
| 900 | ret_val = QLA_ERROR; |
| 901 | goto qla4xxx_send_tgts_exit; |
| 902 | } |
| 903 | |
| 904 | ret_val = qla4xxx_get_default_ddb(ha, fw_ddb_entry_dma); |
| 905 | if (ret_val != QLA_SUCCESS) |
| 906 | goto qla4xxx_send_tgts_exit; |
| 907 | |
| 908 | ret_val = qla4xxx_req_ddb_entry(ha, &ddb_index); |
| 909 | if (ret_val != QLA_SUCCESS) |
| 910 | goto qla4xxx_send_tgts_exit; |
| 911 | |
| 912 | memset((void *)fw_ddb_entry->iSCSIAlias, 0, |
| 913 | sizeof(fw_ddb_entry->iSCSIAlias)); |
| 914 | |
| 915 | memset((void *)fw_ddb_entry->iscsiName, 0, |
| 916 | sizeof(fw_ddb_entry->iscsiName)); |
| 917 | |
| 918 | memset((void *)fw_ddb_entry->ipAddr, 0, sizeof(fw_ddb_entry->ipAddr)); |
| 919 | memset((void *)fw_ddb_entry->targetAddr, 0, |
| 920 | sizeof(fw_ddb_entry->targetAddr)); |
| 921 | |
| 922 | fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET); |
| 923 | fw_ddb_entry->portNumber = cpu_to_le16(ntohs(port)); |
| 924 | |
| 925 | fw_ddb_entry->ipAddr[0] = *ip; |
| 926 | fw_ddb_entry->ipAddr[1] = *(ip + 1); |
| 927 | fw_ddb_entry->ipAddr[2] = *(ip + 2); |
| 928 | fw_ddb_entry->ipAddr[3] = *(ip + 3); |
| 929 | |
| 930 | ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma); |
| 931 | |
| 932 | qla4xxx_send_tgts_exit: |
| 933 | dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), |
| 934 | fw_ddb_entry, fw_ddb_entry_dma); |
| 935 | return ret_val; |
| 936 | } |
| 937 | |