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Ralf Baechle73b43902008-07-16 16:12:25 +01001/*
2 * Miscellaneous functions for IDT EB434 board
3 *
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
6 * Copyright 2007 Florian Fainelli <florian@openwrt.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/kernel.h>
Ralf Baechle73b43902008-07-16 16:12:25 +010030#include <linux/init.h>
31#include <linux/types.h>
Paul Gortmakercae39d12011-07-28 18:46:31 -040032#include <linux/export.h>
Ralf Baechle73b43902008-07-16 16:12:25 +010033#include <linux/spinlock.h>
Ralf Baechle73b43902008-07-16 16:12:25 +010034#include <linux/platform_device.h>
Florian Fainellid888e252008-08-23 18:54:34 +020035#include <linux/gpio.h>
Ralf Baechle73b43902008-07-16 16:12:25 +010036
37#include <asm/mach-rc32434/rb.h>
Florian Fainellid888e252008-08-23 18:54:34 +020038#include <asm/mach-rc32434/gpio.h>
Ralf Baechle73b43902008-07-16 16:12:25 +010039
Florian Fainellid888e252008-08-23 18:54:34 +020040struct rb532_gpio_chip {
41 struct gpio_chip chip;
42 void __iomem *regbase;
Florian Fainellid888e252008-08-23 18:54:34 +020043};
Ralf Baechle73b43902008-07-16 16:12:25 +010044
Ralf Baechle73b43902008-07-16 16:12:25 +010045static struct resource rb532_gpio_reg0_res[] = {
46 {
47 .name = "gpio_reg0",
Florian Fainelli3c8cf8c2008-08-22 17:01:03 +020048 .start = REGBASE + GPIOBASE,
49 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
Ralf Baechle73b43902008-07-16 16:12:25 +010050 .flags = IORESOURCE_MEM,
51 }
52};
53
Phil Sutter2e373952008-11-01 15:13:21 +010054/* rb532_set_bit - sanely set a bit
55 *
56 * bitval: new value for the bit
57 * offset: bit index in the 4 byte address range
58 * ioaddr: 4 byte aligned address being altered
59 */
60static inline void rb532_set_bit(unsigned bitval,
61 unsigned offset, void __iomem *ioaddr)
62{
63 unsigned long flags;
64 u32 val;
65
Phil Sutter2e373952008-11-01 15:13:21 +010066 local_irq_save(flags);
67
68 val = readl(ioaddr);
Phil Sutter5379a5f2008-11-12 00:09:30 +010069 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */
70 val |= (!!bitval << offset); /* set bit if bitval == 1 */
Phil Sutter2e373952008-11-01 15:13:21 +010071 writel(val, ioaddr);
72
73 local_irq_restore(flags);
74}
75
76/* rb532_get_bit - read a bit
77 *
78 * returns the boolean state of the bit, which may be > 1
79 */
80static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
81{
82 return (readl(ioaddr) & (1 << offset));
83}
84
Florian Fainellid888e252008-08-23 18:54:34 +020085/*
86 * Return GPIO level */
87static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
Ralf Baechle73b43902008-07-16 16:12:25 +010088{
Florian Fainellid888e252008-08-23 18:54:34 +020089 struct rb532_gpio_chip *gpch;
90
91 gpch = container_of(chip, struct rb532_gpio_chip, chip);
Phil Sutter2e373952008-11-01 15:13:21 +010092 return rb532_get_bit(offset, gpch->regbase + GPIOD);
Ralf Baechle73b43902008-07-16 16:12:25 +010093}
Ralf Baechle73b43902008-07-16 16:12:25 +010094
Florian Fainellid888e252008-08-23 18:54:34 +020095/*
96 * Set output GPIO level
97 */
98static void rb532_gpio_set(struct gpio_chip *chip,
99 unsigned offset, int value)
Ralf Baechle73b43902008-07-16 16:12:25 +0100100{
Florian Fainellid888e252008-08-23 18:54:34 +0200101 struct rb532_gpio_chip *gpch;
Ralf Baechle73b43902008-07-16 16:12:25 +0100102
Florian Fainellid888e252008-08-23 18:54:34 +0200103 gpch = container_of(chip, struct rb532_gpio_chip, chip);
Phil Sutter2e373952008-11-01 15:13:21 +0100104 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
Ralf Baechle73b43902008-07-16 16:12:25 +0100105}
Ralf Baechle73b43902008-07-16 16:12:25 +0100106
Florian Fainellid888e252008-08-23 18:54:34 +0200107/*
108 * Set GPIO direction to input
109 */
110static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
Ralf Baechle73b43902008-07-16 16:12:25 +0100111{
Florian Fainellid888e252008-08-23 18:54:34 +0200112 struct rb532_gpio_chip *gpch;
Florian Fainellid888e252008-08-23 18:54:34 +0200113
114 gpch = container_of(chip, struct rb532_gpio_chip, chip);
Florian Fainellid888e252008-08-23 18:54:34 +0200115
Phil Sutter33763d52008-11-28 20:46:09 +0100116 /* disable alternate function in case it's set */
117 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
Ralf Baechle73b43902008-07-16 16:12:25 +0100118
Phil Sutter2e373952008-11-01 15:13:21 +0100119 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
Ralf Baechle73b43902008-07-16 16:12:25 +0100120 return 0;
121}
Ralf Baechle73b43902008-07-16 16:12:25 +0100122
Florian Fainellid888e252008-08-23 18:54:34 +0200123/*
124 * Set GPIO direction to output
125 */
126static int rb532_gpio_direction_output(struct gpio_chip *chip,
127 unsigned offset, int value)
Ralf Baechle73b43902008-07-16 16:12:25 +0100128{
Florian Fainellid888e252008-08-23 18:54:34 +0200129 struct rb532_gpio_chip *gpch;
Florian Fainellid888e252008-08-23 18:54:34 +0200130
131 gpch = container_of(chip, struct rb532_gpio_chip, chip);
Florian Fainellid888e252008-08-23 18:54:34 +0200132
Phil Sutter33763d52008-11-28 20:46:09 +0100133 /* disable alternate function in case it's set */
134 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
Ralf Baechle73b43902008-07-16 16:12:25 +0100135
Phil Sutter2e373952008-11-01 15:13:21 +0100136 /* set the initial output value */
137 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
138
139 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
Ralf Baechle73b43902008-07-16 16:12:25 +0100140 return 0;
141}
Ralf Baechle73b43902008-07-16 16:12:25 +0100142
Florian Fainellid888e252008-08-23 18:54:34 +0200143static struct rb532_gpio_chip rb532_gpio_chip[] = {
144 [0] = {
145 .chip = {
146 .label = "gpio0",
147 .direction_input = rb532_gpio_direction_input,
148 .direction_output = rb532_gpio_direction_output,
149 .get = rb532_gpio_get,
150 .set = rb532_gpio_set,
151 .base = 0,
152 .ngpio = 32,
153 },
Florian Fainellid888e252008-08-23 18:54:34 +0200154 },
155};
Ralf Baechle73b43902008-07-16 16:12:25 +0100156
Phil Sutter2e373952008-11-01 15:13:21 +0100157/*
158 * Set GPIO interrupt level
159 */
160void rb532_gpio_set_ilevel(int bit, unsigned gpio)
161{
162 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
163}
164EXPORT_SYMBOL(rb532_gpio_set_ilevel);
165
166/*
167 * Set GPIO interrupt status
168 */
169void rb532_gpio_set_istat(int bit, unsigned gpio)
170{
171 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
172}
173EXPORT_SYMBOL(rb532_gpio_set_istat);
174
175/*
176 * Configure GPIO alternate function
177 */
Phil Sutter0fc6bc02009-01-22 19:32:43 +0100178void rb532_gpio_set_func(unsigned gpio)
Phil Sutter2e373952008-11-01 15:13:21 +0100179{
Phil Sutter0fc6bc02009-01-22 19:32:43 +0100180 rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
Phil Sutter2e373952008-11-01 15:13:21 +0100181}
Phil Sutter0fc6bc02009-01-22 19:32:43 +0100182EXPORT_SYMBOL(rb532_gpio_set_func);
Phil Sutter2e373952008-11-01 15:13:21 +0100183
Ralf Baechle73b43902008-07-16 16:12:25 +0100184int __init rb532_gpio_init(void)
185{
Florian Fainellid888e252008-08-23 18:54:34 +0200186 struct resource *r;
Ralf Baechle73b43902008-07-16 16:12:25 +0100187
Florian Fainellid888e252008-08-23 18:54:34 +0200188 r = rb532_gpio_reg0_res;
Ralf Baechle34368302011-05-12 13:55:48 +0100189 rb532_gpio_chip->regbase = ioremap_nocache(r->start, resource_size(r));
Florian Fainellid888e252008-08-23 18:54:34 +0200190
191 if (!rb532_gpio_chip->regbase) {
Ralf Baechle73b43902008-07-16 16:12:25 +0100192 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
193 return -ENXIO;
194 }
195
Florian Fainellid888e252008-08-23 18:54:34 +0200196 /* Register our GPIO chip */
197 gpiochip_add(&rb532_gpio_chip->chip);
198
Ralf Baechle73b43902008-07-16 16:12:25 +0100199 return 0;
200}
201arch_initcall(rb532_gpio_init);