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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * ip27-irq.c: Highlevel interrupt handling for IP27 architecture.
3 *
4 * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
5 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
6 * Copyright (C) 1999 - 2001 Kanoj Sarcar
7 */
Ralf Baechled3ffd082005-08-08 12:42:26 +00008
9#undef DEBUG
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/errno.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/timex.h>
Ralf Baechle631330f2009-06-19 14:05:26 +010020#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/random.h>
Ralf Baechled3ffd082005-08-08 12:42:26 +000022#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/kernel_stat.h>
24#include <linux/delay.h>
25#include <linux/bitops.h>
26
27#include <asm/bootinfo.h>
28#include <asm/io.h>
29#include <asm/mipsregs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <asm/processor.h>
32#include <asm/pci/bridge.h>
33#include <asm/sn/addrs.h>
34#include <asm/sn/agent.h>
35#include <asm/sn/arch.h>
36#include <asm/sn/hub.h>
37#include <asm/sn/intr.h>
38
Linus Torvalds1da177e2005-04-16 15:20:36 -070039/*
40 * Linux has a controller-independent x86 interrupt architecture.
41 * every controller has a 'controller-template', that is used
42 * by the main code to do the right thing. Each driver-visible
Lucas De Marchi25985ed2011-03-30 22:57:33 -030043 * interrupt source is transparently wired to the appropriate
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 * controller. Thus drivers need not be aware of the
45 * interrupt-controller.
46 *
47 * Various interrupt controllers we handle: 8259 PIC, SMP IO-APIC,
48 * PIIX4's internal 8259 PIC and SGI's Visual Workstation Cobalt (IO-)APIC.
49 * (IO-APICs assumed to be messaging to Pentium local-APICs)
50 *
51 * the code is designed to be easily extended with new/different
52 * interrupt controllers, without having to do assembly magic.
53 */
54
55extern asmlinkage void ip27_irq(void);
56
57extern struct bridge_controller *irq_to_bridge[];
58extern int irq_to_slot[];
59
60/*
61 * use these macros to get the encoded nasid and widget id
62 * from the irq value
63 */
64#define IRQ_TO_BRIDGE(i) irq_to_bridge[(i)]
65#define SLOT_FROM_PCI_IRQ(i) irq_to_slot[i]
66
67static inline int alloc_level(int cpu, int irq)
68{
Ralf Baechle4f12bfe2005-03-21 18:59:38 +000069 struct hub_data *hub = hub_data(cpu_to_node(cpu));
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 struct slice_data *si = cpu_data[cpu].data;
Ralf Baechle4f12bfe2005-03-21 18:59:38 +000071 int level;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Ralf Baechle4f12bfe2005-03-21 18:59:38 +000073 level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 if (level >= LEVELS_PER_SLICE)
Ralf Baechleab75dc02011-11-17 15:07:31 +000075 panic("Cpu %d flooded with devices", cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Ralf Baechle4f12bfe2005-03-21 18:59:38 +000077 __set_bit(level, hub->irq_alloc_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 si->level_to_irq[level] = irq;
79
80 return level;
81}
82
83static inline int find_level(cpuid_t *cpunum, int irq)
84{
85 int cpu, i;
86
Andrew Morton394e3902006-03-23 03:01:05 -080087 for_each_online_cpu(cpu) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 struct slice_data *si = cpu_data[cpu].data;
89
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 for (i = BASE_PCI_IRQ; i < LEVELS_PER_SLICE; i++)
91 if (si->level_to_irq[i] == irq) {
92 *cpunum = cpu;
93
94 return i;
95 }
96 }
97
Ralf Baechleab75dc02011-11-17 15:07:31 +000098 panic("Could not identify cpu/level for irq %d", irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099}
100
101/*
102 * Find first bit set
103 */
104static int ms1bit(unsigned long x)
105{
106 int b = 0, s;
107
108 s = 16; if (x >> 16 == 0) s = 0; b += s; x >>= s;
109 s = 8; if (x >> 8 == 0) s = 0; b += s; x >>= s;
110 s = 4; if (x >> 4 == 0) s = 0; b += s; x >>= s;
111 s = 2; if (x >> 2 == 0) s = 0; b += s; x >>= s;
112 s = 1; if (x >> 1 == 0) s = 0; b += s;
113
114 return b;
115}
116
117/*
Yong Zhang8b5690f2011-11-22 14:38:03 +0000118 * This code is unnecessarily complex, because we do
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 * intr enabling. Basically, once we grab the set of intrs we need
120 * to service, we must mask _all_ these interrupts; firstly, to make
121 * sure the same intr does not intr again, causing recursion that
122 * can lead to stack overflow. Secondly, we can not just mask the
123 * one intr we are do_IRQing, because the non-masked intrs in the
124 * first set might intr again, causing multiple servicings of the
125 * same intr. This effect is mostly seen for intercpu intrs.
126 * Kanoj 05.13.00
127 */
128
Ralf Baechle937a8012006-10-07 19:44:33 +0100129static void ip27_do_irq_mask0(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130{
131 int irq, swlevel;
132 hubreg_t pend0, mask0;
133 cpuid_t cpu = smp_processor_id();
134 int pi_int_mask0 =
135 (cputoslice(cpu) == 0) ? PI_INT_MASK0_A : PI_INT_MASK0_B;
136
137 /* copied from Irix intpend0() */
138 pend0 = LOCAL_HUB_L(PI_INT_PEND0);
139 mask0 = LOCAL_HUB_L(pi_int_mask0);
140
141 pend0 &= mask0; /* Pick intrs we should look at */
142 if (!pend0)
143 return;
144
145 swlevel = ms1bit(pend0);
146#ifdef CONFIG_SMP
147 if (pend0 & (1UL << CPU_RESCHED_A_IRQ)) {
148 LOCAL_HUB_CLR_INTR(CPU_RESCHED_A_IRQ);
Peter Zijlstra184748c2011-04-05 17:23:39 +0200149 scheduler_ipi();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 } else if (pend0 & (1UL << CPU_RESCHED_B_IRQ)) {
151 LOCAL_HUB_CLR_INTR(CPU_RESCHED_B_IRQ);
Peter Zijlstra184748c2011-04-05 17:23:39 +0200152 scheduler_ipi();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 } else if (pend0 & (1UL << CPU_CALL_A_IRQ)) {
154 LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
155 smp_call_function_interrupt();
156 } else if (pend0 & (1UL << CPU_CALL_B_IRQ)) {
157 LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
158 smp_call_function_interrupt();
159 } else
160#endif
161 {
162 /* "map" swlevel to irq */
163 struct slice_data *si = cpu_data[cpu].data;
164
165 irq = si->level_to_irq[swlevel];
Ralf Baechle937a8012006-10-07 19:44:33 +0100166 do_IRQ(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 }
168
169 LOCAL_HUB_L(PI_INT_PEND0);
170}
171
Ralf Baechle937a8012006-10-07 19:44:33 +0100172static void ip27_do_irq_mask1(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173{
174 int irq, swlevel;
175 hubreg_t pend1, mask1;
176 cpuid_t cpu = smp_processor_id();
177 int pi_int_mask1 = (cputoslice(cpu) == 0) ? PI_INT_MASK1_A : PI_INT_MASK1_B;
178 struct slice_data *si = cpu_data[cpu].data;
179
180 /* copied from Irix intpend0() */
181 pend1 = LOCAL_HUB_L(PI_INT_PEND1);
182 mask1 = LOCAL_HUB_L(pi_int_mask1);
183
184 pend1 &= mask1; /* Pick intrs we should look at */
185 if (!pend1)
186 return;
187
188 swlevel = ms1bit(pend1);
189 /* "map" swlevel to irq */
190 irq = si->level_to_irq[swlevel];
191 LOCAL_HUB_CLR_INTR(swlevel);
Ralf Baechle937a8012006-10-07 19:44:33 +0100192 do_IRQ(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
194 LOCAL_HUB_L(PI_INT_PEND1);
195}
196
Ralf Baechle937a8012006-10-07 19:44:33 +0100197static void ip27_prof_timer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198{
199 panic("CPU %d got a profiling interrupt", smp_processor_id());
200}
201
Ralf Baechle937a8012006-10-07 19:44:33 +0100202static void ip27_hub_error(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203{
204 panic("CPU %d got a hub error interrupt", smp_processor_id());
205}
206
207static int intr_connect_level(int cpu, int bit)
208{
209 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
210 struct slice_data *si = cpu_data[cpu].data;
211
Ralf Baechle4f12bfe2005-03-21 18:59:38 +0000212 set_bit(bit, si->irq_enable_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213
214 if (!cputoslice(cpu)) {
215 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
216 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
217 } else {
218 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
219 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
220 }
221
222 return 0;
223}
224
225static int intr_disconnect_level(int cpu, int bit)
226{
227 nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
228 struct slice_data *si = cpu_data[cpu].data;
229
Ralf Baechle4f12bfe2005-03-21 18:59:38 +0000230 clear_bit(bit, si->irq_enable_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231
232 if (!cputoslice(cpu)) {
233 REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
234 REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
235 } else {
236 REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
237 REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
238 }
239
240 return 0;
241}
242
243/* Startup one of the (PCI ...) IRQs routes over a bridge. */
Thomas Gleixner301218d2011-03-23 21:09:12 +0000244static unsigned int startup_bridge_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245{
246 struct bridge_controller *bc;
247 bridgereg_t device;
248 bridge_t *bridge;
249 int pin, swlevel;
250 cpuid_t cpu;
251
Thomas Gleixner301218d2011-03-23 21:09:12 +0000252 pin = SLOT_FROM_PCI_IRQ(d->irq);
253 bc = IRQ_TO_BRIDGE(d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 bridge = bc->base;
255
Thomas Gleixner301218d2011-03-23 21:09:12 +0000256 pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", d->irq, pin);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 /*
258 * "map" irq to a swlevel greater than 6 since the first 6 bits
259 * of INT_PEND0 are taken
260 */
Thomas Gleixner301218d2011-03-23 21:09:12 +0000261 swlevel = find_level(&cpu, d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262 bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
263 bridge->b_int_enable |= (1 << pin);
264 bridge->b_int_enable |= 0x7ffffe00; /* more stuff in int_enable */
265
266 /*
267 * Enable sending of an interrupt clear packt to the hub on a high to
268 * low transition of the interrupt pin.
269 *
270 * IRIX sets additional bits in the address which are documented as
271 * reserved in the bridge docs.
272 */
273 bridge->b_int_mode |= (1UL << pin);
274
275 /*
276 * We assume the bridge to have a 1:1 mapping between devices
277 * (slots) and intr pins.
278 */
279 device = bridge->b_int_device;
280 device &= ~(7 << (pin*3));
281 device |= (pin << (pin*3));
282 bridge->b_int_device = device;
283
284 bridge->b_wid_tflush;
285
Ralf Baechle84ced302007-08-27 00:26:58 +0100286 intr_connect_level(cpu, swlevel);
287
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 return 0; /* Never anything pending. */
289}
290
291/* Shutdown one of the (PCI ...) IRQs routes over a bridge. */
Thomas Gleixner301218d2011-03-23 21:09:12 +0000292static void shutdown_bridge_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293{
Thomas Gleixner301218d2011-03-23 21:09:12 +0000294 struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 bridge_t *bridge = bc->base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 int pin, swlevel;
297 cpuid_t cpu;
298
Thomas Gleixner301218d2011-03-23 21:09:12 +0000299 pr_debug("bridge_shutdown: irq 0x%x\n", d->irq);
300 pin = SLOT_FROM_PCI_IRQ(d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301
302 /*
303 * map irq to a swlevel greater than 6 since the first 6 bits
304 * of INT_PEND0 are taken
305 */
Thomas Gleixner301218d2011-03-23 21:09:12 +0000306 swlevel = find_level(&cpu, d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 intr_disconnect_level(cpu, swlevel);
308
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309 bridge->b_int_enable &= ~(1 << pin);
310 bridge->b_wid_tflush;
311}
312
Thomas Gleixner301218d2011-03-23 21:09:12 +0000313static inline void enable_bridge_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314{
315 cpuid_t cpu;
316 int swlevel;
317
Thomas Gleixner301218d2011-03-23 21:09:12 +0000318 swlevel = find_level(&cpu, d->irq); /* Criminal offence */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 intr_connect_level(cpu, swlevel);
320}
321
Thomas Gleixner301218d2011-03-23 21:09:12 +0000322static inline void disable_bridge_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323{
324 cpuid_t cpu;
325 int swlevel;
326
Thomas Gleixner301218d2011-03-23 21:09:12 +0000327 swlevel = find_level(&cpu, d->irq); /* Criminal offence */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328 intr_disconnect_level(cpu, swlevel);
329}
330
Ralf Baechle94dee172006-07-02 14:41:42 +0100331static struct irq_chip bridge_irq_type = {
Atsushi Nemoto70d21cd2007-01-15 00:07:25 +0900332 .name = "bridge",
Thomas Gleixner301218d2011-03-23 21:09:12 +0000333 .irq_startup = startup_bridge_irq,
334 .irq_shutdown = shutdown_bridge_irq,
335 .irq_mask = disable_bridge_irq,
336 .irq_unmask = enable_bridge_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337};
338
Ralf Baechle901f6162011-06-22 09:29:40 +0100339void register_bridge_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340{
Thomas Gleixnere4ec7982011-03-27 15:19:28 +0200341 irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342}
343
Ralf Baechle901f6162011-06-22 09:29:40 +0100344int request_bridge_irq(struct bridge_controller *bc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345{
346 int irq = allocate_irqno();
347 int swlevel, cpu;
348 nasid_t nasid;
349
350 if (irq < 0)
351 return irq;
352
353 /*
354 * "map" irq to a swlevel greater than 6 since the first 6 bits
355 * of INT_PEND0 are taken
356 */
357 cpu = bc->irq_cpu;
358 swlevel = alloc_level(cpu, irq);
359 if (unlikely(swlevel < 0)) {
360 free_irqno(irq);
361
362 return -EAGAIN;
363 }
364
365 /* Make sure it's not already pending when we connect it. */
366 nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
367 REMOTE_HUB_CLR_INTR(nasid, swlevel);
368
369 intr_connect_level(cpu, swlevel);
370
371 register_bridge_irq(irq);
372
373 return irq;
374}
375
Ralf Baechle937a8012006-10-07 19:44:33 +0100376asmlinkage void plat_irq_dispatch(void)
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100377{
378 unsigned long pending = read_c0_cause() & read_c0_status();
Ralf Baechlee887b242007-10-18 13:34:12 +0100379 extern unsigned int rt_timer_irq;
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100380
381 if (pending & CAUSEF_IP4)
Ralf Baechlee887b242007-10-18 13:34:12 +0100382 do_IRQ(rt_timer_irq);
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100383 else if (pending & CAUSEF_IP2) /* PI_INT_PEND_0 or CC_PEND_{A|B} */
Ralf Baechle937a8012006-10-07 19:44:33 +0100384 ip27_do_irq_mask0();
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100385 else if (pending & CAUSEF_IP3) /* PI_INT_PEND_1 */
Ralf Baechle937a8012006-10-07 19:44:33 +0100386 ip27_do_irq_mask1();
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100387 else if (pending & CAUSEF_IP5)
Ralf Baechle937a8012006-10-07 19:44:33 +0100388 ip27_prof_timer();
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100389 else if (pending & CAUSEF_IP6)
Ralf Baechle937a8012006-10-07 19:44:33 +0100390 ip27_hub_error();
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100391}
392
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393void __init arch_init_irq(void)
394{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395}
396
397void install_ipi(void)
398{
399 int slice = LOCAL_HUB_L(PI_CPU_NUM);
400 int cpu = smp_processor_id();
401 struct slice_data *si = cpu_data[cpu].data;
Ralf Baechle4f12bfe2005-03-21 18:59:38 +0000402 struct hub_data *hub = hub_data(cpu_to_node(cpu));
403 int resched, call;
404
405 resched = CPU_RESCHED_A_IRQ + slice;
406 __set_bit(resched, hub->irq_alloc_mask);
407 __set_bit(resched, si->irq_enable_mask);
408 LOCAL_HUB_CLR_INTR(resched);
409
410 call = CPU_CALL_A_IRQ + slice;
411 __set_bit(call, hub->irq_alloc_mask);
412 __set_bit(call, si->irq_enable_mask);
413 LOCAL_HUB_CLR_INTR(call);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414
415 if (slice == 0) {
Ralf Baechle4f12bfe2005-03-21 18:59:38 +0000416 LOCAL_HUB_S(PI_INT_MASK0_A, si->irq_enable_mask[0]);
417 LOCAL_HUB_S(PI_INT_MASK1_A, si->irq_enable_mask[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 } else {
Ralf Baechle4f12bfe2005-03-21 18:59:38 +0000419 LOCAL_HUB_S(PI_INT_MASK0_B, si->irq_enable_mask[0]);
420 LOCAL_HUB_S(PI_INT_MASK1_B, si->irq_enable_mask[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 }
422}