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Pratap Nirujogi6e759912018-01-17 17:51:17 +05301#ifndef __MSMB_PPROC_H
2#define __MSMB_PPROC_H
3
4#include <uapi/media/msmb_pproc.h>
5
6#include <linux/compat.h>
7
8#define MSM_OUTPUT_BUF_CNT 8
9
10#ifdef CONFIG_COMPAT
11struct msm_cpp_frame_info32_t {
12 int32_t frame_id;
13 struct compat_timeval timestamp;
14 uint32_t inst_id;
15 uint32_t identity;
16 uint32_t client_id;
17 enum msm_cpp_frame_type frame_type;
18 uint32_t num_strips;
19 uint32_t msg_len;
20 compat_uint_t cpp_cmd_msg;
21 int src_fd;
22 int dst_fd;
23 struct compat_timeval in_time, out_time;
24 compat_caddr_t cookie;
25 compat_int_t status;
26 int32_t duplicate_output;
27 uint32_t duplicate_identity;
28 uint32_t feature_mask;
29 uint8_t we_disable;
30 struct msm_cpp_buffer_info_t input_buffer_info;
31 struct msm_cpp_buffer_info_t output_buffer_info[MSM_OUTPUT_BUF_CNT];
32 struct msm_cpp_buffer_info_t duplicate_buffer_info;
33 struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2];
34 uint32_t reserved;
35 uint8_t partial_frame_indicator;
36 /* the followings are used only for partial_frame type
37 * and is only used for offline frame processing and
38 * only if payload big enough and need to be split into partial_frame
39 * if first_payload, kernel acquires output buffer
40 * first payload must have the last stripe
41 * buffer addresses from 0 to last_stripe_index are updated.
42 * kernel updates payload with msg_len and stripe_info
43 * kernel sends top level, plane level, then only stripes
44 * starting with first_stripe_index and
45 * ends with last_stripe_index
46 * kernel then sends trailing flag at frame done,
47 * if last payload, kernel queues the output buffer to HAL
48 */
49 uint8_t first_payload;
50 uint8_t last_payload;
51 uint32_t first_stripe_index;
52 uint32_t last_stripe_index;
53 uint32_t stripe_info_offset;
54 uint32_t stripe_info;
55 struct msm_cpp_batch_info_t batch_info;
56};
57
58struct msm_cpp_clock_settings32_t {
59 compat_long_t clock_rate;
60 uint64_t avg;
61 uint64_t inst;
62};
63
64struct msm_cpp_stream_buff_info32_t {
65 uint32_t identity;
66 uint32_t num_buffs;
67 compat_caddr_t buffer_info;
68};
69
70struct msm_pproc_queue_buf_info32_t {
71 struct msm_buf_mngr_info32_t buff_mgr_info;
72 uint8_t is_buf_dirty;
73};
74
75struct cpp_hw_info_32_t {
76 uint32_t cpp_hw_version;
77 uint32_t cpp_hw_caps;
78 compat_long_t freq_tbl[MAX_FREQ_TBL];
79 uint32_t freq_tbl_count;
80};
81
82
83#define VIDIOC_MSM_CPP_CFG32 \
84 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl32_t)
85
86#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD32 \
87 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl32_t)
88
89#define VIDIOC_MSM_CPP_GET_INST_INFO32 \
90 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl32_t)
91
92#define VIDIOC_MSM_CPP_LOAD_FIRMWARE32 \
93 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl32_t)
94
95#define VIDIOC_MSM_CPP_GET_HW_INFO32 \
96 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl32_t)
97
98#define VIDIOC_MSM_CPP_FLUSH_QUEUE32 \
99 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl32_t)
100
101#define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO32 \
102 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl32_t)
103
104#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO32 \
105 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl32_t)
106
107#define VIDIOC_MSM_VPE_CFG32 \
108 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl32_t)
109
110#define VIDIOC_MSM_VPE_TRANSACTION_SETUP32 \
111 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl32_t)
112
113#define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD32 \
114 _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl32_t)
115
116#define VIDIOC_MSM_VPE_GET_INST_INFO32 \
117 _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl32_t)
118
119#define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO32 \
120 _IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl32_t)
121
122#define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO32 \
123 _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl32_t)
124
125#define VIDIOC_MSM_CPP_QUEUE_BUF32 \
126 _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl32_t)
127
128#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO32 \
129 _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl32_t)
130
131#define VIDIOC_MSM_CPP_SET_CLOCK32 \
132 _IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl32_t)
133
134#define VIDIOC_MSM_CPP_POP_STREAM_BUFFER32 \
135 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl32_t)
136
137#define VIDIOC_MSM_CPP_IOMMU_ATTACH32 \
138 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl32_t)
139
140#define VIDIOC_MSM_CPP_IOMMU_DETACH32 \
141 _IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl32_t)
142
143#define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF32\
144 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl32_t)
145
146struct msm_camera_v4l2_ioctl32_t {
147 uint32_t id;
148 uint32_t len;
149 int32_t trans_code;
150 compat_caddr_t ioctl_ptr;
151};
152#endif
153
154#endif
155