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Rajendra Nayakc1294042009-12-08 18:24:51 -07001/*
2 * OMAP44xx PRM instance offset macros
3 *
Paul Walmsley26c98c52011-12-16 14:36:58 -07004 * Copyright (C) 2009-2011 Texas Instruments, Inc.
Benoit Cousson79328702010-05-20 12:31:11 -06005 * Copyright (C) 2009-2010 Nokia Corporation
Rajendra Nayakc1294042009-12-08 18:24:51 -07006 *
7 * Paul Walmsley (paul@pwsan.com)
8 * Rajendra Nayak (rnayak@ti.com)
9 * Benoit Cousson (b-cousson@ti.com)
10 *
11 * This file is automatically generated from the OMAP hardware databases.
12 * We respectfully ask that any modifications to this file be coordinated
13 * with the public linux-omap@vger.kernel.org mailing list and the
14 * authors above to ensure that the autogeneration scripts are kept
15 * up-to-date with the file contents.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
Paul Walmsleyd198b512010-12-21 15:30:54 -070020 *
21 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
22 * or "OMAP4430".
Rajendra Nayakc1294042009-12-08 18:24:51 -070023 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H
26#define __ARCH_ARM_MACH_OMAP2_PRM44XX_H
27
Paul Walmsleyd198b512010-12-21 15:30:54 -070028#include "prcm-common.h"
Paul Walmsley59fb6592010-12-21 15:30:55 -070029#include "prm.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070030
31#define OMAP4430_PRM_BASE 0x4a306000
32
Paul Walmsleycdb54c42010-12-21 15:30:55 -070033#define OMAP44XX_PRM_REGADDR(inst, reg) \
Benoit Coussonad98a182011-07-09 19:15:04 -060034 OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
Paul Walmsleyd198b512010-12-21 15:30:54 -070035
36
37/* PRM instances */
Paul Walmsleycdb54c42010-12-21 15:30:55 -070038#define OMAP4430_PRM_OCP_SOCKET_INST 0x0000
39#define OMAP4430_PRM_CKGEN_INST 0x0100
40#define OMAP4430_PRM_MPU_INST 0x0300
41#define OMAP4430_PRM_TESLA_INST 0x0400
42#define OMAP4430_PRM_ABE_INST 0x0500
43#define OMAP4430_PRM_ALWAYS_ON_INST 0x0600
44#define OMAP4430_PRM_CORE_INST 0x0700
45#define OMAP4430_PRM_IVAHD_INST 0x0f00
46#define OMAP4430_PRM_CAM_INST 0x1000
47#define OMAP4430_PRM_DSS_INST 0x1100
48#define OMAP4430_PRM_GFX_INST 0x1200
Benoit Coussonad98a182011-07-09 19:15:04 -060049#define OMAP4430_PRM_L3INIT_INST 0x1300
Paul Walmsleycdb54c42010-12-21 15:30:55 -070050#define OMAP4430_PRM_L4PER_INST 0x1400
Benoit Coussonad98a182011-07-09 19:15:04 -060051#define OMAP4430_PRM_CEFUSE_INST 0x1600
Paul Walmsleycdb54c42010-12-21 15:30:55 -070052#define OMAP4430_PRM_WKUP_INST 0x1700
53#define OMAP4430_PRM_WKUP_CM_INST 0x1800
54#define OMAP4430_PRM_EMU_INST 0x1900
Benoit Coussonad98a182011-07-09 19:15:04 -060055#define OMAP4430_PRM_EMU_CM_INST 0x1a00
56#define OMAP4430_PRM_DEVICE_INST 0x1b00
Paul Walmsleycdb54c42010-12-21 15:30:55 -070057#define OMAP4430_PRM_INSTR_INST 0x1f00
Paul Walmsleyd198b512010-12-21 15:30:54 -070058
Paul Walmsleye4156ee2010-12-21 21:05:15 -070059/* PRM clockdomain register offsets (from instance start) */
Paul Walmsleye4156ee2010-12-21 21:05:15 -070060#define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000
Paul Walmsleye4156ee2010-12-21 21:05:15 -070061#define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000
Paul Walmsleyd198b512010-12-21 15:30:54 -070062
63/* OMAP4 specific register offsets */
64#define OMAP4_RM_RSTCTRL 0x0000
65#define OMAP4_RM_RSTTIME 0x0004
66#define OMAP4_RM_RSTST 0x0008
67#define OMAP4_PM_PWSTCTRL 0x0000
68#define OMAP4_PM_PWSTST 0x0004
69
Rajendra Nayakc1294042009-12-08 18:24:51 -070070
71/* PRM */
72
Rajendra Nayakc1294042009-12-08 18:24:51 -070073/* PRM.OCP_SOCKET_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -060074#define OMAP4_REVISION_PRM_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -070075#define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060076#define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010
Paul Walmsleycdb54c42010-12-21 15:30:55 -070077#define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060078#define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014
Paul Walmsleycdb54c42010-12-21 15:30:55 -070079#define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060080#define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018
Paul Walmsleycdb54c42010-12-21 15:30:55 -070081#define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060082#define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c
Paul Walmsleycdb54c42010-12-21 15:30:55 -070083#define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060084#define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020
Paul Walmsleycdb54c42010-12-21 15:30:55 -070085#define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060086#define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -070087#define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060088#define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -070089#define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060090#define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -070091#define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038)
Rajendra Nayakfdd4f402010-09-27 14:02:56 -060092#define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -070093#define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040)
Rajendra Nayakc1294042009-12-08 18:24:51 -070094
95/* PRM.CKGEN_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -060096#define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -070097#define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -060098#define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008
Paul Walmsleycdb54c42010-12-21 15:30:55 -070099#define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600100#define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700101#define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600102#define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700103#define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700104
105/* PRM.MPU_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600106#define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700107#define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600108#define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700109#define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600110#define OMAP4_RM_MPU_RSTST_OFFSET 0x0014
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700111#define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600112#define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700113#define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700114
115/* PRM.TESLA_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600116#define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700117#define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600118#define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700119#define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600120#define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700121#define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600122#define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700123#define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600124#define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700125#define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700126
127/* PRM.ABE_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600128#define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700129#define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600130#define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700131#define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600132#define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700133#define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600134#define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700135#define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600136#define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700137#define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600138#define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700139#define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600140#define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700141#define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600142#define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700143#define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600144#define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700145#define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600146#define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700147#define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600148#define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700149#define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600150#define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700151#define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600152#define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700153#define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600154#define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700155#define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600156#define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700157#define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600158#define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700159#define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600160#define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700161#define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600162#define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700163#define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600164#define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700165#define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600166#define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700167#define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600168#define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700169#define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600170#define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700171#define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600172#define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700173#define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600174#define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700175#define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600176#define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700177#define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600178#define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700179#define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600180#define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700181#define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700182
183/* PRM.ALWAYS_ON_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600184#define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700185#define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600186#define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700187#define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600188#define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700189#define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600190#define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700191#define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600192#define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700193#define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600194#define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700195#define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600196#define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700197#define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700198
199/* PRM.CORE_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600200#define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700201#define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600202#define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700203#define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600204#define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700205#define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600206#define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700207#define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600208#define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700209#define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600210#define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700211#define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600212#define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700213#define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600214#define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700215#define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600216#define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700217#define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600218#define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700219#define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600220#define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700221#define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600222#define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700223#define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600224#define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700225#define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600226#define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700227#define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600228#define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700229#define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600230#define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700231#define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600232#define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700233#define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600234#define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700235#define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600236#define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700237#define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524)
Benoit Coussonad98a182011-07-09 19:15:04 -0600238#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c
239#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600240#define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700241#define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600242#define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700243#define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600244#define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700245#define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600246#define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700247#define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600248#define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700249#define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600250#define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700251#define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600252#define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700253#define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600254#define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700255#define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700256
257/* PRM.IVAHD_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600258#define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700259#define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600260#define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700261#define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600262#define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700263#define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600264#define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700265#define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600266#define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700267#define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600268#define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700269#define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700270
271/* PRM.CAM_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600272#define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700273#define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600274#define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700275#define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600276#define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700277#define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600278#define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700279#define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700280
281/* PRM.DSS_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600282#define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700283#define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600284#define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700285#define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600286#define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700287#define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600288#define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700289#define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600290#define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700291#define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700292
293/* PRM.GFX_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600294#define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700295#define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600296#define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700297#define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600298#define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700299#define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700300
301/* PRM.L3INIT_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600302#define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700303#define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600304#define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700305#define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600306#define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700307#define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600308#define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700309#define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600310#define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700311#define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600312#define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700313#define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600314#define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700315#define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600316#define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700317#define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600318#define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700319#define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600320#define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700321#define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600322#define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700323#define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600324#define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700325#define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600326#define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700327#define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600328#define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700329#define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600330#define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700331#define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600332#define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700333#define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600334#define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700335#define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600336#define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700337#define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600338#define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700339#define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600340#define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700341#define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600342#define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700343#define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600344#define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700345#define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600346#define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700347#define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600348#define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700349#define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600350#define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700351#define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600352#define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700353#define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600354#define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700355#define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600356#define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700357#define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600358#define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700359#define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600360#define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700361#define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600362#define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700363#define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700364
365/* PRM.L4PER_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600366#define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700367#define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600368#define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700369#define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600370#define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700371#define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600372#define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700373#define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600374#define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700375#define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600376#define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700377#define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600378#define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700379#define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600380#define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700381#define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600382#define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700383#define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600384#define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700385#define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600386#define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700387#define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600388#define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700389#define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600390#define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700391#define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600392#define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700393#define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600394#define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700395#define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600396#define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700397#define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600398#define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700399#define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600400#define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700401#define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600402#define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700403#define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600404#define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700405#define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600406#define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700407#define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600408#define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700409#define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600410#define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700411#define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600412#define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700413#define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600414#define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700415#define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600416#define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700417#define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600418#define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700419#define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600420#define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700421#define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600422#define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700423#define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600424#define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700425#define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600426#define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700427#define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600428#define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700429#define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600430#define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700431#define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600432#define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700433#define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600434#define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700435#define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600436#define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700437#define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600438#define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700439#define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600440#define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700441#define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600442#define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700443#define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600444#define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700445#define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600446#define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700447#define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600448#define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700449#define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600450#define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700451#define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600452#define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700453#define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600454#define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700455#define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600456#define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700457#define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600458#define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700459#define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600460#define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700461#define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600462#define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700463#define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600464#define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700465#define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600466#define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700467#define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600468#define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700469#define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600470#define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700471#define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600472#define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700473#define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600474#define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700475#define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600476#define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700477#define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600478#define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700479#define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600480#define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700481#define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600482#define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700483#define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600484#define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700485#define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600486#define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700487#define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600488#define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700489#define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600490#define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700491#define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600492#define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700493#define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600494#define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700495#define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600496#define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700497#define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600498#define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700499#define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600500#define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700501#define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600502#define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700503#define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600504#define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700505#define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600506#define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700507#define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600508#define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700509#define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600510#define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700511#define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600512#define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700513#define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600514#define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700515#define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600516#define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700517#define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600518#define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700519#define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600520#define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700521#define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600522#define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700523#define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600524#define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700525#define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600526#define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700527#define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700528
529/* PRM.CEFUSE_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600530#define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700531#define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600532#define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700533#define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600534#define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700535#define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700536
537/* PRM.WKUP_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600538#define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700539#define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600540#define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700541#define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600542#define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700543#define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600544#define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700545#define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600546#define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700547#define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600548#define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700549#define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600550#define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700551#define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600552#define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700553#define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600554#define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700555#define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600556#define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700557#define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600558#define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700559#define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600560#define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700561#define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600562#define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700563#define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600564#define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700565#define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600566#define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700567#define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600568#define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700569#define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600570#define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700571#define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600572#define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700573#define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700574
575/* PRM.WKUP_CM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600576#define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700577#define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600578#define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700579#define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600580#define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700581#define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600582#define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700583#define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600584#define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700585#define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600586#define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700587#define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600588#define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700589#define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600590#define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700591#define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600592#define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700593#define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600594#define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700595#define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600596#define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700597#define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600598#define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700599#define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600600#define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700601#define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700602
603/* PRM.EMU_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600604#define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700605#define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600606#define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700607#define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600608#define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700609#define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700610
611/* PRM.EMU_CM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600612#define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700613#define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600614#define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700615#define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600616#define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700617#define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700618
619/* PRM.DEVICE_PRM register offsets */
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600620#define OMAP4_PRM_RSTCTRL_OFFSET 0x0000
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700621#define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600622#define OMAP4_PRM_RSTST_OFFSET 0x0004
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700623#define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600624#define OMAP4_PRM_RSTTIME_OFFSET 0x0008
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700625#define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600626#define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700627#define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600628#define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700629#define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600630#define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700631#define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600632#define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700633#define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600634#define OMAP4_PRM_IO_COUNT_OFFSET 0x001c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700635#define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600636#define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700637#define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600638#define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700639#define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600640#define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700641#define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600642#define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700643#define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600644#define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700645#define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600646#define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700647#define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600648#define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700649#define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600650#define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700651#define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600652#define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700653#define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600654#define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700655#define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600656#define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700657#define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600658#define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700659#define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600660#define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700661#define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600662#define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700663#define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600664#define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700665#define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600666#define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700667#define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600668#define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700669#define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600670#define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700671#define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600672#define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700673#define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600674#define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700675#define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600676#define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700677#define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600678#define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700679#define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600680#define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700681#define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600682#define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700683#define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600684#define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700685#define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600686#define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700687#define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600688#define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700689#define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600690#define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700691#define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600692#define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700693#define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600694#define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700695#define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600696#define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700697#define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600698#define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700699#define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600700#define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700701#define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600702#define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700703#define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
Benoit Coussonad98a182011-07-09 19:15:04 -0600704#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8
705#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600706#define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700707#define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600708#define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700709#define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600710#define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700711#define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600712#define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700713#define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600714#define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700715#define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600716#define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700717#define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600718#define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700719#define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600720#define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700721#define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600722#define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700723#define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600724#define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700725#define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600726#define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700727#define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600728#define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700729#define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600730#define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700731#define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc)
Rajendra Nayakfdd4f402010-09-27 14:02:56 -0600732#define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700733#define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600734#define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700735#define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600736#define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700737#define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600738#define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700739#define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec)
Rajendra Nayak2339ea92010-05-20 12:31:12 -0600740#define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700741#define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0)
Benoit Coussonad98a182011-07-09 19:15:04 -0600742#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4
743#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
Rajendra Nayakfdd4f402010-09-27 14:02:56 -0600744#define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8
Paul Walmsleycdb54c42010-12-21 15:30:55 -0700745#define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8)
Rajendra Nayakc1294042009-12-08 18:24:51 -0700746
Paul Walmsleyd198b512010-12-21 15:30:54 -0700747/* Function prototypes */
748# ifndef __ASSEMBLER__
Rajendra Nayakc1294042009-12-08 18:24:51 -0700749
Paul Walmsley2ace8312010-12-21 21:05:14 -0700750extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
751extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
752extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
Rajendra Nayakc1294042009-12-08 18:24:51 -0700753
Kevin Hilman58aaa592011-03-28 10:52:04 -0700754/* OMAP4-specific VP functions */
755u32 omap4_prm_vp_check_txdone(u8 vp_id);
756void omap4_prm_vp_clear_txdone(u8 vp_id);
757
Kevin Hilman4bb73ad2011-03-28 10:25:12 -0700758/*
759 * OMAP4 access functions for voltage controller (VC) and
760 * voltage proccessor (VP) in the PRM.
761 */
762extern u32 omap4_prm_vcvp_read(u8 offset);
763extern void omap4_prm_vcvp_write(u32 val, u8 offset);
764extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
765
Paul Walmsley26c98c52011-12-16 14:36:58 -0700766/* PRM interrupt-related functions */
767extern void omap44xx_prm_read_pending_irqs(unsigned long *events);
768extern void omap44xx_prm_ocp_barrier(void);
Tero Kristo91285b62011-12-16 14:36:58 -0700769extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
770extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
Paul Walmsley26c98c52011-12-16 14:36:58 -0700771
Paul Walmsleyd198b512010-12-21 15:30:54 -0700772# endif
Rajendra Nayakc1294042009-12-08 18:24:51 -0700773
Rajendra Nayakc1294042009-12-08 18:24:51 -0700774#endif