Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_sl82c105.c - SL82C105 PATA for new ATA layer |
| 3 | * (C) 2005 Red Hat Inc |
| 4 | * Alan Cox <alan@redhat.com> |
| 5 | * |
| 6 | * Based in part on linux/drivers/ide/pci/sl82c105.c |
| 7 | * SL82C105/Winbond 553 IDE driver |
| 8 | * |
| 9 | * and in part on the documentation and errata sheet |
Alan | 16728da | 2007-02-20 17:51:51 +0000 | [diff] [blame] | 10 | * |
| 11 | * |
| 12 | * Note: The controller like many controllers has shared timings for |
| 13 | * PIO and DMA. We thus flip to the DMA timings in dma_start and flip back |
| 14 | * in the dma_stop function. Thus we actually don't need a set_dmamode |
| 15 | * method as the PIO method is always called and will set the right PIO |
| 16 | * timing parameters. |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 17 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 18 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 19 | #include <linux/kernel.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/pci.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/blkdev.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <scsi/scsi_host.h> |
| 26 | #include <linux/libata.h> |
| 27 | |
| 28 | #define DRV_NAME "pata_sl82c105" |
Jeff Garzik | cb48cab | 2007-02-26 06:04:24 -0500 | [diff] [blame^] | 29 | #define DRV_VERSION "0.3.0" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 30 | |
| 31 | enum { |
| 32 | /* |
| 33 | * SL82C105 PCI config register 0x40 bits. |
| 34 | */ |
| 35 | CTRL_IDE_IRQB = (1 << 30), |
| 36 | CTRL_IDE_IRQA = (1 << 28), |
| 37 | CTRL_LEGIRQ = (1 << 11), |
| 38 | CTRL_P1F16 = (1 << 5), |
| 39 | CTRL_P1EN = (1 << 4), |
| 40 | CTRL_P0F16 = (1 << 1), |
| 41 | CTRL_P0EN = (1 << 0) |
| 42 | }; |
| 43 | |
| 44 | /** |
| 45 | * sl82c105_pre_reset - probe begin |
| 46 | * @ap: ATA port |
| 47 | * |
| 48 | * Set up cable type and use generic probe init |
| 49 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 50 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 51 | static int sl82c105_pre_reset(struct ata_port *ap) |
| 52 | { |
| 53 | static const struct pci_bits sl82c105_enable_bits[] = { |
| 54 | { 0x40, 1, 0x01, 0x01 }, |
| 55 | { 0x40, 1, 0x10, 0x10 } |
| 56 | }; |
| 57 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 58 | |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 59 | if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) |
| 60 | return -ENOENT; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 61 | ap->cbl = ATA_CBL_PATA40; |
| 62 | return ata_std_prereset(ap); |
| 63 | } |
| 64 | |
| 65 | |
| 66 | static void sl82c105_error_handler(struct ata_port *ap) |
| 67 | { |
| 68 | ata_bmdma_drive_eh(ap, sl82c105_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 69 | } |
| 70 | |
| 71 | |
| 72 | /** |
| 73 | * sl82c105_configure_piomode - set chip PIO timing |
| 74 | * @ap: ATA interface |
| 75 | * @adev: ATA device |
| 76 | * @pio: PIO mode |
| 77 | * |
| 78 | * Called to do the PIO mode setup. Our timing registers are shared |
| 79 | * so a configure_dmamode call will undo any work we do here and vice |
| 80 | * versa |
| 81 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 82 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 83 | static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) |
| 84 | { |
| 85 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 86 | static u16 pio_timing[5] = { |
| 87 | 0x50D, 0x407, 0x304, 0x242, 0x240 |
| 88 | }; |
| 89 | u16 dummy; |
| 90 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 91 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 92 | pci_write_config_word(pdev, timing, pio_timing[pio]); |
| 93 | /* Can we lose this oddity of the old driver */ |
| 94 | pci_read_config_word(pdev, timing, &dummy); |
| 95 | } |
| 96 | |
| 97 | /** |
| 98 | * sl82c105_set_piomode - set initial PIO mode data |
| 99 | * @ap: ATA interface |
| 100 | * @adev: ATA device |
| 101 | * |
| 102 | * Called to do the PIO mode setup. Our timing registers are shared |
| 103 | * but we want to set the PIO timing by default. |
| 104 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 105 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 106 | static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 107 | { |
| 108 | sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
| 109 | } |
| 110 | |
| 111 | /** |
| 112 | * sl82c105_configure_dmamode - set DMA mode in chip |
| 113 | * @ap: ATA interface |
| 114 | * @adev: ATA device |
| 115 | * |
| 116 | * Load DMA cycle times into the chip ready for a DMA transfer |
| 117 | * to occur. |
| 118 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 119 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 120 | static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 121 | { |
| 122 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 123 | static u16 dma_timing[3] = { |
| 124 | 0x707, 0x201, 0x200 |
| 125 | }; |
| 126 | u16 dummy; |
| 127 | int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); |
| 128 | int dma = adev->dma_mode - XFER_MW_DMA_0; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 129 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 130 | pci_write_config_word(pdev, timing, dma_timing[dma]); |
| 131 | /* Can we lose this oddity of the old driver */ |
| 132 | pci_read_config_word(pdev, timing, &dummy); |
| 133 | } |
| 134 | |
| 135 | /** |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 136 | * sl82c105_reset_engine - Reset the DMA engine |
| 137 | * @ap: ATA interface |
| 138 | * |
| 139 | * The sl82c105 has some serious problems with the DMA engine |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 140 | * when transfers don't run as expected or ATAPI is used. The |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 141 | * recommended fix is to reset the engine each use using a chip |
| 142 | * test register. |
| 143 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 144 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 145 | static void sl82c105_reset_engine(struct ata_port *ap) |
| 146 | { |
| 147 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 148 | u16 val; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 149 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 150 | pci_read_config_word(pdev, 0x7E, &val); |
| 151 | pci_write_config_word(pdev, 0x7E, val | 4); |
| 152 | pci_write_config_word(pdev, 0x7E, val & ~4); |
| 153 | } |
| 154 | |
| 155 | /** |
| 156 | * sl82c105_bmdma_start - DMA engine begin |
| 157 | * @qc: ATA command |
| 158 | * |
| 159 | * Reset the DMA engine each use as recommended by the errata |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 160 | * document. |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 161 | * |
| 162 | * FIXME: if we switch clock at BMDMA start/end we might get better |
| 163 | * PIO performance on DMA capable devices. |
| 164 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 165 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 166 | static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) |
| 167 | { |
| 168 | struct ata_port *ap = qc->ap; |
| 169 | |
Olaf Hering | 8361cd7 | 2007-02-10 21:36:14 +0100 | [diff] [blame] | 170 | udelay(100); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 171 | sl82c105_reset_engine(ap); |
Olaf Hering | 8361cd7 | 2007-02-10 21:36:14 +0100 | [diff] [blame] | 172 | udelay(100); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 173 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 174 | /* Set the clocks for DMA */ |
| 175 | sl82c105_configure_dmamode(ap, qc->dev); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 176 | /* Activate DMA */ |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 177 | ata_bmdma_start(qc); |
| 178 | } |
| 179 | |
| 180 | /** |
| 181 | * sl82c105_bmdma_end - DMA engine stop |
| 182 | * @qc: ATA command |
| 183 | * |
| 184 | * Reset the DMA engine each use as recommended by the errata |
| 185 | * document. |
| 186 | * |
| 187 | * This function is also called to turn off DMA when a timeout occurs |
| 188 | * during DMA operation. In both cases we need to reset the engine, |
| 189 | * so no actual eng_timeout handler is required. |
| 190 | * |
| 191 | * We assume bmdma_stop is always called if bmdma_start as called. If |
| 192 | * not then we may need to wrap qc_issue. |
| 193 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 194 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 195 | static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) |
| 196 | { |
| 197 | struct ata_port *ap = qc->ap; |
| 198 | |
| 199 | ata_bmdma_stop(qc); |
| 200 | sl82c105_reset_engine(ap); |
Olaf Hering | 8361cd7 | 2007-02-10 21:36:14 +0100 | [diff] [blame] | 201 | udelay(100); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 202 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 203 | /* This will redo the initial setup of the DMA device to matching |
| 204 | PIO timings */ |
Alan | 16728da | 2007-02-20 17:51:51 +0000 | [diff] [blame] | 205 | sl82c105_set_piomode(ap, qc->dev); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 206 | } |
| 207 | |
| 208 | static struct scsi_host_template sl82c105_sht = { |
| 209 | .module = THIS_MODULE, |
| 210 | .name = DRV_NAME, |
| 211 | .ioctl = ata_scsi_ioctl, |
| 212 | .queuecommand = ata_scsi_queuecmd, |
| 213 | .can_queue = ATA_DEF_QUEUE, |
| 214 | .this_id = ATA_SHT_THIS_ID, |
| 215 | .sg_tablesize = LIBATA_MAX_PRD, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 216 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 217 | .emulated = ATA_SHT_EMULATED, |
| 218 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 219 | .proc_name = DRV_NAME, |
| 220 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 221 | .slave_configure = ata_scsi_slave_config, |
Tejun Heo | afdfe89 | 2006-11-29 11:26:47 +0900 | [diff] [blame] | 222 | .slave_destroy = ata_scsi_slave_destroy, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 223 | .bios_param = ata_std_bios_param, |
| 224 | }; |
| 225 | |
| 226 | static struct ata_port_operations sl82c105_port_ops = { |
| 227 | .port_disable = ata_port_disable, |
| 228 | .set_piomode = sl82c105_set_piomode, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 229 | .mode_filter = ata_pci_default_filter, |
| 230 | |
| 231 | .tf_load = ata_tf_load, |
| 232 | .tf_read = ata_tf_read, |
| 233 | .check_status = ata_check_status, |
| 234 | .exec_command = ata_exec_command, |
| 235 | .dev_select = ata_std_dev_select, |
| 236 | |
| 237 | .error_handler = sl82c105_error_handler, |
| 238 | |
| 239 | .bmdma_setup = ata_bmdma_setup, |
| 240 | .bmdma_start = sl82c105_bmdma_start, |
| 241 | .bmdma_stop = sl82c105_bmdma_stop, |
| 242 | .bmdma_status = ata_bmdma_status, |
| 243 | |
| 244 | .qc_prep = ata_qc_prep, |
| 245 | .qc_issue = ata_qc_issue_prot, |
Jeff Garzik | bda3028 | 2006-09-27 05:41:13 -0400 | [diff] [blame] | 246 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 247 | .data_xfer = ata_data_xfer, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 248 | |
| 249 | .irq_handler = ata_interrupt, |
| 250 | .irq_clear = ata_bmdma_irq_clear, |
Akira Iguchi | 246ce3b | 2007-01-26 16:27:58 +0900 | [diff] [blame] | 251 | .irq_on = ata_irq_on, |
| 252 | .irq_ack = ata_irq_ack, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 253 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 254 | .port_start = ata_port_start, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 255 | }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 256 | |
| 257 | /** |
| 258 | * sl82c105_bridge_revision - find bridge version |
| 259 | * @pdev: PCI device for the ATA function |
| 260 | * |
| 261 | * Locates the PCI bridge associated with the ATA function and |
| 262 | * providing it is a Winbond 553 reports the revision. If it cannot |
| 263 | * find a revision or the right device it returns -1 |
| 264 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 265 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 266 | static int sl82c105_bridge_revision(struct pci_dev *pdev) |
| 267 | { |
| 268 | struct pci_dev *bridge; |
| 269 | u8 rev; |
| 270 | |
| 271 | /* |
| 272 | * The bridge should be part of the same device, but function 0. |
| 273 | */ |
| 274 | bridge = pci_get_slot(pdev->bus, |
| 275 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 0)); |
| 276 | if (!bridge) |
| 277 | return -1; |
| 278 | |
| 279 | /* |
| 280 | * Make sure it is a Winbond 553 and is an ISA bridge. |
| 281 | */ |
| 282 | if (bridge->vendor != PCI_VENDOR_ID_WINBOND || |
| 283 | bridge->device != PCI_DEVICE_ID_WINBOND_83C553 || |
| 284 | bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) { |
| 285 | pci_dev_put(bridge); |
| 286 | return -1; |
| 287 | } |
| 288 | /* |
| 289 | * We need to find function 0's revision, not function 1 |
| 290 | */ |
| 291 | pci_read_config_byte(bridge, PCI_REVISION_ID, &rev); |
| 292 | |
| 293 | pci_dev_put(bridge); |
| 294 | return rev; |
| 295 | } |
| 296 | |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 297 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 298 | static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 299 | { |
| 300 | static struct ata_port_info info_dma = { |
| 301 | .sht = &sl82c105_sht, |
| 302 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 303 | .pio_mask = 0x1f, |
| 304 | .mwdma_mask = 0x07, |
| 305 | .port_ops = &sl82c105_port_ops |
| 306 | }; |
| 307 | static struct ata_port_info info_early = { |
| 308 | .sht = &sl82c105_sht, |
| 309 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 310 | .pio_mask = 0x1f, |
| 311 | .port_ops = &sl82c105_port_ops |
| 312 | }; |
| 313 | static struct ata_port_info *port_info[2] = { &info_early, &info_early }; |
| 314 | u32 val; |
| 315 | int rev; |
| 316 | |
| 317 | rev = sl82c105_bridge_revision(dev); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 318 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 319 | if (rev == -1) |
| 320 | dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Unable to find bridge, disabling DMA.\n"); |
| 321 | else if (rev <= 5) |
| 322 | dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Early bridge revision, no DMA available.\n"); |
| 323 | else { |
| 324 | port_info[0] = &info_dma; |
| 325 | port_info[1] = &info_dma; |
| 326 | } |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 327 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 328 | pci_read_config_dword(dev, 0x40, &val); |
| 329 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; |
| 330 | pci_write_config_dword(dev, 0x40, val); |
| 331 | |
| 332 | |
| 333 | return ata_pci_init_one(dev, port_info, 1); /* For now */ |
| 334 | } |
| 335 | |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 336 | static const struct pci_device_id sl82c105[] = { |
| 337 | { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), }, |
| 338 | |
| 339 | { }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 340 | }; |
| 341 | |
| 342 | static struct pci_driver sl82c105_pci_driver = { |
| 343 | .name = DRV_NAME, |
| 344 | .id_table = sl82c105, |
| 345 | .probe = sl82c105_init_one, |
| 346 | .remove = ata_pci_remove_one |
| 347 | }; |
| 348 | |
| 349 | static int __init sl82c105_init(void) |
| 350 | { |
| 351 | return pci_register_driver(&sl82c105_pci_driver); |
| 352 | } |
| 353 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 354 | static void __exit sl82c105_exit(void) |
| 355 | { |
| 356 | pci_unregister_driver(&sl82c105_pci_driver); |
| 357 | } |
| 358 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 359 | MODULE_AUTHOR("Alan Cox"); |
| 360 | MODULE_DESCRIPTION("low-level driver for Sl82c105"); |
| 361 | MODULE_LICENSE("GPL"); |
| 362 | MODULE_DEVICE_TABLE(pci, sl82c105); |
| 363 | MODULE_VERSION(DRV_VERSION); |
| 364 | |
| 365 | module_init(sl82c105_init); |
| 366 | module_exit(sl82c105_exit); |