| Marc Zyngier | 5c1ce6f | 2013-04-08 17:17:03 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 - ARM Ltd |
| 3 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __ASM_ESR_H |
| 19 | #define __ASM_ESR_H |
| 20 | |
| 21 | #define ESR_EL1_EC_SHIFT (26) |
| 22 | #define ESR_EL1_IL (1U << 25) |
| 23 | |
| 24 | #define ESR_EL1_EC_UNKNOWN (0x00) |
| 25 | #define ESR_EL1_EC_WFI (0x01) |
| 26 | #define ESR_EL1_EC_CP15_32 (0x03) |
| 27 | #define ESR_EL1_EC_CP15_64 (0x04) |
| 28 | #define ESR_EL1_EC_CP14_MR (0x05) |
| 29 | #define ESR_EL1_EC_CP14_LS (0x06) |
| 30 | #define ESR_EL1_EC_FP_ASIMD (0x07) |
| 31 | #define ESR_EL1_EC_CP10_ID (0x08) |
| 32 | #define ESR_EL1_EC_CP14_64 (0x0C) |
| 33 | #define ESR_EL1_EC_ILL_ISS (0x0E) |
| 34 | #define ESR_EL1_EC_SVC32 (0x11) |
| 35 | #define ESR_EL1_EC_SVC64 (0x15) |
| 36 | #define ESR_EL1_EC_SYS64 (0x18) |
| 37 | #define ESR_EL1_EC_IABT_EL0 (0x20) |
| 38 | #define ESR_EL1_EC_IABT_EL1 (0x21) |
| 39 | #define ESR_EL1_EC_PC_ALIGN (0x22) |
| 40 | #define ESR_EL1_EC_DABT_EL0 (0x24) |
| 41 | #define ESR_EL1_EC_DABT_EL1 (0x25) |
| 42 | #define ESR_EL1_EC_SP_ALIGN (0x26) |
| 43 | #define ESR_EL1_EC_FP_EXC32 (0x28) |
| 44 | #define ESR_EL1_EC_FP_EXC64 (0x2C) |
| 45 | #define ESR_EL1_EC_SERRROR (0x2F) |
| 46 | #define ESR_EL1_EC_BREAKPT_EL0 (0x30) |
| 47 | #define ESR_EL1_EC_BREAKPT_EL1 (0x31) |
| 48 | #define ESR_EL1_EC_SOFTSTP_EL0 (0x32) |
| 49 | #define ESR_EL1_EC_SOFTSTP_EL1 (0x33) |
| 50 | #define ESR_EL1_EC_WATCHPT_EL0 (0x34) |
| 51 | #define ESR_EL1_EC_WATCHPT_EL1 (0x35) |
| 52 | #define ESR_EL1_EC_BKPT32 (0x38) |
| 53 | #define ESR_EL1_EC_BRK64 (0x3C) |
| 54 | |
| 55 | #endif /* __ASM_ESR_H */ |