blob: 47f7841ecaab9a441226cfcee8b1523e01aa22d6 [file] [log] [blame]
Ben Skeggs9274f4a2012-07-06 07:36:43 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/device.h>
Ben Skeggs70c0f262012-07-10 10:49:22 +100026#include <subdev/bios.h>
Ben Skeggs4196faa2012-07-10 14:36:38 +100027#include <subdev/i2c.h>
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100028#include <subdev/clock.h>
Ben Skeggscb75d972012-07-11 10:44:20 +100029#include <subdev/devinit.h>
Ben Skeggs9274f4a2012-07-06 07:36:43 +100030
31int
32nv04_identify(struct nouveau_device *device)
33{
34 switch (device->chipset) {
35 case 0x04:
Ben Skeggs70c0f262012-07-10 10:49:22 +100036 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100037 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100038 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100039 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv04_devinit_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100040 break;
41 case 0x05:
Ben Skeggs70c0f262012-07-10 10:49:22 +100042 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100043 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100044 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100045 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv05_devinit_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100046 break;
47 default:
48 nv_fatal(device, "unknown RIVA chipset\n");
49 return -EINVAL;
50 }
51
52 return 0;
53}