blob: 99e647a5ae763bc985c7e6901cce499da4d9c209 [file] [log] [blame]
Amit S. Kale3d396eb2006-10-21 15:33:03 -04001/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
Amit S. Kalecb8011a2006-11-29 09:00:10 -08009 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040010 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Amit S. Kalecb8011a2006-11-29 09:00:10 -080014 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040015 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to access the Phantom hardware
31 *
32 */
33
34#include "netxen_nic.h"
35#include "netxen_nic_hw.h"
36#include "netxen_nic_phan_reg.h"
37
38/* PCI Windowing for DDR regions. */
39
40#define ADDR_IN_RANGE(addr, low, high) \
41 (((addr) <= (high)) && ((addr) >= (low)))
42
43#define NETXEN_FLASH_BASE (BOOTLD_START)
44#define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE)
45#define NETXEN_MAX_MTU 8000
Amit S. Kalecb8011a2006-11-29 09:00:10 -080046#define NETXEN_MIN_MTU 64
Amit S. Kale3d396eb2006-10-21 15:33:03 -040047#define NETXEN_ETH_FCS_SIZE 4
48#define NETXEN_ENET_HEADER_SIZE 14
Amit S. Kalecb8011a2006-11-29 09:00:10 -080049#define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
Amit S. Kale3d396eb2006-10-21 15:33:03 -040050#define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4)
51#define NETXEN_NIU_HDRSIZE (0x1 << 6)
52#define NETXEN_NIU_TLRSIZE (0x1 << 5)
53
Amit S. Kalecb8011a2006-11-29 09:00:10 -080054#define lower32(x) ((u32)((x) & 0xffffffff))
55#define upper32(x) \
56 ((u32)(((unsigned long long)(x) >> 32) & 0xffffffff))
57
58#define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
59#define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
60#define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
61#define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
62
63#define NETXEN_NIC_WINDOW_MARGIN 0x100000
64
65unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
Amit S. Kale3d396eb2006-10-21 15:33:03 -040066 unsigned long long addr);
67void netxen_free_hw_resources(struct netxen_adapter *adapter);
68
69int netxen_nic_set_mac(struct net_device *netdev, void *p)
70{
71 struct netxen_port *port = netdev_priv(netdev);
72 struct netxen_adapter *adapter = port->adapter;
73 struct sockaddr *addr = p;
74
75 if (netif_running(netdev))
76 return -EBUSY;
77
78 if (!is_valid_ether_addr(addr->sa_data))
79 return -EADDRNOTAVAIL;
80
81 DPRINTK(INFO, "valid ether addr\n");
82 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
83
84 if (adapter->ops->macaddr_set)
85 adapter->ops->macaddr_set(port, addr->sa_data);
86
87 return 0;
88}
89
90/*
91 * netxen_nic_set_multi - Multicast
92 */
93void netxen_nic_set_multi(struct net_device *netdev)
94{
95 struct netxen_port *port = netdev_priv(netdev);
96 struct netxen_adapter *adapter = port->adapter;
97 struct dev_mc_list *mc_ptr;
98 __le32 netxen_mac_addr_cntl_data = 0;
99
100 mc_ptr = netdev->mc_list;
101 if (netdev->flags & IFF_PROMISC) {
102 if (adapter->ops->set_promisc)
103 adapter->ops->set_promisc(adapter,
104 port->portnum,
105 NETXEN_NIU_PROMISC_MODE);
106 } else {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800107 if (adapter->ops->unset_promisc &&
108 adapter->ahw.boardcfg.board_type
109 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ)
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400110 adapter->ops->unset_promisc(adapter,
111 port->portnum,
112 NETXEN_NIU_NON_PROMISC_MODE);
113 }
114 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
115 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data, 0x03);
116 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data, 0x00);
117 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data, 0x00);
118 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data, 0x00);
119 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data, 0x00);
120 netxen_nic_mcr_set_enable_xtnd0(netxen_mac_addr_cntl_data);
121 netxen_nic_mcr_set_enable_xtnd1(netxen_mac_addr_cntl_data);
122 netxen_nic_mcr_set_enable_xtnd2(netxen_mac_addr_cntl_data);
123 netxen_nic_mcr_set_enable_xtnd3(netxen_mac_addr_cntl_data);
124 } else {
125 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data, 0x00);
126 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data, 0x00);
127 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data, 0x01);
128 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data, 0x02);
129 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data, 0x03);
130 }
131 writel(netxen_mac_addr_cntl_data,
132 NETXEN_CRB_NORMALIZE(adapter, NETXEN_MAC_ADDR_CNTL_REG));
133 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
134 writel(netxen_mac_addr_cntl_data,
135 NETXEN_CRB_NORMALIZE(adapter,
136 NETXEN_MULTICAST_ADDR_HI_0));
137 } else {
138 writel(netxen_mac_addr_cntl_data,
139 NETXEN_CRB_NORMALIZE(adapter,
140 NETXEN_MULTICAST_ADDR_HI_1));
141 }
142 netxen_mac_addr_cntl_data = 0;
143 writel(netxen_mac_addr_cntl_data,
144 NETXEN_CRB_NORMALIZE(adapter, NETXEN_NIU_GB_DROP_WRONGADDR));
145}
146
147/*
148 * netxen_nic_change_mtu - Change the Maximum Transfer Unit
149 * @returns 0 on success, negative on failure
150 */
151int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
152{
153 struct netxen_port *port = netdev_priv(netdev);
154 struct netxen_adapter *adapter = port->adapter;
155 int eff_mtu = mtu + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE;
156
157 if ((eff_mtu > NETXEN_MAX_MTU) || (eff_mtu < NETXEN_MIN_MTU)) {
158 printk(KERN_ERR "%s: %s %d is not supported.\n",
159 netxen_nic_driver_name, netdev->name, mtu);
160 return -EINVAL;
161 }
162
163 if (adapter->ops->set_mtu)
164 adapter->ops->set_mtu(port, mtu);
165 netdev->mtu = mtu;
166
167 return 0;
168}
169
170/*
171 * check if the firmware has been downloaded and ready to run and
172 * setup the address for the descriptors in the adapter
173 */
174int netxen_nic_hw_resources(struct netxen_adapter *adapter)
175{
176 struct netxen_hardware_context *hw = &adapter->ahw;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400177 u32 state = 0;
178 void *addr;
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800179 void *pause_addr;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400180 int loops = 0, err = 0;
181 int ctx, ring;
182 u32 card_cmdring = 0;
183 struct netxen_rcv_desc_crb *rcv_desc_crb = NULL;
184 struct netxen_recv_context *recv_ctx;
185 struct netxen_rcv_desc_ctx *rcv_desc;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400186
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400187 DPRINTK(INFO, "crb_base: %lx %lx", NETXEN_PCI_CRBSPACE,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800188 PCI_OFFSET_SECOND_RANGE(adapter, NETXEN_PCI_CRBSPACE));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400189 DPRINTK(INFO, "cam base: %lx %lx", NETXEN_CRB_CAM,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800190 pci_base_offset(adapter, NETXEN_CRB_CAM));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400191 DPRINTK(INFO, "cam RAM: %lx %lx", NETXEN_CAM_RAM_BASE,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800192 pci_base_offset(adapter, NETXEN_CAM_RAM_BASE));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400193 DPRINTK(INFO, "NIC base:%lx %lx\n", NIC_CRB_BASE_PORT1,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800194 pci_base_offset(adapter, NIC_CRB_BASE_PORT1));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400195
196 /* Window 1 call */
197 card_cmdring = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_CMDRING));
198
199 DPRINTK(INFO, "Command Peg sends 0x%x for cmdring base\n",
200 card_cmdring);
201
202 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
203 DPRINTK(INFO, "Command Peg ready..waiting for rcv peg\n");
204 loops = 0;
205 state = 0;
206 /* Window 1 call */
207 state = readl(NETXEN_CRB_NORMALIZE(adapter,
208 recv_crb_registers[ctx].
209 crb_rcvpeg_state));
210 while (state != PHAN_PEG_RCV_INITIALIZED && loops < 20) {
211 udelay(100);
212 /* Window 1 call */
213 state = readl(NETXEN_CRB_NORMALIZE(adapter,
214 recv_crb_registers
215 [ctx].
216 crb_rcvpeg_state));
217 loops++;
218 }
219 if (loops >= 20) {
220 printk(KERN_ERR "Rcv Peg initialization not complete:"
221 "%x.\n", state);
222 err = -EIO;
223 return err;
224 }
225 }
226 DPRINTK(INFO, "Recieve Peg ready too. starting stuff\n");
227
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800228 addr = netxen_alloc(adapter->ahw.pdev,
229 sizeof(struct cmd_desc_type0) *
230 adapter->max_tx_desc_count,
231 &hw->cmd_desc_phys_addr, &hw->cmd_desc_pdev);
232
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400233 if (addr == NULL) {
234 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800235 return -ENOMEM;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400236 }
237
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800238 pause_addr = netxen_alloc(adapter->ahw.pdev, 512,
239 (dma_addr_t *) & hw->pause_physaddr,
240 &hw->pause_pdev);
241 if (pause_addr == NULL) {
242 DPRINTK(1, ERR, "bad return from pci_alloc_consistent\n");
243 return -ENOMEM;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400244 }
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800245
246 hw->pauseaddr = (char *)pause_addr;
247 {
248 u64 *ptr = (u64 *) pause_addr;
249 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
250 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
251 *ptr++ = NETXEN_NIC_UNIT_PAUSE_ADDR;
252 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
253 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR1;
254 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR2;
255 }
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400256
257 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
258
259 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
260 recv_ctx = &adapter->recv_ctx[ctx];
261
262 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
263 rcv_desc = &recv_ctx->rcv_desc[ring];
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800264 addr = netxen_alloc(adapter->ahw.pdev,
265 RCV_DESC_RINGSIZE,
266 &rcv_desc->phys_addr,
267 &rcv_desc->phys_pdev);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400268 if (addr == NULL) {
269 DPRINTK(ERR, "bad return from "
270 "pci_alloc_consistent\n");
271 netxen_free_hw_resources(adapter);
272 err = -ENOMEM;
273 return err;
274 }
275 rcv_desc->desc_head = (struct rcv_desc *)addr;
276 }
277
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800278 addr = netxen_alloc(adapter->ahw.pdev,
279 STATUS_DESC_RINGSIZE,
280 &recv_ctx->
281 rcv_status_desc_phys_addr,
282 &recv_ctx->rcv_status_desc_pdev);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400283 if (addr == NULL) {
284 DPRINTK(ERR, "bad return from"
285 " pci_alloc_consistent\n");
286 netxen_free_hw_resources(adapter);
287 err = -ENOMEM;
288 return err;
289 }
290 recv_ctx->rcv_status_desc_head = (struct status_desc *)addr;
291 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
292 rcv_desc = &recv_ctx->rcv_desc[ring];
293 rcv_desc_crb =
294 &recv_crb_registers[ctx].rcv_desc_crb[ring];
295 DPRINTK(INFO, "ring #%d crb global ring reg 0x%x\n",
296 ring, rcv_desc_crb->crb_globalrcv_ring);
297 /* Window = 1 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800298 writel(lower32(rcv_desc->phys_addr),
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400299 NETXEN_CRB_NORMALIZE(adapter,
300 rcv_desc_crb->
301 crb_globalrcv_ring));
302 DPRINTK(INFO, "GLOBAL_RCV_RING ctx %d, addr 0x%x"
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800303 " val 0x%llx,"
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400304 " virt %p\n", ctx,
305 rcv_desc_crb->crb_globalrcv_ring,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800306 (unsigned long long)rcv_desc->phys_addr,
307 +rcv_desc->desc_head);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400308 }
309
310 /* Window = 1 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800311 writel(lower32(recv_ctx->rcv_status_desc_phys_addr),
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400312 NETXEN_CRB_NORMALIZE(adapter,
313 recv_crb_registers[ctx].
314 crb_rcvstatus_ring));
315 DPRINTK(INFO, "RCVSTATUS_RING, ctx %d, addr 0x%x,"
316 " val 0x%x,virt%p\n",
317 ctx,
318 recv_crb_registers[ctx].crb_rcvstatus_ring,
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800319 (unsigned long long)recv_ctx->rcv_status_desc_phys_addr,
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400320 recv_ctx->rcv_status_desc_head);
321 }
322 /* Window = 1 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800323 writel(lower32(hw->pause_physaddr),
324 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_LO));
325 writel(upper32(hw->pause_physaddr),
326 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_HI));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400327
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800328 writel(lower32(hw->cmd_desc_phys_addr),
329 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_LO));
330 writel(upper32(hw->cmd_desc_phys_addr),
331 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_HI));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400332 return err;
333}
334
335void netxen_free_hw_resources(struct netxen_adapter *adapter)
336{
337 struct netxen_recv_context *recv_ctx;
338 struct netxen_rcv_desc_ctx *rcv_desc;
339 int ctx, ring;
340
341 if (adapter->ahw.cmd_desc_head != NULL) {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800342 pci_free_consistent(adapter->ahw.cmd_desc_pdev,
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400343 sizeof(struct cmd_desc_type0) *
344 adapter->max_tx_desc_count,
345 adapter->ahw.cmd_desc_head,
346 adapter->ahw.cmd_desc_phys_addr);
347 adapter->ahw.cmd_desc_head = NULL;
348 }
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800349 if (adapter->ahw.pauseaddr != NULL) {
350 pci_free_consistent(adapter->ahw.pause_pdev, 512,
351 adapter->ahw.pauseaddr,
352 adapter->ahw.pause_physaddr);
353 adapter->ahw.pauseaddr = NULL;
354 }
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400355
356 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
357 recv_ctx = &adapter->recv_ctx[ctx];
358 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
359 rcv_desc = &recv_ctx->rcv_desc[ring];
360
361 if (rcv_desc->desc_head != NULL) {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800362 pci_free_consistent(rcv_desc->phys_pdev,
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400363 RCV_DESC_RINGSIZE,
364 rcv_desc->desc_head,
365 rcv_desc->phys_addr);
366 rcv_desc->desc_head = NULL;
367 }
368 }
369
370 if (recv_ctx->rcv_status_desc_head != NULL) {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800371 pci_free_consistent(recv_ctx->rcv_status_desc_pdev,
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400372 STATUS_DESC_RINGSIZE,
373 recv_ctx->rcv_status_desc_head,
374 recv_ctx->
375 rcv_status_desc_phys_addr);
376 recv_ctx->rcv_status_desc_head = NULL;
377 }
378 }
379}
380
381void netxen_tso_check(struct netxen_adapter *adapter,
382 struct cmd_desc_type0 *desc, struct sk_buff *skb)
383{
384 if (desc->mss) {
385 desc->total_hdr_length = sizeof(struct ethhdr) +
386 ((skb->nh.iph)->ihl * sizeof(u32)) +
387 ((skb->h.th)->doff * sizeof(u32));
388 desc->opcode = TX_TCP_LSO;
Jeff Garzik1494a812006-11-07 05:12:16 -0500389 } else if (skb->ip_summed == CHECKSUM_COMPLETE) {
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400390 if (skb->nh.iph->protocol == IPPROTO_TCP) {
391 desc->opcode = TX_TCP_PKT;
392 } else if (skb->nh.iph->protocol == IPPROTO_UDP) {
393 desc->opcode = TX_UDP_PKT;
394 } else {
395 return;
396 }
397 }
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800398 adapter->stats.xmitcsummed++;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400399 CMD_DESC_TCP_HDR_OFFSET_WRT(desc, skb->h.raw - skb->data);
400 desc->length_tcp_hdr = cpu_to_le32(desc->length_tcp_hdr);
401 desc->ip_hdr_offset = skb->nh.raw - skb->data;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400402}
403
404int netxen_is_flash_supported(struct netxen_adapter *adapter)
405{
406 const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
407 int addr, val01, val02, i, j;
408
409 /* if the flash size less than 4Mb, make huge war cry and die */
410 for (j = 1; j < 4; j++) {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800411 addr = j * NETXEN_NIC_WINDOW_MARGIN;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400412 for (i = 0; i < (sizeof(locs) / sizeof(locs[0])); i++) {
413 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
414 && netxen_rom_fast_read(adapter, (addr + locs[i]),
415 &val02) == 0) {
416 if (val01 == val02)
417 return -1;
418 } else
419 return -1;
420 }
421 }
422
423 return 0;
424}
425
426static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
427 int size, u32 * buf)
428{
429 int i, addr;
430 u32 *ptr32;
431
432 addr = base;
433 ptr32 = buf;
434 for (i = 0; i < size / sizeof(u32); i++) {
435 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1)
436 return -1;
437 ptr32++;
438 addr += sizeof(u32);
439 }
440 if ((char *)buf + size > (char *)ptr32) {
441 u32 local;
442
443 if (netxen_rom_fast_read(adapter, addr, &local) == -1)
444 return -1;
445 memcpy(ptr32, &local, (char *)buf + size - (char *)ptr32);
446 }
447
448 return 0;
449}
450
451int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, u64 mac[])
452{
453 u32 *pmac = (u32 *) & mac[0];
454
455 if (netxen_get_flash_block(adapter,
456 USER_START +
457 offsetof(struct netxen_new_user_info,
458 mac_addr),
459 FLASH_NUM_PORTS * sizeof(u64), pmac) == -1) {
460 return -1;
461 }
462 if (*mac == ~0ULL) {
463 if (netxen_get_flash_block(adapter,
464 USER_START_OLD +
465 offsetof(struct netxen_user_old_info,
466 mac_addr),
467 FLASH_NUM_PORTS * sizeof(u64),
468 pmac) == -1)
469 return -1;
470 if (*mac == ~0ULL)
471 return -1;
472 }
473 return 0;
474}
475
476/*
477 * Changes the CRB window to the specified window.
478 */
479void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
480{
481 void __iomem *offset;
482 u32 tmp;
483 int count = 0;
484
485 if (adapter->curr_window == wndw)
486 return;
487
488 /*
489 * Move the CRB window.
490 * We need to write to the "direct access" region of PCI
491 * to avoid a race condition where the window register has
492 * not been successfully written across CRB before the target
493 * register address is received by PCI. The direct region bypasses
494 * the CRB bus.
495 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800496 offset =
497 PCI_OFFSET_SECOND_RANGE(adapter,
498 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400499
500 if (wndw & 0x1)
501 wndw = NETXEN_WINDOW_ONE;
502
503 writel(wndw, offset);
504
505 /* MUST make sure window is set before we forge on... */
506 while ((tmp = readl(offset)) != wndw) {
507 printk(KERN_WARNING "%s: %s WARNING: CRB window value not "
508 "registered properly: 0x%08x.\n",
509 netxen_nic_driver_name, __FUNCTION__, tmp);
510 mdelay(1);
511 if (count >= 10)
512 break;
513 count++;
514 }
515
516 adapter->curr_window = wndw;
517}
518
519void netxen_load_firmware(struct netxen_adapter *adapter)
520{
521 int i;
522 long data, size = 0;
523 long flashaddr = NETXEN_FLASH_BASE, memaddr = NETXEN_PHANTOM_MEM_BASE;
524 u64 off;
525 void __iomem *addr;
526
527 size = NETXEN_FIRMWARE_LEN;
528 writel(1, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
529
530 for (i = 0; i < size; i++) {
531 if (netxen_rom_fast_read(adapter, flashaddr, (int *)&data) != 0) {
532 DPRINTK(ERR,
533 "Error in netxen_rom_fast_read(). Will skip"
534 "loading flash image\n");
535 return;
536 }
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800537 off = netxen_nic_pci_set_window(adapter, memaddr);
538 addr = pci_base_offset(adapter, off);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400539 writel(data, addr);
540 flashaddr += 4;
541 memaddr += 4;
542 }
543 udelay(100);
544 /* make sure Casper is powered on */
545 writel(0x3fff,
546 NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL));
547 writel(0, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
548
549 udelay(100);
550}
551
552int
553netxen_nic_hw_write_wx(struct netxen_adapter *adapter, u64 off, void *data,
554 int len)
555{
556 void __iomem *addr;
557
558 if (ADDR_IN_WINDOW1(off)) {
559 addr = NETXEN_CRB_NORMALIZE(adapter, off);
560 } else { /* Window 0 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800561 addr = pci_base_offset(adapter, off);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400562 netxen_nic_pci_change_crbwindow(adapter, 0);
563 }
564
565 DPRINTK(INFO, "writing to base %lx offset %llx addr %p"
566 " data %llx len %d\n",
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800567 pci_base(adapter, off), off, addr,
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400568 *(unsigned long long *)data, len);
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800569 if (!addr) {
570 netxen_nic_pci_change_crbwindow(adapter, 1);
571 return 1;
572 }
573
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400574 switch (len) {
575 case 1:
576 writeb(*(u8 *) data, addr);
577 break;
578 case 2:
579 writew(*(u16 *) data, addr);
580 break;
581 case 4:
582 writel(*(u32 *) data, addr);
583 break;
584 case 8:
585 writeq(*(u64 *) data, addr);
586 break;
587 default:
588 DPRINTK(INFO,
589 "writing data %lx to offset %llx, num words=%d\n",
590 *(unsigned long *)data, off, (len >> 3));
591
592 netxen_nic_hw_block_write64((u64 __iomem *) data, addr,
593 (len >> 3));
594 break;
595 }
596 if (!ADDR_IN_WINDOW1(off))
597 netxen_nic_pci_change_crbwindow(adapter, 1);
598
599 return 0;
600}
601
602int
603netxen_nic_hw_read_wx(struct netxen_adapter *adapter, u64 off, void *data,
604 int len)
605{
606 void __iomem *addr;
607
608 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */
609 addr = NETXEN_CRB_NORMALIZE(adapter, off);
610 } else { /* Window 0 */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800611 addr = pci_base_offset(adapter, off);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400612 netxen_nic_pci_change_crbwindow(adapter, 0);
613 }
614
615 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800616 pci_base(adapter, off), off, addr);
617 if (!addr) {
618 netxen_nic_pci_change_crbwindow(adapter, 1);
619 return 1;
620 }
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400621 switch (len) {
622 case 1:
623 *(u8 *) data = readb(addr);
624 break;
625 case 2:
626 *(u16 *) data = readw(addr);
627 break;
628 case 4:
629 *(u32 *) data = readl(addr);
630 break;
631 case 8:
632 *(u64 *) data = readq(addr);
633 break;
634 default:
635 netxen_nic_hw_block_read64((u64 __iomem *) data, addr,
636 (len >> 3));
637 break;
638 }
639 DPRINTK(INFO, "read %lx\n", *(unsigned long *)data);
640
641 if (!ADDR_IN_WINDOW1(off))
642 netxen_nic_pci_change_crbwindow(adapter, 1);
643
644 return 0;
645}
646
647void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val)
648{ /* Only for window 1 */
649 void __iomem *addr;
650
651 addr = NETXEN_CRB_NORMALIZE(adapter, off);
652 DPRINTK(INFO, "writing to base %lx offset %llx addr %p data %x\n",
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800653 pci_base(adapter, off), off, addr);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400654 writel(val, addr);
655
656}
657
658int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off)
659{ /* Only for window 1 */
660 void __iomem *addr;
661 int val;
662
663 addr = NETXEN_CRB_NORMALIZE(adapter, off);
664 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
665 adapter->ahw.pci_base, off, addr);
666 val = readl(addr);
667 writel(val, addr);
668
669 return val;
670}
671
672/* Change the window to 0, write and change back to window 1. */
673void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value)
674{
675 void __iomem *addr;
676
677 netxen_nic_pci_change_crbwindow(adapter, 0);
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800678 addr = (void __iomem *)(pci_base_offset(adapter, index));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400679 writel(value, addr);
680 netxen_nic_pci_change_crbwindow(adapter, 1);
681}
682
683/* Change the window to 0, read and change back to window 1. */
684void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value)
685{
686 void __iomem *addr;
687
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800688 addr = (void __iomem *)(pci_base_offset(adapter, index));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400689
690 netxen_nic_pci_change_crbwindow(adapter, 0);
691 *value = readl(addr);
692 netxen_nic_pci_change_crbwindow(adapter, 1);
693}
694
695int netxen_pci_set_window_warning_count = 0;
696
697unsigned long
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800698netxen_nic_pci_set_window(struct netxen_adapter *adapter,
699 unsigned long long addr)
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400700{
701 static int ddr_mn_window = -1;
702 static int qdr_sn_window = -1;
703 int window;
704
705 if (ADDR_IN_RANGE(addr, NETXEN_ADDR_DDR_NET, NETXEN_ADDR_DDR_NET_MAX)) {
706 /* DDR network side */
707 addr -= NETXEN_ADDR_DDR_NET;
708 window = (addr >> 25) & 0x3ff;
709 if (ddr_mn_window != window) {
710 ddr_mn_window = window;
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800711 writel(window, PCI_OFFSET_SECOND_RANGE(adapter,
712 NETXEN_PCIX_PH_REG
713 (PCIX_MN_WINDOW)));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400714 /* MUST make sure window is set before we forge on... */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800715 readl(PCI_OFFSET_SECOND_RANGE(adapter,
716 NETXEN_PCIX_PH_REG
717 (PCIX_MN_WINDOW)));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400718 }
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800719 addr -= (window * NETXEN_WINDOW_ONE);
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400720 addr += NETXEN_PCI_DDR_NET;
721 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM0, NETXEN_ADDR_OCM0_MAX)) {
722 addr -= NETXEN_ADDR_OCM0;
723 addr += NETXEN_PCI_OCM0;
724 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM1, NETXEN_ADDR_OCM1_MAX)) {
725 addr -= NETXEN_ADDR_OCM1;
726 addr += NETXEN_PCI_OCM1;
727 } else
728 if (ADDR_IN_RANGE
729 (addr, NETXEN_ADDR_QDR_NET, NETXEN_ADDR_QDR_NET_MAX)) {
730 /* QDR network side */
731 addr -= NETXEN_ADDR_QDR_NET;
732 window = (addr >> 22) & 0x3f;
733 if (qdr_sn_window != window) {
734 qdr_sn_window = window;
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800735 writel((window << 22),
736 PCI_OFFSET_SECOND_RANGE(adapter,
737 NETXEN_PCIX_PH_REG
738 (PCIX_SN_WINDOW)));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400739 /* MUST make sure window is set before we forge on... */
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800740 readl(PCI_OFFSET_SECOND_RANGE(adapter,
741 NETXEN_PCIX_PH_REG
742 (PCIX_SN_WINDOW)));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400743 }
744 addr -= (window * 0x400000);
745 addr += NETXEN_PCI_QDR_NET;
746 } else {
747 /*
748 * peg gdb frequently accesses memory that doesn't exist,
749 * this limits the chit chat so debugging isn't slowed down.
750 */
751 if ((netxen_pci_set_window_warning_count++ < 8)
752 || (netxen_pci_set_window_warning_count % 64 == 0))
753 printk("%s: Warning:netxen_nic_pci_set_window()"
754 " Unknown address range!\n",
755 netxen_nic_driver_name);
756
757 }
758 return addr;
759}
760
761int netxen_nic_get_board_info(struct netxen_adapter *adapter)
762{
763 int rv = 0;
764 int addr = BRDCFG_START;
765 struct netxen_board_info *boardinfo;
766 int index;
767 u32 *ptr32;
768
769 boardinfo = &adapter->ahw.boardcfg;
770 ptr32 = (u32 *) boardinfo;
771
772 for (index = 0; index < sizeof(struct netxen_board_info) / sizeof(u32);
773 index++) {
774 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
775 return -EIO;
776 }
777 ptr32++;
778 addr += sizeof(u32);
779 }
780 if (boardinfo->magic != NETXEN_BDINFO_MAGIC) {
781 printk("%s: ERROR reading %s board config."
782 " Read %x, expected %x\n", netxen_nic_driver_name,
783 netxen_nic_driver_name,
784 boardinfo->magic, NETXEN_BDINFO_MAGIC);
785 rv = -1;
786 }
787 if (boardinfo->header_version != NETXEN_BDINFO_VERSION) {
788 printk("%s: Unknown board config version."
789 " Read %x, expected %x\n", netxen_nic_driver_name,
790 boardinfo->header_version, NETXEN_BDINFO_VERSION);
791 rv = -1;
792 }
793
794 DPRINTK(INFO, "Discovered board type:0x%x ", boardinfo->board_type);
795 switch ((netxen_brdtype_t) boardinfo->board_type) {
796 case NETXEN_BRDTYPE_P2_SB35_4G:
797 adapter->ahw.board_type = NETXEN_NIC_GBE;
798 break;
799 case NETXEN_BRDTYPE_P2_SB31_10G:
800 case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
801 case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
802 case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
803 adapter->ahw.board_type = NETXEN_NIC_XGBE;
804 break;
805 case NETXEN_BRDTYPE_P1_BD:
806 case NETXEN_BRDTYPE_P1_SB:
807 case NETXEN_BRDTYPE_P1_SMAX:
808 case NETXEN_BRDTYPE_P1_SOCK:
809 adapter->ahw.board_type = NETXEN_NIC_GBE;
810 break;
811 default:
812 printk("%s: Unknown(%x)\n", netxen_nic_driver_name,
813 boardinfo->board_type);
814 break;
815 }
816
817 return rv;
818}
819
820/* NIU access sections */
821
822int netxen_nic_set_mtu_gb(struct netxen_port *port, int new_mtu)
823{
824 struct netxen_adapter *adapter = port->adapter;
825 netxen_nic_write_w0(adapter,
826 NETXEN_NIU_GB_MAX_FRAME_SIZE(port->portnum),
827 new_mtu);
828 return 0;
829}
830
831int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu)
832{
833 struct netxen_adapter *adapter = port->adapter;
834 new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE;
835 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu);
836 return 0;
837}
838
839void netxen_nic_init_niu_gb(struct netxen_adapter *adapter)
840{
841 int portno;
842 for (portno = 0; portno < NETXEN_NIU_MAX_GBE_PORTS; portno++)
843 netxen_niu_gbe_init_port(adapter, portno);
844}
845
846void netxen_nic_stop_all_ports(struct netxen_adapter *adapter)
847{
848 int port_nr;
849 struct netxen_port *port;
850
851 for (port_nr = 0; port_nr < adapter->ahw.max_ports; port_nr++) {
852 port = adapter->port[port_nr];
853 if (adapter->ops->stop_port)
854 adapter->ops->stop_port(adapter, port->portnum);
855 }
856}
857
858void
859netxen_crb_writelit_adapter(struct netxen_adapter *adapter, unsigned long off,
860 int data)
861{
862 void __iomem *addr;
863
864 if (ADDR_IN_WINDOW1(off)) {
865 writel(data, NETXEN_CRB_NORMALIZE(adapter, off));
866 } else {
867 netxen_nic_pci_change_crbwindow(adapter, 0);
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800868 addr = (void __iomem *)(pci_base_offset(adapter, off));
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400869 writel(data, addr);
870 netxen_nic_pci_change_crbwindow(adapter, 1);
871 }
872}
873
874void netxen_nic_set_link_parameters(struct netxen_port *port)
875{
876 struct netxen_adapter *adapter = port->adapter;
877 __le32 status;
878 u16 autoneg;
879 __le32 mode;
880
881 netxen_nic_read_w0(adapter, NETXEN_NIU_MODE, &mode);
882 if (netxen_get_niu_enable_ge(mode)) { /* Gb 10/100/1000 Mbps mode */
883 if (adapter->ops->phy_read
884 && adapter->ops->
885 phy_read(adapter, port->portnum,
886 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
887 &status) == 0) {
888 if (netxen_get_phy_link(status)) {
889 switch (netxen_get_phy_speed(status)) {
890 case 0:
891 port->link_speed = SPEED_10;
892 break;
893 case 1:
894 port->link_speed = SPEED_100;
895 break;
896 case 2:
897 port->link_speed = SPEED_1000;
898 break;
899 default:
900 port->link_speed = -1;
901 break;
902 }
903 switch (netxen_get_phy_duplex(status)) {
904 case 0:
905 port->link_duplex = DUPLEX_HALF;
906 break;
907 case 1:
908 port->link_duplex = DUPLEX_FULL;
909 break;
910 default:
911 port->link_duplex = -1;
912 break;
913 }
914 if (adapter->ops->phy_read
915 && adapter->ops->
916 phy_read(adapter, port->portnum,
917 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
918 (__le32 *) & autoneg) != 0)
919 port->link_autoneg = autoneg;
920 } else
921 goto link_down;
922 } else {
923 link_down:
924 port->link_speed = -1;
925 port->link_duplex = -1;
926 }
927 }
928}
929
930void netxen_nic_flash_print(struct netxen_adapter *adapter)
931{
932 int valid = 1;
933 u32 fw_major = 0;
934 u32 fw_minor = 0;
935 u32 fw_build = 0;
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800936 char brd_name[NETXEN_MAX_SHORT_NAME];
937 struct netxen_new_user_info user_info;
938 int i, addr = USER_START;
939 u32 *ptr32;
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400940
941 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
942 if (board_info->magic != NETXEN_BDINFO_MAGIC) {
943 printk
944 ("NetXen Unknown board config, Read 0x%x expected as 0x%x\n",
945 board_info->magic, NETXEN_BDINFO_MAGIC);
946 valid = 0;
947 }
948 if (board_info->header_version != NETXEN_BDINFO_VERSION) {
949 printk("NetXen Unknown board config version."
950 " Read %x, expected %x\n",
951 board_info->header_version, NETXEN_BDINFO_VERSION);
952 valid = 0;
953 }
954 if (valid) {
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800955 ptr32 = (u32 *) & user_info;
956 for (i = 0;
957 i < sizeof(struct netxen_new_user_info) / sizeof(u32);
958 i++) {
959 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
960 printk("%s: ERROR reading %s board userarea.\n",
961 netxen_nic_driver_name,
962 netxen_nic_driver_name);
963 return;
964 }
965 ptr32++;
966 addr += sizeof(u32);
967 }
968 get_brd_name_by_type(board_info->board_type, brd_name);
969
970 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
971 brd_name, user_info.serial_num, board_info->chip_id);
972
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400973 printk("NetXen %s Board #%d, Chip id 0x%x\n",
974 board_info->board_type == 0x0b ? "XGB" : "GBE",
975 board_info->board_num, board_info->chip_id);
976 fw_major = readl(NETXEN_CRB_NORMALIZE(adapter,
977 NETXEN_FW_VERSION_MAJOR));
978 fw_minor = readl(NETXEN_CRB_NORMALIZE(adapter,
979 NETXEN_FW_VERSION_MINOR));
980 fw_build =
981 readl(NETXEN_CRB_NORMALIZE(adapter, NETXEN_FW_VERSION_SUB));
982
983 printk("NetXen Firmware version %d.%d.%d\n", fw_major, fw_minor,
984 fw_build);
985 }
986 if (fw_major != _NETXEN_NIC_LINUX_MAJOR) {
987 printk(KERN_ERR "The mismatch in driver version and firmware "
988 "version major number\n"
989 "Driver version major number = %d \t"
990 "Firmware version major number = %d \n",
991 _NETXEN_NIC_LINUX_MAJOR, fw_major);
992 adapter->driver_mismatch = 1;
993 }
994 if (fw_minor != _NETXEN_NIC_LINUX_MINOR) {
995 printk(KERN_ERR "The mismatch in driver version and firmware "
996 "version minor number\n"
997 "Driver version minor number = %d \t"
998 "Firmware version minor number = %d \n",
999 _NETXEN_NIC_LINUX_MINOR, fw_minor);
1000 adapter->driver_mismatch = 1;
1001 }
1002 if (adapter->driver_mismatch)
1003 printk(KERN_INFO "Use the driver with version no %d.%d.xxx\n",
1004 fw_major, fw_minor);
1005}
1006
1007int netxen_crb_read_val(struct netxen_adapter *adapter, unsigned long off)
1008{
1009 int data;
1010 netxen_nic_hw_read_wx(adapter, off, &data, 4);
1011 return data;
1012}