Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2003 - 2006 NetXen, Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation; either version 2 |
| 8 | * of the License, or (at your option) any later version. |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 9 | * |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 14 | * |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, |
| 18 | * MA 02111-1307, USA. |
| 19 | * |
| 20 | * The full GNU General Public License is included in this distribution |
| 21 | * in the file called LICENSE. |
| 22 | * |
| 23 | * Contact Information: |
| 24 | * info@netxen.com |
| 25 | * NetXen, |
| 26 | * 3965 Freedom Circle, Fourth floor, |
| 27 | * Santa Clara, CA 95054 |
| 28 | */ |
| 29 | |
| 30 | #ifndef __NIC_PHAN_REG_H_ |
| 31 | #define __NIC_PHAN_REG_H_ |
| 32 | |
| 33 | /* |
| 34 | * CRB Registers or queue message done only at initialization time. |
| 35 | */ |
| 36 | |
| 37 | /* |
| 38 | * The following 2 are the base adresses for the CRB registers and their |
| 39 | * offsets will be added to get addresses for the index addresses. |
| 40 | */ |
| 41 | #define NIC_CRB_BASE_PORT1 NETXEN_CAM_RAM(0x200) |
| 42 | #define NIC_CRB_BASE_PORT2 NETXEN_CAM_RAM(0x250) |
| 43 | |
| 44 | #define NETXEN_NIC_REG(X) (NIC_CRB_BASE_PORT1+(X)) |
| 45 | |
| 46 | /* |
| 47 | * CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address |
| 48 | * which can be read by the Phantom host to get producer/consumer indexes from |
| 49 | * Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following |
| 50 | * registers will be used for the addresses of the ring's shared memory |
| 51 | * on the Phantom. |
| 52 | */ |
| 53 | |
| 54 | #define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00) |
| 55 | #define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04) |
| 56 | |
| 57 | /* point to the indexes */ |
| 58 | #define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08) |
| 59 | #define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c) |
| 60 | |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 61 | #define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10) |
| 62 | #define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14) |
| 63 | |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 64 | /* address of command descriptors in the host memory */ |
| 65 | #define CRB_HOST_CMD_ADDR_HI NETXEN_NIC_REG(0x30) |
| 66 | #define CRB_HOST_CMD_ADDR_LO NETXEN_NIC_REG(0x34) |
| 67 | |
| 68 | /* The following 4 CRB registers are for doing performance coal */ |
| 69 | #define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x38) |
| 70 | #define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x3c) |
| 71 | #define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x40) |
| 72 | #define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x44) |
| 73 | |
| 74 | /* Needed by the host to find out the state of Phantom's initialization */ |
| 75 | #define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x4c) |
| 76 | #define CRB_CMDPEG_STATE NETXEN_NIC_REG(0x50) |
| 77 | #define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x54) |
| 78 | |
| 79 | /* Interrupt coalescing parameters */ |
| 80 | #define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x80) |
| 81 | #define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x84) |
| 82 | #define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x88) |
| 83 | #define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x8c) |
| 84 | #define CRB_RX_PKT_TIMER NETXEN_NIC_REG(0x90) |
| 85 | #define CRB_TX_PKT_TIMER NETXEN_NIC_REG(0x94) |
| 86 | #define CRB_RX_PKT_CNT NETXEN_NIC_REG(0x98) |
| 87 | #define CRB_RX_TMR_CNT NETXEN_NIC_REG(0x9c) |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 88 | #define CRB_INT_THRESH NETXEN_NIC_REG(0xa4) |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 89 | |
| 90 | /* Register for communicating XG link status */ |
| 91 | #define CRB_XG_STATE NETXEN_NIC_REG(0xa0) |
| 92 | |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 93 | /* Register for communicating card temperature */ |
| 94 | /* Upper 16 bits are temperature value. Lower 16 bits are the state */ |
| 95 | #define CRB_TEMP_STATE NETXEN_NIC_REG(0xa8) |
| 96 | #define nx_get_temp_val(x) ((x) >> 16) |
| 97 | #define nx_get_temp_state(x) ((x) & 0xffff) |
| 98 | #define nx_encode_temp(val, state) (((val) << 16) | (state)) |
| 99 | |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 100 | /* Debug registers for controlling NIC pkt gen agent */ |
| 101 | #define CRB_AGENT_GO NETXEN_NIC_REG(0xb0) |
| 102 | #define CRB_AGENT_TX_SIZE NETXEN_NIC_REG(0xb4) |
| 103 | #define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xb8) |
| 104 | #define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xbc) |
| 105 | #define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xc0) |
| 106 | |
| 107 | /* Debug registers for observing NIC performance */ |
| 108 | #define CRB_TX_STATE NETXEN_NIC_REG(0xd0) |
| 109 | #define CRB_TX_COUNT NETXEN_NIC_REG(0xd4) |
| 110 | #define CRB_RX_STATE NETXEN_NIC_REG(0xd8) |
| 111 | |
| 112 | /* CRB registers per Rcv Descriptor ring */ |
| 113 | struct netxen_rcv_desc_crb { |
| 114 | u32 crb_rcv_producer_offset __attribute__ ((aligned(512))); |
| 115 | u32 crb_rcv_consumer_offset; |
| 116 | u32 crb_globalrcv_ring; |
| 117 | }; |
| 118 | |
| 119 | /* |
| 120 | * CRB registers used by the receive peg logic. One instance of these |
| 121 | * needs to be instantiated per instance of the receive peg. |
| 122 | */ |
| 123 | |
| 124 | struct netxen_recv_crb { |
| 125 | struct netxen_rcv_desc_crb rcv_desc_crb[NUM_RCV_DESC_RINGS]; |
| 126 | u32 crb_rcvstatus_ring; |
| 127 | u32 crb_rcv_status_producer; |
| 128 | u32 crb_rcv_status_consumer; |
| 129 | u32 crb_rcvpeg_state; |
| 130 | }; |
| 131 | |
| 132 | #if defined(DEFINE_GLOBAL_RECV_CRB) |
| 133 | struct netxen_recv_crb recv_crb_registers[] = { |
| 134 | /* |
| 135 | * Instance 0. |
| 136 | */ |
| 137 | { |
| 138 | /* rcv_desc_crb: */ |
| 139 | { |
| 140 | { |
| 141 | /* crb_rcv_producer_offset: */ |
| 142 | NETXEN_NIC_REG(0x18), |
| 143 | /* crb_rcv_consumer_offset: */ |
| 144 | NETXEN_NIC_REG(0x1c), |
| 145 | /* crb_gloablrcv_ring: */ |
| 146 | NETXEN_NIC_REG(0x20), |
| 147 | }, |
| 148 | /* Jumbo frames */ |
| 149 | { |
| 150 | /* crb_rcv_producer_offset: */ |
| 151 | NETXEN_NIC_REG(0x100), |
| 152 | /* crb_rcv_consumer_offset: */ |
| 153 | NETXEN_NIC_REG(0x104), |
| 154 | /* crb_gloablrcv_ring: */ |
| 155 | NETXEN_NIC_REG(0x108), |
| 156 | } |
| 157 | }, |
| 158 | /* crb_rcvstatus_ring: */ |
| 159 | NETXEN_NIC_REG(0x24), |
| 160 | /* crb_rcv_status_producer: */ |
| 161 | NETXEN_NIC_REG(0x28), |
| 162 | /* crb_rcv_status_consumer: */ |
| 163 | NETXEN_NIC_REG(0x2c), |
| 164 | /* crb_rcvpeg_state: */ |
| 165 | NETXEN_NIC_REG(0x48), |
| 166 | |
| 167 | }, |
| 168 | /* |
| 169 | * Instance 1, |
| 170 | */ |
| 171 | { |
| 172 | /* rcv_desc_crb: */ |
| 173 | { |
| 174 | { |
| 175 | /* crb_rcv_producer_offset: */ |
| 176 | NETXEN_NIC_REG(0x80), |
| 177 | /* crb_rcv_consumer_offset: */ |
| 178 | NETXEN_NIC_REG(0x84), |
| 179 | /* crb_globalrcv_ring: */ |
| 180 | NETXEN_NIC_REG(0x88), |
| 181 | }, |
| 182 | /* Jumbo frames */ |
| 183 | { |
| 184 | /* crb_rcv_producer_offset: */ |
| 185 | NETXEN_NIC_REG(0x10C), |
| 186 | /* crb_rcv_consumer_offset: */ |
| 187 | NETXEN_NIC_REG(0x110), |
| 188 | /* crb_globalrcv_ring: */ |
| 189 | NETXEN_NIC_REG(0x114), |
| 190 | } |
| 191 | }, |
| 192 | /* crb_rcvstatus_ring: */ |
| 193 | NETXEN_NIC_REG(0x8c), |
| 194 | /* crb_rcv_status_producer: */ |
| 195 | NETXEN_NIC_REG(0x90), |
| 196 | /* crb_rcv_status_consumer: */ |
| 197 | NETXEN_NIC_REG(0x94), |
| 198 | /* crb_rcvpeg_state: */ |
| 199 | NETXEN_NIC_REG(0x98), |
| 200 | }, |
| 201 | }; |
| 202 | #else |
| 203 | extern struct netxen_recv_crb recv_crb_registers[]; |
| 204 | #endif /* DEFINE_GLOBAL_RECEIVE_CRB */ |
| 205 | |
Amit S. Kale | cb8011a | 2006-11-29 09:00:10 -0800 | [diff] [blame^] | 206 | /* |
| 207 | * Temperature control. |
| 208 | */ |
| 209 | enum { |
| 210 | NX_TEMP_NORMAL = 0x1, /* Normal operating range */ |
| 211 | NX_TEMP_WARN, /* Sound alert, temperature getting high */ |
| 212 | NX_TEMP_PANIC /* Fatal error, hardware has shut down. */ |
| 213 | }; |
| 214 | |
Amit S. Kale | 3d396eb | 2006-10-21 15:33:03 -0400 | [diff] [blame] | 215 | #endif /* __NIC_PHAN_REG_H_ */ |