blob: 0910125cbbc3be3cfa757f0976f3afea8cac6a21 [file] [log] [blame]
Ben Skeggs94580292012-07-06 12:14:00 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
Ben Skeggs77145f12012-07-31 16:16:21 +100025#include <linux/console.h>
Ben Skeggs94580292012-07-06 12:14:00 +100026#include <linux/module.h>
27#include <linux/pci.h>
28
29#include <core/device.h>
30#include <core/client.h>
Ben Skeggsebb945a2012-07-20 08:17:34 +100031#include <core/gpuobj.h>
Ben Skeggs94580292012-07-06 12:14:00 +100032#include <core/class.h>
33
34#include <subdev/device.h>
Ben Skeggsebb945a2012-07-20 08:17:34 +100035#include <subdev/vm.h>
Ben Skeggs94580292012-07-06 12:14:00 +100036
37#include "nouveau_drm.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100038#include "nouveau_irq.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100039#include "nouveau_dma.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100040#include "nouveau_ttm.h"
41#include "nouveau_gem.h"
Ben Skeggscb75d972012-07-11 10:44:20 +100042#include "nouveau_agp.h"
Ben Skeggs77145f12012-07-31 16:16:21 +100043#include "nouveau_vga.h"
44#include "nouveau_pm.h"
45#include "nouveau_acpi.h"
46#include "nouveau_bios.h"
47#include "nouveau_ioctl.h"
Ben Skeggsebb945a2012-07-20 08:17:34 +100048#include "nouveau_abi16.h"
49#include "nouveau_fbcon.h"
50#include "nouveau_fence.h"
51
52#include "nouveau_ttm.h"
Ben Skeggs94580292012-07-06 12:14:00 +100053
Ben Skeggs94580292012-07-06 12:14:00 +100054MODULE_PARM_DESC(config, "option string to pass to driver core");
55static char *nouveau_config;
56module_param_named(config, nouveau_config, charp, 0400);
57
58MODULE_PARM_DESC(debug, "debug string to pass to driver core");
59static char *nouveau_debug;
60module_param_named(debug, nouveau_debug, charp, 0400);
61
Ben Skeggsebb945a2012-07-20 08:17:34 +100062MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
63static int nouveau_noaccel = 0;
64module_param_named(noaccel, nouveau_noaccel, int, 0400);
65
Ben Skeggs94307382012-10-31 12:11:15 +100066MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
67 "0 = disabled, 1 = enabled, 2 = headless)");
68int nouveau_modeset = -1;
Ben Skeggs77145f12012-07-31 16:16:21 +100069module_param_named(modeset, nouveau_modeset, int, 0400);
70
71static struct drm_driver driver;
72
Ben Skeggs94580292012-07-06 12:14:00 +100073static u64
74nouveau_name(struct pci_dev *pdev)
75{
76 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
77 name |= pdev->bus->number << 16;
78 name |= PCI_SLOT(pdev->devfn) << 8;
79 return name | PCI_FUNC(pdev->devfn);
80}
81
82static int
Ben Skeggsfa6df8c2012-09-12 13:09:23 +100083nouveau_cli_create(struct pci_dev *pdev, const char *name,
84 int size, void **pcli)
Ben Skeggs94580292012-07-06 12:14:00 +100085{
86 struct nouveau_cli *cli;
87 int ret;
88
89 ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
90 nouveau_debug, size, pcli);
91 cli = *pcli;
92 if (ret)
93 return ret;
94
95 mutex_init(&cli->mutex);
96 return 0;
97}
98
99static void
100nouveau_cli_destroy(struct nouveau_cli *cli)
101{
102 struct nouveau_object *client = nv_object(cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000103 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
Ben Skeggs94580292012-07-06 12:14:00 +1000104 nouveau_client_fini(&cli->base, false);
105 atomic_set(&client->refcount, 1);
106 nouveau_object_ref(NULL, &client);
107}
108
Ben Skeggsebb945a2012-07-20 08:17:34 +1000109static void
110nouveau_accel_fini(struct nouveau_drm *drm)
111{
112 nouveau_gpuobj_ref(NULL, &drm->notify);
113 nouveau_channel_del(&drm->channel);
Ben Skeggs49981042012-08-06 19:38:25 +1000114 nouveau_channel_del(&drm->cechan);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000115 if (drm->fence)
116 nouveau_fence(drm)->dtor(drm);
117}
118
119static void
120nouveau_accel_init(struct nouveau_drm *drm)
121{
122 struct nouveau_device *device = nv_device(drm->device);
123 struct nouveau_object *object;
Ben Skeggs49981042012-08-06 19:38:25 +1000124 u32 arg0, arg1;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000125 int ret;
126
127 if (nouveau_noaccel)
128 return;
129
130 /* initialise synchronisation routines */
131 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
132 else if (device->chipset < 0x84) ret = nv10_fence_create(drm);
133 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
134 else ret = nvc0_fence_create(drm);
135 if (ret) {
136 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
137 nouveau_accel_fini(drm);
138 return;
139 }
140
Ben Skeggs49981042012-08-06 19:38:25 +1000141 if (device->card_type >= NV_E0) {
142 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
143 NVDRM_CHAN + 1,
144 NVE0_CHANNEL_IND_ENGINE_CE0 |
145 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
146 &drm->cechan);
147 if (ret)
148 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
149
150 arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
151 arg1 = 0;
152 } else {
153 arg0 = NvDmaFB;
154 arg1 = NvDmaTT;
155 }
156
Ben Skeggsebb945a2012-07-20 08:17:34 +1000157 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
Ben Skeggs49981042012-08-06 19:38:25 +1000158 arg0, arg1, &drm->channel);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000159 if (ret) {
160 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
161 nouveau_accel_fini(drm);
162 return;
163 }
164
165 if (device->card_type < NV_C0) {
166 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
167 &drm->notify);
168 if (ret) {
169 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
170 nouveau_accel_fini(drm);
171 return;
172 }
173
174 ret = nouveau_object_new(nv_object(drm),
175 drm->channel->handle, NvNotify0,
176 0x003d, &(struct nv_dma_class) {
177 .flags = NV_DMA_TARGET_VRAM |
178 NV_DMA_ACCESS_RDWR,
179 .start = drm->notify->addr,
180 .limit = drm->notify->addr + 31
181 }, sizeof(struct nv_dma_class),
182 &object);
183 if (ret) {
184 nouveau_accel_fini(drm);
185 return;
186 }
187 }
188
189
Ben Skeggs49981042012-08-06 19:38:25 +1000190 nouveau_bo_move_init(drm);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000191}
192
Ben Skeggs94580292012-07-06 12:14:00 +1000193static int __devinit
194nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
195{
196 struct nouveau_device *device;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000197 struct apertures_struct *aper;
198 bool boot = false;
Ben Skeggs94580292012-07-06 12:14:00 +1000199 int ret;
200
Ben Skeggsebb945a2012-07-20 08:17:34 +1000201 /* remove conflicting drivers (vesafb, efifb etc) */
202 aper = alloc_apertures(3);
203 if (!aper)
204 return -ENOMEM;
205
206 aper->ranges[0].base = pci_resource_start(pdev, 1);
207 aper->ranges[0].size = pci_resource_len(pdev, 1);
208 aper->count = 1;
209
210 if (pci_resource_len(pdev, 2)) {
211 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
212 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
213 aper->count++;
214 }
215
216 if (pci_resource_len(pdev, 3)) {
217 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
218 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
219 aper->count++;
220 }
221
222#ifdef CONFIG_X86
223 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
224#endif
225 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
226
Ben Skeggs94580292012-07-06 12:14:00 +1000227 ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
228 nouveau_config, nouveau_debug, &device);
229 if (ret)
230 return ret;
231
232 pci_set_master(pdev);
233
Ben Skeggs77145f12012-07-31 16:16:21 +1000234 ret = drm_get_pci_dev(pdev, pent, &driver);
Ben Skeggs94580292012-07-06 12:14:00 +1000235 if (ret) {
Ben Skeggsebb945a2012-07-20 08:17:34 +1000236 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
Ben Skeggs94580292012-07-06 12:14:00 +1000237 return ret;
238 }
239
240 return 0;
241}
242
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200243static int
Ben Skeggs94580292012-07-06 12:14:00 +1000244nouveau_drm_load(struct drm_device *dev, unsigned long flags)
245{
246 struct pci_dev *pdev = dev->pdev;
Ben Skeggsebb945a2012-07-20 08:17:34 +1000247 struct nouveau_device *device;
Ben Skeggs94580292012-07-06 12:14:00 +1000248 struct nouveau_drm *drm;
249 int ret;
250
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000251 ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000252 if (ret)
253 return ret;
254
Ben Skeggs77145f12012-07-31 16:16:21 +1000255 dev->dev_private = drm;
256 drm->dev = dev;
257
Ben Skeggs94580292012-07-06 12:14:00 +1000258 INIT_LIST_HEAD(&drm->clients);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000259 spin_lock_init(&drm->tile.lock);
Ben Skeggs94580292012-07-06 12:14:00 +1000260
Ben Skeggscb75d972012-07-11 10:44:20 +1000261 /* make sure AGP controller is in a consistent state before we
262 * (possibly) execute vbios init tables (see nouveau_agp.h)
263 */
264 if (drm_pci_device_is_agp(dev) && dev->agp) {
265 /* dummy device object, doesn't init anything, but allows
266 * agp code access to registers
267 */
268 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
269 NVDRM_DEVICE, 0x0080,
270 &(struct nv_device_class) {
271 .device = ~0,
272 .disable =
273 ~(NV_DEVICE_DISABLE_MMIO |
274 NV_DEVICE_DISABLE_IDENTIFY),
275 .debug0 = ~0,
276 }, sizeof(struct nv_device_class),
277 &drm->device);
278 if (ret)
Ben Skeggsebb945a2012-07-20 08:17:34 +1000279 goto fail_device;
Ben Skeggscb75d972012-07-11 10:44:20 +1000280
281 nouveau_agp_reset(drm);
282 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
283 }
284
Ben Skeggs94580292012-07-06 12:14:00 +1000285 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
286 0x0080, &(struct nv_device_class) {
287 .device = ~0,
288 .disable = 0,
289 .debug0 = 0,
290 }, sizeof(struct nv_device_class),
291 &drm->device);
292 if (ret)
293 goto fail_device;
294
Ben Skeggs77145f12012-07-31 16:16:21 +1000295 /* workaround an odd issue on nvc1 by disabling the device's
296 * nosnoop capability. hopefully won't cause issues until a
297 * better fix is found - assuming there is one...
298 */
Ben Skeggsebb945a2012-07-20 08:17:34 +1000299 device = nv_device(drm->device);
Ben Skeggs77145f12012-07-31 16:16:21 +1000300 if (nv_device(drm->device)->chipset == 0xc1)
301 nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000302
Ben Skeggs77145f12012-07-31 16:16:21 +1000303 nouveau_vga_init(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000304 nouveau_agp_init(drm);
305
Ben Skeggsebb945a2012-07-20 08:17:34 +1000306 if (device->card_type >= NV_50) {
307 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
308 0x1000, &drm->client.base.vm);
309 if (ret)
310 goto fail_device;
311 }
312
313 ret = nouveau_ttm_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000314 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000315 goto fail_ttm;
Ben Skeggs94580292012-07-06 12:14:00 +1000316
Ben Skeggs77145f12012-07-31 16:16:21 +1000317 ret = nouveau_bios_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000318 if (ret)
Ben Skeggs77145f12012-07-31 16:16:21 +1000319 goto fail_bios;
320
321 ret = nouveau_irq_init(dev);
322 if (ret)
323 goto fail_irq;
324
325 ret = nouveau_display_create(dev);
326 if (ret)
327 goto fail_dispctor;
328
329 if (dev->mode_config.num_crtc) {
330 ret = nouveau_display_init(dev);
331 if (ret)
332 goto fail_dispinit;
333 }
334
335 nouveau_pm_init(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000336
337 nouveau_accel_init(drm);
338 nouveau_fbcon_init(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000339 return 0;
340
Ben Skeggs77145f12012-07-31 16:16:21 +1000341fail_dispinit:
342 nouveau_display_destroy(dev);
343fail_dispctor:
344 nouveau_irq_fini(dev);
345fail_irq:
346 nouveau_bios_takedown(dev);
347fail_bios:
Ben Skeggsebb945a2012-07-20 08:17:34 +1000348 nouveau_ttm_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000349fail_ttm:
350 nouveau_agp_fini(drm);
351 nouveau_vga_fini(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000352fail_device:
353 nouveau_cli_destroy(&drm->client);
354 return ret;
355}
356
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200357static int
Ben Skeggs94580292012-07-06 12:14:00 +1000358nouveau_drm_unload(struct drm_device *dev)
359{
Ben Skeggs77145f12012-07-31 16:16:21 +1000360 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000361
Ben Skeggsebb945a2012-07-20 08:17:34 +1000362 nouveau_fbcon_fini(dev);
363 nouveau_accel_fini(drm);
364
Ben Skeggs77145f12012-07-31 16:16:21 +1000365 nouveau_pm_fini(dev);
366
Ben Skeggs94307382012-10-31 12:11:15 +1000367 if (dev->mode_config.num_crtc)
368 nouveau_display_fini(dev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000369 nouveau_display_destroy(dev);
370
371 nouveau_irq_fini(dev);
372 nouveau_bios_takedown(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000373
Ben Skeggsebb945a2012-07-20 08:17:34 +1000374 nouveau_ttm_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000375 nouveau_agp_fini(drm);
Ben Skeggs77145f12012-07-31 16:16:21 +1000376 nouveau_vga_fini(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000377
Ben Skeggs94580292012-07-06 12:14:00 +1000378 nouveau_cli_destroy(&drm->client);
379 return 0;
380}
381
382static void
383nouveau_drm_remove(struct pci_dev *pdev)
384{
Ben Skeggs77145f12012-07-31 16:16:21 +1000385 struct drm_device *dev = pci_get_drvdata(pdev);
386 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000387 struct nouveau_object *device;
Ben Skeggs77145f12012-07-31 16:16:21 +1000388
389 device = drm->client.base.device;
390 drm_put_dev(dev);
391
Ben Skeggsebb945a2012-07-20 08:17:34 +1000392 nouveau_object_ref(NULL, &device);
393 nouveau_object_debug();
Ben Skeggs94580292012-07-06 12:14:00 +1000394}
395
396int
397nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state)
398{
399 struct drm_device *dev = pci_get_drvdata(pdev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000400 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000401 struct nouveau_cli *cli;
402 int ret;
403
404 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
405 pm_state.event == PM_EVENT_PRETHAW)
406 return 0;
407
Ben Skeggs94307382012-10-31 12:11:15 +1000408 if (dev->mode_config.num_crtc) {
409 NV_INFO(drm, "suspending fbcon...\n");
410 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000411
Ben Skeggs94307382012-10-31 12:11:15 +1000412 NV_INFO(drm, "suspending display...\n");
413 ret = nouveau_display_suspend(dev);
414 if (ret)
415 return ret;
416 }
Ben Skeggs94580292012-07-06 12:14:00 +1000417
Ben Skeggsebb945a2012-07-20 08:17:34 +1000418 NV_INFO(drm, "evicting buffers...\n");
419 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
420
421 if (drm->fence && nouveau_fence(drm)->suspend) {
422 if (!nouveau_fence(drm)->suspend(drm))
423 return -ENOMEM;
424 }
425
426 NV_INFO(drm, "suspending client object trees...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000427 list_for_each_entry(cli, &drm->clients, head) {
428 ret = nouveau_client_fini(&cli->base, true);
429 if (ret)
430 goto fail_client;
431 }
432
433 ret = nouveau_client_fini(&drm->client.base, true);
434 if (ret)
435 goto fail_client;
436
Ben Skeggscb75d972012-07-11 10:44:20 +1000437 nouveau_agp_fini(drm);
438
Ben Skeggs94580292012-07-06 12:14:00 +1000439 pci_save_state(pdev);
440 if (pm_state.event == PM_EVENT_SUSPEND) {
441 pci_disable_device(pdev);
442 pci_set_power_state(pdev, PCI_D3hot);
443 }
444
445 return 0;
446
447fail_client:
448 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
449 nouveau_client_init(&cli->base);
450 }
451
Ben Skeggs94307382012-10-31 12:11:15 +1000452 if (dev->mode_config.num_crtc) {
453 NV_INFO(drm, "resuming display...\n");
454 nouveau_display_resume(dev);
455 }
Ben Skeggs94580292012-07-06 12:14:00 +1000456 return ret;
457}
458
459int
460nouveau_drm_resume(struct pci_dev *pdev)
461{
462 struct drm_device *dev = pci_get_drvdata(pdev);
Ben Skeggs77145f12012-07-31 16:16:21 +1000463 struct nouveau_drm *drm = nouveau_drm(dev);
Ben Skeggs94580292012-07-06 12:14:00 +1000464 struct nouveau_cli *cli;
465 int ret;
466
467 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
468 return 0;
469
Ben Skeggsebb945a2012-07-20 08:17:34 +1000470 NV_INFO(drm, "re-enabling device...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000471 pci_set_power_state(pdev, PCI_D0);
472 pci_restore_state(pdev);
473 ret = pci_enable_device(pdev);
474 if (ret)
475 return ret;
476 pci_set_master(pdev);
477
Ben Skeggscb75d972012-07-11 10:44:20 +1000478 nouveau_agp_reset(drm);
479
Ben Skeggsebb945a2012-07-20 08:17:34 +1000480 NV_INFO(drm, "resuming client object trees...\n");
Ben Skeggs94580292012-07-06 12:14:00 +1000481 nouveau_client_init(&drm->client.base);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000482 nouveau_agp_init(drm);
Ben Skeggs94580292012-07-06 12:14:00 +1000483
484 list_for_each_entry(cli, &drm->clients, head) {
485 nouveau_client_init(&cli->base);
486 }
487
Ben Skeggsebb945a2012-07-20 08:17:34 +1000488 if (drm->fence && nouveau_fence(drm)->resume)
489 nouveau_fence(drm)->resume(drm);
Ben Skeggscb75d972012-07-11 10:44:20 +1000490
Ben Skeggs77145f12012-07-31 16:16:21 +1000491 nouveau_run_vbios_init(dev);
492 nouveau_irq_postinstall(dev);
493 nouveau_pm_resume(dev);
494
Ben Skeggs94307382012-10-31 12:11:15 +1000495 if (dev->mode_config.num_crtc) {
496 NV_INFO(drm, "resuming display...\n");
497 nouveau_display_resume(dev);
498 }
Ben Skeggs77145f12012-07-31 16:16:21 +1000499 return 0;
Ben Skeggs94580292012-07-06 12:14:00 +1000500}
501
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200502static int
Ben Skeggsebb945a2012-07-20 08:17:34 +1000503nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
504{
505 struct pci_dev *pdev = dev->pdev;
506 struct nouveau_drm *drm = nouveau_drm(dev);
507 struct nouveau_cli *cli;
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000508 char name[16];
Ben Skeggsebb945a2012-07-20 08:17:34 +1000509 int ret;
510
Linus Torvalds612a9aa2012-10-03 23:29:23 -0700511 snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid));
Ben Skeggsfa6df8c2012-09-12 13:09:23 +1000512
513 ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
Ben Skeggsebb945a2012-07-20 08:17:34 +1000514 if (ret)
515 return ret;
516
517 if (nv_device(drm->device)->card_type >= NV_50) {
518 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
519 0x1000, &cli->base.vm);
520 if (ret) {
521 nouveau_cli_destroy(cli);
522 return ret;
523 }
524 }
525
526 fpriv->driver_priv = cli;
527
528 mutex_lock(&drm->client.mutex);
529 list_add(&cli->head, &drm->clients);
530 mutex_unlock(&drm->client.mutex);
531 return 0;
532}
533
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200534static void
Ben Skeggsebb945a2012-07-20 08:17:34 +1000535nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
536{
537 struct nouveau_cli *cli = nouveau_cli(fpriv);
538 struct nouveau_drm *drm = nouveau_drm(dev);
539
540 if (cli->abi16)
541 nouveau_abi16_fini(cli->abi16);
542
543 mutex_lock(&drm->client.mutex);
544 list_del(&cli->head);
545 mutex_unlock(&drm->client.mutex);
546}
547
Marcin Slusarz5b8a43a2012-08-19 23:00:00 +0200548static void
Ben Skeggsebb945a2012-07-20 08:17:34 +1000549nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
550{
551 struct nouveau_cli *cli = nouveau_cli(fpriv);
552 nouveau_cli_destroy(cli);
553}
554
Ben Skeggs77145f12012-07-31 16:16:21 +1000555static struct drm_ioctl_desc
556nouveau_ioctls[] = {
557 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
558 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
559 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
560 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
561 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
562 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
563 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
564 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
565 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
566 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
567 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
568 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
569};
570
571static const struct file_operations
572nouveau_driver_fops = {
573 .owner = THIS_MODULE,
574 .open = drm_open,
575 .release = drm_release,
576 .unlocked_ioctl = drm_ioctl,
577 .mmap = nouveau_ttm_mmap,
578 .poll = drm_poll,
579 .fasync = drm_fasync,
580 .read = drm_read,
581#if defined(CONFIG_COMPAT)
582 .compat_ioctl = nouveau_compat_ioctl,
583#endif
584 .llseek = noop_llseek,
585};
586
587static struct drm_driver
588driver = {
589 .driver_features =
590 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
591 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
592 DRIVER_MODESET | DRIVER_PRIME,
593
594 .load = nouveau_drm_load,
595 .unload = nouveau_drm_unload,
596 .open = nouveau_drm_open,
597 .preclose = nouveau_drm_preclose,
598 .postclose = nouveau_drm_postclose,
599 .lastclose = nouveau_vga_lastclose,
600
601 .irq_preinstall = nouveau_irq_preinstall,
602 .irq_postinstall = nouveau_irq_postinstall,
603 .irq_uninstall = nouveau_irq_uninstall,
604 .irq_handler = nouveau_irq_handler,
605
606 .get_vblank_counter = drm_vblank_count,
607 .enable_vblank = nouveau_vblank_enable,
608 .disable_vblank = nouveau_vblank_disable,
609
610 .ioctls = nouveau_ioctls,
611 .fops = &nouveau_driver_fops,
612
613 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
614 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
615 .gem_prime_export = nouveau_gem_prime_export,
616 .gem_prime_import = nouveau_gem_prime_import,
617
618 .gem_init_object = nouveau_gem_object_new,
619 .gem_free_object = nouveau_gem_object_del,
620 .gem_open_object = nouveau_gem_object_open,
621 .gem_close_object = nouveau_gem_object_close,
622
623 .dumb_create = nouveau_display_dumb_create,
624 .dumb_map_offset = nouveau_display_dumb_map_offset,
625 .dumb_destroy = nouveau_display_dumb_destroy,
626
627 .name = DRIVER_NAME,
628 .desc = DRIVER_DESC,
629#ifdef GIT_REVISION
630 .date = GIT_REVISION,
631#else
632 .date = DRIVER_DATE,
633#endif
634 .major = DRIVER_MAJOR,
635 .minor = DRIVER_MINOR,
636 .patchlevel = DRIVER_PATCHLEVEL,
637};
638
Ben Skeggs94580292012-07-06 12:14:00 +1000639static struct pci_device_id
640nouveau_drm_pci_table[] = {
641 {
642 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
643 .class = PCI_BASE_CLASS_DISPLAY << 16,
644 .class_mask = 0xff << 16,
645 },
646 {
647 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
648 .class = PCI_BASE_CLASS_DISPLAY << 16,
649 .class_mask = 0xff << 16,
650 },
651 {}
652};
653
654static struct pci_driver
655nouveau_drm_pci_driver = {
656 .name = "nouveau",
657 .id_table = nouveau_drm_pci_table,
658 .probe = nouveau_drm_probe,
659 .remove = nouveau_drm_remove,
660 .suspend = nouveau_drm_suspend,
661 .resume = nouveau_drm_resume,
662};
663
664static int __init
665nouveau_drm_init(void)
666{
Ben Skeggs77145f12012-07-31 16:16:21 +1000667 driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
668
669 if (nouveau_modeset == -1) {
670#ifdef CONFIG_VGA_CONSOLE
671 if (vgacon_text_force())
672 nouveau_modeset = 0;
Ben Skeggs77145f12012-07-31 16:16:21 +1000673#endif
Ben Skeggs77145f12012-07-31 16:16:21 +1000674 }
675
676 if (!nouveau_modeset)
677 return 0;
678
679 nouveau_register_dsm_handler();
680 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
Ben Skeggs94580292012-07-06 12:14:00 +1000681}
682
683static void __exit
684nouveau_drm_exit(void)
685{
Ben Skeggs77145f12012-07-31 16:16:21 +1000686 if (!nouveau_modeset)
687 return;
688
689 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
690 nouveau_unregister_dsm_handler();
Ben Skeggs94580292012-07-06 12:14:00 +1000691}
692
693module_init(nouveau_drm_init);
694module_exit(nouveau_drm_exit);
695
696MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
Ben Skeggs77145f12012-07-31 16:16:21 +1000697MODULE_AUTHOR(DRIVER_AUTHOR);
698MODULE_DESCRIPTION(DRIVER_DESC);
Ben Skeggs94580292012-07-06 12:14:00 +1000699MODULE_LICENSE("GPL and additional rights");