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Marek Szyprowskiec601ff2014-07-16 02:54:07 +09001/*
2 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
3 * device tree source
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
Sylwester Nawrocki3635ace2015-02-03 15:06:20 +010010#include <dt-bindings/sound/samsung-i2s.h>
Marek Szyprowski081a15e2014-07-16 02:54:07 +090011#include <dt-bindings/input/input.h>
Markus Reichlee2020a2015-05-09 03:05:51 +090012#include <dt-bindings/clock/maxim,max77686.h>
Marek Szyprowskiec601ff2014-07-16 02:54:07 +090013#include "exynos4412.dtsi"
14
15/ {
Tomasz Figa62d38092015-01-23 14:47:42 +010016 chosen {
17 stdout-path = &serial_1;
18 };
19
Marek Szyprowskiec601ff2014-07-16 02:54:07 +090020 firmware@0204F000 {
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
23 };
24
Marek Szyprowski081a15e2014-07-16 02:54:07 +090025 gpio_keys {
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
29
30 power_key {
31 interrupt-parent = <&gpx1>;
32 interrupts = <3 0>;
33 gpios = <&gpx1 3 1>;
34 linux,code = <KEY_POWER>;
35 label = "power key";
36 debounce-interval = <10>;
37 gpio-key,wakeup;
38 };
39 };
40
Sylwester Nawrocki5a852742014-07-16 03:16:44 +090041 sound: sound {
Sylwester Nawrocki16696332015-02-03 15:06:21 +010042 compatible = "simple-audio-card";
Sylwester Nawrocki59760002014-11-22 23:37:02 +090043 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
44 <&clock_audss EXYNOS_MOUT_I2S>,
45 <&clock_audss EXYNOS_DOUT_SRP>,
46 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
47 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
48 <&clock_audss EXYNOS_MOUT_AUDSS>;
49 assigned-clock-rates = <0>,
50 <0>,
51 <192000000>,
52 <19200000>;
Sylwester Nawrocki16696332015-02-03 15:06:21 +010053
54 simple-audio-card,format = "i2s";
55 simple-audio-card,bitclock-master = <&link0_codec>;
56 simple-audio-card,frame-master = <&link0_codec>;
57
58 simple-audio-card,cpu {
59 sound-dai = <&i2s0 0>;
60 system-clock-frequency = <19200000>;
61 };
62
63 link0_codec: simple-audio-card,codec {
64 sound-dai = <&max98090>;
65 clocks = <&i2s0 CLK_I2S_CDCLK>;
66 };
Sylwester Nawrocki5a852742014-07-16 03:16:44 +090067 };
68
Marek Szyprowski225da7e2015-02-05 00:35:58 +090069 emmc_pwrseq: pwrseq {
70 pinctrl-0 = <&sd1_cd>;
71 pinctrl-names = "default";
72 compatible = "mmc-pwrseq-emmc";
73 reset-gpios = <&gpk1 2 1>;
74 };
75
Marek Szyprowskiec601ff2014-07-16 02:54:07 +090076 camera {
77 status = "okay";
78 pinctrl-names = "default";
79 pinctrl-0 = <>;
Marek Szyprowskiec601ff2014-07-16 02:54:07 +090080 };
81
82 fixed-rate-clocks {
83 xxti {
84 compatible = "samsung,clock-xxti";
85 clock-frequency = <0>;
86 };
87
88 xusbxti {
89 compatible = "samsung,clock-xusbxti";
90 clock-frequency = <24000000>;
91 };
92 };
93
Lukasz Majewskibf4a0be2015-01-30 08:26:02 +090094 thermal-zones {
95 cpu_thermal: cpu-thermal {
96 cooling-maps {
97 map0 {
98 /* Corresponds to 800MHz at freq_table */
99 cooling-device = <&cpu0 7 7>;
100 };
101 map1 {
102 /* Corresponds to 200MHz at freq_table */
103 cooling-device = <&cpu0 13 13>;
104 };
105 };
106 };
107 };
Marek Szyprowskiec601ff2014-07-16 02:54:07 +0900108};
Marek Szyprowski081a15e2014-07-16 02:54:07 +0900109
Marek Szyprowski225da7e2015-02-05 00:35:58 +0900110/* RSTN signal for eMMC */
111&sd1_cd {
112 samsung,pin-pud = <0>;
113 samsung,pin-drv = <0>;
114};
115
Marek Szyprowski081a15e2014-07-16 02:54:07 +0900116&pinctrl_1 {
117 gpio_power_key: power_key {
118 samsung,pins = "gpx1-3";
119 samsung,pin-pud = <0>;
120 };
Daniel Drakeeea66532014-08-18 11:39:50 -0500121
122 max77686_irq: max77686-irq {
123 samsung,pins = "gpx3-2";
124 samsung,pin-function = <0>;
125 samsung,pin-pud = <0>;
126 samsung,pin-drv = <0>;
127 };
Marek Szyprowski25616582015-02-04 23:44:15 +0900128
129 hdmi_hpd: hdmi-hpd {
130 samsung,pins = "gpx3-7";
131 samsung,pin-pud = <1>;
132 };
Marek Szyprowski081a15e2014-07-16 02:54:07 +0900133};
Krzysztof Kozlowski49c1a162015-04-06 21:06:50 +0200134
135&ehci {
136 status = "okay";
137};
138
139&exynos_usbphy {
140 status = "okay";
141};
142
143&fimc_0 {
144 status = "okay";
145 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
146 <&clock CLK_SCLK_FIMC0>;
147 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
148 assigned-clock-rates = <0>, <176000000>;
149};
150
151&fimc_1 {
152 status = "okay";
153 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
154 <&clock CLK_SCLK_FIMC1>;
155 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
156 assigned-clock-rates = <0>, <176000000>;
157};
158
159&fimc_2 {
160 status = "okay";
161 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
162 <&clock CLK_SCLK_FIMC2>;
163 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
164 assigned-clock-rates = <0>, <176000000>;
165};
166
167&fimc_3 {
168 status = "okay";
169 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
170 <&clock CLK_SCLK_FIMC3>;
171 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
172 assigned-clock-rates = <0>, <176000000>;
173};
174
175&g2d {
176 status = "okay";
177};
178
179&hdmi {
180 hpd-gpio = <&gpx3 7 0>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&hdmi_hpd>;
183 vdd-supply = <&ldo8_reg>;
184 vdd_osc-supply = <&ldo10_reg>;
185 vdd_pll-supply = <&ldo8_reg>;
186 ddc = <&i2c_2>;
187 status = "okay";
188};
189
190&hsotg {
191 dr_mode = "peripheral";
192 status = "okay";
193 vusb_d-supply = <&ldo15_reg>;
194 vusb_a-supply = <&ldo12_reg>;
195};
196
197&i2c_0 {
198 pinctrl-0 = <&i2c0_bus>;
199 pinctrl-names = "default";
200 samsung,i2c-sda-delay = <100>;
201 samsung,i2c-max-bus-freq = <400000>;
202 status = "okay";
203
204 usb3503: usb3503@08 {
205 compatible = "smsc,usb3503";
206 reg = <0x08>;
207
208 intn-gpios = <&gpx3 0 0>;
209 connect-gpios = <&gpx3 4 0>;
210 reset-gpios = <&gpx3 5 0>;
211 initial-mode = <1>;
212 };
213
214 max77686: pmic@09 {
215 compatible = "maxim,max77686";
216 interrupt-parent = <&gpx3>;
217 interrupts = <2 0>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&max77686_irq>;
220 reg = <0x09>;
221 #clock-cells = <1>;
222
223 voltage-regulators {
224 ldo1_reg: LDO1 {
225 regulator-name = "VDD_ALIVE_1.0V";
226 regulator-min-microvolt = <1000000>;
227 regulator-max-microvolt = <1000000>;
228 regulator-always-on;
229 };
230
231 ldo2_reg: LDO2 {
232 regulator-name = "VDDQ_M1_2_1.8V";
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <1800000>;
235 regulator-always-on;
236 };
237
238 ldo3_reg: LDO3 {
239 regulator-name = "VDDQ_EXT_1.8V";
240 regulator-min-microvolt = <1800000>;
241 regulator-max-microvolt = <1800000>;
242 regulator-always-on;
243 };
244
245 ldo4_reg: LDO4 {
246 regulator-name = "VDDQ_MMC2_2.8V";
247 regulator-min-microvolt = <2800000>;
248 regulator-max-microvolt = <2800000>;
249 regulator-always-on;
250 regulator-boot-on;
251 };
252
253 ldo5_reg: LDO5 {
254 regulator-name = "VDDQ_MMC1_3_1.8V";
255 regulator-min-microvolt = <1800000>;
256 regulator-max-microvolt = <1800000>;
257 regulator-always-on;
258 regulator-boot-on;
259 };
260
261 ldo6_reg: LDO6 {
262 regulator-name = "VDD10_MPLL_1.0V";
263 regulator-min-microvolt = <1000000>;
264 regulator-max-microvolt = <1000000>;
265 regulator-always-on;
266 };
267
268 ldo7_reg: LDO7 {
269 regulator-name = "VDD10_XPLL_1.0V";
270 regulator-min-microvolt = <1000000>;
271 regulator-max-microvolt = <1000000>;
272 regulator-always-on;
273 };
274
275 ldo8_reg: ldo@8 {
276 regulator-compatible = "LDO8";
277 regulator-name = "VDD10_HDMI_1.0V";
278 regulator-min-microvolt = <1000000>;
279 regulator-max-microvolt = <1000000>;
280 };
281
282 ldo10_reg: ldo@10 {
283 regulator-compatible = "LDO10";
284 regulator-name = "VDDQ_MIPIHSI_1.8V";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 };
288
289 ldo11_reg: LDO11 {
290 regulator-name = "VDD18_ABB1_1.8V";
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
293 regulator-always-on;
294 };
295
296 ldo12_reg: LDO12 {
297 regulator-name = "VDD33_USB_3.3V";
298 regulator-min-microvolt = <3300000>;
299 regulator-max-microvolt = <3300000>;
300 regulator-always-on;
301 regulator-boot-on;
302 };
303
304 ldo13_reg: LDO13 {
305 regulator-name = "VDDQ_C2C_W_1.8V";
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <1800000>;
308 regulator-always-on;
309 regulator-boot-on;
310 };
311
312 ldo14_reg: LDO14 {
313 regulator-name = "VDD18_ABB0_2_1.8V";
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
316 regulator-always-on;
317 regulator-boot-on;
318 };
319
320 ldo15_reg: LDO15 {
321 regulator-name = "VDD10_HSIC_1.0V";
322 regulator-min-microvolt = <1000000>;
323 regulator-max-microvolt = <1000000>;
324 regulator-always-on;
325 regulator-boot-on;
326 };
327
328 ldo16_reg: LDO16 {
329 regulator-name = "VDD18_HSIC_1.8V";
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <1800000>;
332 regulator-always-on;
333 regulator-boot-on;
334 };
335
336 ldo20_reg: LDO20 {
337 regulator-name = "LDO20_1.8V";
338 regulator-min-microvolt = <1800000>;
339 regulator-max-microvolt = <1800000>;
340 regulator-boot-on;
341 };
342
343 ldo21_reg: LDO21 {
344 regulator-name = "LDO21_3.3V";
345 regulator-min-microvolt = <3300000>;
346 regulator-max-microvolt = <3300000>;
347 regulator-always-on;
348 regulator-boot-on;
349 };
350
351 ldo25_reg: LDO25 {
352 regulator-name = "VDDQ_LCD_1.8V";
353 regulator-min-microvolt = <1800000>;
354 regulator-max-microvolt = <1800000>;
355 regulator-always-on;
356 regulator-boot-on;
357 };
358
359 buck1_reg: BUCK1 {
360 regulator-name = "vdd_mif";
361 regulator-min-microvolt = <1000000>;
362 regulator-max-microvolt = <1000000>;
363 regulator-always-on;
364 regulator-boot-on;
365 };
366
367 buck2_reg: BUCK2 {
368 regulator-name = "vdd_arm";
369 regulator-min-microvolt = <900000>;
370 regulator-max-microvolt = <1350000>;
371 regulator-always-on;
372 regulator-boot-on;
373 };
374
375 buck3_reg: BUCK3 {
376 regulator-name = "vdd_int";
377 regulator-min-microvolt = <1000000>;
378 regulator-max-microvolt = <1000000>;
379 regulator-always-on;
380 regulator-boot-on;
381 };
382
383 buck4_reg: BUCK4 {
384 regulator-name = "vdd_g3d";
385 regulator-min-microvolt = <900000>;
386 regulator-max-microvolt = <1100000>;
387 regulator-microvolt-offset = <50000>;
388 };
389
390 buck5_reg: BUCK5 {
391 regulator-name = "VDDQ_CKEM1_2_1.2V";
392 regulator-min-microvolt = <1200000>;
393 regulator-max-microvolt = <1200000>;
394 regulator-always-on;
395 regulator-boot-on;
396 };
397
398 buck6_reg: BUCK6 {
399 regulator-name = "BUCK6_1.35V";
400 regulator-min-microvolt = <1350000>;
401 regulator-max-microvolt = <1350000>;
402 regulator-always-on;
403 regulator-boot-on;
404 };
405
406 buck7_reg: BUCK7 {
407 regulator-name = "BUCK7_2.0V";
408 regulator-min-microvolt = <2000000>;
409 regulator-max-microvolt = <2000000>;
410 regulator-always-on;
411 };
412
413 buck8_reg: BUCK8 {
414 regulator-name = "BUCK8_2.8V";
415 regulator-min-microvolt = <2800000>;
416 regulator-max-microvolt = <2800000>;
417 };
418 };
419 };
420};
421
422&i2c_1 {
423 pinctrl-names = "default";
424 pinctrl-0 = <&i2c1_bus>;
425 status = "okay";
426 max98090: max98090@10 {
427 compatible = "maxim,max98090";
428 reg = <0x10>;
429 interrupt-parent = <&gpx0>;
430 interrupts = <0 0>;
431 clocks = <&i2s0 CLK_I2S_CDCLK>;
432 clock-names = "mclk";
433 #sound-dai-cells = <0>;
434 };
435};
436
437&i2c_2 {
438 status = "okay";
439 pinctrl-names = "default";
440 pinctrl-0 = <&i2c2_bus>;
441};
442
443&i2c_8 {
444 status = "okay";
445};
446
447&i2s0 {
448 pinctrl-0 = <&i2s0_bus>;
449 pinctrl-names = "default";
450 status = "okay";
451 clocks = <&clock_audss EXYNOS_I2S_BUS>,
452 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
453 <&clock_audss EXYNOS_SCLK_I2S>;
454 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
455};
456
457&mixer {
458 status = "okay";
459};
460
461&mshc_0 {
462 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
463 pinctrl-names = "default";
464 vmmc-supply = <&ldo20_reg &buck8_reg>;
465 mmc-pwrseq = <&emmc_pwrseq>;
466 status = "okay";
467
468 num-slots = <1>;
469 broken-cd;
470 card-detect-delay = <200>;
471 samsung,dw-mshc-ciu-div = <3>;
472 samsung,dw-mshc-sdr-timing = <2 3>;
473 samsung,dw-mshc-ddr-timing = <1 2>;
474 bus-width = <8>;
475 cap-mmc-highspeed;
476};
477
478&rtc {
479 status = "okay";
480 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
481 clock-names = "rtc", "rtc_src";
482};
483
484&sdhci_2 {
485 bus-width = <4>;
486 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
487 pinctrl-names = "default";
488 vmmc-supply = <&ldo4_reg &ldo21_reg>;
489 cd-gpios = <&gpk2 2 0>;
490 cd-inverted;
491 status = "okay";
492};
493
494&serial_0 {
495 status = "okay";
496};
497
498&serial_1 {
499 status = "okay";
500};
501
502&tmu {
503 vtmu-supply = <&ldo10_reg>;
504 status = "okay";
505};
506
507&watchdog {
508 status = "okay";
509};