Shawn Guo | b237866 | 2012-05-12 13:43:32 +0800 | [diff] [blame] | 1 | * Freescale MXS Inter IC (I2C) Controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "fsl,<chip>-i2c" |
| 5 | - reg: Should contain registers location and length |
| 6 | - interrupts: Should contain ERROR and DMA interrupts |
Marek Vasut | cd4f2d4 | 2012-07-09 18:22:53 +0200 | [diff] [blame] | 7 | - clock-frequency: Desired I2C bus clock frequency in Hz. |
| 8 | Only 100000Hz and 400000Hz modes are supported. |
Marek Vasut | 62885f5 | 2012-08-24 05:44:31 +0200 | [diff] [blame] | 9 | - fsl,i2c-dma-channel: APBX DMA channel for the I2C |
Shawn Guo | b237866 | 2012-05-12 13:43:32 +0800 | [diff] [blame] | 10 | |
| 11 | Examples: |
| 12 | |
| 13 | i2c0: i2c@80058000 { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; |
| 16 | compatible = "fsl,imx28-i2c"; |
| 17 | reg = <0x80058000 2000>; |
| 18 | interrupts = <111 68>; |
Marek Vasut | cd4f2d4 | 2012-07-09 18:22:53 +0200 | [diff] [blame] | 19 | clock-frequency = <100000>; |
Marek Vasut | 62885f5 | 2012-08-24 05:44:31 +0200 | [diff] [blame] | 20 | fsl,i2c-dma-channel = <6>; |
Shawn Guo | b237866 | 2012-05-12 13:43:32 +0800 | [diff] [blame] | 21 | }; |