Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 1 | /*-*- linux-c -*- |
| 2 | * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support |
| 3 | * |
| 4 | * Copyright (C) 2004 Antonino Daplas<adaplas@pol.net> |
| 5 | * All Rights Reserved |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file COPYING in the main directory of this archive for |
| 9 | * more details. |
| 10 | */ |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 11 | #include <linux/module.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/sched.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <linux/pci.h> |
| 16 | #include <linux/fb.h> |
| 17 | #include "i810.h" |
| 18 | #include "i810_regs.h" |
Adrian Bunk | a0aa7d0 | 2006-01-09 20:54:04 -0800 | [diff] [blame] | 19 | #include "i810_main.h" |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 20 | #include "../edid.h" |
| 21 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 22 | /* bit locations in the registers */ |
| 23 | #define SCL_DIR_MASK 0x0001 |
| 24 | #define SCL_DIR 0x0002 |
| 25 | #define SCL_VAL_MASK 0x0004 |
| 26 | #define SCL_VAL_OUT 0x0008 |
| 27 | #define SCL_VAL_IN 0x0010 |
| 28 | #define SDA_DIR_MASK 0x0100 |
| 29 | #define SDA_DIR 0x0200 |
| 30 | #define SDA_VAL_MASK 0x0400 |
| 31 | #define SDA_VAL_OUT 0x0800 |
| 32 | #define SDA_VAL_IN 0x1000 |
| 33 | |
| 34 | #define DEBUG /* define this for verbose EDID parsing output */ |
| 35 | |
| 36 | #ifdef DEBUG |
| 37 | #define DPRINTK(fmt, args...) printk(fmt,## args) |
| 38 | #else |
| 39 | #define DPRINTK(fmt, args...) |
| 40 | #endif |
| 41 | |
| 42 | static void i810i2c_setscl(void *data, int state) |
| 43 | { |
Antonino A. Daplas | c019c0e | 2006-01-09 20:53:03 -0800 | [diff] [blame] | 44 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 45 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 46 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 47 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 48 | i810_writel(mmio, chan->ddc_base, (state ? SCL_VAL_OUT : 0) | SCL_DIR | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 49 | SCL_DIR_MASK | SCL_VAL_MASK); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 50 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 51 | } |
| 52 | |
| 53 | static void i810i2c_setsda(void *data, int state) |
| 54 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 55 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 56 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 57 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 58 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 59 | i810_writel(mmio, chan->ddc_base, (state ? SDA_VAL_OUT : 0) | SDA_DIR | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 60 | SDA_DIR_MASK | SDA_VAL_MASK); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 61 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | static int i810i2c_getscl(void *data) |
| 65 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 66 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 67 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 68 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 69 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 70 | i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK); |
| 71 | i810_writel(mmio, chan->ddc_base, 0); |
| 72 | return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | static int i810i2c_getsda(void *data) |
| 76 | { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 77 | struct i810fb_i2c_chan *chan = data; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 78 | struct i810fb_par *par = chan->par; |
Al Viro | be88ec7 | 2005-09-29 00:36:10 +0100 | [diff] [blame] | 79 | u8 __iomem *mmio = par->mmio_start_virtual; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 80 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 81 | i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK); |
| 82 | i810_writel(mmio, chan->ddc_base, 0); |
| 83 | return ((i810_readl(mmio, chan->ddc_base) & SDA_VAL_IN) != 0); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 84 | } |
| 85 | |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 86 | static int i810_setup_i2c_bus(struct i810fb_i2c_chan *chan, const char *name) |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 87 | { |
| 88 | int rc; |
| 89 | |
| 90 | strcpy(chan->adapter.name, name); |
| 91 | chan->adapter.owner = THIS_MODULE; |
| 92 | chan->adapter.algo_data = &chan->algo; |
| 93 | chan->adapter.dev.parent = &chan->par->dev->dev; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 94 | chan->adapter.id = I2C_HW_B_I810; |
| 95 | chan->algo.setsda = i810i2c_setsda; |
| 96 | chan->algo.setscl = i810i2c_setscl; |
| 97 | chan->algo.getsda = i810i2c_getsda; |
| 98 | chan->algo.getscl = i810i2c_getscl; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 99 | chan->algo.udelay = 10; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 100 | chan->algo.timeout = (HZ/2); |
| 101 | chan->algo.data = chan; |
| 102 | |
| 103 | i2c_set_adapdata(&chan->adapter, chan); |
| 104 | |
| 105 | /* Raise SCL and SDA */ |
| 106 | chan->algo.setsda(chan, 1); |
| 107 | chan->algo.setscl(chan, 1); |
| 108 | udelay(20); |
| 109 | |
| 110 | rc = i2c_bit_add_bus(&chan->adapter); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 111 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 112 | if (rc == 0) |
| 113 | dev_dbg(&chan->par->dev->dev, "I2C bus %s registered.\n",name); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 114 | else { |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 115 | dev_warn(&chan->par->dev->dev, "Failed to register I2C bus " |
| 116 | "%s.\n", name); |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 117 | chan->par = NULL; |
| 118 | } |
| 119 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 120 | return rc; |
| 121 | } |
| 122 | |
| 123 | void i810_create_i2c_busses(struct i810fb_par *par) |
| 124 | { |
| 125 | par->chan[0].par = par; |
| 126 | par->chan[1].par = par; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 127 | par->chan[2].par = par; |
| 128 | |
| 129 | par->chan[0].ddc_base = GPIOA; |
| 130 | i810_setup_i2c_bus(&par->chan[0], "I810-DDC"); |
| 131 | par->chan[1].ddc_base = GPIOB; |
| 132 | i810_setup_i2c_bus(&par->chan[1], "I810-I2C"); |
| 133 | par->chan[2].ddc_base = GPIOC; |
| 134 | i810_setup_i2c_bus(&par->chan[2], "I810-GPIOC"); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | void i810_delete_i2c_busses(struct i810fb_par *par) |
| 138 | { |
| 139 | if (par->chan[0].par) |
| 140 | i2c_bit_del_bus(&par->chan[0].adapter); |
| 141 | par->chan[0].par = NULL; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 142 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 143 | if (par->chan[1].par) |
| 144 | i2c_bit_del_bus(&par->chan[1].adapter); |
| 145 | par->chan[1].par = NULL; |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 146 | |
| 147 | if (par->chan[2].par) |
| 148 | i2c_bit_del_bus(&par->chan[2].adapter); |
| 149 | par->chan[2].par = NULL; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 150 | } |
| 151 | |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 152 | int i810_probe_i2c_connector(struct fb_info *info, u8 **out_edid, int conn) |
| 153 | { |
| 154 | struct i810fb_par *par = info->par; |
| 155 | u8 *edid = NULL; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 156 | |
Manuel Lauss | 00d340b9 | 2006-02-01 03:06:54 -0800 | [diff] [blame] | 157 | DPRINTK("i810-i2c: Probe DDC%i Bus\n", conn+1); |
| 158 | if (conn < par->ddc_num) { |
Antonino A. Daplas | e80987f | 2006-10-03 01:14:44 -0700 | [diff] [blame] | 159 | edid = fb_ddc_read(&par->chan[conn].adapter); |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 160 | } else { |
Antonino A. Daplas | 5fab851 | 2005-11-07 01:00:50 -0800 | [diff] [blame] | 161 | const u8 *e = fb_firmware_edid(info->device); |
| 162 | |
| 163 | if (e != NULL) { |
| 164 | DPRINTK("i810-i2c: Getting EDID from BIOS\n"); |
| 165 | edid = kmalloc(EDID_LENGTH, GFP_KERNEL); |
| 166 | if (edid) |
| 167 | memcpy(edid, e, EDID_LENGTH); |
| 168 | } |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 169 | } |
| 170 | |
Antonino A. Daplas | 7c518eb | 2006-03-27 01:17:33 -0800 | [diff] [blame] | 171 | *out_edid = edid; |
Antonino A. Daplas | 74f6ae8 | 2005-09-09 13:10:04 -0700 | [diff] [blame] | 172 | |
| 173 | return (edid) ? 0 : 1; |
| 174 | } |