blob: 9ee78f7b4990751386cf7f29337ec075297349dd [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-footbridge/dc21285-timer.c
3 *
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 */
Russell King4e8d7632011-01-28 21:00:39 +00007#include <linux/clockchips.h>
8#include <linux/clocksource.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/init.h>
10#include <linux/interrupt.h>
Thomas Gleixner55e86982006-07-01 22:32:17 +010011#include <linux/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13#include <asm/irq.h>
14
15#include <asm/hardware/dec21285.h>
16#include <asm/mach/time.h>
David Howells9f97da72012-03-28 18:30:01 +010017#include <asm/system_info.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018
19#include "common.h"
20
Russell King4e8d7632011-01-28 21:00:39 +000021static cycle_t cksrc_dc21285_read(struct clocksource *cs)
Linus Torvalds1da177e2005-04-16 15:20:36 -070022{
Russell King4e8d7632011-01-28 21:00:39 +000023 return cs->mask - *CSR_TIMER2_VALUE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070024}
25
Russell King4e8d7632011-01-28 21:00:39 +000026static int cksrc_dc21285_enable(struct clocksource *cs)
Linus Torvalds1da177e2005-04-16 15:20:36 -070027{
Russell King4e8d7632011-01-28 21:00:39 +000028 *CSR_TIMER2_LOAD = cs->mask;
29 *CSR_TIMER2_CLR = 0;
30 *CSR_TIMER2_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16;
31 return 0;
32}
33
Thomas Gleixnerf2e0bf22011-03-28 11:25:40 +020034static void cksrc_dc21285_disable(struct clocksource *cs)
Russell King4e8d7632011-01-28 21:00:39 +000035{
36 *CSR_TIMER2_CNTL = 0;
37}
38
39static struct clocksource cksrc_dc21285 = {
40 .name = "dc21285_timer2",
41 .rating = 200,
42 .read = cksrc_dc21285_read,
43 .enable = cksrc_dc21285_enable,
44 .disable = cksrc_dc21285_disable,
45 .mask = CLOCKSOURCE_MASK(24),
46 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
47};
48
49static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
50 struct clock_event_device *c)
51{
52 switch (mode) {
53 case CLOCK_EVT_MODE_RESUME:
54 case CLOCK_EVT_MODE_PERIODIC:
55 *CSR_TIMER1_CLR = 0;
56 *CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
57 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
58 TIMER_CNTL_DIV16;
59 break;
60
61 default:
62 *CSR_TIMER1_CNTL = 0;
63 break;
64 }
65}
66
67static struct clock_event_device ckevt_dc21285 = {
68 .name = "dc21285_timer1",
69 .features = CLOCK_EVT_FEAT_PERIODIC,
70 .rating = 200,
71 .irq = IRQ_TIMER1,
72 .set_mode = ckevt_dc21285_set_mode,
73};
74
75static irqreturn_t timer1_interrupt(int irq, void *dev_id)
76{
77 struct clock_event_device *ce = dev_id;
78
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 *CSR_TIMER1_CLR = 0;
80
Russell King4e8d7632011-01-28 21:00:39 +000081 ce->event_handler(ce);
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 return IRQ_HANDLED;
84}
85
86static struct irqaction footbridge_timer_irq = {
Russell King4e8d7632011-01-28 21:00:39 +000087 .name = "dc21285_timer1",
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 .handler = timer1_interrupt,
Bernhard Walleb30faba2007-05-08 00:35:39 -070089 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
Russell King4e8d7632011-01-28 21:00:39 +000090 .dev_id = &ckevt_dc21285,
Linus Torvalds1da177e2005-04-16 15:20:36 -070091};
92
93/*
94 * Set up timer interrupt.
95 */
Stephen Warren6bb27d72012-11-08 12:40:59 -070096void __init footbridge_timer_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070097{
Russell King4e8d7632011-01-28 21:00:39 +000098 struct clock_event_device *ce = &ckevt_dc21285;
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
Russell King4e8d7632011-01-28 21:00:39 +0000100 clocksource_register_hz(&cksrc_dc21285, (mem_fclk_21285 + 8) / 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
Russell King4e8d7632011-01-28 21:00:39 +0000102 setup_irq(ce->irq, &footbridge_timer_irq);
103
Russell King7d7975a2011-06-11 00:46:17 +0100104 ce->cpumask = cpumask_of(smp_processor_id());
Shawn Guo838a2ae2013-01-12 11:50:05 +0000105 clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106}