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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070041#include <scsi/ufs/ioctl.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030042#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020043#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020044#include <linux/of.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070046#include "ufshci.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020047#include "ufs_quirks.h"
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -070048#include "ufs-debugfs.h"
49
50#define CREATE_TRACE_POINTS
51#include <trace/events/ufs.h>
52
53#ifdef CONFIG_DEBUG_FS
54
55static int ufshcd_tag_req_type(struct request *rq)
56{
57 int rq_type = TS_WRITE;
58
59 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
60 rq_type = TS_NOT_SUPPORTED;
61 else if (rq->cmd_flags & REQ_PREFLUSH)
62 rq_type = TS_FLUSH;
63 else if (rq_data_dir(rq) == READ)
64 rq_type = (rq->cmd_flags & REQ_URGENT) ?
65 TS_URGENT_READ : TS_READ;
66 else if (rq->cmd_flags & REQ_URGENT)
67 rq_type = TS_URGENT_WRITE;
68
69 return rq_type;
70}
71
72static void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
73{
74 ufsdbg_set_err_state(hba);
75 if (type < UFS_ERR_MAX)
76 hba->ufs_stats.err_stats[type]++;
77}
78
79static void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
80{
81 struct request *rq =
82 hba->lrb[tag].cmd ? hba->lrb[tag].cmd->request : NULL;
83 u64 **tag_stats = hba->ufs_stats.tag_stats;
84 int rq_type;
85
86 if (!hba->ufs_stats.enabled)
87 return;
88
89 tag_stats[tag][TS_TAG]++;
90 if (!rq || !(rq->cmd_type & REQ_TYPE_FS))
91 return;
92
93 WARN_ON(hba->ufs_stats.q_depth > hba->nutrs);
94 rq_type = ufshcd_tag_req_type(rq);
95 if (!(rq_type < 0 || rq_type > TS_NUM_STATS))
96 tag_stats[hba->ufs_stats.q_depth++][rq_type]++;
97}
98
99static void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
100 struct scsi_cmnd *cmd)
101{
102 struct request *rq = cmd ? cmd->request : NULL;
103
104 if (rq && rq->cmd_type & REQ_TYPE_FS)
105 hba->ufs_stats.q_depth--;
106}
107
108static void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
109{
110 int rq_type;
111 struct request *rq = lrbp->cmd ? lrbp->cmd->request : NULL;
112 s64 delta = ktime_us_delta(lrbp->complete_time_stamp,
113 lrbp->issue_time_stamp);
114
115 /* update general request statistics */
116 if (hba->ufs_stats.req_stats[TS_TAG].count == 0)
117 hba->ufs_stats.req_stats[TS_TAG].min = delta;
118 hba->ufs_stats.req_stats[TS_TAG].count++;
119 hba->ufs_stats.req_stats[TS_TAG].sum += delta;
120 if (delta > hba->ufs_stats.req_stats[TS_TAG].max)
121 hba->ufs_stats.req_stats[TS_TAG].max = delta;
122 if (delta < hba->ufs_stats.req_stats[TS_TAG].min)
123 hba->ufs_stats.req_stats[TS_TAG].min = delta;
124
125 rq_type = ufshcd_tag_req_type(rq);
126 if (rq_type == TS_NOT_SUPPORTED)
127 return;
128
129 /* update request type specific statistics */
130 if (hba->ufs_stats.req_stats[rq_type].count == 0)
131 hba->ufs_stats.req_stats[rq_type].min = delta;
132 hba->ufs_stats.req_stats[rq_type].count++;
133 hba->ufs_stats.req_stats[rq_type].sum += delta;
134 if (delta > hba->ufs_stats.req_stats[rq_type].max)
135 hba->ufs_stats.req_stats[rq_type].max = delta;
136 if (delta < hba->ufs_stats.req_stats[rq_type].min)
137 hba->ufs_stats.req_stats[rq_type].min = delta;
138}
139
140static void
141ufshcd_update_query_stats(struct ufs_hba *hba, enum query_opcode opcode, u8 idn)
142{
143 if (opcode < UPIU_QUERY_OPCODE_MAX && idn < MAX_QUERY_IDN)
144 hba->ufs_stats.query_stats_arr[opcode][idn]++;
145}
146
147#else
148static inline void ufshcd_update_tag_stats(struct ufs_hba *hba, int tag)
149{
150}
151
152static inline void ufshcd_update_tag_stats_completion(struct ufs_hba *hba,
153 struct scsi_cmnd *cmd)
154{
155}
156
157static inline void ufshcd_update_error_stats(struct ufs_hba *hba, int type)
158{
159}
160
161static inline
162void update_req_stats(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
163{
164}
165
166static inline
167void ufshcd_update_query_stats(struct ufs_hba *hba,
168 enum query_opcode opcode, u8 idn)
169{
170}
171#endif
172
173#define UFSHCD_REQ_SENSE_SIZE 18
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530174
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530175#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
176 UTP_TASK_REQ_COMPL |\
177 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530178/* UIC command timeout, unit: ms */
179#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530180
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530181/* NOP OUT retries waiting for NOP IN response */
182#define NOP_OUT_RETRIES 10
183/* Timeout after 30 msecs if NOP OUT hangs without response */
184#define NOP_OUT_TIMEOUT 30 /* msecs */
185
Dolev Raviv68078d52013-07-30 00:35:58 +0530186/* Query request retries */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700187#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +0530188/* Query request timeout */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700189#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +0530190
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530191/* Task management command timeout */
192#define TM_CMD_TIMEOUT 100 /* msecs */
193
Yaniv Gardi64238fb2016-02-01 15:02:43 +0200194/* maximum number of retries for a general UIC command */
195#define UFS_UIC_COMMAND_RETRIES 3
196
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300197/* maximum number of link-startup retries */
198#define DME_LINKSTARTUP_RETRIES 3
199
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +0200200/* Maximum retries for Hibern8 enter */
201#define UIC_HIBERN8_ENTER_RETRIES 3
202
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300203/* maximum number of reset retries before giving up */
204#define MAX_HOST_RESET_RETRIES 5
205
Dolev Raviv68078d52013-07-30 00:35:58 +0530206/* Expose the flag value from utp_upiu_query.value */
207#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
208
Seungwon Jeon7d568652013-08-31 21:40:20 +0530209/* Interrupt aggregation default timeout, unit: 40us */
210#define INT_AGGR_DEF_TO 0x02
211
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700212/* default value of auto suspend is 3 seconds */
213#define UFSHCD_AUTO_SUSPEND_DELAY_MS 3000 /* millisecs */
214
215#define UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE 10
216#define UFSHCD_CLK_GATING_DELAY_MS_PERF 50
217
218/* IOCTL opcode for command - ufs set device read only */
219#define UFS_IOCTL_BLKROSET BLKROSET
220
221#define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2
222
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300223#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
224 ({ \
225 int _ret; \
226 if (_on) \
227 _ret = ufshcd_enable_vreg(_dev, _vreg); \
228 else \
229 _ret = ufshcd_disable_vreg(_dev, _vreg); \
230 _ret; \
231 })
232
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700233#define ufshcd_hex_dump(prefix_str, buf, len) \
234print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, 16, 4, buf, len, false)
235
Subhash Jadavanida461ce2014-09-25 15:32:25 +0300236static u32 ufs_query_desc_max_size[] = {
237 QUERY_DESC_DEVICE_MAX_SIZE,
238 QUERY_DESC_CONFIGURAION_MAX_SIZE,
239 QUERY_DESC_UNIT_MAX_SIZE,
240 QUERY_DESC_RFU_MAX_SIZE,
241 QUERY_DESC_INTERCONNECT_MAX_SIZE,
242 QUERY_DESC_STRING_MAX_SIZE,
243 QUERY_DESC_RFU_MAX_SIZE,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700244 QUERY_DESC_GEOMETRY_MAZ_SIZE,
Subhash Jadavanida461ce2014-09-25 15:32:25 +0300245 QUERY_DESC_POWER_MAX_SIZE,
246 QUERY_DESC_RFU_MAX_SIZE,
247};
248
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530249enum {
250 UFSHCD_MAX_CHANNEL = 0,
251 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530252 UFSHCD_CMD_PER_LUN = 32,
253 UFSHCD_CAN_QUEUE = 32,
254};
255
256/* UFSHCD states */
257enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530258 UFSHCD_STATE_RESET,
259 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530260 UFSHCD_STATE_OPERATIONAL,
261};
262
263/* UFSHCD error handling flags */
264enum {
265 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530266};
267
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530268/* UFSHCD UIC layer error flags */
269enum {
270 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200271 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
272 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
273 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
274 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
275 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530276};
277
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530278/* Interrupt configuration options */
279enum {
280 UFSHCD_INT_DISABLE,
281 UFSHCD_INT_ENABLE,
282 UFSHCD_INT_CLEAR,
283};
284
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700285#define DEFAULT_UFSHCD_DBG_PRINT_EN UFSHCD_DBG_PRINT_ALL
286
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530287#define ufshcd_set_eh_in_progress(h) \
288 (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
289#define ufshcd_eh_in_progress(h) \
290 (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
291#define ufshcd_clear_eh_in_progress(h) \
292 (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
293
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300294#define ufshcd_set_ufs_dev_active(h) \
295 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
296#define ufshcd_set_ufs_dev_sleep(h) \
297 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
298#define ufshcd_set_ufs_dev_poweroff(h) \
299 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
300#define ufshcd_is_ufs_dev_active(h) \
301 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
302#define ufshcd_is_ufs_dev_sleep(h) \
303 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
304#define ufshcd_is_ufs_dev_poweroff(h) \
305 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
306
307static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
308 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
309 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
310 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
311 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
312 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
313 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
314};
315
316static inline enum ufs_dev_pwr_mode
317ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
318{
319 return ufs_pm_lvl_states[lvl].dev_state;
320}
321
322static inline enum uic_link_state
323ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
324{
325 return ufs_pm_lvl_states[lvl].link_state;
326}
327
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700328static inline enum ufs_pm_level
329ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
330 enum uic_link_state link_state)
331{
332 enum ufs_pm_level lvl;
333
334 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
335 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
336 (ufs_pm_lvl_states[lvl].link_state == link_state))
337 return lvl;
338 }
339
340 /* if no match found, return the level 0 */
341 return UFS_PM_LVL_0;
342}
343
344static inline bool ufshcd_is_valid_pm_lvl(int lvl)
345{
346 if (lvl >= 0 && lvl < ARRAY_SIZE(ufs_pm_lvl_states))
347 return true;
348 else
349 return false;
350}
351
352static irqreturn_t ufshcd_intr(int irq, void *__hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530353static void ufshcd_tmc_handler(struct ufs_hba *hba);
354static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530355static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700356static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530357static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300358static void ufshcd_hba_exit(struct ufs_hba *hba);
359static int ufshcd_probe_hba(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700360static int ufshcd_enable_clocks(struct ufs_hba *hba);
361static int ufshcd_disable_clocks(struct ufs_hba *hba,
362 bool is_gating_context);
363static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
364 bool is_gating_context);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200365static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300366static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700367static inline void ufshcd_save_tstamp_of_last_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300368static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700369static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
370static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
371static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
372static void ufshcd_release_all(struct ufs_hba *hba);
373static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
374static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
375
Yaniv Gardi14497322016-02-01 15:02:39 +0200376static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
377{
378 return tag >= 0 && tag < hba->nutrs;
379}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300380
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700381static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300382{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300383 if (!hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700384 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300385 hba->is_irq_enabled = true;
386 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300387}
388
389static inline void ufshcd_disable_irq(struct ufs_hba *hba)
390{
391 if (hba->is_irq_enabled) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700392 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300393 hba->is_irq_enabled = false;
394 }
395}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530396
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700397void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
398{
399 unsigned long flags;
400 bool unblock = false;
401
402 spin_lock_irqsave(hba->host->host_lock, flags);
403 hba->scsi_block_reqs_cnt--;
404 unblock = !hba->scsi_block_reqs_cnt;
405 spin_unlock_irqrestore(hba->host->host_lock, flags);
406 if (unblock)
407 scsi_unblock_requests(hba->host);
408}
409EXPORT_SYMBOL(ufshcd_scsi_unblock_requests);
410
411static inline void __ufshcd_scsi_block_requests(struct ufs_hba *hba)
412{
413 if (!hba->scsi_block_reqs_cnt++)
414 scsi_block_requests(hba->host);
415}
416
417void ufshcd_scsi_block_requests(struct ufs_hba *hba)
418{
419 unsigned long flags;
420
421 spin_lock_irqsave(hba->host->host_lock, flags);
422 __ufshcd_scsi_block_requests(hba);
423 spin_unlock_irqrestore(hba->host->host_lock, flags);
424}
425EXPORT_SYMBOL(ufshcd_scsi_block_requests);
426
Yaniv Gardib573d482016-03-10 17:37:09 +0200427/* replace non-printable or non-ASCII characters with spaces */
428static inline void ufshcd_remove_non_printable(char *val)
429{
430 if (!val)
431 return;
432
433 if (*val < 0x20 || *val > 0x7e)
434 *val = ' ';
435}
436
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700437#ifdef CONFIG_TRACEPOINTS
438static void ufshcd_add_command_trace(struct ufs_hba *hba,
439 unsigned int tag, const char *str)
440{
441 sector_t lba = -1;
442 u8 opcode = 0;
443 u32 intr, doorbell;
444 struct ufshcd_lrb *lrbp;
445 int transfer_len = -1;
446
447 lrbp = &hba->lrb[tag];
448
449 if (lrbp->cmd) { /* data phase exists */
450 opcode = (u8)(*lrbp->cmd->cmnd);
451 if ((opcode == READ_10) || (opcode == WRITE_10)) {
452 /*
453 * Currently we only fully trace read(10) and write(10)
454 * commands
455 */
456 if (lrbp->cmd->request && lrbp->cmd->request->bio)
457 lba =
458 lrbp->cmd->request->bio->bi_iter.bi_sector;
459 transfer_len = be32_to_cpu(
460 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
461 }
462 }
463
464 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
465 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
466 trace_ufshcd_command(dev_name(hba->dev), str, tag,
467 doorbell, transfer_len, intr, lba, opcode);
468}
469
470static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
471 unsigned int tag, const char *str)
472{
473 if (trace_ufshcd_command_enabled())
474 ufshcd_add_command_trace(hba, tag, str);
475}
476#else
477static inline void ufshcd_cond_add_cmd_trace(struct ufs_hba *hba,
478 unsigned int tag, const char *str)
479{
480}
481#endif
482
483static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
484{
485 struct ufs_clk_info *clki;
486 struct list_head *head = &hba->clk_list_head;
487
488 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_CLK_FREQ_EN))
489 return;
490
491 if (!head || list_empty(head))
492 return;
493
494 list_for_each_entry(clki, head, list) {
495 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
496 clki->max_freq)
497 dev_err(hba->dev, "clk: %s, rate: %u\n",
498 clki->name, clki->curr_freq);
499 }
500}
501
502static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
503 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
504{
505 int i;
506
507 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_UIC_ERR_HIST_EN))
508 return;
509
510 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
511 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
512
513 if (err_hist->reg[p] == 0)
514 continue;
515 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us", err_name, i,
516 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
517 }
518}
519
520static void ufshcd_print_host_regs(struct ufs_hba *hba)
521{
522 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_REGS_EN))
523 return;
524
525 /*
526 * hex_dump reads its data without the readl macro. This might
527 * cause inconsistency issues on some platform, as the printed
528 * values may be from cache and not the most recent value.
529 * To know whether you are looking at an un-cached version verify
530 * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
531 * during platform/pci probe function.
532 */
533 ufshcd_hex_dump("host regs: ", hba->mmio_base, UFSHCI_REG_SPACE_SIZE);
534 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x",
535 hba->ufs_version, hba->capabilities);
536 dev_err(hba->dev,
537 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x",
538 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
539 dev_err(hba->dev,
540 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d",
541 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
542 hba->ufs_stats.hibern8_exit_cnt);
543
544 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
545 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
546 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
547 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
548 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
549
550 ufshcd_print_clk_freqs(hba);
551
552 ufshcd_vops_dbg_register_dump(hba);
553}
554
555static
556void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
557{
558 struct ufshcd_lrb *lrbp;
559 int prdt_length;
560 int tag;
561
562 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TRS_EN))
563 return;
564
565 for_each_set_bit(tag, &bitmap, hba->nutrs) {
566 lrbp = &hba->lrb[tag];
567
568 dev_err(hba->dev, "UPIU[%d] - issue time %lld us",
569 tag, ktime_to_us(lrbp->issue_time_stamp));
570 dev_err(hba->dev,
571 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx",
572 tag, (u64)lrbp->utrd_dma_addr);
573 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
574 sizeof(struct utp_transfer_req_desc));
575 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx", tag,
576 (u64)lrbp->ucd_req_dma_addr);
577 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
578 sizeof(struct utp_upiu_req));
579 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx", tag,
580 (u64)lrbp->ucd_rsp_dma_addr);
581 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
582 sizeof(struct utp_upiu_rsp));
583 prdt_length =
584 le16_to_cpu(lrbp->utr_descriptor_ptr->prd_table_length);
585 dev_err(hba->dev, "UPIU[%d] - PRDT - %d entries phys@0x%llx",
586 tag, prdt_length, (u64)lrbp->ucd_prdt_dma_addr);
587 if (pr_prdt)
588 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
589 sizeof(struct ufshcd_sg_entry) * prdt_length);
590 }
591}
592
593static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
594{
595 struct utp_task_req_desc *tmrdp;
596 int tag;
597
598 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_TMRS_EN))
599 return;
600
601 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
602 tmrdp = &hba->utmrdl_base_addr[tag];
603 dev_err(hba->dev, "TM[%d] - Task Management Header", tag);
604 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
605 sizeof(struct request_desc_header));
606 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU",
607 tag);
608 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
609 sizeof(struct utp_upiu_req));
610 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU",
611 tag);
612 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
613 sizeof(struct utp_task_req_desc));
614 }
615}
616
617static void ufshcd_print_host_state(struct ufs_hba *hba)
618{
619 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_HOST_STATE_EN))
620 return;
621
622 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
623 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
624 hba->lrb_in_use, hba->outstanding_tasks, hba->outstanding_reqs);
625 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x, saved_ce_err=0x%x\n",
626 hba->saved_err, hba->saved_uic_err, hba->saved_ce_err);
627 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
628 hba->curr_dev_pwr_mode, hba->uic_link_state);
629 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
630 hba->pm_op_in_progress, hba->is_sys_suspended);
631 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
632 hba->auto_bkops_enabled, hba->host->host_self_blocked);
633 dev_err(hba->dev, "Clk gate=%d, hibern8 on idle=%d\n",
634 hba->clk_gating.state, hba->hibern8_on_idle.state);
635 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
636 hba->eh_flags, hba->req_abort_count);
637 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
638 hba->capabilities, hba->caps);
639 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
640 hba->dev_quirks);
641}
642
643/**
644 * ufshcd_print_pwr_info - print power params as saved in hba
645 * power info
646 * @hba: per-adapter instance
647 */
648static void ufshcd_print_pwr_info(struct ufs_hba *hba)
649{
650 char *names[] = {
651 "INVALID MODE",
652 "FAST MODE",
653 "SLOW_MODE",
654 "INVALID MODE",
655 "FASTAUTO_MODE",
656 "SLOWAUTO_MODE",
657 "INVALID MODE",
658 };
659
660 if (!(hba->ufshcd_dbg_print & UFSHCD_DBG_PRINT_PWR_EN))
661 return;
662
663 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
664 __func__,
665 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
666 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
667 names[hba->pwr_info.pwr_rx],
668 names[hba->pwr_info.pwr_tx],
669 hba->pwr_info.hs_rate);
670}
671
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530672/*
673 * ufshcd_wait_for_register - wait for register value to change
674 * @hba - per-adapter interface
675 * @reg - mmio register offset
676 * @mask - mask to apply to read register value
677 * @val - wait condition
678 * @interval_us - polling interval in microsecs
679 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200680 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530681 * Returns -ETIMEDOUT on error, zero on success
682 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200683int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
684 u32 val, unsigned long interval_us,
685 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530686{
687 int err = 0;
688 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
689
690 /* ignore bits that we don't intend to wait on */
691 val = val & mask;
692
693 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200694 if (can_sleep)
695 usleep_range(interval_us, interval_us + 50);
696 else
697 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530698 if (time_after(jiffies, timeout)) {
699 if ((ufshcd_readl(hba, reg) & mask) != val)
700 err = -ETIMEDOUT;
701 break;
702 }
703 }
704
705 return err;
706}
707
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530708/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530709 * ufshcd_get_intr_mask - Get the interrupt bit mask
710 * @hba - Pointer to adapter instance
711 *
712 * Returns interrupt bit mask per version
713 */
714static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
715{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700716 u32 intr_mask = 0;
717
718 switch (hba->ufs_version) {
719 case UFSHCI_VERSION_10:
720 intr_mask = INTERRUPT_MASK_ALL_VER_10;
721 break;
722 /* allow fall through */
723 case UFSHCI_VERSION_11:
724 case UFSHCI_VERSION_20:
725 intr_mask = INTERRUPT_MASK_ALL_VER_11;
726 break;
727 /* allow fall through */
728 case UFSHCI_VERSION_21:
729 default:
730 intr_mask = INTERRUPT_MASK_ALL_VER_21;
731 }
732
733 if (!ufshcd_is_crypto_supported(hba))
734 intr_mask &= ~CRYPTO_ENGINE_FATAL_ERROR;
735
736 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530737}
738
739/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530740 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
741 * @hba - Pointer to adapter instance
742 *
743 * Returns UFSHCI version supported by the controller
744 */
745static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
746{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200747 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
748 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300749
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530750 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530751}
752
753/**
754 * ufshcd_is_device_present - Check if any device connected to
755 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300756 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530757 *
Venkatraman S73ec5132012-07-10 19:39:23 +0530758 * Returns 1 if device present, 0 if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530759 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300760static inline int ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530761{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300762 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
763 DEVICE_PRESENT) ? 1 : 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530764}
765
766/**
767 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
768 * @lrb: pointer to local command reference block
769 *
770 * This function is used to get the OCS field from UTRD
771 * Returns the OCS field in the UTRD
772 */
773static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
774{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530775 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530776}
777
778/**
779 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
780 * @task_req_descp: pointer to utp_task_req_desc structure
781 *
782 * This function is used to get the OCS field from UTMRD
783 * Returns the OCS field in the UTMRD
784 */
785static inline int
786ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
787{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530788 return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530789}
790
791/**
792 * ufshcd_get_tm_free_slot - get a free slot for task management request
793 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530794 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530795 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530796 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
797 * Returns 0 if free slot is not available, else return 1 with tag value
798 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530799 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530800static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530801{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530802 int tag;
803 bool ret = false;
804
805 if (!free_slot)
806 goto out;
807
808 do {
809 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
810 if (tag >= hba->nutmrs)
811 goto out;
812 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
813
814 *free_slot = tag;
815 ret = true;
816out:
817 return ret;
818}
819
820static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
821{
822 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530823}
824
825/**
826 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
827 * @hba: per adapter instance
828 * @pos: position of the bit to be cleared
829 */
830static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
831{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530832 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530833}
834
835/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200836 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
837 * @hba: per adapter instance
838 * @tag: position of the bit to be cleared
839 */
840static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
841{
842 __clear_bit(tag, &hba->outstanding_reqs);
843}
844
845/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530846 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
847 * @reg: Register value of host controller status
848 *
849 * Returns integer, 0 on Success and positive value if failed
850 */
851static inline int ufshcd_get_lists_status(u32 reg)
852{
853 /*
854 * The mask 0xFF is for the following HCS register bits
855 * Bit Description
856 * 0 Device Present
857 * 1 UTRLRDY
858 * 2 UTMRLRDY
859 * 3 UCRDY
Yaniv Gardi897efe62016-02-01 15:02:48 +0200860 * 4-7 reserved
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530861 */
Yaniv Gardi897efe62016-02-01 15:02:48 +0200862 return ((reg & 0xFF) >> 1) ^ 0x07;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530863}
864
865/**
866 * ufshcd_get_uic_cmd_result - Get the UIC command result
867 * @hba: Pointer to adapter instance
868 *
869 * This function gets the result of UIC command completion
870 * Returns 0 on success, non zero value on error
871 */
872static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
873{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530874 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530875 MASK_UIC_COMMAND_RESULT;
876}
877
878/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530879 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
880 * @hba: Pointer to adapter instance
881 *
882 * This function gets UIC command argument3
883 * Returns 0 on success, non zero value on error
884 */
885static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
886{
887 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
888}
889
890/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530891 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530892 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530893 */
894static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530895ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530896{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530897 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530898}
899
900/**
901 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
902 * @ucd_rsp_ptr: pointer to response UPIU
903 *
904 * This function gets the response status and scsi_status from response UPIU
905 * Returns the response result code.
906 */
907static inline int
908ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
909{
910 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
911}
912
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530913/*
914 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
915 * from response UPIU
916 * @ucd_rsp_ptr: pointer to response UPIU
917 *
918 * Return the data segment length.
919 */
920static inline unsigned int
921ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
922{
923 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
924 MASK_RSP_UPIU_DATA_SEG_LEN;
925}
926
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530927/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530928 * ufshcd_is_exception_event - Check if the device raised an exception event
929 * @ucd_rsp_ptr: pointer to response UPIU
930 *
931 * The function checks if the device raised an exception event indicated in
932 * the Device Information field of response UPIU.
933 *
934 * Returns true if exception is raised, false otherwise.
935 */
936static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
937{
938 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
939 MASK_RSP_EXCEPTION_EVENT ? true : false;
940}
941
942/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530943 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530944 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530945 */
946static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530947ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530948{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530949 ufshcd_writel(hba, INT_AGGR_ENABLE |
950 INT_AGGR_COUNTER_AND_TIMER_RESET,
951 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
952}
953
954/**
955 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
956 * @hba: per adapter instance
957 * @cnt: Interrupt aggregation counter threshold
958 * @tmout: Interrupt aggregation timeout value
959 */
960static inline void
961ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
962{
963 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
964 INT_AGGR_COUNTER_THLD_VAL(cnt) |
965 INT_AGGR_TIMEOUT_VAL(tmout),
966 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530967}
968
969/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300970 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
971 * @hba: per adapter instance
972 */
973static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
974{
975 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
976}
977
978/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530979 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
980 * When run-stop registers are set to 1, it indicates the
981 * host controller that it can process the requests
982 * @hba: per adapter instance
983 */
984static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
985{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530986 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
987 REG_UTP_TASK_REQ_LIST_RUN_STOP);
988 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
989 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530990}
991
992/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530993 * ufshcd_hba_start - Start controller initialization sequence
994 * @hba: per adapter instance
995 */
996static inline void ufshcd_hba_start(struct ufs_hba *hba)
997{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -0700998 u32 val = CONTROLLER_ENABLE;
999
1000 if (ufshcd_is_crypto_supported(hba))
1001 val |= CRYPTO_GENERAL_ENABLE;
1002 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301003}
1004
1005/**
1006 * ufshcd_is_hba_active - Get controller state
1007 * @hba: per adapter instance
1008 *
1009 * Returns zero if controller is active, 1 otherwise
1010 */
1011static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
1012{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301013 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301014}
1015
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001016static const char *ufschd_uic_link_state_to_string(
1017 enum uic_link_state state)
1018{
1019 switch (state) {
1020 case UIC_LINK_OFF_STATE: return "OFF";
1021 case UIC_LINK_ACTIVE_STATE: return "ACTIVE";
1022 case UIC_LINK_HIBERN8_STATE: return "HIBERN8";
1023 default: return "UNKNOWN";
1024 }
1025}
1026
1027static const char *ufschd_ufs_dev_pwr_mode_to_string(
1028 enum ufs_dev_pwr_mode state)
1029{
1030 switch (state) {
1031 case UFS_ACTIVE_PWR_MODE: return "ACTIVE";
1032 case UFS_SLEEP_PWR_MODE: return "SLEEP";
1033 case UFS_POWERDOWN_PWR_MODE: return "POWERDOWN";
1034 default: return "UNKNOWN";
1035 }
1036}
1037
Yaniv Gardi37113102016-03-10 17:37:16 +02001038u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
1039{
1040 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
1041 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
1042 (hba->ufs_version == UFSHCI_VERSION_11))
1043 return UFS_UNIPRO_VER_1_41;
1044 else
1045 return UFS_UNIPRO_VER_1_6;
1046}
1047EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
1048
1049static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
1050{
1051 /*
1052 * If both host and device support UniPro ver1.6 or later, PA layer
1053 * parameters tuning happens during link startup itself.
1054 *
1055 * We can manually tune PA layer parameters if either host or device
1056 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
1057 * logic simple, we will only do manual tuning if local unipro version
1058 * doesn't support ver1.6 or later.
1059 */
1060 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
1061 return true;
1062 else
1063 return false;
1064}
1065
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001066/**
1067 * ufshcd_set_clk_freq - set UFS controller clock frequencies
1068 * @hba: per adapter instance
1069 * @scale_up: If True, set max possible frequency othewise set low frequency
1070 *
1071 * Returns 0 if successful
1072 * Returns < 0 for any other errors
1073 */
1074static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
1075{
1076 int ret = 0;
1077 struct ufs_clk_info *clki;
1078 struct list_head *head = &hba->clk_list_head;
1079
1080 if (!head || list_empty(head))
1081 goto out;
1082
1083 list_for_each_entry(clki, head, list) {
1084 if (!IS_ERR_OR_NULL(clki->clk)) {
1085 if (scale_up && clki->max_freq) {
1086 if (clki->curr_freq == clki->max_freq)
1087 continue;
1088
1089 ret = clk_set_rate(clki->clk, clki->max_freq);
1090 if (ret) {
1091 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1092 __func__, clki->name,
1093 clki->max_freq, ret);
1094 break;
1095 }
1096 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1097 "scaled up", clki->name,
1098 clki->curr_freq,
1099 clki->max_freq);
1100 clki->curr_freq = clki->max_freq;
1101
1102 } else if (!scale_up && clki->min_freq) {
1103 if (clki->curr_freq == clki->min_freq)
1104 continue;
1105
1106 ret = clk_set_rate(clki->clk, clki->min_freq);
1107 if (ret) {
1108 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1109 __func__, clki->name,
1110 clki->min_freq, ret);
1111 break;
1112 }
1113 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1114 "scaled down", clki->name,
1115 clki->curr_freq,
1116 clki->min_freq);
1117 clki->curr_freq = clki->min_freq;
1118 }
1119 }
1120 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1121 clki->name, clk_get_rate(clki->clk));
1122 }
1123
1124out:
1125 return ret;
1126}
1127
1128/**
1129 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1130 * @hba: per adapter instance
1131 * @scale_up: True if scaling up and false if scaling down
1132 *
1133 * Returns 0 if successful
1134 * Returns < 0 for any other errors
1135 */
1136static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1137{
1138 int ret = 0;
1139
1140 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1141 if (ret)
1142 return ret;
1143
1144 ret = ufshcd_set_clk_freq(hba, scale_up);
1145 if (ret)
1146 return ret;
1147
1148 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1149 if (ret) {
1150 ufshcd_set_clk_freq(hba, !scale_up);
1151 return ret;
1152 }
1153
1154 return ret;
1155}
1156
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001157static void ufshcd_ungate_work(struct work_struct *work)
1158{
1159 int ret;
1160 unsigned long flags;
1161 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1162 clk_gating.ungate_work);
1163
1164 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1165
1166 spin_lock_irqsave(hba->host->host_lock, flags);
1167 if (hba->clk_gating.state == CLKS_ON) {
1168 spin_unlock_irqrestore(hba->host->host_lock, flags);
1169 goto unblock_reqs;
1170 }
1171
1172 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001173 ufshcd_hba_vreg_set_hpm(hba);
1174 ufshcd_enable_clocks(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001175
1176 /* Exit from hibern8 */
1177 if (ufshcd_can_hibern8_during_gating(hba)) {
1178 /* Prevent gating in this path */
1179 hba->clk_gating.is_suspended = true;
1180 if (ufshcd_is_link_hibern8(hba)) {
1181 ret = ufshcd_uic_hibern8_exit(hba);
1182 if (ret)
1183 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1184 __func__, ret);
1185 else
1186 ufshcd_set_link_active(hba);
1187 }
1188 hba->clk_gating.is_suspended = false;
1189 }
1190unblock_reqs:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001191 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001192}
1193
1194/**
1195 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1196 * Also, exit from hibern8 mode and set the link as active.
1197 * @hba: per adapter instance
1198 * @async: This indicates whether caller should ungate clocks asynchronously.
1199 */
1200int ufshcd_hold(struct ufs_hba *hba, bool async)
1201{
1202 int rc = 0;
1203 unsigned long flags;
1204
1205 if (!ufshcd_is_clkgating_allowed(hba))
1206 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001207 spin_lock_irqsave(hba->host->host_lock, flags);
1208 hba->clk_gating.active_reqs++;
1209
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001210 if (ufshcd_eh_in_progress(hba)) {
1211 spin_unlock_irqrestore(hba->host->host_lock, flags);
1212 return 0;
1213 }
1214
Sahitya Tummala856b3482014-09-25 15:32:34 +03001215start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001216 switch (hba->clk_gating.state) {
1217 case CLKS_ON:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001218 /*
1219 * Wait for the ungate work to complete if in progress.
1220 * Though the clocks may be in ON state, the link could
1221 * still be in hibner8 state if hibern8 is allowed
1222 * during clock gating.
1223 * Make sure we exit hibern8 state also in addition to
1224 * clocks being ON.
1225 */
1226 if (ufshcd_can_hibern8_during_gating(hba) &&
1227 ufshcd_is_link_hibern8(hba)) {
1228 spin_unlock_irqrestore(hba->host->host_lock, flags);
1229 flush_work(&hba->clk_gating.ungate_work);
1230 spin_lock_irqsave(hba->host->host_lock, flags);
1231 goto start;
1232 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001233 break;
1234 case REQ_CLKS_OFF:
1235 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1236 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001237 trace_ufshcd_clk_gating(dev_name(hba->dev),
1238 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001239 break;
1240 }
1241 /*
1242 * If we here, it means gating work is either done or
1243 * currently running. Hence, fall through to cancel gating
1244 * work and to enable clocks.
1245 */
1246 case CLKS_OFF:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001247 __ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001248 hba->clk_gating.state = REQ_CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001249 trace_ufshcd_clk_gating(dev_name(hba->dev),
1250 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001251 schedule_work(&hba->clk_gating.ungate_work);
1252 /*
1253 * fall through to check if we should wait for this
1254 * work to be done or not.
1255 */
1256 case REQ_CLKS_ON:
1257 if (async) {
1258 rc = -EAGAIN;
1259 hba->clk_gating.active_reqs--;
1260 break;
1261 }
1262
1263 spin_unlock_irqrestore(hba->host->host_lock, flags);
1264 flush_work(&hba->clk_gating.ungate_work);
1265 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001266 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001267 goto start;
1268 default:
1269 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1270 __func__, hba->clk_gating.state);
1271 break;
1272 }
1273 spin_unlock_irqrestore(hba->host->host_lock, flags);
1274out:
1275 return rc;
1276}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001277EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001278
1279static void ufshcd_gate_work(struct work_struct *work)
1280{
1281 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1282 clk_gating.gate_work.work);
1283 unsigned long flags;
1284
1285 spin_lock_irqsave(hba->host->host_lock, flags);
1286 if (hba->clk_gating.is_suspended) {
1287 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001288 trace_ufshcd_clk_gating(dev_name(hba->dev),
1289 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001290 goto rel_lock;
1291 }
1292
1293 if (hba->clk_gating.active_reqs
1294 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1295 || hba->lrb_in_use || hba->outstanding_tasks
1296 || hba->active_uic_cmd || hba->uic_async_done)
1297 goto rel_lock;
1298
1299 spin_unlock_irqrestore(hba->host->host_lock, flags);
1300
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001301 if (ufshcd_is_hibern8_on_idle_allowed(hba) &&
1302 hba->hibern8_on_idle.is_enabled)
1303 /*
1304 * Hibern8 enter work (on Idle) needs clocks to be ON hence
1305 * make sure that it is flushed before turning off the clocks.
1306 */
1307 flush_delayed_work(&hba->hibern8_on_idle.enter_work);
1308
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001309 /* put the link into hibern8 mode before turning off clocks */
1310 if (ufshcd_can_hibern8_during_gating(hba)) {
1311 if (ufshcd_uic_hibern8_enter(hba)) {
1312 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001313 trace_ufshcd_clk_gating(dev_name(hba->dev),
1314 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001315 goto out;
1316 }
1317 ufshcd_set_link_hibern8(hba);
1318 }
1319
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001320 if (!ufshcd_is_link_active(hba) && !hba->no_ref_clk_gating)
1321 ufshcd_disable_clocks(hba, true);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001322 else
1323 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001324 ufshcd_disable_clocks_skip_ref_clk(hba, true);
1325
1326 /* Put the host controller in low power mode if possible */
1327 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001328
1329 /*
1330 * In case you are here to cancel this work the gating state
1331 * would be marked as REQ_CLKS_ON. In this case keep the state
1332 * as REQ_CLKS_ON which would anyway imply that clocks are off
1333 * and a request to turn them on is pending. By doing this way,
1334 * we keep the state machine in tact and this would ultimately
1335 * prevent from doing cancel work multiple times when there are
1336 * new requests arriving before the current cancel work is done.
1337 */
1338 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001339 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001340 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001341 trace_ufshcd_clk_gating(dev_name(hba->dev),
1342 hba->clk_gating.state);
1343 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001344rel_lock:
1345 spin_unlock_irqrestore(hba->host->host_lock, flags);
1346out:
1347 return;
1348}
1349
1350/* host lock must be held before calling this variant */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001351static void __ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001352{
1353 if (!ufshcd_is_clkgating_allowed(hba))
1354 return;
1355
1356 hba->clk_gating.active_reqs--;
1357
1358 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1359 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1360 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001361 || hba->active_uic_cmd || hba->uic_async_done
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001362 || ufshcd_eh_in_progress(hba) || no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001363 return;
1364
1365 hba->clk_gating.state = REQ_CLKS_OFF;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001366 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1367
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001368 schedule_delayed_work(&hba->clk_gating.gate_work,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001369 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001370}
1371
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001372void ufshcd_release(struct ufs_hba *hba, bool no_sched)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001373{
1374 unsigned long flags;
1375
1376 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001377 __ufshcd_release(hba, no_sched);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001378 spin_unlock_irqrestore(hba->host->host_lock, flags);
1379}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001380EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001381
1382static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1383 struct device_attribute *attr, char *buf)
1384{
1385 struct ufs_hba *hba = dev_get_drvdata(dev);
1386
1387 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1388}
1389
1390static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1391 struct device_attribute *attr, const char *buf, size_t count)
1392{
1393 struct ufs_hba *hba = dev_get_drvdata(dev);
1394 unsigned long flags, value;
1395
1396 if (kstrtoul(buf, 0, &value))
1397 return -EINVAL;
1398
1399 spin_lock_irqsave(hba->host->host_lock, flags);
1400 hba->clk_gating.delay_ms = value;
1401 spin_unlock_irqrestore(hba->host->host_lock, flags);
1402 return count;
1403}
1404
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001405static ssize_t ufshcd_clkgate_delay_pwr_save_show(struct device *dev,
1406 struct device_attribute *attr, char *buf)
1407{
1408 struct ufs_hba *hba = dev_get_drvdata(dev);
1409
1410 return snprintf(buf, PAGE_SIZE, "%lu\n",
1411 hba->clk_gating.delay_ms_pwr_save);
1412}
1413
1414static ssize_t ufshcd_clkgate_delay_pwr_save_store(struct device *dev,
1415 struct device_attribute *attr, const char *buf, size_t count)
1416{
1417 struct ufs_hba *hba = dev_get_drvdata(dev);
1418 unsigned long flags, value;
1419
1420 if (kstrtoul(buf, 0, &value))
1421 return -EINVAL;
1422
1423 spin_lock_irqsave(hba->host->host_lock, flags);
1424
1425 hba->clk_gating.delay_ms_pwr_save = value;
1426 if (ufshcd_is_clkscaling_supported(hba) &&
1427 !hba->clk_scaling.is_scaled_up)
1428 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_pwr_save;
1429
1430 spin_unlock_irqrestore(hba->host->host_lock, flags);
1431 return count;
1432}
1433
1434static ssize_t ufshcd_clkgate_delay_perf_show(struct device *dev,
1435 struct device_attribute *attr, char *buf)
1436{
1437 struct ufs_hba *hba = dev_get_drvdata(dev);
1438
1439 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms_perf);
1440}
1441
1442static ssize_t ufshcd_clkgate_delay_perf_store(struct device *dev,
1443 struct device_attribute *attr, const char *buf, size_t count)
1444{
1445 struct ufs_hba *hba = dev_get_drvdata(dev);
1446 unsigned long flags, value;
1447
1448 if (kstrtoul(buf, 0, &value))
1449 return -EINVAL;
1450
1451 spin_lock_irqsave(hba->host->host_lock, flags);
1452
1453 hba->clk_gating.delay_ms_perf = value;
1454 if (ufshcd_is_clkscaling_supported(hba) &&
1455 hba->clk_scaling.is_scaled_up)
1456 hba->clk_gating.delay_ms = hba->clk_gating.delay_ms_perf;
1457
1458 spin_unlock_irqrestore(hba->host->host_lock, flags);
1459 return count;
1460}
1461
1462static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1463 struct device_attribute *attr, char *buf)
1464{
1465 struct ufs_hba *hba = dev_get_drvdata(dev);
1466
1467 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1468}
1469
1470static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1471 struct device_attribute *attr, const char *buf, size_t count)
1472{
1473 struct ufs_hba *hba = dev_get_drvdata(dev);
1474 unsigned long flags;
1475 u32 value;
1476
1477 if (kstrtou32(buf, 0, &value))
1478 return -EINVAL;
1479
1480 value = !!value;
1481 if (value == hba->clk_gating.is_enabled)
1482 goto out;
1483
1484 if (value) {
1485 ufshcd_release(hba, false);
1486 } else {
1487 spin_lock_irqsave(hba->host->host_lock, flags);
1488 hba->clk_gating.active_reqs++;
1489 spin_unlock_irqrestore(hba->host->host_lock, flags);
1490 }
1491
1492 hba->clk_gating.is_enabled = value;
1493out:
1494 return count;
1495}
1496
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001497static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1498{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001499 struct ufs_clk_gating *gating = &hba->clk_gating;
1500
1501 hba->clk_gating.state = CLKS_ON;
1502
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001503 if (!ufshcd_is_clkgating_allowed(hba))
1504 return;
1505
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001506 INIT_DELAYED_WORK(&gating->gate_work, ufshcd_gate_work);
1507 INIT_WORK(&gating->ungate_work, ufshcd_ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001508
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001509 gating->is_enabled = true;
1510
1511 /*
1512 * Scheduling the delayed work after 1 jiffies will make the work to
1513 * get schedule any time from 0ms to 1000/HZ ms which is not desirable
1514 * for hibern8 enter work as it may impact the performance if it gets
1515 * scheduled almost immediately. Hence make sure that hibern8 enter
1516 * work gets scheduled atleast after 2 jiffies (any time between
1517 * 1000/HZ ms to 2000/HZ ms).
1518 */
1519 gating->delay_ms_pwr_save = jiffies_to_msecs(
1520 max_t(unsigned long,
1521 msecs_to_jiffies(UFSHCD_CLK_GATING_DELAY_MS_PWR_SAVE),
1522 2));
1523 gating->delay_ms_perf = jiffies_to_msecs(
1524 max_t(unsigned long,
1525 msecs_to_jiffies(UFSHCD_CLK_GATING_DELAY_MS_PERF),
1526 2));
1527
1528 /* start with performance mode */
1529 gating->delay_ms = gating->delay_ms_perf;
1530
1531 if (!ufshcd_is_clkscaling_supported(hba))
1532 goto scaling_not_supported;
1533
1534 gating->delay_pwr_save_attr.show = ufshcd_clkgate_delay_pwr_save_show;
1535 gating->delay_pwr_save_attr.store = ufshcd_clkgate_delay_pwr_save_store;
1536 sysfs_attr_init(&gating->delay_pwr_save_attr.attr);
1537 gating->delay_pwr_save_attr.attr.name = "clkgate_delay_ms_pwr_save";
1538 gating->delay_pwr_save_attr.attr.mode = S_IRUGO | S_IWUSR;
1539 if (device_create_file(hba->dev, &gating->delay_pwr_save_attr))
1540 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_pwr_save\n");
1541
1542 gating->delay_perf_attr.show = ufshcd_clkgate_delay_perf_show;
1543 gating->delay_perf_attr.store = ufshcd_clkgate_delay_perf_store;
1544 sysfs_attr_init(&gating->delay_perf_attr.attr);
1545 gating->delay_perf_attr.attr.name = "clkgate_delay_ms_perf";
1546 gating->delay_perf_attr.attr.mode = S_IRUGO | S_IWUSR;
1547 if (device_create_file(hba->dev, &gating->delay_perf_attr))
1548 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay_ms_perf\n");
1549
1550 goto add_clkgate_enable;
1551
1552scaling_not_supported:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001553 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1554 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1555 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1556 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1557 hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
1558 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1559 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001560
1561add_clkgate_enable:
1562 gating->enable_attr.show = ufshcd_clkgate_enable_show;
1563 gating->enable_attr.store = ufshcd_clkgate_enable_store;
1564 sysfs_attr_init(&gating->enable_attr.attr);
1565 gating->enable_attr.attr.name = "clkgate_enable";
1566 gating->enable_attr.attr.mode = S_IRUGO | S_IWUSR;
1567 if (device_create_file(hba->dev, &gating->enable_attr))
1568 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001569}
1570
1571static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1572{
1573 if (!ufshcd_is_clkgating_allowed(hba))
1574 return;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001575 if (ufshcd_is_clkscaling_supported(hba)) {
1576 device_remove_file(hba->dev,
1577 &hba->clk_gating.delay_pwr_save_attr);
1578 device_remove_file(hba->dev, &hba->clk_gating.delay_perf_attr);
1579 } else {
1580 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1581 }
1582 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001583 cancel_work_sync(&hba->clk_gating.ungate_work);
1584 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001585}
1586
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001587static void ufshcd_set_auto_hibern8_timer(struct ufs_hba *hba, u32 delay)
1588{
1589 ufshcd_rmwl(hba, AUTO_HIBERN8_TIMER_SCALE_MASK |
1590 AUTO_HIBERN8_IDLE_TIMER_MASK,
1591 AUTO_HIBERN8_TIMER_SCALE_1_MS | delay,
1592 REG_AUTO_HIBERN8_IDLE_TIMER);
1593 /* Make sure the timer gets applied before further operations */
1594 mb();
1595}
1596
1597/**
1598 * ufshcd_hibern8_hold - Make sure that link is not in hibern8.
1599 *
1600 * @hba: per adapter instance
1601 * @async: This indicates whether caller wants to exit hibern8 asynchronously.
1602 *
1603 * Exit from hibern8 mode and set the link as active.
1604 *
1605 * Return 0 on success, non-zero on failure.
1606 */
1607static int ufshcd_hibern8_hold(struct ufs_hba *hba, bool async)
1608{
1609 int rc = 0;
1610 unsigned long flags;
1611
1612 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1613 goto out;
1614
1615 spin_lock_irqsave(hba->host->host_lock, flags);
1616 hba->hibern8_on_idle.active_reqs++;
1617
1618 if (ufshcd_eh_in_progress(hba)) {
1619 spin_unlock_irqrestore(hba->host->host_lock, flags);
1620 return 0;
1621 }
1622
1623start:
1624 switch (hba->hibern8_on_idle.state) {
1625 case HIBERN8_EXITED:
1626 break;
1627 case REQ_HIBERN8_ENTER:
1628 if (cancel_delayed_work(&hba->hibern8_on_idle.enter_work)) {
1629 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1630 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1631 hba->hibern8_on_idle.state);
1632 break;
1633 }
1634 /*
1635 * If we here, it means Hibern8 enter work is either done or
1636 * currently running. Hence, fall through to cancel hibern8
1637 * work and exit hibern8.
1638 */
1639 case HIBERN8_ENTERED:
1640 __ufshcd_scsi_block_requests(hba);
1641 hba->hibern8_on_idle.state = REQ_HIBERN8_EXIT;
1642 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1643 hba->hibern8_on_idle.state);
1644 schedule_work(&hba->hibern8_on_idle.exit_work);
1645 /*
1646 * fall through to check if we should wait for this
1647 * work to be done or not.
1648 */
1649 case REQ_HIBERN8_EXIT:
1650 if (async) {
1651 rc = -EAGAIN;
1652 hba->hibern8_on_idle.active_reqs--;
1653 break;
1654 } else {
1655 spin_unlock_irqrestore(hba->host->host_lock, flags);
1656 flush_work(&hba->hibern8_on_idle.exit_work);
1657 /* Make sure state is HIBERN8_EXITED before returning */
1658 spin_lock_irqsave(hba->host->host_lock, flags);
1659 goto start;
1660 }
1661 default:
1662 dev_err(hba->dev, "%s: H8 is in invalid state %d\n",
1663 __func__, hba->hibern8_on_idle.state);
1664 break;
1665 }
1666 spin_unlock_irqrestore(hba->host->host_lock, flags);
1667out:
1668 return rc;
1669}
1670
1671/* host lock must be held before calling this variant */
1672static void __ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
1673{
1674 unsigned long delay_in_jiffies;
1675
1676 if (!ufshcd_is_hibern8_on_idle_allowed(hba))
1677 return;
1678
1679 hba->hibern8_on_idle.active_reqs--;
1680 BUG_ON(hba->hibern8_on_idle.active_reqs < 0);
1681
1682 if (hba->hibern8_on_idle.active_reqs
1683 || hba->hibern8_on_idle.is_suspended
1684 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1685 || hba->lrb_in_use || hba->outstanding_tasks
1686 || hba->active_uic_cmd || hba->uic_async_done
1687 || ufshcd_eh_in_progress(hba) || no_sched)
1688 return;
1689
1690 hba->hibern8_on_idle.state = REQ_HIBERN8_ENTER;
1691 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1692 hba->hibern8_on_idle.state);
1693 /*
1694 * Scheduling the delayed work after 1 jiffies will make the work to
1695 * get schedule any time from 0ms to 1000/HZ ms which is not desirable
1696 * for hibern8 enter work as it may impact the performance if it gets
1697 * scheduled almost immediately. Hence make sure that hibern8 enter
1698 * work gets scheduled atleast after 2 jiffies (any time between
1699 * 1000/HZ ms to 2000/HZ ms).
1700 */
1701 delay_in_jiffies = msecs_to_jiffies(hba->hibern8_on_idle.delay_ms);
1702 if (delay_in_jiffies == 1)
1703 delay_in_jiffies++;
1704
1705 schedule_delayed_work(&hba->hibern8_on_idle.enter_work,
1706 delay_in_jiffies);
1707}
1708
1709static void ufshcd_hibern8_release(struct ufs_hba *hba, bool no_sched)
1710{
1711 unsigned long flags;
1712
1713 spin_lock_irqsave(hba->host->host_lock, flags);
1714 __ufshcd_hibern8_release(hba, no_sched);
1715 spin_unlock_irqrestore(hba->host->host_lock, flags);
1716}
1717
1718static void ufshcd_hibern8_enter_work(struct work_struct *work)
1719{
1720 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1721 hibern8_on_idle.enter_work.work);
1722 unsigned long flags;
1723
1724 spin_lock_irqsave(hba->host->host_lock, flags);
1725 if (hba->hibern8_on_idle.is_suspended) {
1726 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1727 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1728 hba->hibern8_on_idle.state);
1729 goto rel_lock;
1730 }
1731
1732 if (hba->hibern8_on_idle.active_reqs
1733 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1734 || hba->lrb_in_use || hba->outstanding_tasks
1735 || hba->active_uic_cmd || hba->uic_async_done)
1736 goto rel_lock;
1737
1738 spin_unlock_irqrestore(hba->host->host_lock, flags);
1739
1740 if (ufshcd_is_link_active(hba) && ufshcd_uic_hibern8_enter(hba)) {
1741 /* Enter failed */
1742 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1743 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1744 hba->hibern8_on_idle.state);
1745 goto out;
1746 }
1747 ufshcd_set_link_hibern8(hba);
1748
1749 /*
1750 * In case you are here to cancel this work the hibern8_on_idle.state
1751 * would be marked as REQ_HIBERN8_EXIT. In this case keep the state
1752 * as REQ_HIBERN8_EXIT which would anyway imply that we are in hibern8
1753 * and a request to exit from it is pending. By doing this way,
1754 * we keep the state machine in tact and this would ultimately
1755 * prevent from doing cancel work multiple times when there are
1756 * new requests arriving before the current cancel work is done.
1757 */
1758 spin_lock_irqsave(hba->host->host_lock, flags);
1759 if (hba->hibern8_on_idle.state == REQ_HIBERN8_ENTER) {
1760 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
1761 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1762 hba->hibern8_on_idle.state);
1763 }
1764rel_lock:
1765 spin_unlock_irqrestore(hba->host->host_lock, flags);
1766out:
1767 return;
1768}
1769
1770static void ufshcd_hibern8_exit_work(struct work_struct *work)
1771{
1772 int ret;
1773 unsigned long flags;
1774 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1775 hibern8_on_idle.exit_work);
1776
1777 cancel_delayed_work_sync(&hba->hibern8_on_idle.enter_work);
1778
1779 spin_lock_irqsave(hba->host->host_lock, flags);
1780 if ((hba->hibern8_on_idle.state == HIBERN8_EXITED)
1781 || ufshcd_is_link_active(hba)) {
1782 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1783 spin_unlock_irqrestore(hba->host->host_lock, flags);
1784 goto unblock_reqs;
1785 }
1786 spin_unlock_irqrestore(hba->host->host_lock, flags);
1787
1788 /* Exit from hibern8 */
1789 if (ufshcd_is_link_hibern8(hba)) {
1790 ufshcd_hold(hba, false);
1791 ret = ufshcd_uic_hibern8_exit(hba);
1792 ufshcd_release(hba, false);
1793 if (!ret) {
1794 spin_lock_irqsave(hba->host->host_lock, flags);
1795 ufshcd_set_link_active(hba);
1796 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1797 trace_ufshcd_hibern8_on_idle(dev_name(hba->dev),
1798 hba->hibern8_on_idle.state);
1799 spin_unlock_irqrestore(hba->host->host_lock, flags);
1800 }
1801 }
1802unblock_reqs:
1803 ufshcd_scsi_unblock_requests(hba);
1804}
1805
1806static ssize_t ufshcd_hibern8_on_idle_delay_show(struct device *dev,
1807 struct device_attribute *attr, char *buf)
1808{
1809 struct ufs_hba *hba = dev_get_drvdata(dev);
1810
1811 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->hibern8_on_idle.delay_ms);
1812}
1813
1814static ssize_t ufshcd_hibern8_on_idle_delay_store(struct device *dev,
1815 struct device_attribute *attr, const char *buf, size_t count)
1816{
1817 struct ufs_hba *hba = dev_get_drvdata(dev);
1818 unsigned long flags, value;
1819
1820 if (kstrtoul(buf, 0, &value))
1821 return -EINVAL;
1822
1823 spin_lock_irqsave(hba->host->host_lock, flags);
1824 hba->hibern8_on_idle.delay_ms = value;
1825 spin_unlock_irqrestore(hba->host->host_lock, flags);
1826
1827 /* Update auto hibern8 timer value if supported */
1828 if (ufshcd_is_auto_hibern8_supported(hba) &&
1829 hba->hibern8_on_idle.is_enabled)
1830 ufshcd_set_auto_hibern8_timer(hba,
1831 hba->hibern8_on_idle.delay_ms);
1832
1833 return count;
1834}
1835
1836static ssize_t ufshcd_hibern8_on_idle_enable_show(struct device *dev,
1837 struct device_attribute *attr, char *buf)
1838{
1839 struct ufs_hba *hba = dev_get_drvdata(dev);
1840
1841 return snprintf(buf, PAGE_SIZE, "%d\n",
1842 hba->hibern8_on_idle.is_enabled);
1843}
1844
1845static ssize_t ufshcd_hibern8_on_idle_enable_store(struct device *dev,
1846 struct device_attribute *attr, const char *buf, size_t count)
1847{
1848 struct ufs_hba *hba = dev_get_drvdata(dev);
1849 unsigned long flags;
1850 u32 value;
1851
1852 if (kstrtou32(buf, 0, &value))
1853 return -EINVAL;
1854
1855 value = !!value;
1856 if (value == hba->hibern8_on_idle.is_enabled)
1857 goto out;
1858
1859 /* Update auto hibern8 timer value if supported */
1860 if (ufshcd_is_auto_hibern8_supported(hba)) {
1861 ufshcd_set_auto_hibern8_timer(hba,
1862 value ? hba->hibern8_on_idle.delay_ms : value);
1863 goto update;
1864 }
1865
1866 if (value) {
1867 /*
1868 * As clock gating work would wait for the hibern8 enter work
1869 * to finish, clocks would remain on during hibern8 enter work.
1870 */
1871 ufshcd_hold(hba, false);
1872 ufshcd_release_all(hba);
1873 } else {
1874 spin_lock_irqsave(hba->host->host_lock, flags);
1875 hba->hibern8_on_idle.active_reqs++;
1876 spin_unlock_irqrestore(hba->host->host_lock, flags);
1877 }
1878
1879update:
1880 hba->hibern8_on_idle.is_enabled = value;
1881out:
1882 return count;
1883}
1884
1885static void ufshcd_init_hibern8_on_idle(struct ufs_hba *hba)
1886{
1887 /* initialize the state variable here */
1888 hba->hibern8_on_idle.state = HIBERN8_EXITED;
1889
1890 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
1891 !ufshcd_is_auto_hibern8_supported(hba))
1892 return;
1893
1894 if (ufshcd_is_auto_hibern8_supported(hba)) {
1895 hba->hibern8_on_idle.state = AUTO_HIBERN8;
1896 /*
1897 * Disable SW hibern8 enter on idle in case
1898 * auto hibern8 is supported
1899 */
1900 hba->caps &= ~UFSHCD_CAP_HIBERN8_ENTER_ON_IDLE;
1901 } else {
1902 INIT_DELAYED_WORK(&hba->hibern8_on_idle.enter_work,
1903 ufshcd_hibern8_enter_work);
1904 INIT_WORK(&hba->hibern8_on_idle.exit_work,
1905 ufshcd_hibern8_exit_work);
1906 }
1907
1908 hba->hibern8_on_idle.delay_ms = 10;
1909 hba->hibern8_on_idle.is_enabled = true;
1910
1911 hba->hibern8_on_idle.delay_attr.show =
1912 ufshcd_hibern8_on_idle_delay_show;
1913 hba->hibern8_on_idle.delay_attr.store =
1914 ufshcd_hibern8_on_idle_delay_store;
1915 sysfs_attr_init(&hba->hibern8_on_idle.delay_attr.attr);
1916 hba->hibern8_on_idle.delay_attr.attr.name = "hibern8_on_idle_delay_ms";
1917 hba->hibern8_on_idle.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
1918 if (device_create_file(hba->dev, &hba->hibern8_on_idle.delay_attr))
1919 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_delay\n");
1920
1921 hba->hibern8_on_idle.enable_attr.show =
1922 ufshcd_hibern8_on_idle_enable_show;
1923 hba->hibern8_on_idle.enable_attr.store =
1924 ufshcd_hibern8_on_idle_enable_store;
1925 sysfs_attr_init(&hba->hibern8_on_idle.enable_attr.attr);
1926 hba->hibern8_on_idle.enable_attr.attr.name = "hibern8_on_idle_enable";
1927 hba->hibern8_on_idle.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
1928 if (device_create_file(hba->dev, &hba->hibern8_on_idle.enable_attr))
1929 dev_err(hba->dev, "Failed to create sysfs for hibern8_on_idle_enable\n");
1930}
1931
1932static void ufshcd_exit_hibern8_on_idle(struct ufs_hba *hba)
1933{
1934 if (!ufshcd_is_hibern8_on_idle_allowed(hba) &&
1935 !ufshcd_is_auto_hibern8_supported(hba))
1936 return;
1937 device_remove_file(hba->dev, &hba->hibern8_on_idle.delay_attr);
1938 device_remove_file(hba->dev, &hba->hibern8_on_idle.enable_attr);
1939}
1940
1941static void ufshcd_hold_all(struct ufs_hba *hba)
1942{
1943 ufshcd_hold(hba, false);
1944 ufshcd_hibern8_hold(hba, false);
1945}
1946
1947static void ufshcd_release_all(struct ufs_hba *hba)
1948{
1949 ufshcd_hibern8_release(hba, false);
1950 ufshcd_release(hba, false);
1951}
1952
Sahitya Tummala856b3482014-09-25 15:32:34 +03001953/* Must be called with host lock acquired */
1954static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1955{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001956 bool queue_resume_work = false;
1957
1958 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001959 return;
1960
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001961 if (!hba->clk_scaling.active_reqs++)
1962 queue_resume_work = true;
1963
1964 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1965 return;
1966
1967 if (queue_resume_work)
1968 queue_work(hba->clk_scaling.workq,
1969 &hba->clk_scaling.resume_work);
1970
1971 if (!hba->clk_scaling.window_start_t) {
1972 hba->clk_scaling.window_start_t = jiffies;
1973 hba->clk_scaling.tot_busy_t = 0;
1974 hba->clk_scaling.is_busy_started = false;
1975 }
1976
Sahitya Tummala856b3482014-09-25 15:32:34 +03001977 if (!hba->clk_scaling.is_busy_started) {
1978 hba->clk_scaling.busy_start_t = ktime_get();
1979 hba->clk_scaling.is_busy_started = true;
1980 }
1981}
1982
1983static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1984{
1985 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1986
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001987 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001988 return;
1989
1990 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1991 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1992 scaling->busy_start_t));
1993 scaling->busy_start_t = ktime_set(0, 0);
1994 scaling->is_busy_started = false;
1995 }
1996}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07001997
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301998/**
1999 * ufshcd_send_command - Send SCSI or device management commands
2000 * @hba: per adapter instance
2001 * @task_tag: Task tag of the command
2002 */
2003static inline
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002004int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302005{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002006 int ret = 0;
2007
2008 hba->lrb[task_tag].issue_time_stamp = ktime_get();
2009 hba->lrb[task_tag].complete_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002010 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302011 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302012 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002013 /* Make sure that doorbell is committed immediately */
2014 wmb();
2015 ufshcd_cond_add_cmd_trace(hba, task_tag, "send");
2016 ufshcd_update_tag_stats(hba, task_tag);
2017 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302018}
2019
2020/**
2021 * ufshcd_copy_sense_data - Copy sense data in case of check condition
2022 * @lrb - pointer to local reference block
2023 */
2024static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2025{
2026 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302027 if (lrbp->sense_buffer &&
2028 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002029 int len_to_copy;
2030
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302031 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002032 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
2033
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302034 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302035 lrbp->ucd_rsp_ptr->sr.sense_data,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002036 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302037 }
2038}
2039
2040/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302041 * ufshcd_copy_query_response() - Copy the Query Response and the data
2042 * descriptor
2043 * @hba: per adapter instance
2044 * @lrb - pointer to local reference block
2045 */
2046static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002047int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302048{
2049 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2050
Dolev Raviv68078d52013-07-30 00:35:58 +05302051 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302052
Dolev Raviv68078d52013-07-30 00:35:58 +05302053 /* Get the descriptor */
2054 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002055 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302056 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002057 u16 resp_len;
2058 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302059
2060 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002061 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302062 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002063 buf_len = be16_to_cpu(
2064 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002065 if (likely(buf_len >= resp_len)) {
2066 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2067 } else {
2068 dev_warn(hba->dev,
2069 "%s: Response size is bigger than buffer",
2070 __func__);
2071 return -EINVAL;
2072 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302073 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002074
2075 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302076}
2077
2078/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302079 * ufshcd_hba_capabilities - Read controller capabilities
2080 * @hba: per adapter instance
2081 */
2082static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
2083{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302084 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302085
2086 /* nutrs and nutmrs are 0 based values */
2087 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2088 hba->nutmrs =
2089 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2090}
2091
2092/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302093 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2094 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302095 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302096 * Return true on success, else false
2097 */
2098static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2099{
2100 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2101 return true;
2102 else
2103 return false;
2104}
2105
2106/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302107 * ufshcd_get_upmcrs - Get the power mode change request status
2108 * @hba: Pointer to adapter instance
2109 *
2110 * This function gets the UPMCRS field of HCS register
2111 * Returns value of UPMCRS field
2112 */
2113static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2114{
2115 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2116}
2117
2118/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302119 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2120 * @hba: per adapter instance
2121 * @uic_cmd: UIC command
2122 *
2123 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302124 */
2125static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302126ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302127{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302128 WARN_ON(hba->active_uic_cmd);
2129
2130 hba->active_uic_cmd = uic_cmd;
2131
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302132 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302133 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2134 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2135 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302136
2137 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302138 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302139 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302140}
2141
2142/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302143 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2144 * @hba: per adapter instance
2145 * @uic_command: UIC command
2146 *
2147 * Must be called with mutex held.
2148 * Returns 0 only if success.
2149 */
2150static int
2151ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2152{
2153 int ret;
2154 unsigned long flags;
2155
2156 if (wait_for_completion_timeout(&uic_cmd->done,
2157 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2158 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2159 else
2160 ret = -ETIMEDOUT;
2161
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002162 if (ret)
2163 ufsdbg_set_err_state(hba);
2164
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302165 spin_lock_irqsave(hba->host->host_lock, flags);
2166 hba->active_uic_cmd = NULL;
2167 spin_unlock_irqrestore(hba->host->host_lock, flags);
2168
2169 return ret;
2170}
2171
2172/**
2173 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2174 * @hba: per adapter instance
2175 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002176 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302177 *
2178 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002179 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302180 * Returns 0 only if success.
2181 */
2182static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002183__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2184 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302185{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302186 if (!ufshcd_ready_for_uic_cmd(hba)) {
2187 dev_err(hba->dev,
2188 "Controller not ready to accept UIC commands\n");
2189 return -EIO;
2190 }
2191
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002192 if (completion)
2193 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302194
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302195 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302196
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002197 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302198}
2199
2200/**
2201 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2202 * @hba: per adapter instance
2203 * @uic_cmd: UIC command
2204 *
2205 * Returns 0 only if success.
2206 */
2207static int
2208ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2209{
2210 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002211 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302212
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002213 ufshcd_hold_all(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302214 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002215 ufshcd_add_delay_before_dme_cmd(hba);
2216
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002217 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002218 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002219 spin_unlock_irqrestore(hba->host->host_lock, flags);
2220 if (!ret)
2221 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2222
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002223 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302224 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002225 ufshcd_release_all(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302226
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002227 ufsdbg_error_inject_dispatcher(hba,
2228 ERR_INJECT_UIC, 0, &ret);
2229
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302230 return ret;
2231}
2232
2233/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302234 * ufshcd_map_sg - Map scatter-gather list to prdt
2235 * @lrbp - pointer to local reference block
2236 *
2237 * Returns 0 in case of success, non-zero value in case of failure
2238 */
2239static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
2240{
2241 struct ufshcd_sg_entry *prd_table;
2242 struct scatterlist *sg;
2243 struct scsi_cmnd *cmd;
2244 int sg_segments;
2245 int i;
2246
2247 cmd = lrbp->cmd;
2248 sg_segments = scsi_dma_map(cmd);
2249 if (sg_segments < 0)
2250 return sg_segments;
2251
2252 if (sg_segments) {
2253 lrbp->utr_descriptor_ptr->prd_table_length =
2254 cpu_to_le16((u16) (sg_segments));
2255
2256 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2257
2258 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2259 prd_table[i].size =
2260 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2261 prd_table[i].base_addr =
2262 cpu_to_le32(lower_32_bits(sg->dma_address));
2263 prd_table[i].upper_addr =
2264 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002265 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302266 }
2267 } else {
2268 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2269 }
2270
2271 return 0;
2272}
2273
2274/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302275 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302276 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302277 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302278 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302279static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302280{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302281 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2282
2283 if (hba->ufs_version == UFSHCI_VERSION_10) {
2284 u32 rw;
2285 rw = set & INTERRUPT_MASK_RW_VER_10;
2286 set = rw | ((set ^ intrs) & intrs);
2287 } else {
2288 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302289 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302290
2291 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2292}
2293
2294/**
2295 * ufshcd_disable_intr - disable interrupts
2296 * @hba: per adapter instance
2297 * @intrs: interrupt bits
2298 */
2299static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2300{
2301 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2302
2303 if (hba->ufs_version == UFSHCI_VERSION_10) {
2304 u32 rw;
2305 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2306 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2307 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2308
2309 } else {
2310 set &= ~intrs;
2311 }
2312
2313 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302314}
2315
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002316static int ufshcd_prepare_crypto_utrd(struct ufs_hba *hba,
2317 struct ufshcd_lrb *lrbp)
2318{
2319 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2320 u8 cc_index = 0;
2321 bool enable = false;
2322 u64 dun = 0;
2323 int ret;
2324
2325 /*
2326 * Call vendor specific code to get crypto info for this request:
2327 * enable, crypto config. index, DUN.
2328 * If bypass is set, don't bother setting the other fields.
2329 */
2330 ret = ufshcd_vops_crypto_req_setup(hba, lrbp, &cc_index, &enable, &dun);
2331 if (ret) {
2332 if (ret != -EAGAIN) {
2333 dev_err(hba->dev,
2334 "%s: failed to setup crypto request (%d)\n",
2335 __func__, ret);
2336 }
2337
2338 return ret;
2339 }
2340
2341 if (!enable)
2342 goto out;
2343
2344 req_desc->header.dword_0 |= cc_index | UTRD_CRYPTO_ENABLE;
2345 if (lrbp->cmd->request && lrbp->cmd->request->bio)
2346 dun = lrbp->cmd->request->bio->bi_iter.bi_sector;
2347
2348 req_desc->header.dword_1 = (u32)(dun & 0xFFFFFFFF);
2349 req_desc->header.dword_3 = (u32)((dun >> 32) & 0xFFFFFFFF);
2350out:
2351 return 0;
2352}
2353
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302354/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302355 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2356 * descriptor according to request
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002357 * @hba: per adapter instance
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302358 * @lrbp: pointer to local reference block
2359 * @upiu_flags: flags required in the header
2360 * @cmd_dir: requests data direction
2361 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002362static int ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba,
2363 struct ufshcd_lrb *lrbp, u32 *upiu_flags,
2364 enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302365{
2366 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2367 u32 data_direction;
2368 u32 dword_0;
2369
2370 if (cmd_dir == DMA_FROM_DEVICE) {
2371 data_direction = UTP_DEVICE_TO_HOST;
2372 *upiu_flags = UPIU_CMD_FLAGS_READ;
2373 } else if (cmd_dir == DMA_TO_DEVICE) {
2374 data_direction = UTP_HOST_TO_DEVICE;
2375 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2376 } else {
2377 data_direction = UTP_NO_DATA_TRANSFER;
2378 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2379 }
2380
2381 dword_0 = data_direction | (lrbp->command_type
2382 << UPIU_COMMAND_TYPE_OFFSET);
2383 if (lrbp->intr_cmd)
2384 dword_0 |= UTP_REQ_DESC_INT_CMD;
2385
2386 /* Transfer request descriptor header fields */
2387 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002388 /* dword_1 is reserved, hence it is set to 0 */
2389 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302390 /*
2391 * assigning invalid value for command status. Controller
2392 * updates OCS on command completion, with the command
2393 * status
2394 */
2395 req_desc->header.dword_2 =
2396 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002397 /* dword_3 is reserved, hence it is set to 0 */
2398 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002399
2400 req_desc->prd_table_length = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002401
2402 if (ufshcd_is_crypto_supported(hba))
2403 return ufshcd_prepare_crypto_utrd(hba, lrbp);
2404
2405 return 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302406}
2407
2408/**
2409 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2410 * for scsi commands
2411 * @lrbp - local reference block pointer
2412 * @upiu_flags - flags
2413 */
2414static
2415void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2416{
2417 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002418 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302419
2420 /* command descriptor fields */
2421 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2422 UPIU_TRANSACTION_COMMAND, upiu_flags,
2423 lrbp->lun, lrbp->task_tag);
2424 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2425 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2426
2427 /* Total EHS length and Data segment length will be zero */
2428 ucd_req_ptr->header.dword_2 = 0;
2429
2430 ucd_req_ptr->sc.exp_data_transfer_len =
2431 cpu_to_be32(lrbp->cmd->sdb.length);
2432
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002433 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002434 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002435 if (cdb_len < MAX_CDB_SIZE)
2436 memset(ucd_req_ptr->sc.cdb + cdb_len, 0,
2437 (MAX_CDB_SIZE - cdb_len));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002438 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302439}
2440
Dolev Raviv68078d52013-07-30 00:35:58 +05302441/**
2442 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2443 * for query requsts
2444 * @hba: UFS hba
2445 * @lrbp: local reference block pointer
2446 * @upiu_flags: flags
2447 */
2448static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2449 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2450{
2451 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2452 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302453 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302454 u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2455
2456 /* Query request header */
2457 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2458 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2459 lrbp->lun, lrbp->task_tag);
2460 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2461 0, query->request.query_func, 0, 0);
2462
2463 /* Data segment length */
2464 ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
2465 0, 0, len >> 8, (u8)len);
2466
2467 /* Copy the Query Request buffer as is */
2468 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2469 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302470
2471 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002472 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2473 memcpy(descp, query->descriptor, len);
2474
Yaniv Gardi51047262016-02-01 15:02:38 +02002475 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302476}
2477
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302478static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2479{
2480 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2481
2482 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2483
2484 /* command descriptor fields */
2485 ucd_req_ptr->header.dword_0 =
2486 UPIU_HEADER_DWORD(
2487 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002488 /* clear rest of the fields of basic header */
2489 ucd_req_ptr->header.dword_1 = 0;
2490 ucd_req_ptr->header.dword_2 = 0;
2491
2492 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302493}
2494
2495/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002496 * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302497 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302498 * @lrb - pointer to local reference block
2499 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002500static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302501{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302502 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302503 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302504
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002505 switch (lrbp->command_type) {
2506 case UTP_CMD_TYPE_SCSI:
2507 if (likely(lrbp->cmd)) {
2508 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp,
2509 &upiu_flags, lrbp->cmd->sc_data_direction);
2510 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2511 } else {
2512 ret = -EINVAL;
2513 }
2514 break;
2515 case UTP_CMD_TYPE_DEV_MANAGE:
2516 ret = ufshcd_prepare_req_desc_hdr(hba, lrbp, &upiu_flags,
2517 DMA_NONE);
2518 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2519 ufshcd_prepare_utp_query_req_upiu(
2520 hba, lrbp, upiu_flags);
2521 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2522 ufshcd_prepare_utp_nop_upiu(lrbp);
2523 else
2524 ret = -EINVAL;
2525 break;
2526 case UTP_CMD_TYPE_UFS:
2527 /* For UFS native command implementation */
2528 ret = -ENOTSUPP;
2529 dev_err(hba->dev, "%s: UFS native command are not supported\n",
2530 __func__);
2531 break;
2532 default:
2533 ret = -ENOTSUPP;
2534 dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
2535 __func__, lrbp->command_type);
2536 break;
2537 } /* end of switch */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302538
2539 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302540}
2541
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002542/*
2543 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
2544 * @scsi_lun: scsi LUN id
2545 *
2546 * Returns UPIU LUN id
2547 */
2548static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
2549{
2550 if (scsi_is_wlun(scsi_lun))
2551 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
2552 | UFS_UPIU_WLUN_ID;
2553 else
2554 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
2555}
2556
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302557/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002558 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2559 * @scsi_lun: UPIU W-LUN id
2560 *
2561 * Returns SCSI W-LUN id
2562 */
2563static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2564{
2565 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2566}
2567
2568/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302569 * ufshcd_queuecommand - main entry point for SCSI requests
2570 * @cmd: command from SCSI Midlayer
2571 * @done: call back function
2572 *
2573 * Returns 0 for success, non-zero in case of failure
2574 */
2575static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2576{
2577 struct ufshcd_lrb *lrbp;
2578 struct ufs_hba *hba;
2579 unsigned long flags;
2580 int tag;
2581 int err = 0;
2582
2583 hba = shost_priv(host);
2584
2585 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002586 if (!ufshcd_valid_tag(hba, tag)) {
2587 dev_err(hba->dev,
2588 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2589 __func__, tag, cmd, cmd->request);
2590 BUG();
2591 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302592
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002593 if (!down_read_trylock(&hba->clk_scaling_lock))
2594 return SCSI_MLQUEUE_HOST_BUSY;
2595
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302596 spin_lock_irqsave(hba->host->host_lock, flags);
2597 switch (hba->ufshcd_state) {
2598 case UFSHCD_STATE_OPERATIONAL:
2599 break;
2600 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302601 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302602 goto out_unlock;
2603 case UFSHCD_STATE_ERROR:
2604 set_host_byte(cmd, DID_ERROR);
2605 cmd->scsi_done(cmd);
2606 goto out_unlock;
2607 default:
2608 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2609 __func__, hba->ufshcd_state);
2610 set_host_byte(cmd, DID_BAD_TARGET);
2611 cmd->scsi_done(cmd);
2612 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302613 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002614
2615 /* if error handling is in progress, don't issue commands */
2616 if (ufshcd_eh_in_progress(hba)) {
2617 set_host_byte(cmd, DID_ERROR);
2618 cmd->scsi_done(cmd);
2619 goto out_unlock;
2620 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302621 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302622
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002623 hba->req_abort_count = 0;
2624
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302625 /* acquire the tag to make sure device cmds don't use it */
2626 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2627 /*
2628 * Dev manage command in progress, requeue the command.
2629 * Requeuing the command helps in cases where the request *may*
2630 * find different tag instead of waiting for dev manage command
2631 * completion.
2632 */
2633 err = SCSI_MLQUEUE_HOST_BUSY;
2634 goto out;
2635 }
2636
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002637 err = ufshcd_hold(hba, true);
2638 if (err) {
2639 err = SCSI_MLQUEUE_HOST_BUSY;
2640 clear_bit_unlock(tag, &hba->lrb_in_use);
2641 goto out;
2642 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002643 if (ufshcd_is_clkgating_allowed(hba))
2644 WARN_ON(hba->clk_gating.state != CLKS_ON);
2645
2646 err = ufshcd_hibern8_hold(hba, true);
2647 if (err) {
2648 clear_bit_unlock(tag, &hba->lrb_in_use);
2649 err = SCSI_MLQUEUE_HOST_BUSY;
2650 ufshcd_release(hba, true);
2651 goto out;
2652 }
2653 if (ufshcd_is_hibern8_on_idle_allowed(hba))
2654 WARN_ON(hba->hibern8_on_idle.state != HIBERN8_EXITED);
2655
2656 /* Vote PM QoS for the request */
2657 ufshcd_vops_pm_qos_req_start(hba, cmd->request);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002658
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302659 lrbp = &hba->lrb[tag];
2660
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302661 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302662 lrbp->cmd = cmd;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002663 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302664 lrbp->sense_buffer = cmd->sense_buffer;
2665 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002666 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002667 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002668 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2669 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302670
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002671 /* form UPIU before issuing the command */
2672 err = ufshcd_compose_upiu(hba, lrbp);
2673 if (err) {
2674 if (err != -EAGAIN)
2675 dev_err(hba->dev,
2676 "%s: failed to compose upiu %d\n",
2677 __func__, err);
2678
2679 lrbp->cmd = NULL;
2680 clear_bit_unlock(tag, &hba->lrb_in_use);
2681 ufshcd_release_all(hba);
2682 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2683 goto out;
2684 }
Joao Pinto300bb132016-05-11 12:21:27 +01002685
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302686 err = ufshcd_map_sg(lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302687 if (err) {
2688 lrbp->cmd = NULL;
2689 clear_bit_unlock(tag, &hba->lrb_in_use);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002690 ufshcd_release_all(hba);
2691 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302692 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302693 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302694
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002695 err = ufshcd_vops_crypto_engine_cfg_start(hba, tag);
2696 if (err) {
2697 if (err != -EAGAIN)
2698 dev_err(hba->dev,
2699 "%s: failed to configure crypto engine %d\n",
2700 __func__, err);
2701
2702 scsi_dma_unmap(lrbp->cmd);
2703 lrbp->cmd = NULL;
2704 clear_bit_unlock(tag, &hba->lrb_in_use);
2705 ufshcd_release_all(hba);
2706 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2707
2708 goto out;
2709 }
2710
2711 /* Make sure descriptors are ready before ringing the doorbell */
2712 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302713 /* issue command to the controller */
2714 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002715
2716 err = ufshcd_send_command(hba, tag);
2717 if (err) {
2718 spin_unlock_irqrestore(hba->host->host_lock, flags);
2719 scsi_dma_unmap(lrbp->cmd);
2720 lrbp->cmd = NULL;
2721 clear_bit_unlock(tag, &hba->lrb_in_use);
2722 ufshcd_release_all(hba);
2723 ufshcd_vops_pm_qos_req_end(hba, cmd->request, true);
2724 ufshcd_vops_crypto_engine_cfg_end(hba, lrbp, cmd->request);
2725 dev_err(hba->dev, "%s: failed sending command, %d\n",
2726 __func__, err);
2727 err = DID_ERROR;
2728 goto out;
2729 }
2730
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302731out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302732 spin_unlock_irqrestore(hba->host->host_lock, flags);
2733out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002734 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302735 return err;
2736}
2737
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302738static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2739 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2740{
2741 lrbp->cmd = NULL;
2742 lrbp->sense_bufflen = 0;
2743 lrbp->sense_buffer = NULL;
2744 lrbp->task_tag = tag;
2745 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002746 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302747 lrbp->intr_cmd = true; /* No interrupt aggregation */
2748 hba->dev_cmd.type = cmd_type;
2749
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002750 return ufshcd_compose_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302751}
2752
2753static int
2754ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2755{
2756 int err = 0;
2757 unsigned long flags;
2758 u32 mask = 1 << tag;
2759
2760 /* clear outstanding transaction before retry */
2761 spin_lock_irqsave(hba->host->host_lock, flags);
2762 ufshcd_utrl_clear(hba, tag);
2763 spin_unlock_irqrestore(hba->host->host_lock, flags);
2764
2765 /*
2766 * wait for for h/w to clear corresponding bit in door-bell.
2767 * max. wait is 1 sec.
2768 */
2769 err = ufshcd_wait_for_register(hba,
2770 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002771 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302772
2773 return err;
2774}
2775
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002776static int
2777ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2778{
2779 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2780
2781 /* Get the UPIU response */
2782 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2783 UPIU_RSP_CODE_OFFSET;
2784 return query_res->response;
2785}
2786
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302787/**
2788 * ufshcd_dev_cmd_completion() - handles device management command responses
2789 * @hba: per adapter instance
2790 * @lrbp: pointer to local reference block
2791 */
2792static int
2793ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2794{
2795 int resp;
2796 int err = 0;
2797
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002798 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302799 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2800
2801 switch (resp) {
2802 case UPIU_TRANSACTION_NOP_IN:
2803 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2804 err = -EINVAL;
2805 dev_err(hba->dev, "%s: unexpected response %x\n",
2806 __func__, resp);
2807 }
2808 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302809 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002810 err = ufshcd_check_query_response(hba, lrbp);
2811 if (!err)
2812 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302813 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302814 case UPIU_TRANSACTION_REJECT_UPIU:
2815 /* TODO: handle Reject UPIU Response */
2816 err = -EPERM;
2817 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2818 __func__);
2819 break;
2820 default:
2821 err = -EINVAL;
2822 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2823 __func__, resp);
2824 break;
2825 }
2826
2827 return err;
2828}
2829
2830static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2831 struct ufshcd_lrb *lrbp, int max_timeout)
2832{
2833 int err = 0;
2834 unsigned long time_left;
2835 unsigned long flags;
2836
2837 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2838 msecs_to_jiffies(max_timeout));
2839
2840 spin_lock_irqsave(hba->host->host_lock, flags);
2841 hba->dev_cmd.complete = NULL;
2842 if (likely(time_left)) {
2843 err = ufshcd_get_tr_ocs(lrbp);
2844 if (!err)
2845 err = ufshcd_dev_cmd_completion(hba, lrbp);
2846 }
2847 spin_unlock_irqrestore(hba->host->host_lock, flags);
2848
2849 if (!time_left) {
2850 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002851 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2852 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302853 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002854 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302855 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002856 /*
2857 * in case of an error, after clearing the doorbell,
2858 * we also need to clear the outstanding_request
2859 * field in hba
2860 */
2861 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302862 }
2863
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002864 if (err)
2865 ufsdbg_set_err_state(hba);
2866
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302867 return err;
2868}
2869
2870/**
2871 * ufshcd_get_dev_cmd_tag - Get device management command tag
2872 * @hba: per-adapter instance
2873 * @tag: pointer to variable with available slot value
2874 *
2875 * Get a free slot and lock it until device management command
2876 * completes.
2877 *
2878 * Returns false if free slot is unavailable for locking, else
2879 * return true with tag value in @tag.
2880 */
2881static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2882{
2883 int tag;
2884 bool ret = false;
2885 unsigned long tmp;
2886
2887 if (!tag_out)
2888 goto out;
2889
2890 do {
2891 tmp = ~hba->lrb_in_use;
2892 tag = find_last_bit(&tmp, hba->nutrs);
2893 if (tag >= hba->nutrs)
2894 goto out;
2895 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2896
2897 *tag_out = tag;
2898 ret = true;
2899out:
2900 return ret;
2901}
2902
2903static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2904{
2905 clear_bit_unlock(tag, &hba->lrb_in_use);
2906}
2907
2908/**
2909 * ufshcd_exec_dev_cmd - API for sending device management requests
2910 * @hba - UFS hba
2911 * @cmd_type - specifies the type (NOP, Query...)
2912 * @timeout - time in seconds
2913 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302914 * NOTE: Since there is only one available tag for device management commands,
2915 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302916 */
2917static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2918 enum dev_cmd_type cmd_type, int timeout)
2919{
2920 struct ufshcd_lrb *lrbp;
2921 int err;
2922 int tag;
2923 struct completion wait;
2924 unsigned long flags;
2925
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002926 down_read(&hba->clk_scaling_lock);
2927
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302928 /*
2929 * Get free slot, sleep if slots are unavailable.
2930 * Even though we use wait_event() which sleeps indefinitely,
2931 * the maximum wait time is bounded by SCSI request timeout.
2932 */
2933 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2934
2935 init_completion(&wait);
2936 lrbp = &hba->lrb[tag];
2937 WARN_ON(lrbp->cmd);
2938 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2939 if (unlikely(err))
2940 goto out_put_tag;
2941
2942 hba->dev_cmd.complete = &wait;
2943
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002944 /* Make sure descriptors are ready before ringing the doorbell */
2945 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302946 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002947 err = ufshcd_send_command(hba, tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302948 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002949 if (err) {
2950 dev_err(hba->dev, "%s: failed sending command, %d\n",
2951 __func__, err);
2952 goto out_put_tag;
2953 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302954 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2955
2956out_put_tag:
2957 ufshcd_put_dev_cmd_tag(hba, tag);
2958 wake_up(&hba->dev_cmd.tag_wq);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002959 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302960 return err;
2961}
2962
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302963/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002964 * ufshcd_init_query() - init the query response and request parameters
2965 * @hba: per-adapter instance
2966 * @request: address of the request pointer to be initialized
2967 * @response: address of the response pointer to be initialized
2968 * @opcode: operation to perform
2969 * @idn: flag idn to access
2970 * @index: LU number to access
2971 * @selector: query/flag/descriptor further identification
2972 */
2973static inline void ufshcd_init_query(struct ufs_hba *hba,
2974 struct ufs_query_req **request, struct ufs_query_res **response,
2975 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2976{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002977 int idn_t = (int)idn;
2978
2979 ufsdbg_error_inject_dispatcher(hba,
2980 ERR_INJECT_QUERY, idn_t, (int *)&idn_t);
2981 idn = idn_t;
2982
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002983 *request = &hba->dev_cmd.query.request;
2984 *response = &hba->dev_cmd.query.response;
2985 memset(*request, 0, sizeof(struct ufs_query_req));
2986 memset(*response, 0, sizeof(struct ufs_query_res));
2987 (*request)->upiu_req.opcode = opcode;
2988 (*request)->upiu_req.idn = idn;
2989 (*request)->upiu_req.index = index;
2990 (*request)->upiu_req.selector = selector;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07002991
2992 ufshcd_update_query_stats(hba, opcode, idn);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002993}
2994
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002995static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2996 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2997{
2998 int ret;
2999 int retries;
3000
3001 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
3002 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
3003 if (ret)
3004 dev_dbg(hba->dev,
3005 "%s: failed with error %d, retries %d\n",
3006 __func__, ret, retries);
3007 else
3008 break;
3009 }
3010
3011 if (ret)
3012 dev_err(hba->dev,
3013 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3014 __func__, opcode, idn, ret, retries);
3015 return ret;
3016}
3017
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003018/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303019 * ufshcd_query_flag() - API function for sending flag query requests
3020 * hba: per-adapter instance
3021 * query_opcode: flag query to perform
3022 * idn: flag idn to access
3023 * flag_res: the flag value after the query request completes
3024 *
3025 * Returns 0 for success, non-zero in case of failure
3026 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003027int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05303028 enum flag_idn idn, bool *flag_res)
3029{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003030 struct ufs_query_req *request = NULL;
3031 struct ufs_query_res *response = NULL;
3032 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003033 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05303034
3035 BUG_ON(!hba);
3036
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003037 ufshcd_hold_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303038 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003039 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3040 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05303041
3042 switch (opcode) {
3043 case UPIU_QUERY_OPCODE_SET_FLAG:
3044 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3045 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3046 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3047 break;
3048 case UPIU_QUERY_OPCODE_READ_FLAG:
3049 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3050 if (!flag_res) {
3051 /* No dummy reads */
3052 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3053 __func__);
3054 err = -EINVAL;
3055 goto out_unlock;
3056 }
3057 break;
3058 default:
3059 dev_err(hba->dev,
3060 "%s: Expected query flag opcode but got = %d\n",
3061 __func__, opcode);
3062 err = -EINVAL;
3063 goto out_unlock;
3064 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303065
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003066 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303067
3068 if (err) {
3069 dev_err(hba->dev,
3070 "%s: Sending flag query for idn %d failed, err = %d\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003071 __func__, request->upiu_req.idn, err);
Dolev Raviv68078d52013-07-30 00:35:58 +05303072 goto out_unlock;
3073 }
3074
3075 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303076 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303077 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3078
3079out_unlock:
3080 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003081 ufshcd_release_all(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303082 return err;
3083}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003084EXPORT_SYMBOL(ufshcd_query_flag);
Dolev Raviv68078d52013-07-30 00:35:58 +05303085
3086/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303087 * ufshcd_query_attr - API function for sending attribute requests
3088 * hba: per-adapter instance
3089 * opcode: attribute opcode
3090 * idn: attribute idn to access
3091 * index: index field
3092 * selector: selector field
3093 * attr_val: the attribute value after the query request completes
3094 *
3095 * Returns 0 for success, non-zero in case of failure
3096*/
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003097int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303098 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3099{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003100 struct ufs_query_req *request = NULL;
3101 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303102 int err;
3103
3104 BUG_ON(!hba);
3105
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003106 ufshcd_hold_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303107 if (!attr_val) {
3108 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3109 __func__, opcode);
3110 err = -EINVAL;
3111 goto out;
3112 }
3113
3114 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003115 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3116 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303117
3118 switch (opcode) {
3119 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3120 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303121 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303122 break;
3123 case UPIU_QUERY_OPCODE_READ_ATTR:
3124 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3125 break;
3126 default:
3127 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3128 __func__, opcode);
3129 err = -EINVAL;
3130 goto out_unlock;
3131 }
3132
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003133 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303134
3135 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003136 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3137 __func__, opcode,
3138 request->upiu_req.idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303139 goto out_unlock;
3140 }
3141
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303142 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303143
3144out_unlock:
3145 mutex_unlock(&hba->dev_cmd.lock);
3146out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003147 ufshcd_release_all(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303148 return err;
3149}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003150EXPORT_SYMBOL(ufshcd_query_attr);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303151
3152/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003153 * ufshcd_query_attr_retry() - API function for sending query
3154 * attribute with retries
3155 * @hba: per-adapter instance
3156 * @opcode: attribute opcode
3157 * @idn: attribute idn to access
3158 * @index: index field
3159 * @selector: selector field
3160 * @attr_val: the attribute value after the query request
3161 * completes
3162 *
3163 * Returns 0 for success, non-zero in case of failure
3164*/
3165static int ufshcd_query_attr_retry(struct ufs_hba *hba,
3166 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3167 u32 *attr_val)
3168{
3169 int ret = 0;
3170 u32 retries;
3171
3172 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3173 ret = ufshcd_query_attr(hba, opcode, idn, index,
3174 selector, attr_val);
3175 if (ret)
3176 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3177 __func__, ret, retries);
3178 else
3179 break;
3180 }
3181
3182 if (ret)
3183 dev_err(hba->dev,
3184 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003185 __func__, idn, ret, retries);
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003186 return ret;
3187}
3188
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003189static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003190 enum query_opcode opcode, enum desc_idn idn, u8 index,
3191 u8 selector, u8 *desc_buf, int *buf_len)
3192{
3193 struct ufs_query_req *request = NULL;
3194 struct ufs_query_res *response = NULL;
3195 int err;
3196
3197 BUG_ON(!hba);
3198
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003199 ufshcd_hold_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003200 if (!desc_buf) {
3201 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3202 __func__, opcode);
3203 err = -EINVAL;
3204 goto out;
3205 }
3206
3207 if (*buf_len <= QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3208 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3209 __func__, *buf_len);
3210 err = -EINVAL;
3211 goto out;
3212 }
3213
3214 mutex_lock(&hba->dev_cmd.lock);
3215 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3216 selector);
3217 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003218 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003219
3220 switch (opcode) {
3221 case UPIU_QUERY_OPCODE_WRITE_DESC:
3222 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3223 break;
3224 case UPIU_QUERY_OPCODE_READ_DESC:
3225 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3226 break;
3227 default:
3228 dev_err(hba->dev,
3229 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3230 __func__, opcode);
3231 err = -EINVAL;
3232 goto out_unlock;
3233 }
3234
3235 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3236
3237 if (err) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003238 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3239 __func__, opcode,
3240 request->upiu_req.idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003241 goto out_unlock;
3242 }
3243
3244 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003245 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003246
3247out_unlock:
3248 mutex_unlock(&hba->dev_cmd.lock);
3249out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003250 ufshcd_release_all(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003251 return err;
3252}
3253
3254/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003255 * ufshcd_query_descriptor - API function for sending descriptor requests
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003256 * hba: per-adapter instance
3257 * opcode: attribute opcode
3258 * idn: attribute idn to access
3259 * index: index field
3260 * selector: selector field
3261 * desc_buf: the buffer that contains the descriptor
3262 * buf_len: length parameter passed to the device
3263 *
3264 * Returns 0 for success, non-zero in case of failure.
3265 * The buf_len parameter will contain, on return, the length parameter
3266 * received on the response.
3267 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003268int ufshcd_query_descriptor(struct ufs_hba *hba,
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003269 enum query_opcode opcode, enum desc_idn idn, u8 index,
3270 u8 selector, u8 *desc_buf, int *buf_len)
3271{
3272 int err;
3273 int retries;
3274
3275 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3276 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3277 selector, desc_buf, buf_len);
3278 if (!err || err == -EINVAL)
3279 break;
3280 }
3281
3282 return err;
3283}
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003284EXPORT_SYMBOL(ufshcd_query_descriptor);
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003285
3286/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003287 * ufshcd_read_desc_param - read the specified descriptor parameter
3288 * @hba: Pointer to adapter instance
3289 * @desc_id: descriptor idn value
3290 * @desc_index: descriptor index
3291 * @param_offset: offset of the parameter to read
3292 * @param_read_buf: pointer to buffer where parameter would be read
3293 * @param_size: sizeof(param_read_buf)
3294 *
3295 * Return 0 in case of success, non-zero otherwise
3296 */
3297static int ufshcd_read_desc_param(struct ufs_hba *hba,
3298 enum desc_idn desc_id,
3299 int desc_index,
3300 u32 param_offset,
3301 u8 *param_read_buf,
3302 u32 param_size)
3303{
3304 int ret;
3305 u8 *desc_buf;
3306 u32 buff_len;
3307 bool is_kmalloc = true;
3308
3309 /* safety checks */
3310 if (desc_id >= QUERY_DESC_IDN_MAX)
3311 return -EINVAL;
3312
3313 buff_len = ufs_query_desc_max_size[desc_id];
3314 if ((param_offset + param_size) > buff_len)
3315 return -EINVAL;
3316
3317 if (!param_offset && (param_size == buff_len)) {
3318 /* memory space already available to hold full descriptor */
3319 desc_buf = param_read_buf;
3320 is_kmalloc = false;
3321 } else {
3322 /* allocate memory to hold full descriptor */
3323 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3324 if (!desc_buf)
3325 return -ENOMEM;
3326 }
3327
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003328 ret = ufshcd_query_descriptor(hba, UPIU_QUERY_OPCODE_READ_DESC,
3329 desc_id, desc_index, 0, desc_buf,
3330 &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003331
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003332 if (ret) {
3333 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3334 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003335
3336 goto out;
3337 }
3338
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003339 /* Sanity check */
3340 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3341 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3342 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3343 ret = -EINVAL;
3344 goto out;
3345 }
3346
3347 /*
3348 * While reading variable size descriptors (like string descriptor),
3349 * some UFS devices may report the "LENGTH" (field in "Transaction
3350 * Specific fields" of Query Response UPIU) same as what was requested
3351 * in Query Request UPIU instead of reporting the actual size of the
3352 * variable size descriptor.
3353 * Although it's safe to ignore the "LENGTH" field for variable size
3354 * descriptors as we can always derive the length of the descriptor from
3355 * the descriptor header fields. Hence this change impose the length
3356 * match check only for fixed size descriptors (for which we always
3357 * request the correct size as part of Query Request UPIU).
3358 */
3359 if ((desc_id != QUERY_DESC_IDN_STRING) &&
3360 (buff_len != desc_buf[QUERY_DESC_LENGTH_OFFSET])) {
3361 dev_err(hba->dev, "%s: desc_buf length mismatch: buff_len %d, buff_len(desc_header) %d",
3362 __func__, buff_len, desc_buf[QUERY_DESC_LENGTH_OFFSET]);
3363 ret = -EINVAL;
3364 goto out;
3365 }
3366
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003367 if (is_kmalloc)
3368 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3369out:
3370 if (is_kmalloc)
3371 kfree(desc_buf);
3372 return ret;
3373}
3374
3375static inline int ufshcd_read_desc(struct ufs_hba *hba,
3376 enum desc_idn desc_id,
3377 int desc_index,
3378 u8 *buf,
3379 u32 size)
3380{
3381 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3382}
3383
3384static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3385 u8 *buf,
3386 u32 size)
3387{
3388 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3389}
3390
Yaniv Gardib573d482016-03-10 17:37:09 +02003391int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3392{
3393 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3394}
Yaniv Gardib573d482016-03-10 17:37:09 +02003395
3396/**
3397 * ufshcd_read_string_desc - read string descriptor
3398 * @hba: pointer to adapter instance
3399 * @desc_index: descriptor index
3400 * @buf: pointer to buffer where descriptor would be read
3401 * @size: size of buf
3402 * @ascii: if true convert from unicode to ascii characters
3403 *
3404 * Return 0 in case of success, non-zero otherwise
3405 */
3406int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
3407 u32 size, bool ascii)
3408{
3409 int err = 0;
3410
3411 err = ufshcd_read_desc(hba,
3412 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3413
3414 if (err) {
3415 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3416 __func__, QUERY_REQ_RETRIES, err);
3417 goto out;
3418 }
3419
3420 if (ascii) {
3421 int desc_len;
3422 int ascii_len;
3423 int i;
3424 char *buff_ascii;
3425
3426 desc_len = buf[0];
3427 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3428 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3429 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3430 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3431 __func__);
3432 err = -ENOMEM;
3433 goto out;
3434 }
3435
3436 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3437 if (!buff_ascii) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003438 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
3439 __func__, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003440 err = -ENOMEM;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003441 goto out_free_buff;
Yaniv Gardib573d482016-03-10 17:37:09 +02003442 }
3443
3444 /*
3445 * the descriptor contains string in UTF16 format
3446 * we need to convert to utf-8 so it can be displayed
3447 */
3448 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3449 desc_len - QUERY_DESC_HDR_SIZE,
3450 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3451
3452 /* replace non-printable or non-ASCII characters with spaces */
3453 for (i = 0; i < ascii_len; i++)
3454 ufshcd_remove_non_printable(&buff_ascii[i]);
3455
3456 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3457 size - QUERY_DESC_HDR_SIZE);
3458 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3459 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003460out_free_buff:
Yaniv Gardib573d482016-03-10 17:37:09 +02003461 kfree(buff_ascii);
3462 }
3463out:
3464 return err;
3465}
Yaniv Gardib573d482016-03-10 17:37:09 +02003466
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003467/**
3468 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3469 * @hba: Pointer to adapter instance
3470 * @lun: lun id
3471 * @param_offset: offset of the parameter to read
3472 * @param_read_buf: pointer to buffer where parameter would be read
3473 * @param_size: sizeof(param_read_buf)
3474 *
3475 * Return 0 in case of success, non-zero otherwise
3476 */
3477static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3478 int lun,
3479 enum unit_desc_param param_offset,
3480 u8 *param_read_buf,
3481 u32 param_size)
3482{
3483 /*
3484 * Unit descriptors are only available for general purpose LUs (LUN id
3485 * from 0 to 7) and RPMB Well known LU.
3486 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003487 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003488 return -EOPNOTSUPP;
3489
3490 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3491 param_offset, param_read_buf, param_size);
3492}
3493
3494/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303495 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3496 * @hba: per adapter instance
3497 *
3498 * 1. Allocate DMA memory for Command Descriptor array
3499 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3500 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3501 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3502 * (UTMRDL)
3503 * 4. Allocate memory for local reference block(lrb).
3504 *
3505 * Returns 0 for success, non-zero in case of failure
3506 */
3507static int ufshcd_memory_alloc(struct ufs_hba *hba)
3508{
3509 size_t utmrdl_size, utrdl_size, ucdl_size;
3510
3511 /* Allocate memory for UTP command descriptors */
3512 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003513 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3514 ucdl_size,
3515 &hba->ucdl_dma_addr,
3516 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303517
3518 /*
3519 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3520 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3521 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3522 * be aligned to 128 bytes as well
3523 */
3524 if (!hba->ucdl_base_addr ||
3525 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303526 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303527 "Command Descriptor Memory allocation failed\n");
3528 goto out;
3529 }
3530
3531 /*
3532 * Allocate memory for UTP Transfer descriptors
3533 * UFSHCI requires 1024 byte alignment of UTRD
3534 */
3535 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003536 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3537 utrdl_size,
3538 &hba->utrdl_dma_addr,
3539 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303540 if (!hba->utrdl_base_addr ||
3541 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303542 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303543 "Transfer Descriptor Memory allocation failed\n");
3544 goto out;
3545 }
3546
3547 /*
3548 * Allocate memory for UTP Task Management descriptors
3549 * UFSHCI requires 1024 byte alignment of UTMRD
3550 */
3551 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003552 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3553 utmrdl_size,
3554 &hba->utmrdl_dma_addr,
3555 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303556 if (!hba->utmrdl_base_addr ||
3557 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303558 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303559 "Task Management Descriptor Memory allocation failed\n");
3560 goto out;
3561 }
3562
3563 /* Allocate memory for local reference block */
Seungwon Jeon2953f852013-06-27 13:31:54 +09003564 hba->lrb = devm_kzalloc(hba->dev,
3565 hba->nutrs * sizeof(struct ufshcd_lrb),
3566 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303567 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303568 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303569 goto out;
3570 }
3571 return 0;
3572out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303573 return -ENOMEM;
3574}
3575
3576/**
3577 * ufshcd_host_memory_configure - configure local reference block with
3578 * memory offsets
3579 * @hba: per adapter instance
3580 *
3581 * Configure Host memory space
3582 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3583 * address.
3584 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3585 * and PRDT offset.
3586 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3587 * into local reference block.
3588 */
3589static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3590{
3591 struct utp_transfer_cmd_desc *cmd_descp;
3592 struct utp_transfer_req_desc *utrdlp;
3593 dma_addr_t cmd_desc_dma_addr;
3594 dma_addr_t cmd_desc_element_addr;
3595 u16 response_offset;
3596 u16 prdt_offset;
3597 int cmd_desc_size;
3598 int i;
3599
3600 utrdlp = hba->utrdl_base_addr;
3601 cmd_descp = hba->ucdl_base_addr;
3602
3603 response_offset =
3604 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3605 prdt_offset =
3606 offsetof(struct utp_transfer_cmd_desc, prd_table);
3607
3608 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3609 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3610
3611 for (i = 0; i < hba->nutrs; i++) {
3612 /* Configure UTRD with command descriptor base address */
3613 cmd_desc_element_addr =
3614 (cmd_desc_dma_addr + (cmd_desc_size * i));
3615 utrdlp[i].command_desc_base_addr_lo =
3616 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3617 utrdlp[i].command_desc_base_addr_hi =
3618 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3619
3620 /* Response upiu and prdt offset should be in double words */
3621 utrdlp[i].response_upiu_offset =
3622 cpu_to_le16((response_offset >> 2));
3623 utrdlp[i].prd_table_offset =
3624 cpu_to_le16((prdt_offset >> 2));
3625 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303626 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303627
3628 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003629 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3630 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303631 hba->lrb[i].ucd_req_ptr =
3632 (struct utp_upiu_req *)(cmd_descp + i);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003633 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303634 hba->lrb[i].ucd_rsp_ptr =
3635 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003636 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3637 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303638 hba->lrb[i].ucd_prdt_ptr =
3639 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003640 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3641 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303642 }
3643}
3644
3645/**
3646 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3647 * @hba: per adapter instance
3648 *
3649 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3650 * in order to initialize the Unipro link startup procedure.
3651 * Once the Unipro links are up, the device connected to the controller
3652 * is detected.
3653 *
3654 * Returns 0 on success, non-zero value on failure
3655 */
3656static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3657{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303658 struct uic_command uic_cmd = {0};
3659 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303660
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303661 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3662
3663 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3664 if (ret)
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003665 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303666 "dme-link-startup: error code %d\n", ret);
3667 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303668}
3669
Yaniv Gardicad2e032015-03-31 17:37:14 +03003670static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3671{
3672 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3673 unsigned long min_sleep_time_us;
3674
3675 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3676 return;
3677
3678 /*
3679 * last_dme_cmd_tstamp will be 0 only for 1st call to
3680 * this function
3681 */
3682 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3683 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3684 } else {
3685 unsigned long delta =
3686 (unsigned long) ktime_to_us(
3687 ktime_sub(ktime_get(),
3688 hba->last_dme_cmd_tstamp));
3689
3690 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3691 min_sleep_time_us =
3692 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3693 else
3694 return; /* no more delay required */
3695 }
3696
3697 /* allow sleep for extra 50us if needed */
3698 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3699}
3700
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003701static inline void ufshcd_save_tstamp_of_last_dme_cmd(
3702 struct ufs_hba *hba)
3703{
3704 if (hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS)
3705 hba->last_dme_cmd_tstamp = ktime_get();
3706}
3707
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303708/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303709 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3710 * @hba: per adapter instance
3711 * @attr_sel: uic command argument1
3712 * @attr_set: attribute set type as uic command argument2
3713 * @mib_val: setting value as uic command argument3
3714 * @peer: indicate whether peer or local
3715 *
3716 * Returns 0 on success, non-zero value on failure
3717 */
3718int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3719 u8 attr_set, u32 mib_val, u8 peer)
3720{
3721 struct uic_command uic_cmd = {0};
3722 static const char *const action[] = {
3723 "dme-set",
3724 "dme-peer-set"
3725 };
3726 const char *set = action[!!peer];
3727 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003728 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303729
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003730 ufsdbg_error_inject_dispatcher(hba,
3731 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
3732
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303733 uic_cmd.command = peer ?
3734 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3735 uic_cmd.argument1 = attr_sel;
3736 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3737 uic_cmd.argument3 = mib_val;
3738
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003739 do {
3740 /* for peer attributes we retry upon failure */
3741 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3742 if (ret)
3743 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3744 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3745 } while (ret && peer && --retries);
3746
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003747 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003748 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003749 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3750 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303751
3752 return ret;
3753}
3754EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3755
3756/**
3757 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3758 * @hba: per adapter instance
3759 * @attr_sel: uic command argument1
3760 * @mib_val: the value of the attribute as returned by the UIC command
3761 * @peer: indicate whether peer or local
3762 *
3763 * Returns 0 on success, non-zero value on failure
3764 */
3765int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3766 u32 *mib_val, u8 peer)
3767{
3768 struct uic_command uic_cmd = {0};
3769 static const char *const action[] = {
3770 "dme-get",
3771 "dme-peer-get"
3772 };
3773 const char *get = action[!!peer];
3774 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003775 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003776 struct ufs_pa_layer_attr orig_pwr_info;
3777 struct ufs_pa_layer_attr temp_pwr_info;
3778 bool pwr_mode_change = false;
3779
3780 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3781 orig_pwr_info = hba->pwr_info;
3782 temp_pwr_info = orig_pwr_info;
3783
3784 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3785 orig_pwr_info.pwr_rx == FAST_MODE) {
3786 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3787 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3788 pwr_mode_change = true;
3789 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3790 orig_pwr_info.pwr_rx == SLOW_MODE) {
3791 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3792 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3793 pwr_mode_change = true;
3794 }
3795 if (pwr_mode_change) {
3796 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3797 if (ret)
3798 goto out;
3799 }
3800 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303801
3802 uic_cmd.command = peer ?
3803 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003804
3805 ufsdbg_error_inject_dispatcher(hba,
3806 ERR_INJECT_DME_ATTR, attr_sel, &attr_sel);
3807
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303808 uic_cmd.argument1 = attr_sel;
3809
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003810 do {
3811 /* for peer attributes we retry upon failure */
3812 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3813 if (ret)
3814 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3815 get, UIC_GET_ATTR_ID(attr_sel), ret);
3816 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303817
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003818 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003819 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003820 get, UIC_GET_ATTR_ID(attr_sel),
3821 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003822
3823 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303824 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003825
3826 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3827 && pwr_mode_change)
3828 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303829out:
3830 return ret;
3831}
3832EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3833
3834/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003835 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3836 * state) and waits for it to take effect.
3837 *
3838 * @hba: per adapter instance
3839 * @cmd: UIC command to execute
3840 *
3841 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3842 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3843 * and device UniPro link and hence it's final completion would be indicated by
3844 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3845 * addition to normal UIC command completion Status (UCCS). This function only
3846 * returns after the relevant status bits indicate the completion.
3847 *
3848 * Returns 0 on success, non-zero value on failure
3849 */
3850static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3851{
3852 struct completion uic_async_done;
3853 unsigned long flags;
3854 u8 status;
3855 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003856 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003857
3858 mutex_lock(&hba->uic_cmd_mutex);
3859 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003860 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003861
3862 spin_lock_irqsave(hba->host->host_lock, flags);
3863 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003864 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3865 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3866 /*
3867 * Make sure UIC command completion interrupt is disabled before
3868 * issuing UIC command.
3869 */
3870 wmb();
3871 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003872 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003873 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3874 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003875 if (ret) {
3876 dev_err(hba->dev,
3877 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3878 cmd->command, cmd->argument3, ret);
3879 goto out;
3880 }
3881
3882 if (!wait_for_completion_timeout(hba->uic_async_done,
3883 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3884 dev_err(hba->dev,
3885 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3886 cmd->command, cmd->argument3);
3887 ret = -ETIMEDOUT;
3888 goto out;
3889 }
3890
3891 status = ufshcd_get_upmcrs(hba);
3892 if (status != PWR_LOCAL) {
3893 dev_err(hba->dev,
3894 "pwr ctrl cmd 0x%0x failed, host umpcrs:0x%x\n",
3895 cmd->command, status);
3896 ret = (status != PWR_OK) ? status : -1;
3897 }
3898out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003899 if (ret)
3900 ufsdbg_set_err_state(hba);
3901
3902 ufshcd_save_tstamp_of_last_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003903 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003904 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003905 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003906 if (reenable_intr)
3907 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003908 spin_unlock_irqrestore(hba->host->host_lock, flags);
3909 mutex_unlock(&hba->uic_cmd_mutex);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003910 return ret;
3911}
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003912
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003913int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, u64 wait_timeout_us)
3914{
3915 unsigned long flags;
3916 int ret = 0;
3917 u32 tm_doorbell;
3918 u32 tr_doorbell;
3919 bool timeout = false, do_last_check = false;
3920 ktime_t start;
3921
3922 ufshcd_hold_all(hba);
3923 spin_lock_irqsave(hba->host->host_lock, flags);
3924 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
3925 ret = -EBUSY;
3926 goto out;
3927 }
3928
3929 /*
3930 * Wait for all the outstanding tasks/transfer requests.
3931 * Verify by checking the doorbell registers are clear.
3932 */
3933 start = ktime_get();
3934 do {
3935 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
3936 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3937 if (!tm_doorbell && !tr_doorbell) {
3938 timeout = false;
3939 break;
3940 } else if (do_last_check) {
3941 break;
3942 }
3943
3944 spin_unlock_irqrestore(hba->host->host_lock, flags);
3945 schedule();
3946 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
3947 wait_timeout_us) {
3948 timeout = true;
3949 /*
3950 * We might have scheduled out for long time so make
3951 * sure to check if doorbells are cleared by this time
3952 * or not.
3953 */
3954 do_last_check = true;
3955 }
3956 spin_lock_irqsave(hba->host->host_lock, flags);
3957 } while (tm_doorbell || tr_doorbell);
3958
3959 if (timeout) {
3960 dev_err(hba->dev,
3961 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
3962 __func__, tm_doorbell, tr_doorbell);
3963 ret = -EBUSY;
3964 }
3965out:
3966 spin_unlock_irqrestore(hba->host->host_lock, flags);
3967 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003968 return ret;
3969}
3970
3971/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303972 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3973 * using DME_SET primitives.
3974 * @hba: per adapter instance
3975 * @mode: powr mode value
3976 *
3977 * Returns 0 on success, non-zero value on failure
3978 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303979static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303980{
3981 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003982 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303983
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003984 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3985 ret = ufshcd_dme_set(hba,
3986 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3987 if (ret) {
3988 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3989 __func__, ret);
3990 goto out;
3991 }
3992 }
3993
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303994 uic_cmd.command = UIC_CMD_DME_SET;
3995 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3996 uic_cmd.argument3 = mode;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003997 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003998 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07003999 ufshcd_release_all(hba);
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004000out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004001 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004002}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304003
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004004static int ufshcd_link_recovery(struct ufs_hba *hba)
4005{
4006 int ret;
4007 unsigned long flags;
4008
4009 spin_lock_irqsave(hba->host->host_lock, flags);
4010 hba->ufshcd_state = UFSHCD_STATE_RESET;
4011 ufshcd_set_eh_in_progress(hba);
4012 spin_unlock_irqrestore(hba->host->host_lock, flags);
4013
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004014 ret = ufshcd_vops_full_reset(hba);
4015 if (ret)
4016 dev_warn(hba->dev,
4017 "full reset returned %d, trying to recover the link\n",
4018 ret);
4019
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004020 ret = ufshcd_host_reset_and_restore(hba);
4021
4022 spin_lock_irqsave(hba->host->host_lock, flags);
4023 if (ret)
4024 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4025 ufshcd_clear_eh_in_progress(hba);
4026 spin_unlock_irqrestore(hba->host->host_lock, flags);
4027
4028 if (ret)
4029 dev_err(hba->dev, "%s: link recovery failed, err %d",
4030 __func__, ret);
4031
4032 return ret;
4033}
4034
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004035static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004036{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004037 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004038 struct uic_command uic_cmd = {0};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004039 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004040
4041 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004042 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004043 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4044 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004045
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004046 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004047 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER);
4048 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d",
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004049 __func__, ret);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004050 /*
4051 * If link recovery fails then return error so that caller
4052 * don't retry the hibern8 enter again.
4053 */
4054 if (ufshcd_link_recovery(hba))
4055 ret = -ENOLINK;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004056 } else {
4057 dev_dbg(hba->dev, "%s: Hibern8 Enter at %lld us", __func__,
4058 ktime_to_us(ktime_get()));
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004059 }
4060
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004061 return ret;
4062}
4063
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004064int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004065{
4066 int ret = 0, retries;
4067
4068 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
4069 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004070 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004071 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004072 /* Unable to recover the link, so no point proceeding */
4073 if (ret == -ENOLINK)
4074 BUG();
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004075 }
4076out:
4077 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004078}
4079
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004080int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004081{
4082 struct uic_command uic_cmd = {0};
4083 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004084 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004085
4086 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4087 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004088 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4089 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4090
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304091 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004092 ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT);
4093 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d",
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004094 __func__, ret);
4095 ret = ufshcd_link_recovery(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004096 /* Unable to recover the link, so no point proceeding */
4097 if (ret)
4098 BUG();
4099 } else {
4100 dev_dbg(hba->dev, "%s: Hibern8 Exit at %lld us", __func__,
4101 ktime_to_us(ktime_get()));
4102 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4103 hba->ufs_stats.hibern8_exit_cnt++;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304104 }
4105
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304106 return ret;
4107}
4108
Yaniv Gardi50646362014-10-23 13:25:13 +03004109 /**
4110 * ufshcd_init_pwr_info - setting the POR (power on reset)
4111 * values in hba power info
4112 * @hba: per-adapter instance
4113 */
4114static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4115{
4116 hba->pwr_info.gear_rx = UFS_PWM_G1;
4117 hba->pwr_info.gear_tx = UFS_PWM_G1;
4118 hba->pwr_info.lane_rx = 1;
4119 hba->pwr_info.lane_tx = 1;
4120 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4121 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4122 hba->pwr_info.hs_rate = 0;
4123}
4124
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304125/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004126 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4127 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304128 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004129static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304130{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004131 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4132
4133 if (hba->max_pwr_info.is_valid)
4134 return 0;
4135
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004136 pwr_info->pwr_tx = FAST_MODE;
4137 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004138 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304139
4140 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004141 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4142 &pwr_info->lane_rx);
4143 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4144 &pwr_info->lane_tx);
4145
4146 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4147 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4148 __func__,
4149 pwr_info->lane_rx,
4150 pwr_info->lane_tx);
4151 return -EINVAL;
4152 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304153
4154 /*
4155 * First, get the maximum gears of HS speed.
4156 * If a zero value, it means there is no HSGEAR capability.
4157 * Then, get the maximum gears of PWM speed.
4158 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004159 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4160 if (!pwr_info->gear_rx) {
4161 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4162 &pwr_info->gear_rx);
4163 if (!pwr_info->gear_rx) {
4164 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4165 __func__, pwr_info->gear_rx);
4166 return -EINVAL;
4167 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004168 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304169 }
4170
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004171 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4172 &pwr_info->gear_tx);
4173 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304174 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004175 &pwr_info->gear_tx);
4176 if (!pwr_info->gear_tx) {
4177 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4178 __func__, pwr_info->gear_tx);
4179 return -EINVAL;
4180 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004181 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004182 }
4183
4184 hba->max_pwr_info.is_valid = true;
4185 return 0;
4186}
4187
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004188int ufshcd_change_power_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004189 struct ufs_pa_layer_attr *pwr_mode)
4190{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004191 int ret = 0;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004192
4193 /* if already configured to the requested pwr_mode */
4194 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4195 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4196 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4197 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4198 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4199 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4200 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4201 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4202 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304203 }
4204
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004205 ufsdbg_error_inject_dispatcher(hba, ERR_INJECT_PWR_CHANGE, 0, &ret);
4206 if (ret)
4207 return ret;
4208
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304209 /*
4210 * Configure attributes for power mode change with below.
4211 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4212 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4213 * - PA_HSSERIES
4214 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004215 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4216 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4217 pwr_mode->lane_rx);
4218 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4219 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304220 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004221 else
4222 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304223
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004224 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4225 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4226 pwr_mode->lane_tx);
4227 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4228 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304229 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004230 else
4231 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304232
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004233 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4234 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4235 pwr_mode->pwr_rx == FAST_MODE ||
4236 pwr_mode->pwr_tx == FAST_MODE)
4237 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4238 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304239
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004240 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4241 DL_FC0ProtectionTimeOutVal_Default);
4242 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4243 DL_TC0ReplayTimeOutVal_Default);
4244 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4245 DL_AFC0ReqTimeOutVal_Default);
4246
4247 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4248 DL_FC0ProtectionTimeOutVal_Default);
4249 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4250 DL_TC0ReplayTimeOutVal_Default);
4251 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4252 DL_AFC0ReqTimeOutVal_Default);
4253
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004254 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4255 | pwr_mode->pwr_tx);
4256
4257 if (ret) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004258 ufshcd_update_error_stats(hba, UFS_ERR_POWER_MODE_CHANGE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304259 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004260 "%s: power mode change failed %d\n", __func__, ret);
4261 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004262 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4263 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004264
4265 memcpy(&hba->pwr_info, pwr_mode,
4266 sizeof(struct ufs_pa_layer_attr));
4267 }
4268
4269 return ret;
4270}
4271
4272/**
4273 * ufshcd_config_pwr_mode - configure a new power mode
4274 * @hba: per-adapter instance
4275 * @desired_pwr_mode: desired power configuration
4276 */
4277static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4278 struct ufs_pa_layer_attr *desired_pwr_mode)
4279{
4280 struct ufs_pa_layer_attr final_params = { 0 };
4281 int ret;
4282
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004283 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4284 desired_pwr_mode, &final_params);
4285
4286 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004287 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4288
4289 ret = ufshcd_change_power_mode(hba, &final_params);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004290 if (!ret)
4291 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304292
4293 return ret;
4294}
4295
4296/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304297 * ufshcd_complete_dev_init() - checks device readiness
4298 * hba: per-adapter instance
4299 *
4300 * Set fDeviceInit flag and poll until device toggles it.
4301 */
4302static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4303{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004304 int i;
4305 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304306 bool flag_res = 1;
4307
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004308 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4309 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304310 if (err) {
4311 dev_err(hba->dev,
4312 "%s setting fDeviceInit flag failed with error %d\n",
4313 __func__, err);
4314 goto out;
4315 }
4316
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004317 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4318 for (i = 0; i < 1000 && !err && flag_res; i++)
4319 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4320 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4321
Dolev Raviv68078d52013-07-30 00:35:58 +05304322 if (err)
4323 dev_err(hba->dev,
4324 "%s reading fDeviceInit flag failed with error %d\n",
4325 __func__, err);
4326 else if (flag_res)
4327 dev_err(hba->dev,
4328 "%s fDeviceInit was not cleared by the device\n",
4329 __func__);
4330
4331out:
4332 return err;
4333}
4334
4335/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304336 * ufshcd_make_hba_operational - Make UFS controller operational
4337 * @hba: per adapter instance
4338 *
4339 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004340 * 1. Enable required interrupts
4341 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004342 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004343 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304344 *
4345 * Returns 0 on success, non-zero value on failure
4346 */
4347static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4348{
4349 int err = 0;
4350 u32 reg;
4351
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304352 /* Enable required interrupts */
4353 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4354
4355 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004356 if (ufshcd_is_intr_aggr_allowed(hba))
4357 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4358 else
4359 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304360
4361 /* Configure UTRL and UTMRL base address registers */
4362 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4363 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4364 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4365 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4366 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4367 REG_UTP_TASK_REQ_LIST_BASE_L);
4368 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4369 REG_UTP_TASK_REQ_LIST_BASE_H);
4370
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304371 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004372 * Make sure base address and interrupt setup are updated before
4373 * enabling the run/stop registers below.
4374 */
4375 wmb();
4376
4377 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304378 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304379 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004380 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304381 if (!(ufshcd_get_lists_status(reg))) {
4382 ufshcd_enable_run_stop_reg(hba);
4383 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304384 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304385 "Host controller not ready to process requests");
4386 err = -EIO;
4387 goto out;
4388 }
4389
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304390out:
4391 return err;
4392}
4393
4394/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004395 * ufshcd_hba_stop - Send controller to reset state
4396 * @hba: per adapter instance
4397 * @can_sleep: perform sleep or just spin
4398 */
4399static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4400{
4401 int err;
4402
4403 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4404 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4405 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4406 10, 1, can_sleep);
4407 if (err)
4408 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4409}
4410
4411/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304412 * ufshcd_hba_enable - initialize the controller
4413 * @hba: per adapter instance
4414 *
4415 * The controller resets itself and controller firmware initialization
4416 * sequence kicks off. When controller is ready it will set
4417 * the Host Controller Enable bit to 1.
4418 *
4419 * Returns 0 on success, non-zero value on failure
4420 */
4421static int ufshcd_hba_enable(struct ufs_hba *hba)
4422{
4423 int retry;
4424
4425 /*
4426 * msleep of 1 and 5 used in this function might result in msleep(20),
4427 * but it was necessary to send the UFS FPGA to reset mode during
4428 * development and testing of this driver. msleep can be changed to
4429 * mdelay and retry count can be reduced based on the controller.
4430 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004431 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304432 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004433 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304434
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004435 /* UniPro link is disabled at this point */
4436 ufshcd_set_link_off(hba);
4437
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004438 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004439
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304440 /* start controller initialization sequence */
4441 ufshcd_hba_start(hba);
4442
4443 /*
4444 * To initialize a UFS host controller HCE bit must be set to 1.
4445 * During initialization the HCE bit value changes from 1->0->1.
4446 * When the host controller completes initialization sequence
4447 * it sets the value of HCE bit to 1. The same HCE bit is read back
4448 * to check if the controller has completed initialization sequence.
4449 * So without this delay the value HCE = 1, set in the previous
4450 * instruction might be read back.
4451 * This delay can be changed based on the controller.
4452 */
4453 msleep(1);
4454
4455 /* wait for the host controller to complete initialization */
4456 retry = 10;
4457 while (ufshcd_is_hba_active(hba)) {
4458 if (retry) {
4459 retry--;
4460 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304461 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304462 "Controller enable failed\n");
4463 return -EIO;
4464 }
4465 msleep(5);
4466 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004467
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004468 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004469 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004470
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004471 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004472
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304473 return 0;
4474}
4475
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004476static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4477{
4478 int tx_lanes, i, err = 0;
4479
4480 if (!peer)
4481 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4482 &tx_lanes);
4483 else
4484 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4485 &tx_lanes);
4486 for (i = 0; i < tx_lanes; i++) {
4487 if (!peer)
4488 err = ufshcd_dme_set(hba,
4489 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4490 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4491 0);
4492 else
4493 err = ufshcd_dme_peer_set(hba,
4494 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4495 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4496 0);
4497 if (err) {
4498 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4499 __func__, peer, i, err);
4500 break;
4501 }
4502 }
4503
4504 return err;
4505}
4506
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004507static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
4508{
4509 return ufshcd_disable_tx_lcc(hba, false);
4510}
4511
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004512static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4513{
4514 return ufshcd_disable_tx_lcc(hba, true);
4515}
4516
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304517/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304518 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304519 * @hba: per adapter instance
4520 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304521 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304522 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304523static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304524{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304525 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004526 int retries = DME_LINKSTARTUP_RETRIES;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004527 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304528
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004529 /*
4530 * If UFS device isn't active then we will have to issue link startup
4531 * 2 times to make sure the device state move to active.
4532 */
4533 if (!ufshcd_is_ufs_dev_active(hba))
4534 link_startup_again = true;
4535
4536link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004537 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004538 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304539
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004540 ret = ufshcd_dme_link_startup(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004541 if (ret)
4542 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004543
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004544 /* check if device is detected by inter-connect layer */
4545 if (!ret && !ufshcd_is_device_present(hba)) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004546 ufshcd_update_error_stats(hba, UFS_ERR_LINKSTARTUP);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004547 dev_err(hba->dev, "%s: Device not present\n", __func__);
4548 ret = -ENXIO;
4549 goto out;
4550 }
4551
4552 /*
4553 * DME link lost indication is only received when link is up,
4554 * but we can't be sure if the link is up until link startup
4555 * succeeds. So reset the local Uni-Pro and try again.
4556 */
4557 if (ret && ufshcd_hba_enable(hba))
4558 goto out;
4559 } while (ret && retries--);
4560
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304561 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004562 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304563 goto out;
4564
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004565 if (link_startup_again) {
4566 link_startup_again = false;
4567 retries = DME_LINKSTARTUP_RETRIES;
4568 goto link_startup;
4569 }
4570
4571 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4572 ufshcd_init_pwr_info(hba);
4573 ufshcd_print_pwr_info(hba);
4574
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004575 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4576 ret = ufshcd_disable_device_tx_lcc(hba);
4577 if (ret)
4578 goto out;
4579 }
4580
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004581 if (hba->dev_quirks & UFS_DEVICE_QUIRK_BROKEN_LCC) {
4582 ret = ufshcd_disable_host_tx_lcc(hba);
4583 if (ret)
4584 goto out;
4585 }
4586
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004587 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004588 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4589 if (ret)
4590 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004591
4592 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304593out:
4594 if (ret)
4595 dev_err(hba->dev, "link startup failed %d\n", ret);
4596 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304597}
4598
4599/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304600 * ufshcd_verify_dev_init() - Verify device initialization
4601 * @hba: per-adapter instance
4602 *
4603 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4604 * device Transport Protocol (UTP) layer is ready after a reset.
4605 * If the UTP layer at the device side is not initialized, it may
4606 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4607 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4608 */
4609static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4610{
4611 int err = 0;
4612 int retries;
4613
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004614 ufshcd_hold_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304615 mutex_lock(&hba->dev_cmd.lock);
4616 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4617 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4618 NOP_OUT_TIMEOUT);
4619
4620 if (!err || err == -ETIMEDOUT)
4621 break;
4622
4623 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4624 }
4625 mutex_unlock(&hba->dev_cmd.lock);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004626 ufshcd_release_all(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304627
4628 if (err)
4629 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4630 return err;
4631}
4632
4633/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004634 * ufshcd_set_queue_depth - set lun queue depth
4635 * @sdev: pointer to SCSI device
4636 *
4637 * Read bLUQueueDepth value and activate scsi tagged command
4638 * queueing. For WLUN, queue depth is set to 1. For best-effort
4639 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4640 * value that host can queue.
4641 */
4642static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4643{
4644 int ret = 0;
4645 u8 lun_qdepth;
4646 struct ufs_hba *hba;
4647
4648 hba = shost_priv(sdev->host);
4649
4650 lun_qdepth = hba->nutrs;
4651 ret = ufshcd_read_unit_desc_param(hba,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004652 ufshcd_scsi_to_upiu_lun(sdev->lun),
4653 UNIT_DESC_PARAM_LU_Q_DEPTH,
4654 &lun_qdepth,
4655 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004656
4657 /* Some WLUN doesn't support unit descriptor */
4658 if (ret == -EOPNOTSUPP)
4659 lun_qdepth = 1;
4660 else if (!lun_qdepth)
4661 /* eventually, we can figure out the real queue depth */
4662 lun_qdepth = hba->nutrs;
4663 else
4664 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4665
4666 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4667 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004668 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004669}
4670
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004671/*
4672 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4673 * @hba: per-adapter instance
4674 * @lun: UFS device lun id
4675 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4676 *
4677 * Returns 0 in case of success and b_lu_write_protect status would be returned
4678 * @b_lu_write_protect parameter.
4679 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4680 * Returns -EINVAL in case of invalid parameters passed to this function.
4681 */
4682static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4683 u8 lun,
4684 u8 *b_lu_write_protect)
4685{
4686 int ret;
4687
4688 if (!b_lu_write_protect)
4689 ret = -EINVAL;
4690 /*
4691 * According to UFS device spec, RPMB LU can't be write
4692 * protected so skip reading bLUWriteProtect parameter for
4693 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4694 */
4695 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4696 ret = -ENOTSUPP;
4697 else
4698 ret = ufshcd_read_unit_desc_param(hba,
4699 lun,
4700 UNIT_DESC_PARAM_LU_WR_PROTECT,
4701 b_lu_write_protect,
4702 sizeof(*b_lu_write_protect));
4703 return ret;
4704}
4705
4706/**
4707 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4708 * status
4709 * @hba: per-adapter instance
4710 * @sdev: pointer to SCSI device
4711 *
4712 */
4713static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4714 struct scsi_device *sdev)
4715{
4716 if (hba->dev_info.f_power_on_wp_en &&
4717 !hba->dev_info.is_lu_power_on_wp) {
4718 u8 b_lu_write_protect;
4719
4720 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4721 &b_lu_write_protect) &&
4722 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4723 hba->dev_info.is_lu_power_on_wp = true;
4724 }
4725}
4726
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004727/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304728 * ufshcd_slave_alloc - handle initial SCSI device configurations
4729 * @sdev: pointer to SCSI device
4730 *
4731 * Returns success
4732 */
4733static int ufshcd_slave_alloc(struct scsi_device *sdev)
4734{
4735 struct ufs_hba *hba;
4736
4737 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304738
4739 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4740 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304741
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304742 /* allow SCSI layer to restart the device in case of errors */
4743 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004744
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004745 /* REPORT SUPPORTED OPERATION CODES is not supported */
4746 sdev->no_report_opcodes = 1;
4747
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004748 /* WRITE_SAME command is not supported*/
4749 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004750
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004751 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004752
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004753 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4754
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004755 return 0;
4756}
4757
4758/**
4759 * ufshcd_change_queue_depth - change queue depth
4760 * @sdev: pointer to SCSI device
4761 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004762 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004763 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004764 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004765static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004766{
4767 struct ufs_hba *hba = shost_priv(sdev->host);
4768
4769 if (depth > hba->nutrs)
4770 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004771 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304772}
4773
4774/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004775 * ufshcd_slave_configure - adjust SCSI device configurations
4776 * @sdev: pointer to SCSI device
4777 */
4778static int ufshcd_slave_configure(struct scsi_device *sdev)
4779{
4780 struct request_queue *q = sdev->request_queue;
4781
4782 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4783 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4784
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004785 sdev->autosuspend_delay = UFSHCD_AUTO_SUSPEND_DELAY_MS;
4786 sdev->use_rpm_auto = 1;
4787
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004788 return 0;
4789}
4790
4791/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304792 * ufshcd_slave_destroy - remove SCSI device configurations
4793 * @sdev: pointer to SCSI device
4794 */
4795static void ufshcd_slave_destroy(struct scsi_device *sdev)
4796{
4797 struct ufs_hba *hba;
4798
4799 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004800 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004801 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4802 unsigned long flags;
4803
4804 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004805 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004806 spin_unlock_irqrestore(hba->host->host_lock, flags);
4807 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304808}
4809
4810/**
4811 * ufshcd_task_req_compl - handle task management request completion
4812 * @hba: per adapter instance
4813 * @index: index of the completed request
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304814 * @resp: task management service response
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304815 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304816 * Returns non-zero value on error, zero on success
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304817 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304818static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304819{
4820 struct utp_task_req_desc *task_req_descp;
4821 struct utp_upiu_task_rsp *task_rsp_upiup;
4822 unsigned long flags;
4823 int ocs_value;
4824 int task_result;
4825
4826 spin_lock_irqsave(hba->host->host_lock, flags);
4827
4828 /* Clear completed tasks from outstanding_tasks */
4829 __clear_bit(index, &hba->outstanding_tasks);
4830
4831 task_req_descp = hba->utmrdl_base_addr;
4832 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4833
4834 if (ocs_value == OCS_SUCCESS) {
4835 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4836 task_req_descp[index].task_rsp_upiu;
4837 task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
4838 task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304839 if (resp)
4840 *resp = (u8)task_result;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304841 } else {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304842 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4843 __func__, ocs_value);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304844 }
4845 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05304846
4847 return ocs_value;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304848}
4849
4850/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304851 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4852 * @lrb: pointer to local reference block of completed command
4853 * @scsi_status: SCSI command status
4854 *
4855 * Returns value base on SCSI command status
4856 */
4857static inline int
4858ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4859{
4860 int result = 0;
4861
4862 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304863 case SAM_STAT_CHECK_CONDITION:
4864 ufshcd_copy_sense_data(lrbp);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304865 case SAM_STAT_GOOD:
4866 result |= DID_OK << 16 |
4867 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304868 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304869 break;
4870 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304871 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304872 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304873 ufshcd_copy_sense_data(lrbp);
4874 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304875 break;
4876 default:
4877 result |= DID_ERROR << 16;
4878 break;
4879 } /* end of switch */
4880
4881 return result;
4882}
4883
4884/**
4885 * ufshcd_transfer_rsp_status - Get overall status of the response
4886 * @hba: per adapter instance
4887 * @lrb: pointer to local reference block of completed command
4888 *
4889 * Returns result of the command to notify SCSI midlayer
4890 */
4891static inline int
4892ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4893{
4894 int result = 0;
4895 int scsi_status;
4896 int ocs;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004897 bool print_prdt;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304898
4899 /* overall command status of utrd */
4900 ocs = ufshcd_get_tr_ocs(lrbp);
4901
4902 switch (ocs) {
4903 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304904 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004905 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304906 switch (result) {
4907 case UPIU_TRANSACTION_RESPONSE:
4908 /*
4909 * get the response UPIU result to extract
4910 * the SCSI command status
4911 */
4912 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4913
4914 /*
4915 * get the result based on SCSI status response
4916 * to notify the SCSI midlayer of the command status
4917 */
4918 scsi_status = result & MASK_SCSI_STATUS;
4919 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304920
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004921 /*
4922 * Currently we are only supporting BKOPs exception
4923 * events hence we can ignore BKOPs exception event
4924 * during power management callbacks. BKOPs exception
4925 * event is not expected to be raised in runtime suspend
4926 * callback as it allows the urgent bkops.
4927 * During system suspend, we are anyway forcefully
4928 * disabling the bkops and if urgent bkops is needed
4929 * it will be enabled on system resume. Long term
4930 * solution could be to abort the system suspend if
4931 * UFS device needs urgent BKOPs.
4932 */
4933 if (!hba->pm_op_in_progress &&
4934 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304935 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304936 break;
4937 case UPIU_TRANSACTION_REJECT_UPIU:
4938 /* TODO: handle Reject UPIU Response */
4939 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304940 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304941 "Reject UPIU not fully implemented\n");
4942 break;
4943 default:
4944 result = DID_ERROR << 16;
4945 dev_err(hba->dev,
4946 "Unexpected request response code = %x\n",
4947 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304948 break;
4949 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304950 break;
4951 case OCS_ABORTED:
4952 result |= DID_ABORT << 16;
4953 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304954 case OCS_INVALID_COMMAND_STATUS:
4955 result |= DID_REQUEUE << 16;
4956 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304957 case OCS_INVALID_CMD_TABLE_ATTR:
4958 case OCS_INVALID_PRDT_ATTR:
4959 case OCS_MISMATCH_DATA_BUF_SIZE:
4960 case OCS_MISMATCH_RESP_UPIU_SIZE:
4961 case OCS_PEER_COMM_FAILURE:
4962 case OCS_FATAL_ERROR:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004963 case OCS_DEVICE_FATAL_ERROR:
4964 case OCS_INVALID_CRYPTO_CONFIG:
4965 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304966 default:
4967 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304968 dev_err(hba->dev,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004969 "OCS error from controller = %x for tag %d\n",
4970 ocs, lrbp->task_tag);
4971 ufshcd_print_host_regs(hba);
4972 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304973 break;
4974 } /* end of switch */
4975
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07004976 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs) {
4977 print_prdt = (ocs == OCS_INVALID_PRDT_ATTR ||
4978 ocs == OCS_MISMATCH_DATA_BUF_SIZE);
4979 ufshcd_print_trs(hba, 1 << lrbp->task_tag, print_prdt);
4980 }
4981
4982 if ((host_byte(result) == DID_ERROR) ||
4983 (host_byte(result) == DID_ABORT))
4984 ufsdbg_set_err_state(hba);
4985
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304986 return result;
4987}
4988
4989/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304990 * ufshcd_uic_cmd_compl - handle completion of uic command
4991 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304992 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304993 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304994static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304995{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304996 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304997 hba->active_uic_cmd->argument2 |=
4998 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304999 hba->active_uic_cmd->argument3 =
5000 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305001 complete(&hba->active_uic_cmd->done);
5002 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305003
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005004 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
5005 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305006}
5007
5008/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005009 * ufshcd_abort_outstanding_requests - abort all outstanding transfer requests.
5010 * @hba: per adapter instance
5011 * @result: error result to inform scsi layer about
5012 */
5013void ufshcd_abort_outstanding_transfer_requests(struct ufs_hba *hba, int result)
5014{
5015 u8 index;
5016 struct ufshcd_lrb *lrbp;
5017 struct scsi_cmnd *cmd;
5018
5019 if (!hba->outstanding_reqs)
5020 return;
5021
5022 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
5023 lrbp = &hba->lrb[index];
5024 cmd = lrbp->cmd;
5025 if (cmd) {
5026 ufshcd_cond_add_cmd_trace(hba, index, "failed");
5027 ufshcd_update_error_stats(hba,
5028 UFS_ERR_INT_FATAL_ERRORS);
5029 scsi_dma_unmap(cmd);
5030 cmd->result = result;
5031 /* Clear pending transfer requests */
5032 ufshcd_clear_cmd(hba, index);
5033 ufshcd_outstanding_req_clear(hba, index);
5034 clear_bit_unlock(index, &hba->lrb_in_use);
5035 lrbp->complete_time_stamp = ktime_get();
5036 update_req_stats(hba, lrbp);
5037 /* Mark completed command as NULL in LRB */
5038 lrbp->cmd = NULL;
5039 ufshcd_release_all(hba);
5040 if (cmd->request) {
5041 /*
5042 * As we are accessing the "request" structure,
5043 * this must be called before calling
5044 * ->scsi_done() callback.
5045 */
5046 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5047 true);
5048 ufshcd_vops_crypto_engine_cfg_end(hba,
5049 lrbp, cmd->request);
5050 }
5051 /* Do not touch lrbp after scsi done */
5052 cmd->scsi_done(cmd);
5053 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5054 if (hba->dev_cmd.complete) {
5055 ufshcd_cond_add_cmd_trace(hba, index,
5056 "dev_failed");
5057 ufshcd_outstanding_req_clear(hba, index);
5058 complete(hba->dev_cmd.complete);
5059 }
5060 }
5061 if (ufshcd_is_clkscaling_supported(hba))
5062 hba->clk_scaling.active_reqs--;
5063 }
5064}
5065
5066/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005067 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305068 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005069 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305070 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005071static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5072 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305073{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305074 struct ufshcd_lrb *lrbp;
5075 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305076 int result;
5077 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005078
Dolev Ravive9d501b2014-07-01 12:22:37 +03005079 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5080 lrbp = &hba->lrb[index];
5081 cmd = lrbp->cmd;
5082 if (cmd) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005083 ufshcd_cond_add_cmd_trace(hba, index, "complete");
5084 ufshcd_update_tag_stats_completion(hba, cmd);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005085 result = ufshcd_transfer_rsp_status(hba, lrbp);
5086 scsi_dma_unmap(cmd);
5087 cmd->result = result;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005088 clear_bit_unlock(index, &hba->lrb_in_use);
5089 lrbp->complete_time_stamp = ktime_get();
5090 update_req_stats(hba, lrbp);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005091 /* Mark completed command as NULL in LRB */
5092 lrbp->cmd = NULL;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005093 __ufshcd_release(hba, false);
5094 __ufshcd_hibern8_release(hba, false);
5095 if (cmd->request) {
5096 /*
5097 * As we are accessing the "request" structure,
5098 * this must be called before calling
5099 * ->scsi_done() callback.
5100 */
5101 ufshcd_vops_pm_qos_req_end(hba, cmd->request,
5102 false);
5103 ufshcd_vops_crypto_engine_cfg_end(hba,
5104 lrbp, cmd->request);
5105 }
5106
Dolev Ravive9d501b2014-07-01 12:22:37 +03005107 /* Do not touch lrbp after scsi done */
5108 cmd->scsi_done(cmd);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005109 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
5110 if (hba->dev_cmd.complete) {
5111 ufshcd_cond_add_cmd_trace(hba, index,
5112 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03005113 complete(hba->dev_cmd.complete);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005114 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005115 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005116 if (ufshcd_is_clkscaling_supported(hba))
5117 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005118 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305119
5120 /* clear corresponding bits of completed commands */
5121 hba->outstanding_reqs ^= completed_reqs;
5122
Sahitya Tummala856b3482014-09-25 15:32:34 +03005123 ufshcd_clk_scaling_update_busy(hba);
5124
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305125 /* we might have free'd some tags above */
5126 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305127}
5128
5129/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005130 * ufshcd_transfer_req_compl - handle SCSI and query command completion
5131 * @hba: per adapter instance
5132 */
5133static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
5134{
5135 unsigned long completed_reqs;
5136 u32 tr_doorbell;
5137
5138 /* Resetting interrupt aggregation counters first and reading the
5139 * DOOR_BELL afterward allows us to handle all the completed requests.
5140 * In order to prevent other interrupts starvation the DB is read once
5141 * after reset. The down side of this solution is the possibility of
5142 * false interrupt if device completes another request after resetting
5143 * aggregation and before reading the DB.
5144 */
5145 if (ufshcd_is_intr_aggr_allowed(hba))
5146 ufshcd_reset_intr_aggr(hba);
5147
5148 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5149 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5150
5151 __ufshcd_transfer_req_compl(hba, completed_reqs);
5152}
5153
5154/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305155 * ufshcd_disable_ee - disable exception event
5156 * @hba: per-adapter instance
5157 * @mask: exception event to disable
5158 *
5159 * Disables exception event in the device so that the EVENT_ALERT
5160 * bit is not set.
5161 *
5162 * Returns zero on success, non-zero error value on failure.
5163 */
5164static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5165{
5166 int err = 0;
5167 u32 val;
5168
5169 if (!(hba->ee_ctrl_mask & mask))
5170 goto out;
5171
5172 val = hba->ee_ctrl_mask & ~mask;
5173 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005174 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305175 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5176 if (!err)
5177 hba->ee_ctrl_mask &= ~mask;
5178out:
5179 return err;
5180}
5181
5182/**
5183 * ufshcd_enable_ee - enable exception event
5184 * @hba: per-adapter instance
5185 * @mask: exception event to enable
5186 *
5187 * Enable corresponding exception event in the device to allow
5188 * device to alert host in critical scenarios.
5189 *
5190 * Returns zero on success, non-zero error value on failure.
5191 */
5192static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5193{
5194 int err = 0;
5195 u32 val;
5196
5197 if (hba->ee_ctrl_mask & mask)
5198 goto out;
5199
5200 val = hba->ee_ctrl_mask | mask;
5201 val &= 0xFFFF; /* 2 bytes */
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005202 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305203 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5204 if (!err)
5205 hba->ee_ctrl_mask |= mask;
5206out:
5207 return err;
5208}
5209
5210/**
5211 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5212 * @hba: per-adapter instance
5213 *
5214 * Allow device to manage background operations on its own. Enabling
5215 * this might lead to inconsistent latencies during normal data transfers
5216 * as the device is allowed to manage its own way of handling background
5217 * operations.
5218 *
5219 * Returns zero on success, non-zero on failure.
5220 */
5221static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5222{
5223 int err = 0;
5224
5225 if (hba->auto_bkops_enabled)
5226 goto out;
5227
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005228 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305229 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5230 if (err) {
5231 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5232 __func__, err);
5233 goto out;
5234 }
5235
5236 hba->auto_bkops_enabled = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005237 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 1);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305238
5239 /* No need of URGENT_BKOPS exception from the device */
5240 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5241 if (err)
5242 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5243 __func__, err);
5244out:
5245 return err;
5246}
5247
5248/**
5249 * ufshcd_disable_auto_bkops - block device in doing background operations
5250 * @hba: per-adapter instance
5251 *
5252 * Disabling background operations improves command response latency but
5253 * has drawback of device moving into critical state where the device is
5254 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5255 * host is idle so that BKOPS are managed effectively without any negative
5256 * impacts.
5257 *
5258 * Returns zero on success, non-zero on failure.
5259 */
5260static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5261{
5262 int err = 0;
5263
5264 if (!hba->auto_bkops_enabled)
5265 goto out;
5266
5267 /*
5268 * If host assisted BKOPs is to be enabled, make sure
5269 * urgent bkops exception is allowed.
5270 */
5271 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5272 if (err) {
5273 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5274 __func__, err);
5275 goto out;
5276 }
5277
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005278 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305279 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5280 if (err) {
5281 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5282 __func__, err);
5283 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5284 goto out;
5285 }
5286
5287 hba->auto_bkops_enabled = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005288 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), 0);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305289out:
5290 return err;
5291}
5292
5293/**
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005294 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305295 * @hba: per adapter instance
5296 *
5297 * After a device reset the device may toggle the BKOPS_EN flag
5298 * to default value. The s/w tracking variables should be updated
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005299 * as well. This function would change the auto-bkops state based on
5300 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305301 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005302static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305303{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005304 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5305 hba->auto_bkops_enabled = false;
5306 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5307 ufshcd_enable_auto_bkops(hba);
5308 } else {
5309 hba->auto_bkops_enabled = true;
5310 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5311 ufshcd_disable_auto_bkops(hba);
5312 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305313}
5314
5315static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5316{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005317 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305318 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5319}
5320
5321/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005322 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5323 * @hba: per-adapter instance
5324 * @status: bkops_status value
5325 *
5326 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5327 * flag in the device to permit background operations if the device
5328 * bkops_status is greater than or equal to "status" argument passed to
5329 * this function, disable otherwise.
5330 *
5331 * Returns 0 for success, non-zero in case of failure.
5332 *
5333 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5334 * to know whether auto bkops is enabled or disabled after this function
5335 * returns control to it.
5336 */
5337static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5338 enum bkops_status status)
5339{
5340 int err;
5341 u32 curr_status = 0;
5342
5343 err = ufshcd_get_bkops_status(hba, &curr_status);
5344 if (err) {
5345 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5346 __func__, err);
5347 goto out;
5348 } else if (curr_status > BKOPS_STATUS_MAX) {
5349 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5350 __func__, curr_status);
5351 err = -EINVAL;
5352 goto out;
5353 }
5354
5355 if (curr_status >= status)
5356 err = ufshcd_enable_auto_bkops(hba);
5357 else
5358 err = ufshcd_disable_auto_bkops(hba);
5359out:
5360 return err;
5361}
5362
5363/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305364 * ufshcd_urgent_bkops - handle urgent bkops exception event
5365 * @hba: per-adapter instance
5366 *
5367 * Enable fBackgroundOpsEn flag in the device to permit background
5368 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005369 *
5370 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5371 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305372 */
5373static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5374{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005375 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305376}
5377
5378static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5379{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005380 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305381 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5382}
5383
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005384static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5385{
5386 int err;
5387 u32 curr_status = 0;
5388
5389 if (hba->is_urgent_bkops_lvl_checked)
5390 goto enable_auto_bkops;
5391
5392 err = ufshcd_get_bkops_status(hba, &curr_status);
5393 if (err) {
5394 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5395 __func__, err);
5396 goto out;
5397 }
5398
5399 /*
5400 * We are seeing that some devices are raising the urgent bkops
5401 * exception events even when BKOPS status doesn't indicate performace
5402 * impacted or critical. Handle these device by determining their urgent
5403 * bkops status at runtime.
5404 */
5405 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5406 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5407 __func__, curr_status);
5408 /* update the current status as the urgent bkops level */
5409 hba->urgent_bkops_lvl = curr_status;
5410 hba->is_urgent_bkops_lvl_checked = true;
5411 }
5412
5413enable_auto_bkops:
5414 err = ufshcd_enable_auto_bkops(hba);
5415out:
5416 if (err < 0)
5417 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5418 __func__, err);
5419}
5420
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305421/**
5422 * ufshcd_exception_event_handler - handle exceptions raised by device
5423 * @work: pointer to work data
5424 *
5425 * Read bExceptionEventStatus attribute from the device and handle the
5426 * exception event accordingly.
5427 */
5428static void ufshcd_exception_event_handler(struct work_struct *work)
5429{
5430 struct ufs_hba *hba;
5431 int err;
5432 u32 status = 0;
5433 hba = container_of(work, struct ufs_hba, eeh_work);
5434
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305435 pm_runtime_get_sync(hba->dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005436 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305437 err = ufshcd_get_ee_status(hba, &status);
5438 if (err) {
5439 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5440 __func__, err);
5441 goto out;
5442 }
5443
5444 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005445
5446 if (status & MASK_EE_URGENT_BKOPS)
5447 ufshcd_bkops_exception_event_handler(hba);
5448
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305449out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005450 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305451 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305452 return;
5453}
5454
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005455/* Complete requests that have door-bell cleared */
5456static void ufshcd_complete_requests(struct ufs_hba *hba)
5457{
5458 ufshcd_transfer_req_compl(hba);
5459 ufshcd_tmc_handler(hba);
5460}
5461
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305462/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005463 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5464 * to recover from the DL NAC errors or not.
5465 * @hba: per-adapter instance
5466 *
5467 * Returns true if error handling is required, false otherwise
5468 */
5469static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5470{
5471 unsigned long flags;
5472 bool err_handling = true;
5473
5474 spin_lock_irqsave(hba->host->host_lock, flags);
5475 /*
5476 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5477 * device fatal error and/or DL NAC & REPLAY timeout errors.
5478 */
5479 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5480 goto out;
5481
5482 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5483 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005484 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR))) {
5485 /*
5486 * we have to do error recovery but atleast silence the error
5487 * logs.
5488 */
5489 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005490 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005491 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005492
5493 if ((hba->saved_err & UIC_ERROR) &&
5494 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5495 int err;
5496 /*
5497 * wait for 50ms to see if we can get any other errors or not.
5498 */
5499 spin_unlock_irqrestore(hba->host->host_lock, flags);
5500 msleep(50);
5501 spin_lock_irqsave(hba->host->host_lock, flags);
5502
5503 /*
5504 * now check if we have got any other severe errors other than
5505 * DL NAC error?
5506 */
5507 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5508 ((hba->saved_err & UIC_ERROR) &&
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005509 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))) {
5510 if (((hba->saved_err & INT_FATAL_ERRORS) ==
5511 DEVICE_FATAL_ERROR) || (hba->saved_uic_err &
5512 ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR))
5513 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005514 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005515 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005516
5517 /*
5518 * As DL NAC is the only error received so far, send out NOP
5519 * command to confirm if link is still active or not.
5520 * - If we don't get any response then do error recovery.
5521 * - If we get response then clear the DL NAC error bit.
5522 */
5523
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005524 /* silence the error logs from NOP command */
5525 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005526 spin_unlock_irqrestore(hba->host->host_lock, flags);
5527 err = ufshcd_verify_dev_init(hba);
5528 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005529 hba->silence_err_logs = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005530
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005531 if (err) {
5532 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005533 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005534 }
Yaniv Gardi583fa622016-03-10 17:37:13 +02005535
5536 /* Link seems to be alive hence ignore the DL NAC errors */
5537 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5538 hba->saved_err &= ~UIC_ERROR;
5539 /* clear NAC error */
5540 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5541 if (!hba->saved_uic_err) {
5542 err_handling = false;
5543 goto out;
5544 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005545 /*
5546 * there seems to be some errors other than NAC, so do error
5547 * recovery
5548 */
5549 hba->silence_err_logs = true;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005550 }
5551out:
5552 spin_unlock_irqrestore(hba->host->host_lock, flags);
5553 return err_handling;
5554}
5555
5556/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305557 * ufshcd_err_handler - handle UFS errors that require s/w attention
5558 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305559 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305560static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305561{
5562 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305563 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005564 bool err_xfer = false, err_tm = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305565 int err = 0;
5566 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005567 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305568
5569 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305570
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005571 ufsdbg_set_err_state(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305572 pm_runtime_get_sync(hba->dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005573 ufshcd_hold_all(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305574
5575 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005576 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305577 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305578
5579 hba->ufshcd_state = UFSHCD_STATE_RESET;
5580 ufshcd_set_eh_in_progress(hba);
5581
5582 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005583 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005584
5585 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5586 bool ret;
5587
5588 spin_unlock_irqrestore(hba->host->host_lock, flags);
5589 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5590 ret = ufshcd_quirk_dl_nac_errors(hba);
5591 spin_lock_irqsave(hba->host->host_lock, flags);
5592 if (!ret)
5593 goto skip_err_handling;
5594 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005595
5596 /*
5597 * Dump controller state before resetting. Transfer requests state
5598 * will be dump as part of the request completion.
5599 */
5600 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5601 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x",
5602 __func__, hba->saved_err, hba->saved_uic_err);
5603 if (!hba->silence_err_logs) {
5604 ufshcd_print_host_regs(hba);
5605 ufshcd_print_host_state(hba);
5606 ufshcd_print_pwr_info(hba);
5607 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5608 }
5609 }
5610
5611 if ((hba->saved_err & INT_FATAL_ERRORS) || hba->saved_ce_err ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005612 ((hba->saved_err & UIC_ERROR) &&
5613 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5614 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5615 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5616 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305617
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005618 /*
5619 * if host reset is required then skip clearing the pending
5620 * transfers forcefully because they will automatically get
5621 * cleared after link startup.
5622 */
5623 if (needs_reset)
5624 goto skip_pending_xfer_clear;
5625
5626 /* release lock as clear command might sleep */
5627 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305628 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005629 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5630 if (ufshcd_clear_cmd(hba, tag)) {
5631 err_xfer = true;
5632 goto lock_skip_pending_xfer_clear;
5633 }
5634 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305635
5636 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005637 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5638 if (ufshcd_clear_tm_cmd(hba, tag)) {
5639 err_tm = true;
5640 goto lock_skip_pending_xfer_clear;
5641 }
5642 }
5643
5644lock_skip_pending_xfer_clear:
5645 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305646
5647 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005648 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305649
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005650 if (err_xfer || err_tm)
5651 needs_reset = true;
5652
5653skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305654 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005655 if (needs_reset) {
5656 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5657
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005658 if (hba->saved_err & INT_FATAL_ERRORS)
5659 ufshcd_update_error_stats(hba,
5660 UFS_ERR_INT_FATAL_ERRORS);
5661 if (hba->saved_ce_err)
5662 ufshcd_update_error_stats(hba, UFS_ERR_CRYPTO_ENGINE);
5663
5664 if (hba->saved_err & UIC_ERROR)
5665 ufshcd_update_error_stats(hba,
5666 UFS_ERR_INT_UIC_ERROR);
5667
5668 if (err_xfer || err_tm)
5669 ufshcd_update_error_stats(hba,
5670 UFS_ERR_CLEAR_PEND_XFER_TM);
5671
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005672 /*
5673 * ufshcd_reset_and_restore() does the link reinitialization
5674 * which will need atleast one empty doorbell slot to send the
5675 * device management commands (NOP and query commands).
5676 * If there is no slot empty at this moment then free up last
5677 * slot forcefully.
5678 */
5679 if (hba->outstanding_reqs == max_doorbells)
5680 __ufshcd_transfer_req_compl(hba,
5681 (1UL << (hba->nutrs - 1)));
5682
5683 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305684 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005685 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305686 if (err) {
5687 dev_err(hba->dev, "%s: reset and restore failed\n",
5688 __func__);
5689 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5690 }
5691 /*
5692 * Inform scsi mid-layer that we did reset and allow to handle
5693 * Unit Attention properly.
5694 */
5695 scsi_report_bus_reset(hba->host, 0);
5696 hba->saved_err = 0;
5697 hba->saved_uic_err = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005698 hba->saved_ce_err = 0;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305699 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005700
Yaniv Gardi583fa622016-03-10 17:37:13 +02005701skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005702 if (!needs_reset) {
5703 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5704 if (hba->saved_err || hba->saved_uic_err)
5705 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5706 __func__, hba->saved_err, hba->saved_uic_err);
5707 }
5708
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005709 hba->silence_err_logs = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305710 ufshcd_clear_eh_in_progress(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305711out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005712 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005713 ufshcd_scsi_unblock_requests(hba);
5714 ufshcd_release_all(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305715 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305716}
5717
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005718static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5719 u32 reg)
5720{
5721 reg_hist->reg[reg_hist->pos] = reg;
5722 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5723 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5724}
5725
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305726/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305727 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5728 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305729 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305730static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305731{
5732 u32 reg;
5733
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005734 /* PHY layer lane error */
5735 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5736 /* Ignore LINERESET indication, as this is not an error */
5737 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5738 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5739 /*
5740 * To know whether this error is fatal or not, DB timeout
5741 * must be checked but this error is handled separately.
5742 */
5743 dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n",
5744 __func__, reg);
5745 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5746 }
5747
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305748 /* PA_INIT_ERROR is fatal and needs UIC reset */
5749 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005750 if (reg)
5751 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5752
5753 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305754 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005755 } else if (hba->dev_quirks &
Yaniv Gardi583fa622016-03-10 17:37:13 +02005756 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5757 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5758 hba->uic_error |=
5759 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5760 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5761 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5762 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305763
5764 /* UIC NL/TL/DME errors needs software retry */
5765 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005766 if (reg) {
5767 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305768 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005769 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305770
5771 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005772 if (reg) {
5773 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305774 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005775 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305776
5777 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005778 if (reg) {
5779 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305780 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005781 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305782
5783 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5784 __func__, hba->uic_error);
5785}
5786
5787/**
5788 * ufshcd_check_errors - Check for errors that need s/w attention
5789 * @hba: per-adapter instance
5790 */
5791static void ufshcd_check_errors(struct ufs_hba *hba)
5792{
5793 bool queue_eh_work = false;
5794
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005795 if (hba->errors & INT_FATAL_ERRORS || hba->ce_error)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305796 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305797
5798 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305799 hba->uic_error = 0;
5800 ufshcd_update_uic_error(hba);
5801 if (hba->uic_error)
5802 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305803 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305804
5805 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005806 /*
5807 * update the transfer error masks to sticky bits, let's do this
5808 * irrespective of current ufshcd_state.
5809 */
5810 hba->saved_err |= hba->errors;
5811 hba->saved_uic_err |= hba->uic_error;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005812 hba->saved_ce_err |= hba->ce_error;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005813
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305814 /* handle fatal errors only when link is functional */
5815 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5816 /* block commands from scsi mid-layer */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005817 __ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305818
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305819 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5820 schedule_work(&hba->eh_work);
5821 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305822 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305823 /*
5824 * if (!queue_eh_work) -
5825 * Other errors are either non-fatal where host recovers
5826 * itself without s/w intervention or errors that will be
5827 * handled by the SCSI core layer.
5828 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305829}
5830
5831/**
5832 * ufshcd_tmc_handler - handle task management function completion
5833 * @hba: per adapter instance
5834 */
5835static void ufshcd_tmc_handler(struct ufs_hba *hba)
5836{
5837 u32 tm_doorbell;
5838
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305839 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305840 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305841 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305842}
5843
5844/**
5845 * ufshcd_sl_intr - Interrupt service routine
5846 * @hba: per adapter instance
5847 * @intr_status: contains interrupts generated by the controller
5848 */
5849static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5850{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005851 ufsdbg_error_inject_dispatcher(hba,
5852 ERR_INJECT_INTR, intr_status, &intr_status);
5853
5854 ufshcd_vops_crypto_engine_get_status(hba, &hba->ce_error);
5855
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305856 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005857 if (hba->errors || hba->ce_error)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305858 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305859
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305860 if (intr_status & UFSHCD_UIC_MASK)
5861 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305862
5863 if (intr_status & UTP_TASK_REQ_COMPL)
5864 ufshcd_tmc_handler(hba);
5865
5866 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5867 ufshcd_transfer_req_compl(hba);
5868}
5869
5870/**
5871 * ufshcd_intr - Main interrupt service routine
5872 * @irq: irq number
5873 * @__hba: pointer to adapter instance
5874 *
5875 * Returns IRQ_HANDLED - If interrupt is valid
5876 * IRQ_NONE - If invalid interrupt
5877 */
5878static irqreturn_t ufshcd_intr(int irq, void *__hba)
5879{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005880 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305881 irqreturn_t retval = IRQ_NONE;
5882 struct ufs_hba *hba = __hba;
5883
5884 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305885 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005886 enabled_intr_status =
5887 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305888
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005889 if (intr_status)
Seungwon Jeon261ea452013-06-26 22:39:28 +05305890 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005891
5892 if (enabled_intr_status) {
5893 ufshcd_sl_intr(hba, enabled_intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305894 retval = IRQ_HANDLED;
5895 }
5896 spin_unlock(hba->host->host_lock);
5897 return retval;
5898}
5899
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305900static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5901{
5902 int err = 0;
5903 u32 mask = 1 << tag;
5904 unsigned long flags;
5905
5906 if (!test_bit(tag, &hba->outstanding_tasks))
5907 goto out;
5908
5909 spin_lock_irqsave(hba->host->host_lock, flags);
5910 ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
5911 spin_unlock_irqrestore(hba->host->host_lock, flags);
5912
5913 /* poll for max. 1 sec to clear door bell register by h/w */
5914 err = ufshcd_wait_for_register(hba,
5915 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005916 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305917out:
5918 return err;
5919}
5920
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305921/**
5922 * ufshcd_issue_tm_cmd - issues task management commands to controller
5923 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305924 * @lun_id: LUN ID to which TM command is sent
5925 * @task_id: task ID to which the TM command is applicable
5926 * @tm_function: task management function opcode
5927 * @tm_response: task management service response return value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305928 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305929 * Returns non-zero value on error, zero on success.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305930 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305931static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5932 u8 tm_function, u8 *tm_response)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305933{
5934 struct utp_task_req_desc *task_req_descp;
5935 struct utp_upiu_task_req *task_req_upiup;
5936 struct Scsi_Host *host;
5937 unsigned long flags;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305938 int free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305939 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305940 int task_tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305941
5942 host = hba->host;
5943
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305944 /*
5945 * Get free slot, sleep if slots are unavailable.
5946 * Even though we use wait_event() which sleeps indefinitely,
5947 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5948 */
5949 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005950 ufshcd_hold_all(hba);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305951
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305952 spin_lock_irqsave(host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305953 task_req_descp = hba->utmrdl_base_addr;
5954 task_req_descp += free_slot;
5955
5956 /* Configure task request descriptor */
5957 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5958 task_req_descp->header.dword_2 =
5959 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5960
5961 /* Configure task request UPIU */
5962 task_req_upiup =
5963 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305964 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305965 task_req_upiup->header.dword_0 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305966 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305967 lun_id, task_tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305968 task_req_upiup->header.dword_1 =
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305969 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005970 /*
5971 * The host shall provide the same value for LUN field in the basic
5972 * header and for Input Parameter.
5973 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305974 task_req_upiup->input_param1 = cpu_to_be32(lun_id);
5975 task_req_upiup->input_param2 = cpu_to_be32(task_id);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305976
5977 /* send command to the controller */
5978 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005979
5980 /* Make sure descriptors are ready before ringing the task doorbell */
5981 wmb();
5982
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305983 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07005984 /* Make sure that doorbell is committed immediately */
5985 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305986
5987 spin_unlock_irqrestore(host->host_lock, flags);
5988
5989 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305990 err = wait_event_timeout(hba->tm_wq,
5991 test_bit(free_slot, &hba->tm_condition),
5992 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305993 if (!err) {
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305994 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5995 __func__, tm_function);
5996 if (ufshcd_clear_tm_cmd(hba, free_slot))
5997 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5998 __func__, free_slot);
5999 err = -ETIMEDOUT;
6000 } else {
6001 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306002 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306003
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306004 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306005 ufshcd_put_tm_slot(hba, free_slot);
6006 wake_up(&hba->tm_tag_wq);
6007
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006008 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306009 return err;
6010}
6011
6012/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306013 * ufshcd_eh_device_reset_handler - device reset handler registered to
6014 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306015 * @cmd: SCSI command pointer
6016 *
6017 * Returns SUCCESS/FAILED
6018 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306019static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306020{
6021 struct Scsi_Host *host;
6022 struct ufs_hba *hba;
6023 unsigned int tag;
6024 u32 pos;
6025 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306026 u8 resp = 0xF;
6027 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306028 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306029
6030 host = cmd->device->host;
6031 hba = shost_priv(host);
6032 tag = cmd->request->tag;
6033
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306034 lrbp = &hba->lrb[tag];
6035 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6036 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306037 if (!err)
6038 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306039 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306040 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306041
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306042 /* clear the commands that were pending for corresponding LUN */
6043 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6044 if (hba->lrb[pos].lun == lrbp->lun) {
6045 err = ufshcd_clear_cmd(hba, pos);
6046 if (err)
6047 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306048 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306049 }
6050 spin_lock_irqsave(host->host_lock, flags);
6051 ufshcd_transfer_req_compl(hba);
6052 spin_unlock_irqrestore(host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006053
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306054out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006055 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306056 if (!err) {
6057 err = SUCCESS;
6058 } else {
6059 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6060 err = FAILED;
6061 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306062 return err;
6063}
6064
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006065static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6066{
6067 struct ufshcd_lrb *lrbp;
6068 int tag;
6069
6070 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6071 lrbp = &hba->lrb[tag];
6072 lrbp->req_abort_skip = true;
6073 }
6074}
6075
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306076/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306077 * ufshcd_abort - abort a specific command
6078 * @cmd: SCSI command pointer
6079 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306080 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6081 * command, and in host controller by clearing the door-bell register. There can
6082 * be race between controller sending the command to the device while abort is
6083 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6084 * really issued and then try to abort it.
6085 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306086 * Returns SUCCESS/FAILED
6087 */
6088static int ufshcd_abort(struct scsi_cmnd *cmd)
6089{
6090 struct Scsi_Host *host;
6091 struct ufs_hba *hba;
6092 unsigned long flags;
6093 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306094 int err = 0;
6095 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306096 u8 resp = 0xF;
6097 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006098 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306099
6100 host = cmd->device->host;
6101 hba = shost_priv(host);
6102 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02006103 if (!ufshcd_valid_tag(hba, tag)) {
6104 dev_err(hba->dev,
6105 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6106 __func__, tag, cmd, cmd->request);
6107 BUG();
6108 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306109
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006110 lrbp = &hba->lrb[tag];
6111
6112 ufshcd_update_error_stats(hba, UFS_ERR_TASK_ABORT);
6113
6114 /*
6115 * Task abort to the device W-LUN is illegal. When this command
6116 * will fail, due to spec violation, scsi err handling next step
6117 * will be to send LU reset which, again, is a spec violation.
6118 * To avoid these unnecessary/illegal step we skip to the last error
6119 * handling stage: reset and restore.
6120 */
6121 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6122 return ufshcd_eh_host_reset_handler(cmd);
6123
6124 ufshcd_hold_all(hba);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006125 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006126 /* If command is already aborted/completed, return SUCCESS */
6127 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6128 dev_err(hba->dev,
6129 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6130 __func__, tag, hba->outstanding_reqs, reg);
6131 goto out;
6132 }
6133
Dolev Ravive9d501b2014-07-01 12:22:37 +03006134 if (!(reg & (1 << tag))) {
6135 dev_err(hba->dev,
6136 "%s: cmd was completed, but without a notifying intr, tag = %d",
6137 __func__, tag);
6138 }
6139
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006140 /* Print Transfer Request of aborted task */
6141 dev_err(hba->dev, "%s: Device abort task at tag %d", __func__, tag);
6142
6143 /*
6144 * Print detailed info about aborted request.
6145 * As more than one request might get aborted at the same time,
6146 * print full information only for the first aborted request in order
6147 * to reduce repeated printouts. For other aborted requests only print
6148 * basic details.
6149 */
6150 scsi_print_command(cmd);
6151 if (!hba->req_abort_count) {
6152 ufshcd_print_host_regs(hba);
6153 ufshcd_print_host_state(hba);
6154 ufshcd_print_pwr_info(hba);
6155 ufshcd_print_trs(hba, 1 << tag, true);
6156 } else {
6157 ufshcd_print_trs(hba, 1 << tag, false);
6158 }
6159 hba->req_abort_count++;
6160
6161
6162 /* Skip task abort in case previous aborts failed and report failure */
6163 if (lrbp->req_abort_skip) {
6164 err = -EIO;
6165 goto out;
6166 }
6167
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306168 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6169 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6170 UFS_QUERY_TASK, &resp);
6171 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6172 /* cmd pending in the device */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006173 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d",
6174 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306175 break;
6176 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306177 /*
6178 * cmd not pending in the device, check if it is
6179 * in transition.
6180 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006181 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.",
6182 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306183 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6184 if (reg & (1 << tag)) {
6185 /* sleep for max. 200us to stabilize */
6186 usleep_range(100, 200);
6187 continue;
6188 }
6189 /* command completed already */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006190 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.",
6191 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306192 goto out;
6193 } else {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006194 dev_err(hba->dev,
6195 "%s: no response from device. tag = %d, err %d",
6196 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306197 if (!err)
6198 err = resp; /* service response error */
6199 goto out;
6200 }
6201 }
6202
6203 if (!poll_cnt) {
6204 err = -EBUSY;
6205 goto out;
6206 }
6207
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306208 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6209 UFS_ABORT_TASK, &resp);
6210 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006211 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306212 err = resp; /* service response error */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006213 dev_err(hba->dev, "%s: issued. tag = %d, err %d",
6214 __func__, tag, err);
6215 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306216 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306217 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306218
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306219 err = ufshcd_clear_cmd(hba, tag);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006220 if (err) {
6221 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d",
6222 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306223 goto out;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006224 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306225
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306226 scsi_dma_unmap(cmd);
6227
6228 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006229 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306230 hba->lrb[tag].cmd = NULL;
6231 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306232
6233 clear_bit_unlock(tag, &hba->lrb_in_use);
6234 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006235
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306236out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306237 if (!err) {
6238 err = SUCCESS;
6239 } else {
6240 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006241 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306242 err = FAILED;
6243 }
6244
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006245 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006246 * This ufshcd_release_all() corresponds to the original scsi cmd that
6247 * got aborted here (as we won't get any IRQ for it).
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006248 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006249 ufshcd_release_all(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306250 return err;
6251}
6252
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306253/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306254 * ufshcd_host_reset_and_restore - reset and restore host controller
6255 * @hba: per-adapter instance
6256 *
6257 * Note that host controller reset may issue DME_RESET to
6258 * local and remote (device) Uni-Pro stack and the attributes
6259 * are reset to default state.
6260 *
6261 * Returns zero on success, non-zero on failure
6262 */
6263static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6264{
6265 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306266 unsigned long flags;
6267
6268 /* Reset the host controller */
6269 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006270 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306271 spin_unlock_irqrestore(hba->host->host_lock, flags);
6272
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006273 /* scale up clocks to max frequency before full reinitialization */
6274 ufshcd_set_clk_freq(hba, true);
6275
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306276 err = ufshcd_hba_enable(hba);
6277 if (err)
6278 goto out;
6279
6280 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006281 err = ufshcd_probe_hba(hba);
6282
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006283 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306284 err = -EIO;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006285 goto out;
6286 }
6287
6288 if (!err) {
6289 err = ufshcd_vops_crypto_engine_reset(hba);
6290 if (err) {
6291 dev_err(hba->dev,
6292 "%s: failed to reset crypto engine %d\n",
6293 __func__, err);
6294 goto out;
6295 }
6296 }
6297
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306298out:
6299 if (err)
6300 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6301
6302 return err;
6303}
6304
6305/**
6306 * ufshcd_reset_and_restore - reset and re-initialize host/device
6307 * @hba: per-adapter instance
6308 *
6309 * Reset and recover device, host and re-establish link. This
6310 * is helpful to recover the communication in fatal error conditions.
6311 *
6312 * Returns zero on success, non-zero on failure
6313 */
6314static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6315{
6316 int err = 0;
6317 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006318 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306319
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006320 do {
6321 err = ufshcd_host_reset_and_restore(hba);
6322 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306323
6324 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006325 * There is no point proceeding even after failing
6326 * to recover after multiple retries.
6327 */
6328 if (err)
6329 BUG();
6330 /*
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306331 * After reset the door-bell might be cleared, complete
6332 * outstanding requests in s/w here.
6333 */
6334 spin_lock_irqsave(hba->host->host_lock, flags);
6335 ufshcd_transfer_req_compl(hba);
6336 ufshcd_tmc_handler(hba);
6337 spin_unlock_irqrestore(hba->host->host_lock, flags);
6338
6339 return err;
6340}
6341
6342/**
6343 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6344 * @cmd - SCSI command pointer
6345 *
6346 * Returns SUCCESS/FAILED
6347 */
6348static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6349{
6350 int err;
6351 unsigned long flags;
6352 struct ufs_hba *hba;
6353
6354 hba = shost_priv(cmd->device->host);
6355
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006356 ufshcd_hold_all(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306357 /*
6358 * Check if there is any race with fatal error handling.
6359 * If so, wait for it to complete. Even though fatal error
6360 * handling does reset and restore in some cases, don't assume
6361 * anything out of it. We are just avoiding race here.
6362 */
6363 do {
6364 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306365 if (!(work_pending(&hba->eh_work) ||
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306366 hba->ufshcd_state == UFSHCD_STATE_RESET))
6367 break;
6368 spin_unlock_irqrestore(hba->host->host_lock, flags);
6369 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306370 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306371 } while (1);
6372
6373 hba->ufshcd_state = UFSHCD_STATE_RESET;
6374 ufshcd_set_eh_in_progress(hba);
6375 spin_unlock_irqrestore(hba->host->host_lock, flags);
6376
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006377 ufshcd_update_error_stats(hba, UFS_ERR_EH);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306378 err = ufshcd_reset_and_restore(hba);
6379
6380 spin_lock_irqsave(hba->host->host_lock, flags);
6381 if (!err) {
6382 err = SUCCESS;
6383 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6384 } else {
6385 err = FAILED;
6386 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6387 }
6388 ufshcd_clear_eh_in_progress(hba);
6389 spin_unlock_irqrestore(hba->host->host_lock, flags);
6390
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006391 ufshcd_release_all(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306392 return err;
6393}
6394
6395/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006396 * ufshcd_get_max_icc_level - calculate the ICC level
6397 * @sup_curr_uA: max. current supported by the regulator
6398 * @start_scan: row at the desc table to start scan from
6399 * @buff: power descriptor buffer
6400 *
6401 * Returns calculated max ICC level for specific regulator
6402 */
6403static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6404{
6405 int i;
6406 int curr_uA;
6407 u16 data;
6408 u16 unit;
6409
6410 for (i = start_scan; i >= 0; i--) {
6411 data = be16_to_cpu(*((u16 *)(buff + 2*i)));
6412 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6413 ATTR_ICC_LVL_UNIT_OFFSET;
6414 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6415 switch (unit) {
6416 case UFSHCD_NANO_AMP:
6417 curr_uA = curr_uA / 1000;
6418 break;
6419 case UFSHCD_MILI_AMP:
6420 curr_uA = curr_uA * 1000;
6421 break;
6422 case UFSHCD_AMP:
6423 curr_uA = curr_uA * 1000 * 1000;
6424 break;
6425 case UFSHCD_MICRO_AMP:
6426 default:
6427 break;
6428 }
6429 if (sup_curr_uA >= curr_uA)
6430 break;
6431 }
6432 if (i < 0) {
6433 i = 0;
6434 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6435 }
6436
6437 return (u32)i;
6438}
6439
6440/**
6441 * ufshcd_calc_icc_level - calculate the max ICC level
6442 * In case regulators are not initialized we'll return 0
6443 * @hba: per-adapter instance
6444 * @desc_buf: power descriptor buffer to extract ICC levels from.
6445 * @len: length of desc_buff
6446 *
6447 * Returns calculated ICC level
6448 */
6449static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6450 u8 *desc_buf, int len)
6451{
6452 u32 icc_level = 0;
6453
6454 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6455 !hba->vreg_info.vccq2) {
6456 dev_err(hba->dev,
6457 "%s: Regulator capability was not set, actvIccLevel=%d",
6458 __func__, icc_level);
6459 goto out;
6460 }
6461
6462 if (hba->vreg_info.vcc)
6463 icc_level = ufshcd_get_max_icc_level(
6464 hba->vreg_info.vcc->max_uA,
6465 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6466 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6467
6468 if (hba->vreg_info.vccq)
6469 icc_level = ufshcd_get_max_icc_level(
6470 hba->vreg_info.vccq->max_uA,
6471 icc_level,
6472 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6473
6474 if (hba->vreg_info.vccq2)
6475 icc_level = ufshcd_get_max_icc_level(
6476 hba->vreg_info.vccq2->max_uA,
6477 icc_level,
6478 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6479out:
6480 return icc_level;
6481}
6482
6483static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6484{
6485 int ret;
6486 int buff_len = QUERY_DESC_POWER_MAX_SIZE;
6487 u8 desc_buf[QUERY_DESC_POWER_MAX_SIZE];
6488
6489 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6490 if (ret) {
6491 dev_err(hba->dev,
6492 "%s: Failed reading power descriptor.len = %d ret = %d",
6493 __func__, buff_len, ret);
6494 return;
6495 }
6496
6497 hba->init_prefetch_data.icc_level =
6498 ufshcd_find_max_sup_active_icc_level(hba,
6499 desc_buf, buff_len);
6500 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6501 __func__, hba->init_prefetch_data.icc_level);
6502
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02006503 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6504 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6505 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006506
6507 if (ret)
6508 dev_err(hba->dev,
6509 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6510 __func__, hba->init_prefetch_data.icc_level , ret);
6511
6512}
6513
6514/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006515 * ufshcd_scsi_add_wlus - Adds required W-LUs
6516 * @hba: per-adapter instance
6517 *
6518 * UFS device specification requires the UFS devices to support 4 well known
6519 * logical units:
6520 * "REPORT_LUNS" (address: 01h)
6521 * "UFS Device" (address: 50h)
6522 * "RPMB" (address: 44h)
6523 * "BOOT" (address: 30h)
6524 * UFS device's power management needs to be controlled by "POWER CONDITION"
6525 * field of SSU (START STOP UNIT) command. But this "power condition" field
6526 * will take effect only when its sent to "UFS device" well known logical unit
6527 * hence we require the scsi_device instance to represent this logical unit in
6528 * order for the UFS host driver to send the SSU command for power management.
6529
6530 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6531 * Block) LU so user space process can control this LU. User space may also
6532 * want to have access to BOOT LU.
6533
6534 * This function adds scsi device instances for each of all well known LUs
6535 * (except "REPORT LUNS" LU).
6536 *
6537 * Returns zero on success (all required W-LUs are added successfully),
6538 * non-zero error value on failure (if failed to add any of the required W-LU).
6539 */
6540static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6541{
6542 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006543 struct scsi_device *sdev_rpmb;
6544 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006545
6546 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6547 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6548 if (IS_ERR(hba->sdev_ufs_device)) {
6549 ret = PTR_ERR(hba->sdev_ufs_device);
6550 hba->sdev_ufs_device = NULL;
6551 goto out;
6552 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006553 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006554
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006555 sdev_boot = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006556 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006557 if (IS_ERR(sdev_boot)) {
6558 ret = PTR_ERR(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006559 goto remove_sdev_ufs_device;
6560 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006561 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006562
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006563 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006564 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006565 if (IS_ERR(sdev_rpmb)) {
6566 ret = PTR_ERR(sdev_rpmb);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006567 goto remove_sdev_boot;
6568 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006569 scsi_device_put(sdev_rpmb);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006570 goto out;
6571
6572remove_sdev_boot:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006573 scsi_remove_device(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006574remove_sdev_ufs_device:
6575 scsi_remove_device(hba->sdev_ufs_device);
6576out:
6577 return ret;
6578}
6579
6580/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006581 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6582 * @hba: per-adapter instance
6583 *
6584 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6585 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6586 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6587 * the hibern8 exit latency.
6588 *
6589 * Returns zero on success, non-zero error value on failure.
6590 */
6591static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6592{
6593 int ret = 0;
6594 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6595
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006596 if (!ufshcd_is_unipro_pa_params_tuning_req(hba))
6597 return 0;
6598
Yaniv Gardi37113102016-03-10 17:37:16 +02006599 ret = ufshcd_dme_peer_get(hba,
6600 UIC_ARG_MIB_SEL(
6601 RX_MIN_ACTIVATETIME_CAPABILITY,
6602 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6603 &peer_rx_min_activatetime);
6604 if (ret)
6605 goto out;
6606
6607 /* make sure proper unit conversion is applied */
6608 tuned_pa_tactivate =
6609 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6610 / PA_TACTIVATE_TIME_UNIT_US);
6611 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6612 tuned_pa_tactivate);
6613
6614out:
6615 return ret;
6616}
6617
6618/**
6619 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6620 * @hba: per-adapter instance
6621 *
6622 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6623 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6624 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6625 * This optimal value can help reduce the hibern8 exit latency.
6626 *
6627 * Returns zero on success, non-zero error value on failure.
6628 */
6629static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6630{
6631 int ret = 0;
6632 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6633 u32 max_hibern8_time, tuned_pa_hibern8time;
6634
6635 ret = ufshcd_dme_get(hba,
6636 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6637 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6638 &local_tx_hibern8_time_cap);
6639 if (ret)
6640 goto out;
6641
6642 ret = ufshcd_dme_peer_get(hba,
6643 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6644 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6645 &peer_rx_hibern8_time_cap);
6646 if (ret)
6647 goto out;
6648
6649 max_hibern8_time = max(local_tx_hibern8_time_cap,
6650 peer_rx_hibern8_time_cap);
6651 /* make sure proper unit conversion is applied */
6652 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6653 / PA_HIBERN8_TIME_UNIT_US);
6654 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6655 tuned_pa_hibern8time);
6656out:
6657 return ret;
6658}
6659
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006660/**
6661 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6662 * less than device PA_TACTIVATE time.
6663 * @hba: per-adapter instance
6664 *
6665 * Some UFS devices require host PA_TACTIVATE to be lower than device
6666 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6667 * for such devices.
6668 *
6669 * Returns zero on success, non-zero error value on failure.
6670 */
6671static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6672{
6673 int ret = 0;
6674 u32 granularity, peer_granularity;
6675 u32 pa_tactivate, peer_pa_tactivate;
6676 u32 pa_tactivate_us, peer_pa_tactivate_us;
6677 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6678
6679 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6680 &granularity);
6681 if (ret)
6682 goto out;
6683
6684 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6685 &peer_granularity);
6686 if (ret)
6687 goto out;
6688
6689 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6690 (granularity > PA_GRANULARITY_MAX_VAL)) {
6691 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6692 __func__, granularity);
6693 return -EINVAL;
6694 }
6695
6696 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6697 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6698 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6699 __func__, peer_granularity);
6700 return -EINVAL;
6701 }
6702
6703 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6704 if (ret)
6705 goto out;
6706
6707 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6708 &peer_pa_tactivate);
6709 if (ret)
6710 goto out;
6711
6712 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6713 peer_pa_tactivate_us = peer_pa_tactivate *
6714 gran_to_us_table[peer_granularity - 1];
6715
6716 if (pa_tactivate_us > peer_pa_tactivate_us) {
6717 u32 new_peer_pa_tactivate;
6718
6719 new_peer_pa_tactivate = pa_tactivate_us /
6720 gran_to_us_table[peer_granularity - 1];
6721 new_peer_pa_tactivate++;
6722 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6723 new_peer_pa_tactivate);
6724 }
6725
6726out:
6727 return ret;
6728}
6729
Yaniv Gardi37113102016-03-10 17:37:16 +02006730static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6731{
6732 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6733 ufshcd_tune_pa_tactivate(hba);
6734 ufshcd_tune_pa_hibern8time(hba);
6735 }
6736
6737 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6738 /* set 1ms timeout for PA_TACTIVATE */
6739 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006740
6741 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6742 ufshcd_quirk_tune_host_pa_tactivate(hba);
6743
6744 ufshcd_vops_apply_dev_quirks(hba);
6745}
6746
6747static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6748{
6749 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6750
6751 hba->ufs_stats.hibern8_exit_cnt = 0;
6752 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6753
6754 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6755 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6756 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6757 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6758 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6759
6760 hba->req_abort_count = 0;
6761}
6762
6763static void ufshcd_apply_pm_quirks(struct ufs_hba *hba)
6764{
6765 if (hba->dev_quirks & UFS_DEVICE_QUIRK_NO_LINK_OFF) {
6766 if (ufs_get_pm_lvl_to_link_pwr_state(hba->rpm_lvl) ==
6767 UIC_LINK_OFF_STATE) {
6768 hba->rpm_lvl =
6769 ufs_get_desired_pm_lvl_for_dev_link_state(
6770 UFS_SLEEP_PWR_MODE,
6771 UIC_LINK_HIBERN8_STATE);
6772 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed rpm_lvl to %d\n",
6773 hba->rpm_lvl);
6774 }
6775 if (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
6776 UIC_LINK_OFF_STATE) {
6777 hba->spm_lvl =
6778 ufs_get_desired_pm_lvl_for_dev_link_state(
6779 UFS_SLEEP_PWR_MODE,
6780 UIC_LINK_HIBERN8_STATE);
6781 dev_info(hba->dev, "UFS_DEVICE_QUIRK_NO_LINK_OFF enabled, changed spm_lvl to %d\n",
6782 hba->spm_lvl);
6783 }
6784 }
Yaniv Gardi37113102016-03-10 17:37:16 +02006785}
6786
6787/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006788 * ufshcd_probe_hba - probe hba to detect device and initialize
6789 * @hba: per-adapter instance
6790 *
6791 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306792 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006793static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306794{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306795 int ret;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006796 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306797
6798 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306799 if (ret)
6800 goto out;
6801
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006802 /* Enable auto hibern8 if supported */
6803 if (ufshcd_is_auto_hibern8_supported(hba))
6804 ufshcd_set_auto_hibern8_timer(hba,
6805 hba->hibern8_on_idle.delay_ms);
Yaniv Gardi50646362014-10-23 13:25:13 +03006806
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006807 /* Debug counters initialization */
6808 ufshcd_clear_dbg_ufs_stats(hba);
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006809 /* set the default level for urgent bkops */
6810 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6811 hba->is_urgent_bkops_lvl_checked = false;
6812
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006813 /* UniPro link is active now */
6814 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306815
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306816 ret = ufshcd_verify_dev_init(hba);
6817 if (ret)
6818 goto out;
6819
Dolev Raviv68078d52013-07-30 00:35:58 +05306820 ret = ufshcd_complete_dev_init(hba);
6821 if (ret)
6822 goto out;
6823
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006824 ufs_advertise_fixup_device(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006825 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006826
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006827 ufshcd_apply_pm_quirks(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006828 ret = ufshcd_set_vccq_rail_unused(hba,
6829 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6830 if (ret)
6831 goto out;
6832
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006833 /* UFS device is also active now */
6834 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306835 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006836 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306837
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006838 if (ufshcd_get_max_pwr_mode(hba)) {
6839 dev_err(hba->dev,
6840 "%s: Failed getting max supported power mode\n",
6841 __func__);
6842 } else {
6843 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006844 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006845 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6846 __func__, ret);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006847 goto out;
6848 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006849 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006850
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006851 /* set the state as operational after switching to desired gear */
6852 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006853 /*
6854 * If we are in error handling context or in power management callbacks
6855 * context, no need to scan the host
6856 */
6857 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6858 bool flag;
6859
6860 /* clear any previous UFS device information */
6861 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006862 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6863 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006864 hba->dev_info.f_power_on_wp_en = flag;
6865
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006866 if (!hba->is_init_prefetch)
6867 ufshcd_init_icc_levels(hba);
6868
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006869 /* Add required well known logical units to scsi mid layer */
6870 if (ufshcd_scsi_add_wlus(hba))
6871 goto out;
6872
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306873 scsi_scan_host(hba->host);
6874 pm_runtime_put_sync(hba->dev);
6875 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006876
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006877 /* Resume devfreq after UFS device is detected */
6878 if (ufshcd_is_clkscaling_supported(hba)) {
6879 memcpy(&hba->clk_scaling.saved_pwr_info.info, &hba->pwr_info,
6880 sizeof(struct ufs_pa_layer_attr));
6881 hba->clk_scaling.saved_pwr_info.is_valid = true;
6882 hba->clk_scaling.is_scaled_up = true;
6883 ufshcd_resume_clkscaling(hba);
6884 hba->clk_scaling.is_allowed = true;
6885 }
6886
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006887 if (!hba->is_init_prefetch)
6888 hba->is_init_prefetch = true;
6889
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306890out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006891 /*
6892 * If we failed to initialize the device or the device is not
6893 * present, turn off the power/clocks etc.
6894 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006895 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6896 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006897 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006898 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006899
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006900 trace_ufshcd_init(dev_name(hba->dev), ret,
6901 ktime_to_us(ktime_sub(ktime_get(), start)),
6902 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006903 return ret;
6904}
6905
6906/**
6907 * ufshcd_async_scan - asynchronous execution for probing hba
6908 * @data: data pointer to pass to this function
6909 * @cookie: cookie data
6910 */
6911static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6912{
6913 struct ufs_hba *hba = (struct ufs_hba *)data;
6914
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006915 /*
6916 * Don't allow clock gating and hibern8 enter for faster device
6917 * detection.
6918 */
6919 ufshcd_hold_all(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006920 ufshcd_probe_hba(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07006921 ufshcd_release_all(hba);
6922}
6923
6924/**
6925 * ufshcd_query_ioctl - perform user read queries
6926 * @hba: per-adapter instance
6927 * @lun: used for lun specific queries
6928 * @buffer: user space buffer for reading and submitting query data and params
6929 * @return: 0 for success negative error code otherwise
6930 *
6931 * Expected/Submitted buffer structure is struct ufs_ioctl_query_data.
6932 * It will read the opcode, idn and buf_length parameters, and, put the
6933 * response in the buffer field while updating the used size in buf_length.
6934 */
6935static int ufshcd_query_ioctl(struct ufs_hba *hba, u8 lun, void __user *buffer)
6936{
6937 struct ufs_ioctl_query_data *ioctl_data;
6938 int err = 0;
6939 int length = 0;
6940 void *data_ptr;
6941 bool flag;
6942 u32 att;
6943 u8 index;
6944 u8 *desc = NULL;
6945
6946 ioctl_data = kzalloc(sizeof(struct ufs_ioctl_query_data), GFP_KERNEL);
6947 if (!ioctl_data) {
6948 dev_err(hba->dev, "%s: Failed allocating %zu bytes\n", __func__,
6949 sizeof(struct ufs_ioctl_query_data));
6950 err = -ENOMEM;
6951 goto out;
6952 }
6953
6954 /* extract params from user buffer */
6955 err = copy_from_user(ioctl_data, buffer,
6956 sizeof(struct ufs_ioctl_query_data));
6957 if (err) {
6958 dev_err(hba->dev,
6959 "%s: Failed copying buffer from user, err %d\n",
6960 __func__, err);
6961 goto out_release_mem;
6962 }
6963
6964 /* verify legal parameters & send query */
6965 switch (ioctl_data->opcode) {
6966 case UPIU_QUERY_OPCODE_READ_DESC:
6967 switch (ioctl_data->idn) {
6968 case QUERY_DESC_IDN_DEVICE:
6969 case QUERY_DESC_IDN_CONFIGURAION:
6970 case QUERY_DESC_IDN_INTERCONNECT:
6971 case QUERY_DESC_IDN_GEOMETRY:
6972 case QUERY_DESC_IDN_POWER:
6973 index = 0;
6974 break;
6975 case QUERY_DESC_IDN_UNIT:
6976 if (!ufs_is_valid_unit_desc_lun(lun)) {
6977 dev_err(hba->dev,
6978 "%s: No unit descriptor for lun 0x%x\n",
6979 __func__, lun);
6980 err = -EINVAL;
6981 goto out_release_mem;
6982 }
6983 index = lun;
6984 break;
6985 default:
6986 goto out_einval;
6987 }
6988 length = min_t(int, QUERY_DESC_MAX_SIZE,
6989 ioctl_data->buf_size);
6990 desc = kzalloc(length, GFP_KERNEL);
6991 if (!desc) {
6992 dev_err(hba->dev, "%s: Failed allocating %d bytes\n",
6993 __func__, length);
6994 err = -ENOMEM;
6995 goto out_release_mem;
6996 }
6997 err = ufshcd_query_descriptor(hba, ioctl_data->opcode,
6998 ioctl_data->idn, index, 0, desc, &length);
6999 break;
7000 case UPIU_QUERY_OPCODE_READ_ATTR:
7001 switch (ioctl_data->idn) {
7002 case QUERY_ATTR_IDN_BOOT_LU_EN:
7003 case QUERY_ATTR_IDN_POWER_MODE:
7004 case QUERY_ATTR_IDN_ACTIVE_ICC_LVL:
7005 case QUERY_ATTR_IDN_OOO_DATA_EN:
7006 case QUERY_ATTR_IDN_BKOPS_STATUS:
7007 case QUERY_ATTR_IDN_PURGE_STATUS:
7008 case QUERY_ATTR_IDN_MAX_DATA_IN:
7009 case QUERY_ATTR_IDN_MAX_DATA_OUT:
7010 case QUERY_ATTR_IDN_REF_CLK_FREQ:
7011 case QUERY_ATTR_IDN_CONF_DESC_LOCK:
7012 case QUERY_ATTR_IDN_MAX_NUM_OF_RTT:
7013 case QUERY_ATTR_IDN_EE_CONTROL:
7014 case QUERY_ATTR_IDN_EE_STATUS:
7015 case QUERY_ATTR_IDN_SECONDS_PASSED:
7016 index = 0;
7017 break;
7018 case QUERY_ATTR_IDN_DYN_CAP_NEEDED:
7019 case QUERY_ATTR_IDN_CORR_PRG_BLK_NUM:
7020 index = lun;
7021 break;
7022 default:
7023 goto out_einval;
7024 }
7025 err = ufshcd_query_attr(hba, ioctl_data->opcode, ioctl_data->idn,
7026 index, 0, &att);
7027 break;
7028
7029 case UPIU_QUERY_OPCODE_WRITE_ATTR:
7030 err = copy_from_user(&att,
7031 buffer + sizeof(struct ufs_ioctl_query_data),
7032 sizeof(u32));
7033 if (err) {
7034 dev_err(hba->dev,
7035 "%s: Failed copying buffer from user, err %d\n",
7036 __func__, err);
7037 goto out_release_mem;
7038 }
7039
7040 switch (ioctl_data->idn) {
7041 case QUERY_ATTR_IDN_BOOT_LU_EN:
7042 index = 0;
7043 if (att > QUERY_ATTR_IDN_BOOT_LU_EN_MAX) {
7044 dev_err(hba->dev,
7045 "%s: Illegal ufs query ioctl data, opcode 0x%x, idn 0x%x, att 0x%x\n",
7046 __func__, ioctl_data->opcode,
7047 (unsigned int)ioctl_data->idn, att);
7048 err = -EINVAL;
7049 goto out_release_mem;
7050 }
7051 break;
7052 default:
7053 goto out_einval;
7054 }
7055 err = ufshcd_query_attr(hba, ioctl_data->opcode,
7056 ioctl_data->idn, index, 0, &att);
7057 break;
7058
7059 case UPIU_QUERY_OPCODE_READ_FLAG:
7060 switch (ioctl_data->idn) {
7061 case QUERY_FLAG_IDN_FDEVICEINIT:
7062 case QUERY_FLAG_IDN_PERMANENT_WPE:
7063 case QUERY_FLAG_IDN_PWR_ON_WPE:
7064 case QUERY_FLAG_IDN_BKOPS_EN:
7065 case QUERY_FLAG_IDN_PURGE_ENABLE:
7066 case QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL:
7067 case QUERY_FLAG_IDN_BUSY_RTC:
7068 break;
7069 default:
7070 goto out_einval;
7071 }
7072 err = ufshcd_query_flag_retry(hba, ioctl_data->opcode,
7073 ioctl_data->idn, &flag);
7074 break;
7075 default:
7076 goto out_einval;
7077 }
7078
7079 if (err) {
7080 dev_err(hba->dev, "%s: Query for idn %d failed\n", __func__,
7081 ioctl_data->idn);
7082 goto out_release_mem;
7083 }
7084
7085 /*
7086 * copy response data
7087 * As we might end up reading less data then what is specified in
7088 * "ioctl_data->buf_size". So we are updating "ioctl_data->
7089 * buf_size" to what exactly we have read.
7090 */
7091 switch (ioctl_data->opcode) {
7092 case UPIU_QUERY_OPCODE_READ_DESC:
7093 ioctl_data->buf_size = min_t(int, ioctl_data->buf_size, length);
7094 data_ptr = desc;
7095 break;
7096 case UPIU_QUERY_OPCODE_READ_ATTR:
7097 ioctl_data->buf_size = sizeof(u32);
7098 data_ptr = &att;
7099 break;
7100 case UPIU_QUERY_OPCODE_READ_FLAG:
7101 ioctl_data->buf_size = 1;
7102 data_ptr = &flag;
7103 break;
7104 case UPIU_QUERY_OPCODE_WRITE_ATTR:
7105 goto out_release_mem;
7106 default:
7107 goto out_einval;
7108 }
7109
7110 /* copy to user */
7111 err = copy_to_user(buffer, ioctl_data,
7112 sizeof(struct ufs_ioctl_query_data));
7113 if (err)
7114 dev_err(hba->dev, "%s: Failed copying back to user.\n",
7115 __func__);
7116 err = copy_to_user(buffer + sizeof(struct ufs_ioctl_query_data),
7117 data_ptr, ioctl_data->buf_size);
7118 if (err)
7119 dev_err(hba->dev, "%s: err %d copying back to user.\n",
7120 __func__, err);
7121 goto out_release_mem;
7122
7123out_einval:
7124 dev_err(hba->dev,
7125 "%s: illegal ufs query ioctl data, opcode 0x%x, idn 0x%x\n",
7126 __func__, ioctl_data->opcode, (unsigned int)ioctl_data->idn);
7127 err = -EINVAL;
7128out_release_mem:
7129 kfree(ioctl_data);
7130 kfree(desc);
7131out:
7132 return err;
7133}
7134
7135/**
7136 * ufshcd_ioctl - ufs ioctl callback registered in scsi_host
7137 * @dev: scsi device required for per LUN queries
7138 * @cmd: command opcode
7139 * @buffer: user space buffer for transferring data
7140 *
7141 * Supported commands:
7142 * UFS_IOCTL_QUERY
7143 */
7144static int ufshcd_ioctl(struct scsi_device *dev, int cmd, void __user *buffer)
7145{
7146 struct ufs_hba *hba = shost_priv(dev->host);
7147 int err = 0;
7148
7149 BUG_ON(!hba);
7150 if (!buffer) {
7151 dev_err(hba->dev, "%s: User buffer is NULL!\n", __func__);
7152 return -EINVAL;
7153 }
7154
7155 switch (cmd) {
7156 case UFS_IOCTL_QUERY:
7157 pm_runtime_get_sync(hba->dev);
7158 err = ufshcd_query_ioctl(hba, ufshcd_scsi_to_upiu_lun(dev->lun),
7159 buffer);
7160 pm_runtime_put_sync(hba->dev);
7161 break;
7162 default:
7163 err = -ENOIOCTLCMD;
7164 dev_dbg(hba->dev, "%s: Unsupported ioctl cmd %d\n", __func__,
7165 cmd);
7166 break;
7167 }
7168
7169 return err;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307170}
7171
Yaniv Gardif550c652016-03-10 17:37:07 +02007172static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7173{
7174 unsigned long flags;
7175 struct Scsi_Host *host;
7176 struct ufs_hba *hba;
7177 int index;
7178 bool found = false;
7179
7180 if (!scmd || !scmd->device || !scmd->device->host)
7181 return BLK_EH_NOT_HANDLED;
7182
7183 host = scmd->device->host;
7184 hba = shost_priv(host);
7185 if (!hba)
7186 return BLK_EH_NOT_HANDLED;
7187
7188 spin_lock_irqsave(host->host_lock, flags);
7189
7190 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7191 if (hba->lrb[index].cmd == scmd) {
7192 found = true;
7193 break;
7194 }
7195 }
7196
7197 spin_unlock_irqrestore(host->host_lock, flags);
7198
7199 /*
7200 * Bypass SCSI error handling and reset the block layer timer if this
7201 * SCSI command was not actually dispatched to UFS driver, otherwise
7202 * let SCSI layer handle the error as usual.
7203 */
7204 return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
7205}
7206
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307207static struct scsi_host_template ufshcd_driver_template = {
7208 .module = THIS_MODULE,
7209 .name = UFSHCD,
7210 .proc_name = UFSHCD,
7211 .queuecommand = ufshcd_queuecommand,
7212 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007213 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307214 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007215 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307216 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307217 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7218 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007219 .eh_timed_out = ufshcd_eh_timed_out,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007220 .ioctl = ufshcd_ioctl,
7221#ifdef CONFIG_COMPAT
7222 .compat_ioctl = ufshcd_ioctl,
7223#endif
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307224 .this_id = -1,
7225 .sg_tablesize = SG_ALL,
7226 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7227 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007228 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007229 .track_queue_depth = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307230};
7231
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007232static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7233 int ua)
7234{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007235 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007236
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007237 if (!vreg)
7238 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007239
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007240 ret = regulator_set_load(vreg->reg, ua);
7241 if (ret < 0) {
7242 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7243 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007244 }
7245
7246 return ret;
7247}
7248
7249static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7250 struct ufs_vreg *vreg)
7251{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007252 if (!vreg)
7253 return 0;
7254 else if (vreg->unused)
7255 return 0;
7256 else
7257 return ufshcd_config_vreg_load(hba->dev, vreg,
7258 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007259}
7260
7261static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7262 struct ufs_vreg *vreg)
7263{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007264 if (!vreg)
7265 return 0;
7266 else if (vreg->unused)
7267 return 0;
7268 else
7269 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007270}
7271
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007272static int ufshcd_config_vreg(struct device *dev,
7273 struct ufs_vreg *vreg, bool on)
7274{
7275 int ret = 0;
7276 struct regulator *reg = vreg->reg;
7277 const char *name = vreg->name;
7278 int min_uV, uA_load;
7279
7280 BUG_ON(!vreg);
7281
7282 if (regulator_count_voltages(reg) > 0) {
7283 min_uV = on ? vreg->min_uV : 0;
7284 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7285 if (ret) {
7286 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7287 __func__, name, ret);
7288 goto out;
7289 }
7290
7291 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007292 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7293 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007294 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007295 }
7296out:
7297 return ret;
7298}
7299
7300static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7301{
7302 int ret = 0;
7303
Yaniv Gardi60f01872016-03-10 17:37:11 +02007304 if (!vreg)
7305 goto out;
7306 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007307 goto out;
7308
7309 ret = ufshcd_config_vreg(dev, vreg, true);
7310 if (!ret)
7311 ret = regulator_enable(vreg->reg);
7312
7313 if (!ret)
7314 vreg->enabled = true;
7315 else
7316 dev_err(dev, "%s: %s enable failed, err=%d\n",
7317 __func__, vreg->name, ret);
7318out:
7319 return ret;
7320}
7321
7322static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7323{
7324 int ret = 0;
7325
Yaniv Gardi60f01872016-03-10 17:37:11 +02007326 if (!vreg)
7327 goto out;
7328 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007329 goto out;
7330
7331 ret = regulator_disable(vreg->reg);
7332
7333 if (!ret) {
7334 /* ignore errors on applying disable config */
7335 ufshcd_config_vreg(dev, vreg, false);
7336 vreg->enabled = false;
7337 } else {
7338 dev_err(dev, "%s: %s disable failed, err=%d\n",
7339 __func__, vreg->name, ret);
7340 }
7341out:
7342 return ret;
7343}
7344
7345static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7346{
7347 int ret = 0;
7348 struct device *dev = hba->dev;
7349 struct ufs_vreg_info *info = &hba->vreg_info;
7350
7351 if (!info)
7352 goto out;
7353
7354 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7355 if (ret)
7356 goto out;
7357
7358 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7359 if (ret)
7360 goto out;
7361
7362 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7363 if (ret)
7364 goto out;
7365
7366out:
7367 if (ret) {
7368 ufshcd_toggle_vreg(dev, info->vccq2, false);
7369 ufshcd_toggle_vreg(dev, info->vccq, false);
7370 ufshcd_toggle_vreg(dev, info->vcc, false);
7371 }
7372 return ret;
7373}
7374
Raviv Shvili6a771a62014-09-25 15:32:24 +03007375static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7376{
7377 struct ufs_vreg_info *info = &hba->vreg_info;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007378 int ret = 0;
Raviv Shvili6a771a62014-09-25 15:32:24 +03007379
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007380 if (info->vdd_hba) {
7381 ret = ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007382
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007383 if (!ret)
7384 ufshcd_vops_update_sec_cfg(hba, on);
7385 }
7386
7387 return ret;
Raviv Shvili6a771a62014-09-25 15:32:24 +03007388}
7389
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007390static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7391{
7392 int ret = 0;
7393
7394 if (!vreg)
7395 goto out;
7396
7397 vreg->reg = devm_regulator_get(dev, vreg->name);
7398 if (IS_ERR(vreg->reg)) {
7399 ret = PTR_ERR(vreg->reg);
7400 dev_err(dev, "%s: %s get failed, err=%d\n",
7401 __func__, vreg->name, ret);
7402 }
7403out:
7404 return ret;
7405}
7406
7407static int ufshcd_init_vreg(struct ufs_hba *hba)
7408{
7409 int ret = 0;
7410 struct device *dev = hba->dev;
7411 struct ufs_vreg_info *info = &hba->vreg_info;
7412
7413 if (!info)
7414 goto out;
7415
7416 ret = ufshcd_get_vreg(dev, info->vcc);
7417 if (ret)
7418 goto out;
7419
7420 ret = ufshcd_get_vreg(dev, info->vccq);
7421 if (ret)
7422 goto out;
7423
7424 ret = ufshcd_get_vreg(dev, info->vccq2);
7425out:
7426 return ret;
7427}
7428
Raviv Shvili6a771a62014-09-25 15:32:24 +03007429static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7430{
7431 struct ufs_vreg_info *info = &hba->vreg_info;
7432
7433 if (info)
7434 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7435
7436 return 0;
7437}
7438
Yaniv Gardi60f01872016-03-10 17:37:11 +02007439static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
7440{
7441 int ret = 0;
7442 struct ufs_vreg_info *info = &hba->vreg_info;
7443
7444 if (!info)
7445 goto out;
7446 else if (!info->vccq)
7447 goto out;
7448
7449 if (unused) {
7450 /* shut off the rail here */
7451 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
7452 /*
7453 * Mark this rail as no longer used, so it doesn't get enabled
7454 * later by mistake
7455 */
7456 if (!ret)
7457 info->vccq->unused = true;
7458 } else {
7459 /*
7460 * rail should have been already enabled hence just make sure
7461 * that unused flag is cleared.
7462 */
7463 info->vccq->unused = false;
7464 }
7465out:
7466 return ret;
7467}
7468
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007469static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7470 bool skip_ref_clk, bool is_gating_context)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007471{
7472 int ret = 0;
7473 struct ufs_clk_info *clki;
7474 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007475 unsigned long flags;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007476 ktime_t start = ktime_get();
7477 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007478
7479 if (!head || list_empty(head))
7480 goto out;
7481
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007482 /*
7483 * vendor specific setup_clocks ops may depend on clocks managed by
7484 * this standard driver hence call the vendor specific setup_clocks
7485 * before disabling the clocks managed here.
7486 */
7487 if (!on) {
7488 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
7489 if (ret)
7490 return ret;
7491 }
7492
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007493 list_for_each_entry(clki, head, list) {
7494 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007495 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7496 continue;
7497
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007498 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007499 if (on && !clki->enabled) {
7500 ret = clk_prepare_enable(clki->clk);
7501 if (ret) {
7502 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7503 __func__, clki->name, ret);
7504 goto out;
7505 }
7506 } else if (!on && clki->enabled) {
7507 clk_disable_unprepare(clki->clk);
7508 }
7509 clki->enabled = on;
7510 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7511 clki->name, on ? "en" : "dis");
7512 }
7513 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007514
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007515 /*
7516 * vendor specific setup_clocks ops may depend on clocks managed by
7517 * this standard driver hence call the vendor specific setup_clocks
7518 * after enabling the clocks managed here.
7519 */
7520 if (on)
7521 ret = ufshcd_vops_setup_clocks(hba, on, is_gating_context);
7522
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007523out:
7524 if (ret) {
7525 list_for_each_entry(clki, head, list) {
7526 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7527 clk_disable_unprepare(clki->clk);
7528 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007529 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007530 spin_lock_irqsave(hba->host->host_lock, flags);
7531 hba->clk_gating.state = CLKS_ON;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007532 trace_ufshcd_clk_gating(dev_name(hba->dev),
7533 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007534 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007535 /* restore the secure configuration as clocks are enabled */
7536 ufshcd_vops_update_sec_cfg(hba, true);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007537 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007538
7539 if (clk_state_changed)
7540 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7541 (on ? "on" : "off"),
7542 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007543 return ret;
7544}
7545
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007546static int ufshcd_enable_clocks(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007547{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007548 return ufshcd_setup_clocks(hba, true, false, false);
7549}
7550
7551static int ufshcd_disable_clocks(struct ufs_hba *hba,
7552 bool is_gating_context)
7553{
7554 return ufshcd_setup_clocks(hba, false, false, is_gating_context);
7555}
7556
7557static int ufshcd_disable_clocks_skip_ref_clk(struct ufs_hba *hba,
7558 bool is_gating_context)
7559{
7560 return ufshcd_setup_clocks(hba, false, true, is_gating_context);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007561}
7562
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007563static int ufshcd_init_clocks(struct ufs_hba *hba)
7564{
7565 int ret = 0;
7566 struct ufs_clk_info *clki;
7567 struct device *dev = hba->dev;
7568 struct list_head *head = &hba->clk_list_head;
7569
7570 if (!head || list_empty(head))
7571 goto out;
7572
7573 list_for_each_entry(clki, head, list) {
7574 if (!clki->name)
7575 continue;
7576
7577 clki->clk = devm_clk_get(dev, clki->name);
7578 if (IS_ERR(clki->clk)) {
7579 ret = PTR_ERR(clki->clk);
7580 dev_err(dev, "%s: %s clk get failed, %d\n",
7581 __func__, clki->name, ret);
7582 goto out;
7583 }
7584
7585 if (clki->max_freq) {
7586 ret = clk_set_rate(clki->clk, clki->max_freq);
7587 if (ret) {
7588 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7589 __func__, clki->name,
7590 clki->max_freq, ret);
7591 goto out;
7592 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007593 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007594 }
7595 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7596 clki->name, clk_get_rate(clki->clk));
7597 }
7598out:
7599 return ret;
7600}
7601
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007602static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7603{
7604 int err = 0;
7605
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007606 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007607 goto out;
7608
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007609 err = ufshcd_vops_init(hba);
7610 if (err)
7611 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007612
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007613 err = ufshcd_vops_setup_regulators(hba, true);
7614 if (err)
7615 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007616
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007617 goto out;
7618
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007619out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007620 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007621out:
7622 if (err)
7623 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007624 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007625 return err;
7626}
7627
7628static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7629{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007630 if (!hba->var || !hba->var->vops)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007631 return;
7632
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007633 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007634
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007635 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007636}
7637
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007638static int ufshcd_hba_init(struct ufs_hba *hba)
7639{
7640 int err;
7641
Raviv Shvili6a771a62014-09-25 15:32:24 +03007642 /*
7643 * Handle host controller power separately from the UFS device power
7644 * rails as it will help controlling the UFS host controller power
7645 * collapse easily which is different than UFS device power collapse.
7646 * Also, enable the host controller power before we go ahead with rest
7647 * of the initialization here.
7648 */
7649 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007650 if (err)
7651 goto out;
7652
Raviv Shvili6a771a62014-09-25 15:32:24 +03007653 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007654 if (err)
7655 goto out;
7656
Raviv Shvili6a771a62014-09-25 15:32:24 +03007657 err = ufshcd_init_clocks(hba);
7658 if (err)
7659 goto out_disable_hba_vreg;
7660
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007661 err = ufshcd_enable_clocks(hba);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007662 if (err)
7663 goto out_disable_hba_vreg;
7664
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007665 err = ufshcd_init_vreg(hba);
7666 if (err)
7667 goto out_disable_clks;
7668
7669 err = ufshcd_setup_vreg(hba, true);
7670 if (err)
7671 goto out_disable_clks;
7672
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007673 err = ufshcd_variant_hba_init(hba);
7674 if (err)
7675 goto out_disable_vreg;
7676
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007677 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007678 goto out;
7679
7680out_disable_vreg:
7681 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007682out_disable_clks:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007683 ufshcd_disable_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007684out_disable_hba_vreg:
7685 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007686out:
7687 return err;
7688}
7689
7690static void ufshcd_hba_exit(struct ufs_hba *hba)
7691{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007692 if (hba->is_powered) {
7693 ufshcd_variant_hba_exit(hba);
7694 ufshcd_setup_vreg(hba, false);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007695 if (ufshcd_is_clkscaling_supported(hba)) {
7696 ufshcd_suspend_clkscaling(hba);
7697 destroy_workqueue(hba->clk_scaling.workq);
7698 }
7699 ufshcd_disable_clocks(hba, false);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007700 ufshcd_setup_hba_vreg(hba, false);
7701 hba->is_powered = false;
7702 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007703}
7704
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007705static int
7706ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307707{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007708 unsigned char cmd[6] = {REQUEST_SENSE,
7709 0,
7710 0,
7711 0,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007712 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007713 0};
7714 char *buffer;
7715 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307716
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007717 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007718 if (!buffer) {
7719 ret = -ENOMEM;
7720 goto out;
7721 }
7722
7723 ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007724 UFSHCD_REQ_SENSE_SIZE, NULL,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007725 msecs_to_jiffies(1000), 3, NULL, REQ_PM);
7726 if (ret)
7727 pr_err("%s: failed with err %d\n", __func__, ret);
7728
7729 kfree(buffer);
7730out:
7731 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307732}
7733
7734/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007735 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7736 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307737 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007738 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307739 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007740 * Returns 0 if requested power mode is set successfully
7741 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307742 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007743static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7744 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307745{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007746 unsigned char cmd[6] = { START_STOP };
7747 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007748 struct scsi_device *sdp;
7749 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007750 int ret;
7751
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007752 spin_lock_irqsave(hba->host->host_lock, flags);
7753 sdp = hba->sdev_ufs_device;
7754 if (sdp) {
7755 ret = scsi_device_get(sdp);
7756 if (!ret && !scsi_device_online(sdp)) {
7757 ret = -ENODEV;
7758 scsi_device_put(sdp);
7759 }
7760 } else {
7761 ret = -ENODEV;
7762 }
7763 spin_unlock_irqrestore(hba->host->host_lock, flags);
7764
7765 if (ret)
7766 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007767
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307768 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007769 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7770 * handling, which would wait for host to be resumed. Since we know
7771 * we are functional while we are here, skip host resume in error
7772 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307773 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007774 hba->host->eh_noresume = 1;
7775 if (hba->wlun_dev_clr_ua) {
7776 ret = ufshcd_send_request_sense(hba, sdp);
7777 if (ret)
7778 goto out;
7779 /* Unit attention condition is cleared now */
7780 hba->wlun_dev_clr_ua = false;
7781 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307782
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007783 cmd[4] = pwr_mode << 4;
7784
7785 /*
7786 * Current function would be generally called from the power management
7787 * callbacks hence set the REQ_PM flag so that it doesn't resume the
7788 * already suspended childs.
7789 */
7790 ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
7791 START_STOP_TIMEOUT, 0, NULL, REQ_PM);
7792 if (ret) {
7793 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007794 "START_STOP failed for power mode: %d, result %x\n",
7795 pwr_mode, ret);
Hannes Reinecke21045512015-01-08 07:43:46 +01007796 if (driver_byte(ret) & DRIVER_SENSE)
7797 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007798 }
7799
7800 if (!ret)
7801 hba->curr_dev_pwr_mode = pwr_mode;
7802out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007803 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007804 hba->host->eh_noresume = 0;
7805 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307806}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307807
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007808static int ufshcd_link_state_transition(struct ufs_hba *hba,
7809 enum uic_link_state req_link_state,
7810 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307811{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007812 int ret = 0;
7813
7814 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307815 return 0;
7816
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007817 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7818 ret = ufshcd_uic_hibern8_enter(hba);
7819 if (!ret)
7820 ufshcd_set_link_hibern8(hba);
7821 else
7822 goto out;
7823 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307824 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007825 * If autobkops is enabled, link can't be turned off because
7826 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307827 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007828 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7829 (!check_for_bkops || (check_for_bkops &&
7830 !hba->auto_bkops_enabled))) {
7831 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007832 * Let's make sure that link is in low power mode, we are doing
7833 * this currently by putting the link in Hibern8. Otherway to
7834 * put the link in low power mode is to send the DME end point
7835 * to device and then send the DME reset command to local
7836 * unipro. But putting the link in hibern8 is much faster.
7837 */
7838 ret = ufshcd_uic_hibern8_enter(hba);
7839 if (ret)
7840 goto out;
7841 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007842 * Change controller state to "reset state" which
7843 * should also put the link in off/reset state
7844 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007845 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007846 /*
7847 * TODO: Check if we need any delay to make sure that
7848 * controller is reset
7849 */
7850 ufshcd_set_link_off(hba);
7851 }
7852
7853out:
7854 return ret;
7855}
7856
7857static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7858{
7859 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007860 * It seems some UFS devices may keep drawing more than sleep current
7861 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7862 * To avoid this situation, add 2ms delay before putting these UFS
7863 * rails in LPM mode.
7864 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007865 if (!ufshcd_is_link_active(hba))
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007866 usleep_range(2000, 2100);
7867
7868 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007869 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7870 * power.
7871 *
7872 * If UFS device and link is in OFF state, all power supplies (VCC,
7873 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7874 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7875 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7876 *
7877 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7878 * in low power state which would save some power.
7879 */
7880 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7881 !hba->dev_info.is_lu_power_on_wp) {
7882 ufshcd_setup_vreg(hba, false);
7883 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7884 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7885 if (!ufshcd_is_link_active(hba)) {
7886 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7887 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7888 }
7889 }
7890}
7891
7892static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7893{
7894 int ret = 0;
7895
7896 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7897 !hba->dev_info.is_lu_power_on_wp) {
7898 ret = ufshcd_setup_vreg(hba, true);
7899 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007900 if (!ret && !ufshcd_is_link_active(hba)) {
7901 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7902 if (ret)
7903 goto vcc_disable;
7904 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7905 if (ret)
7906 goto vccq_lpm;
7907 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007908 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007909 }
7910 goto out;
7911
7912vccq_lpm:
7913 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7914vcc_disable:
7915 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7916out:
7917 return ret;
7918}
7919
7920static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7921{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007922 if (ufshcd_is_link_off(hba) ||
7923 (ufshcd_is_link_hibern8(hba)
7924 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007925 ufshcd_setup_hba_vreg(hba, false);
7926}
7927
7928static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7929{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007930 if (ufshcd_is_link_off(hba) ||
7931 (ufshcd_is_link_hibern8(hba)
7932 && ufshcd_is_power_collapse_during_hibern8_allowed(hba)))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007933 ufshcd_setup_hba_vreg(hba, true);
7934}
7935
7936/**
7937 * ufshcd_suspend - helper function for suspend operations
7938 * @hba: per adapter instance
7939 * @pm_op: desired low power operation type
7940 *
7941 * This function will try to put the UFS device and link into low power
7942 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7943 * (System PM level).
7944 *
7945 * If this function is called during shutdown, it will make sure that
7946 * both UFS device and UFS link is powered off.
7947 *
7948 * NOTE: UFS device & link must be active before we enter in this function.
7949 *
7950 * Returns 0 for success and non-zero for failure
7951 */
7952static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7953{
7954 int ret = 0;
7955 enum ufs_pm_level pm_lvl;
7956 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7957 enum uic_link_state req_link_state;
7958
7959 hba->pm_op_in_progress = 1;
7960 if (!ufshcd_is_shutdown_pm(pm_op)) {
7961 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7962 hba->rpm_lvl : hba->spm_lvl;
7963 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7964 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7965 } else {
7966 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7967 req_link_state = UIC_LINK_OFF_STATE;
7968 }
7969
7970 /*
7971 * If we can't transition into any of the low power modes
7972 * just gate the clocks.
7973 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007974 WARN_ON(hba->hibern8_on_idle.is_enabled &&
7975 hba->hibern8_on_idle.active_reqs);
7976 ufshcd_hold_all(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007977 hba->clk_gating.is_suspended = true;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007978 hba->hibern8_on_idle.is_suspended = true;
7979
7980 if (hba->clk_scaling.is_allowed) {
7981 cancel_work_sync(&hba->clk_scaling.suspend_work);
7982 cancel_work_sync(&hba->clk_scaling.resume_work);
7983 ufshcd_suspend_clkscaling(hba);
7984 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007985
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007986 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7987 req_link_state == UIC_LINK_ACTIVE_STATE) {
7988 goto disable_clks;
7989 }
7990
7991 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7992 (req_link_state == hba->uic_link_state))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007993 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007994
7995 /* UFS device & link must be active before we enter in this function */
7996 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7997 ret = -EINVAL;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07007998 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007999 }
8000
8001 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008002 if (ufshcd_can_autobkops_during_suspend(hba)) {
8003 /*
8004 * The device is idle with no requests in the queue,
8005 * allow background operations if bkops status shows
8006 * that performance might be impacted.
8007 */
8008 ret = ufshcd_urgent_bkops(hba);
8009 if (ret)
8010 goto enable_gating;
8011 } else {
8012 /* make sure that auto bkops is disabled */
8013 ufshcd_disable_auto_bkops(hba);
8014 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008015 }
8016
8017 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
8018 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
8019 !ufshcd_is_runtime_pm(pm_op))) {
8020 /* ensure that bkops is disabled */
8021 ufshcd_disable_auto_bkops(hba);
8022 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8023 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008024 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008025 }
8026
8027 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
8028 if (ret)
8029 goto set_dev_active;
8030
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008031 if (ufshcd_is_link_hibern8(hba) &&
8032 ufshcd_is_hibern8_on_idle_allowed(hba))
8033 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
8034
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008035 ufshcd_vreg_set_lpm(hba);
8036
8037disable_clks:
8038 /*
8039 * Call vendor specific suspend callback. As these callbacks may access
8040 * vendor specific host controller register space call them before the
8041 * host clocks are ON.
8042 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008043 ret = ufshcd_vops_suspend(hba, pm_op);
8044 if (ret)
8045 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008046
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008047 if (!ufshcd_is_link_active(hba))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008048 ret = ufshcd_disable_clocks(hba, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008049 else
8050 /* If link is active, device ref_clk can't be switched off */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008051 ret = ufshcd_disable_clocks_skip_ref_clk(hba, false);
8052 if (ret)
8053 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008054
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008055 if (ufshcd_is_clkgating_allowed(hba)) {
8056 hba->clk_gating.state = CLKS_OFF;
8057 trace_ufshcd_clk_gating(dev_name(hba->dev),
8058 hba->clk_gating.state);
8059 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008060 /*
8061 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008062 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008063 */
8064 ufshcd_disable_irq(hba);
8065 /* Put the host controller in low power mode if possible */
8066 ufshcd_hba_vreg_set_lpm(hba);
8067 goto out;
8068
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008069set_link_active:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008070 if (hba->clk_scaling.is_allowed)
8071 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008072 ufshcd_vreg_set_hpm(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008073 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008074 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008075 } else if (ufshcd_is_link_off(hba)) {
8076 ufshcd_update_error_stats(hba, UFS_ERR_VOPS_SUSPEND);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008077 ufshcd_host_reset_and_restore(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008078 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008079set_dev_active:
8080 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8081 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008082enable_gating:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008083 if (hba->clk_scaling.is_allowed)
8084 ufshcd_resume_clkscaling(hba);
8085 hba->hibern8_on_idle.is_suspended = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008086 hba->clk_gating.is_suspended = false;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008087 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008088out:
8089 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008090
8091 if (ret)
8092 ufshcd_update_error_stats(hba, UFS_ERR_SUSPEND);
8093
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008094 return ret;
8095}
8096
8097/**
8098 * ufshcd_resume - helper function for resume operations
8099 * @hba: per adapter instance
8100 * @pm_op: runtime PM or system PM
8101 *
8102 * This function basically brings the UFS device, UniPro link and controller
8103 * to active state.
8104 *
8105 * Returns 0 for success and non-zero for failure
8106 */
8107static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8108{
8109 int ret;
8110 enum uic_link_state old_link_state;
8111
8112 hba->pm_op_in_progress = 1;
8113 old_link_state = hba->uic_link_state;
8114
8115 ufshcd_hba_vreg_set_hpm(hba);
8116 /* Make sure clocks are enabled before accessing controller */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008117 ret = ufshcd_enable_clocks(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008118 if (ret)
8119 goto out;
8120
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008121 /* enable the host irq as host controller would be active soon */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008122 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008123
8124 ret = ufshcd_vreg_set_hpm(hba);
8125 if (ret)
8126 goto disable_irq_and_vops_clks;
8127
8128 /*
8129 * Call vendor specific resume callback. As these callbacks may access
8130 * vendor specific host controller register space call them when the
8131 * host clocks are ON.
8132 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008133 ret = ufshcd_vops_resume(hba, pm_op);
8134 if (ret)
8135 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008136
8137 if (ufshcd_is_link_hibern8(hba)) {
8138 ret = ufshcd_uic_hibern8_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008139 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008140 ufshcd_set_link_active(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008141 if (ufshcd_is_hibern8_on_idle_allowed(hba))
8142 hba->hibern8_on_idle.state = HIBERN8_EXITED;
8143 } else {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008144 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008145 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008146 } else if (ufshcd_is_link_off(hba)) {
8147 ret = ufshcd_host_reset_and_restore(hba);
8148 /*
8149 * ufshcd_host_reset_and_restore() should have already
8150 * set the link state as active
8151 */
8152 if (ret || !ufshcd_is_link_active(hba))
8153 goto vendor_suspend;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008154 /* mark link state as hibern8 exited */
8155 if (ufshcd_is_hibern8_on_idle_allowed(hba))
8156 hba->hibern8_on_idle.state = HIBERN8_EXITED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008157 }
8158
8159 if (!ufshcd_is_ufs_dev_active(hba)) {
8160 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8161 if (ret)
8162 goto set_old_link_state;
8163 }
8164
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008165 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8166 ufshcd_enable_auto_bkops(hba);
8167 else
8168 /*
8169 * If BKOPs operations are urgently needed at this moment then
8170 * keep auto-bkops enabled or else disable it.
8171 */
8172 ufshcd_urgent_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008173
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008174 hba->clk_gating.is_suspended = false;
8175 hba->hibern8_on_idle.is_suspended = false;
8176
8177 if (hba->clk_scaling.is_allowed)
8178 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008179
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008180 /* Schedule clock gating in case of no access to UFS device yet */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008181 ufshcd_release_all(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008182 goto out;
8183
8184set_old_link_state:
8185 ufshcd_link_state_transition(hba, old_link_state, 0);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008186 if (ufshcd_is_link_hibern8(hba) &&
8187 ufshcd_is_hibern8_on_idle_allowed(hba))
8188 hba->hibern8_on_idle.state = HIBERN8_ENTERED;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008189vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008190 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008191disable_vreg:
8192 ufshcd_vreg_set_lpm(hba);
8193disable_irq_and_vops_clks:
8194 ufshcd_disable_irq(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008195 if (hba->clk_scaling.is_allowed)
8196 ufshcd_suspend_clkscaling(hba);
8197 ufshcd_disable_clocks(hba, false);
8198 if (ufshcd_is_clkgating_allowed(hba))
8199 hba->clk_gating.state = CLKS_OFF;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008200out:
8201 hba->pm_op_in_progress = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008202
8203 if (ret)
8204 ufshcd_update_error_stats(hba, UFS_ERR_RESUME);
8205
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008206 return ret;
8207}
8208
8209/**
8210 * ufshcd_system_suspend - system suspend routine
8211 * @hba: per adapter instance
8212 * @pm_op: runtime PM or system PM
8213 *
8214 * Check the description of ufshcd_suspend() function for more details.
8215 *
8216 * Returns 0 for success and non-zero for failure
8217 */
8218int ufshcd_system_suspend(struct ufs_hba *hba)
8219{
8220 int ret = 0;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008221 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008222
8223 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008224 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008225
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008226 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8227 hba->curr_dev_pwr_mode) &&
8228 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8229 hba->uic_link_state))
8230 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008231
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008232 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008233 /*
8234 * UFS device and/or UFS link low power states during runtime
8235 * suspend seems to be different than what is expected during
8236 * system suspend. Hence runtime resume the devic & link and
8237 * let the system suspend low power states to take effect.
8238 * TODO: If resume takes longer time, we might have optimize
8239 * it in future by not resuming everything if possible.
8240 */
8241 ret = ufshcd_runtime_resume(hba);
8242 if (ret)
8243 goto out;
8244 }
8245
8246 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8247out:
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008248 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8249 ktime_to_us(ktime_sub(ktime_get(), start)),
8250 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008251 if (!ret)
8252 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008253 return ret;
8254}
8255EXPORT_SYMBOL(ufshcd_system_suspend);
8256
8257/**
8258 * ufshcd_system_resume - system resume routine
8259 * @hba: per adapter instance
8260 *
8261 * Returns 0 for success and non-zero for failure
8262 */
8263
8264int ufshcd_system_resume(struct ufs_hba *hba)
8265{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008266 int ret = 0;
8267 ktime_t start = ktime_get();
8268
8269 if (!hba)
8270 return -EINVAL;
8271
8272 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008273 /*
8274 * Let the runtime resume take care of resuming
8275 * if runtime suspended.
8276 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008277 goto out;
8278 else
8279 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8280out:
8281 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8282 ktime_to_us(ktime_sub(ktime_get(), start)),
8283 hba->curr_dev_pwr_mode, hba->uic_link_state);
8284 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008285}
8286EXPORT_SYMBOL(ufshcd_system_resume);
8287
8288/**
8289 * ufshcd_runtime_suspend - runtime suspend routine
8290 * @hba: per adapter instance
8291 *
8292 * Check the description of ufshcd_suspend() function for more details.
8293 *
8294 * Returns 0 for success and non-zero for failure
8295 */
8296int ufshcd_runtime_suspend(struct ufs_hba *hba)
8297{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008298 int ret = 0;
8299 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008300
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008301 if (!hba)
8302 return -EINVAL;
8303
8304 if (!hba->is_powered)
8305 goto out;
8306 else
8307 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8308out:
8309 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8310 ktime_to_us(ktime_sub(ktime_get(), start)),
8311 hba->curr_dev_pwr_mode,
8312 hba->uic_link_state);
8313 return ret;
8314
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308315}
8316EXPORT_SYMBOL(ufshcd_runtime_suspend);
8317
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008318/**
8319 * ufshcd_runtime_resume - runtime resume routine
8320 * @hba: per adapter instance
8321 *
8322 * This function basically brings the UFS device, UniPro link and controller
8323 * to active state. Following operations are done in this function:
8324 *
8325 * 1. Turn on all the controller related clocks
8326 * 2. Bring the UniPro link out of Hibernate state
8327 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8328 * to active state.
8329 * 4. If auto-bkops is enabled on the device, disable it.
8330 *
8331 * So following would be the possible power state after this function return
8332 * successfully:
8333 * S1: UFS device in Active state with VCC rail ON
8334 * UniPro link in Active state
8335 * All the UFS/UniPro controller clocks are ON
8336 *
8337 * Returns 0 for success and non-zero for failure
8338 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308339int ufshcd_runtime_resume(struct ufs_hba *hba)
8340{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008341 int ret = 0;
8342 ktime_t start = ktime_get();
8343
8344 if (!hba)
8345 return -EINVAL;
8346
8347 if (!hba->is_powered)
8348 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008349 else
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008350 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8351out:
8352 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8353 ktime_to_us(ktime_sub(ktime_get(), start)),
8354 hba->curr_dev_pwr_mode,
8355 hba->uic_link_state);
8356 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308357}
8358EXPORT_SYMBOL(ufshcd_runtime_resume);
8359
8360int ufshcd_runtime_idle(struct ufs_hba *hba)
8361{
8362 return 0;
8363}
8364EXPORT_SYMBOL(ufshcd_runtime_idle);
8365
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008366static inline ssize_t ufshcd_pm_lvl_store(struct device *dev,
8367 struct device_attribute *attr,
8368 const char *buf, size_t count,
8369 bool rpm)
8370{
8371 struct ufs_hba *hba = dev_get_drvdata(dev);
8372 unsigned long flags, value;
8373
8374 if (kstrtoul(buf, 0, &value))
8375 return -EINVAL;
8376
8377 if (value >= UFS_PM_LVL_MAX)
8378 return -EINVAL;
8379
8380 spin_lock_irqsave(hba->host->host_lock, flags);
8381 if (rpm)
8382 hba->rpm_lvl = value;
8383 else
8384 hba->spm_lvl = value;
8385 ufshcd_apply_pm_quirks(hba);
8386 spin_unlock_irqrestore(hba->host->host_lock, flags);
8387 return count;
8388}
8389
8390static ssize_t ufshcd_rpm_lvl_show(struct device *dev,
8391 struct device_attribute *attr, char *buf)
8392{
8393 struct ufs_hba *hba = dev_get_drvdata(dev);
8394 int curr_len;
8395 u8 lvl;
8396
8397 curr_len = snprintf(buf, PAGE_SIZE,
8398 "\nCurrent Runtime PM level [%d] => dev_state [%s] link_state [%s]\n",
8399 hba->rpm_lvl,
8400 ufschd_ufs_dev_pwr_mode_to_string(
8401 ufs_pm_lvl_states[hba->rpm_lvl].dev_state),
8402 ufschd_uic_link_state_to_string(
8403 ufs_pm_lvl_states[hba->rpm_lvl].link_state));
8404
8405 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8406 "\nAll available Runtime PM levels info:\n");
8407 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
8408 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8409 "\tRuntime PM level [%d] => dev_state [%s] link_state [%s]\n",
8410 lvl,
8411 ufschd_ufs_dev_pwr_mode_to_string(
8412 ufs_pm_lvl_states[lvl].dev_state),
8413 ufschd_uic_link_state_to_string(
8414 ufs_pm_lvl_states[lvl].link_state));
8415
8416 return curr_len;
8417}
8418
8419static ssize_t ufshcd_rpm_lvl_store(struct device *dev,
8420 struct device_attribute *attr, const char *buf, size_t count)
8421{
8422 return ufshcd_pm_lvl_store(dev, attr, buf, count, true);
8423}
8424
8425static void ufshcd_add_rpm_lvl_sysfs_nodes(struct ufs_hba *hba)
8426{
8427 hba->rpm_lvl_attr.show = ufshcd_rpm_lvl_show;
8428 hba->rpm_lvl_attr.store = ufshcd_rpm_lvl_store;
8429 sysfs_attr_init(&hba->rpm_lvl_attr.attr);
8430 hba->rpm_lvl_attr.attr.name = "rpm_lvl";
8431 hba->rpm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
8432 if (device_create_file(hba->dev, &hba->rpm_lvl_attr))
8433 dev_err(hba->dev, "Failed to create sysfs for rpm_lvl\n");
8434}
8435
8436static ssize_t ufshcd_spm_lvl_show(struct device *dev,
8437 struct device_attribute *attr, char *buf)
8438{
8439 struct ufs_hba *hba = dev_get_drvdata(dev);
8440 int curr_len;
8441 u8 lvl;
8442
8443 curr_len = snprintf(buf, PAGE_SIZE,
8444 "\nCurrent System PM level [%d] => dev_state [%s] link_state [%s]\n",
8445 hba->spm_lvl,
8446 ufschd_ufs_dev_pwr_mode_to_string(
8447 ufs_pm_lvl_states[hba->spm_lvl].dev_state),
8448 ufschd_uic_link_state_to_string(
8449 ufs_pm_lvl_states[hba->spm_lvl].link_state));
8450
8451 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8452 "\nAll available System PM levels info:\n");
8453 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++)
8454 curr_len += snprintf((buf + curr_len), (PAGE_SIZE - curr_len),
8455 "\tSystem PM level [%d] => dev_state [%s] link_state [%s]\n",
8456 lvl,
8457 ufschd_ufs_dev_pwr_mode_to_string(
8458 ufs_pm_lvl_states[lvl].dev_state),
8459 ufschd_uic_link_state_to_string(
8460 ufs_pm_lvl_states[lvl].link_state));
8461
8462 return curr_len;
8463}
8464
8465static ssize_t ufshcd_spm_lvl_store(struct device *dev,
8466 struct device_attribute *attr, const char *buf, size_t count)
8467{
8468 return ufshcd_pm_lvl_store(dev, attr, buf, count, false);
8469}
8470
8471static void ufshcd_add_spm_lvl_sysfs_nodes(struct ufs_hba *hba)
8472{
8473 hba->spm_lvl_attr.show = ufshcd_spm_lvl_show;
8474 hba->spm_lvl_attr.store = ufshcd_spm_lvl_store;
8475 sysfs_attr_init(&hba->spm_lvl_attr.attr);
8476 hba->spm_lvl_attr.attr.name = "spm_lvl";
8477 hba->spm_lvl_attr.attr.mode = S_IRUGO | S_IWUSR;
8478 if (device_create_file(hba->dev, &hba->spm_lvl_attr))
8479 dev_err(hba->dev, "Failed to create sysfs for spm_lvl\n");
8480}
8481
8482static inline void ufshcd_add_sysfs_nodes(struct ufs_hba *hba)
8483{
8484 ufshcd_add_rpm_lvl_sysfs_nodes(hba);
8485 ufshcd_add_spm_lvl_sysfs_nodes(hba);
8486}
8487
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308488/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008489 * ufshcd_shutdown - shutdown routine
8490 * @hba: per adapter instance
8491 *
8492 * This function would power off both UFS device and UFS link.
8493 *
8494 * Returns 0 always to allow force shutdown even in case of errors.
8495 */
8496int ufshcd_shutdown(struct ufs_hba *hba)
8497{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008498 /*
8499 * TODO: This function should send the power down notification to
8500 * UFS device and then power off the UFS link. But we need to be sure
8501 * that there will not be any new UFS requests issued after this.
8502 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008503 return 0;
8504}
8505EXPORT_SYMBOL(ufshcd_shutdown);
8506
8507/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308508 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308509 * data structure memory
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308510 * @hba - per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308511 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308512void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308513{
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308514 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308515 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308516 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008517 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308518
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008519 ufshcd_exit_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008520 ufshcd_exit_hibern8_on_idle(hba);
8521 if (ufshcd_is_clkscaling_supported(hba)) {
8522 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008523 devfreq_remove_device(hba->devfreq);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008524 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008525 ufshcd_hba_exit(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008526 ufsdbg_remove_debugfs(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308527}
8528EXPORT_SYMBOL_GPL(ufshcd_remove);
8529
8530/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008531 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8532 * @hba: pointer to Host Bus Adapter (HBA)
8533 */
8534void ufshcd_dealloc_host(struct ufs_hba *hba)
8535{
8536 scsi_host_put(hba->host);
8537}
8538EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8539
8540/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008541 * ufshcd_set_dma_mask - Set dma mask based on the controller
8542 * addressing capability
8543 * @hba: per adapter instance
8544 *
8545 * Returns 0 for success, non-zero for failure
8546 */
8547static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8548{
8549 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8550 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8551 return 0;
8552 }
8553 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8554}
8555
8556/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008557 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308558 * @dev: pointer to device handle
8559 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308560 * Returns 0 on success, non-zero value on failure
8561 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008562int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308563{
8564 struct Scsi_Host *host;
8565 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008566 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308567
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308568 if (!dev) {
8569 dev_err(dev,
8570 "Invalid memory reference for dev is NULL\n");
8571 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308572 goto out_error;
8573 }
8574
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308575 host = scsi_host_alloc(&ufshcd_driver_template,
8576 sizeof(struct ufs_hba));
8577 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308578 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308579 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308580 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308581 }
8582 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308583 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308584 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008585 *hba_handle = hba;
8586
8587out_error:
8588 return err;
8589}
8590EXPORT_SYMBOL(ufshcd_alloc_host);
8591
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008592/**
8593 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
8594 * @hba: per adapter instance
8595 * @scale_up: True if scaling up and false if scaling down
8596 *
8597 * Returns true if scaling is required, false otherwise.
8598 */
8599static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
8600 bool scale_up)
Sahitya Tummala856b3482014-09-25 15:32:34 +03008601{
Sahitya Tummala856b3482014-09-25 15:32:34 +03008602 struct ufs_clk_info *clki;
8603 struct list_head *head = &hba->clk_list_head;
8604
8605 if (!head || list_empty(head))
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008606 return false;
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008607
Sahitya Tummala856b3482014-09-25 15:32:34 +03008608 list_for_each_entry(clki, head, list) {
8609 if (!IS_ERR_OR_NULL(clki->clk)) {
8610 if (scale_up && clki->max_freq) {
8611 if (clki->curr_freq == clki->max_freq)
8612 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008613 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008614 } else if (!scale_up && clki->min_freq) {
8615 if (clki->curr_freq == clki->min_freq)
8616 continue;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008617 return true;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008618 }
8619 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008620 }
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008621
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008622 return false;
8623}
Yaniv Gardif06fcc72015-10-28 13:15:51 +02008624
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008625/**
8626 * ufshcd_scale_gear - scale up/down UFS gear
8627 * @hba: per adapter instance
8628 * @scale_up: True for scaling up gear and false for scaling down
8629 *
8630 * Returns 0 for success,
8631 * Returns -EBUSY if scaling can't happen at this time
8632 * Returns non-zero for any other errors
8633 */
8634static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
8635{
8636 int ret = 0;
8637 struct ufs_pa_layer_attr new_pwr_info;
8638 u32 scale_down_gear = ufshcd_vops_get_scale_down_gear(hba);
8639
8640 BUG_ON(!hba->clk_scaling.saved_pwr_info.is_valid);
8641
8642 if (scale_up) {
8643 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
8644 sizeof(struct ufs_pa_layer_attr));
8645 } else {
8646 memcpy(&new_pwr_info, &hba->pwr_info,
8647 sizeof(struct ufs_pa_layer_attr));
8648
8649 if (hba->pwr_info.gear_tx > scale_down_gear
8650 || hba->pwr_info.gear_rx > scale_down_gear) {
8651 /* save the current power mode */
8652 memcpy(&hba->clk_scaling.saved_pwr_info.info,
8653 &hba->pwr_info,
8654 sizeof(struct ufs_pa_layer_attr));
8655
8656 /* scale down gear */
8657 new_pwr_info.gear_tx = scale_down_gear;
8658 new_pwr_info.gear_rx = scale_down_gear;
8659 if (!(hba->dev_quirks & UFS_DEVICE_NO_FASTAUTO)) {
8660 new_pwr_info.pwr_tx = FASTAUTO_MODE;
8661 new_pwr_info.pwr_rx = FASTAUTO_MODE;
8662 }
8663 }
8664 }
8665
8666 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
8667
8668 if (ret)
8669 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d), scale_up = %d",
8670 __func__, ret,
8671 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
8672 new_pwr_info.gear_tx, new_pwr_info.gear_rx,
8673 scale_up);
8674
Sahitya Tummala856b3482014-09-25 15:32:34 +03008675 return ret;
8676}
8677
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008678static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
8679{
8680 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
8681 int ret = 0;
8682 /*
8683 * make sure that there are no outstanding requests when
8684 * clock scaling is in progress
8685 */
8686 ufshcd_scsi_block_requests(hba);
8687 down_write(&hba->clk_scaling_lock);
8688 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
8689 ret = -EBUSY;
8690 up_write(&hba->clk_scaling_lock);
8691 ufshcd_scsi_unblock_requests(hba);
8692 }
8693
8694 return ret;
8695}
8696
8697static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
8698{
8699 up_write(&hba->clk_scaling_lock);
8700 ufshcd_scsi_unblock_requests(hba);
8701}
8702
8703/**
8704 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
8705 * @hba: per adapter instance
8706 * @scale_up: True for scaling up and false for scalin down
8707 *
8708 * Returns 0 for success,
8709 * Returns -EBUSY if scaling can't happen at this time
8710 * Returns non-zero for any other errors
8711 */
8712static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
8713{
8714 int ret = 0;
8715
8716 /* let's not get into low power until clock scaling is completed */
8717 ufshcd_hold_all(hba);
8718
8719 ret = ufshcd_clock_scaling_prepare(hba);
8720 if (ret)
8721 goto out;
8722
8723 /* scale down the gear before scaling down clocks */
8724 if (!scale_up) {
8725 ret = ufshcd_scale_gear(hba, false);
8726 if (ret)
8727 goto clk_scaling_unprepare;
8728 }
8729
8730 ret = ufshcd_scale_clks(hba, scale_up);
8731 if (ret)
8732 goto scale_up_gear;
8733
8734 /* scale up the gear after scaling up clocks */
8735 if (scale_up) {
8736 ret = ufshcd_scale_gear(hba, true);
8737 if (ret) {
8738 ufshcd_scale_clks(hba, false);
8739 goto clk_scaling_unprepare;
8740 }
8741 }
8742
8743 if (!ret) {
8744 hba->clk_scaling.is_scaled_up = scale_up;
8745 if (scale_up)
8746 hba->clk_gating.delay_ms =
8747 hba->clk_gating.delay_ms_perf;
8748 else
8749 hba->clk_gating.delay_ms =
8750 hba->clk_gating.delay_ms_pwr_save;
8751 }
8752
8753 goto clk_scaling_unprepare;
8754
8755scale_up_gear:
8756 if (!scale_up)
8757 ufshcd_scale_gear(hba, true);
8758clk_scaling_unprepare:
8759 ufshcd_clock_scaling_unprepare(hba);
8760out:
8761 ufshcd_release_all(hba);
8762 return ret;
8763}
8764
8765static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
8766{
8767 unsigned long flags;
8768
8769 devfreq_suspend_device(hba->devfreq);
8770 spin_lock_irqsave(hba->host->host_lock, flags);
8771 hba->clk_scaling.window_start_t = 0;
8772 spin_unlock_irqrestore(hba->host->host_lock, flags);
8773}
8774
8775static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
8776{
8777 unsigned long flags;
8778 bool suspend = false;
8779
8780 if (!ufshcd_is_clkscaling_supported(hba))
8781 return;
8782
8783 spin_lock_irqsave(hba->host->host_lock, flags);
8784 if (!hba->clk_scaling.is_suspended) {
8785 suspend = true;
8786 hba->clk_scaling.is_suspended = true;
8787 }
8788 spin_unlock_irqrestore(hba->host->host_lock, flags);
8789
8790 if (suspend)
8791 __ufshcd_suspend_clkscaling(hba);
8792}
8793
8794static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
8795{
8796 unsigned long flags;
8797 bool resume = false;
8798
8799 if (!ufshcd_is_clkscaling_supported(hba))
8800 return;
8801
8802 spin_lock_irqsave(hba->host->host_lock, flags);
8803 if (hba->clk_scaling.is_suspended) {
8804 resume = true;
8805 hba->clk_scaling.is_suspended = false;
8806 }
8807 spin_unlock_irqrestore(hba->host->host_lock, flags);
8808
8809 if (resume)
8810 devfreq_resume_device(hba->devfreq);
8811}
8812
8813static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
8814 struct device_attribute *attr, char *buf)
8815{
8816 struct ufs_hba *hba = dev_get_drvdata(dev);
8817
8818 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
8819}
8820
8821static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
8822 struct device_attribute *attr, const char *buf, size_t count)
8823{
8824 struct ufs_hba *hba = dev_get_drvdata(dev);
8825 u32 value;
8826 int err;
8827
8828 if (kstrtou32(buf, 0, &value))
8829 return -EINVAL;
8830
8831 value = !!value;
8832 if (value == hba->clk_scaling.is_allowed)
8833 goto out;
8834
8835 pm_runtime_get_sync(hba->dev);
8836 ufshcd_hold(hba, false);
8837
8838 cancel_work_sync(&hba->clk_scaling.suspend_work);
8839 cancel_work_sync(&hba->clk_scaling.resume_work);
8840
8841 hba->clk_scaling.is_allowed = value;
8842
8843 if (value) {
8844 ufshcd_resume_clkscaling(hba);
8845 } else {
8846 ufshcd_suspend_clkscaling(hba);
8847 err = ufshcd_devfreq_scale(hba, true);
8848 if (err)
8849 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
8850 __func__, err);
8851 }
8852
8853 ufshcd_release(hba, false);
8854 pm_runtime_put_sync(hba->dev);
8855out:
8856 return count;
8857}
8858
8859static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
8860{
8861 struct ufs_hba *hba = container_of(work, struct ufs_hba,
8862 clk_scaling.suspend_work);
8863 unsigned long irq_flags;
8864
8865 spin_lock_irqsave(hba->host->host_lock, irq_flags);
8866 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
8867 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8868 return;
8869 }
8870 hba->clk_scaling.is_suspended = true;
8871 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8872
8873 __ufshcd_suspend_clkscaling(hba);
8874}
8875
8876static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
8877{
8878 struct ufs_hba *hba = container_of(work, struct ufs_hba,
8879 clk_scaling.resume_work);
8880 unsigned long irq_flags;
8881
8882 spin_lock_irqsave(hba->host->host_lock, irq_flags);
8883 if (!hba->clk_scaling.is_suspended) {
8884 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8885 return;
8886 }
8887 hba->clk_scaling.is_suspended = false;
8888 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8889
8890 devfreq_resume_device(hba->devfreq);
8891}
8892
Sahitya Tummala856b3482014-09-25 15:32:34 +03008893static int ufshcd_devfreq_target(struct device *dev,
8894 unsigned long *freq, u32 flags)
8895{
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008896 int ret = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008897 struct ufs_hba *hba = dev_get_drvdata(dev);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008898 unsigned long irq_flags;
8899 ktime_t start;
8900 bool scale_up, sched_clk_scaling_suspend_work = false;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008901
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008902 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03008903 return -EINVAL;
8904
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008905 if ((*freq > 0) && (*freq < UINT_MAX)) {
8906 dev_err(hba->dev, "%s: invalid freq = %lu\n", __func__, *freq);
8907 return -EINVAL;
8908 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008909
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008910 spin_lock_irqsave(hba->host->host_lock, irq_flags);
8911 if (ufshcd_eh_in_progress(hba)) {
8912 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8913 return 0;
8914 }
8915
8916 if (!hba->clk_scaling.active_reqs)
8917 sched_clk_scaling_suspend_work = true;
8918
8919 scale_up = (*freq == UINT_MAX) ? true : false;
8920 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
8921 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8922 ret = 0;
8923 goto out; /* no state change required */
8924 }
8925 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
8926
8927 start = ktime_get();
8928 ret = ufshcd_devfreq_scale(hba, scale_up);
8929 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
8930 (scale_up ? "up" : "down"),
8931 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
8932
8933out:
8934 if (sched_clk_scaling_suspend_work)
8935 queue_work(hba->clk_scaling.workq,
8936 &hba->clk_scaling.suspend_work);
8937
8938 return ret;
Sahitya Tummala856b3482014-09-25 15:32:34 +03008939}
8940
8941static int ufshcd_devfreq_get_dev_status(struct device *dev,
8942 struct devfreq_dev_status *stat)
8943{
8944 struct ufs_hba *hba = dev_get_drvdata(dev);
8945 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
8946 unsigned long flags;
8947
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008948 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03008949 return -EINVAL;
8950
8951 memset(stat, 0, sizeof(*stat));
8952
8953 spin_lock_irqsave(hba->host->host_lock, flags);
8954 if (!scaling->window_start_t)
8955 goto start_window;
8956
8957 if (scaling->is_busy_started)
8958 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
8959 scaling->busy_start_t));
8960
8961 stat->total_time = jiffies_to_usecs((long)jiffies -
8962 (long)scaling->window_start_t);
8963 stat->busy_time = scaling->tot_busy_t;
8964start_window:
8965 scaling->window_start_t = jiffies;
8966 scaling->tot_busy_t = 0;
8967
8968 if (hba->outstanding_reqs) {
8969 scaling->busy_start_t = ktime_get();
8970 scaling->is_busy_started = true;
8971 } else {
8972 scaling->busy_start_t = ktime_set(0, 0);
8973 scaling->is_busy_started = false;
8974 }
8975 spin_unlock_irqrestore(hba->host->host_lock, flags);
8976 return 0;
8977}
8978
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008979#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
8980static struct devfreq_simple_ondemand_data ufshcd_ondemand_data = {
8981 .upthreshold = 35,
8982 .downdifferential = 30,
8983 .simple_scaling = 1,
8984};
8985
8986static void *gov_data = &ufshcd_ondemand_data;
8987#else
8988static void *gov_data;
8989#endif
8990
Sahitya Tummala856b3482014-09-25 15:32:34 +03008991static struct devfreq_dev_profile ufs_devfreq_profile = {
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008992 .polling_ms = 40,
Sahitya Tummala856b3482014-09-25 15:32:34 +03008993 .target = ufshcd_devfreq_target,
8994 .get_dev_status = ufshcd_devfreq_get_dev_status,
8995};
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07008996static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
8997{
8998 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
8999 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
9000 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
9001 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
9002 hba->clk_scaling.enable_attr.attr.mode = S_IRUGO | S_IWUSR;
9003 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
9004 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
9005}
Sahitya Tummala856b3482014-09-25 15:32:34 +03009006
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009007static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
9008{
9009 struct device *dev = hba->dev;
9010 int ret;
9011
9012 ret = of_property_read_u32(dev->of_node, "lanes-per-direction",
9013 &hba->lanes_per_direction);
9014 if (ret) {
9015 dev_dbg(hba->dev,
9016 "%s: failed to read lanes-per-direction, ret=%d\n",
9017 __func__, ret);
9018 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION;
9019 }
9020}
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009021/**
9022 * ufshcd_init - Driver initialization routine
9023 * @hba: per-adapter instance
9024 * @mmio_base: base register address
9025 * @irq: Interrupt line of device
9026 * Returns 0 on success, non-zero value on failure
9027 */
9028int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9029{
9030 int err;
9031 struct Scsi_Host *host = hba->host;
9032 struct device *dev = hba->dev;
9033
9034 if (!mmio_base) {
9035 dev_err(hba->dev,
9036 "Invalid memory reference for mmio_base is NULL\n");
9037 err = -ENODEV;
9038 goto out_error;
9039 }
9040
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309041 hba->mmio_base = mmio_base;
9042 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309043
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009044 ufshcd_init_lanes_per_dir(hba);
9045
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009046 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009047 if (err)
9048 goto out_error;
9049
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309050 /* Read capabilities registers */
9051 ufshcd_hba_capabilities(hba);
9052
9053 /* Get UFS version supported by the controller */
9054 hba->ufs_version = ufshcd_get_ufs_version(hba);
9055
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009056 /* print error message if ufs_version is not valid */
9057 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
9058 (hba->ufs_version != UFSHCI_VERSION_11) &&
9059 (hba->ufs_version != UFSHCI_VERSION_20) &&
9060 (hba->ufs_version != UFSHCI_VERSION_21))
9061 dev_err(hba->dev, "invalid UFS version 0x%x\n",
9062 hba->ufs_version);
9063
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309064 /* Get Interrupt bit mask per version */
9065 hba->intr_mask = ufshcd_get_intr_mask(hba);
9066
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009067 /* Enable debug prints */
9068 hba->ufshcd_dbg_print = DEFAULT_UFSHCD_DBG_PRINT_EN;
9069
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009070 err = ufshcd_set_dma_mask(hba);
9071 if (err) {
9072 dev_err(hba->dev, "set dma mask failed\n");
9073 goto out_disable;
9074 }
9075
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309076 /* Allocate memory for host memory space */
9077 err = ufshcd_memory_alloc(hba);
9078 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309079 dev_err(hba->dev, "Memory allocation failed\n");
9080 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309081 }
9082
9083 /* Configure LRB */
9084 ufshcd_host_memory_configure(hba);
9085
9086 host->can_queue = hba->nutrs;
9087 host->cmd_per_lun = hba->nutrs;
9088 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03009089 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309090 host->max_channel = UFSHCD_MAX_CHANNEL;
9091 host->unique_id = host->host_no;
9092 host->max_cmd_len = MAX_CDB_SIZE;
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009093 host->set_dbd_for_caching = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309094
Dolev Raviv7eb584d2014-09-25 15:32:31 +03009095 hba->max_pwr_info.is_valid = false;
9096
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309097 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05309098 init_waitqueue_head(&hba->tm_wq);
9099 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309100
9101 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05309102 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309103 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309104
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309105 /* Initialize UIC command mutex */
9106 mutex_init(&hba->uic_cmd_mutex);
9107
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309108 /* Initialize mutex for device management commands */
9109 mutex_init(&hba->dev_cmd.lock);
9110
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009111 init_rwsem(&hba->clk_scaling_lock);
9112
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309113 /* Initialize device management tag acquire wait queue */
9114 init_waitqueue_head(&hba->dev_cmd.tag_wq);
9115
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009116 ufshcd_init_clk_gating(hba);
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009117 ufshcd_init_hibern8_on_idle(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02009118
9119 /*
9120 * In order to avoid any spurious interrupt immediately after
9121 * registering UFS controller interrupt handler, clear any pending UFS
9122 * interrupt status and disable all the UFS interrupts.
9123 */
9124 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9125 REG_INTERRUPT_STATUS);
9126 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9127 /*
9128 * Make sure that UFS interrupts are disabled and any pending interrupt
9129 * status is cleared before registering UFS interrupt handler.
9130 */
9131 mb();
9132
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309133 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09009134 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309135 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309136 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009137 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009138 } else {
9139 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309140 }
9141
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309142 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309143 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309144 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009145 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309146 }
9147
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309148 /* Host controller enable */
9149 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309150 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309151 dev_err(hba->dev, "Host controller enable failed\n");
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009152 ufshcd_print_host_regs(hba);
9153 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309154 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309155 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309156
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009157 if (ufshcd_is_clkscaling_supported(hba)) {
9158 char wq_name[sizeof("ufs_clkscaling_00")];
9159
Sahitya Tummala856b3482014-09-25 15:32:34 +03009160 hba->devfreq = devfreq_add_device(dev, &ufs_devfreq_profile,
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009161 "simple_ondemand", gov_data);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009162 if (IS_ERR(hba->devfreq)) {
9163 dev_err(hba->dev, "Unable to register with devfreq %ld\n",
9164 PTR_ERR(hba->devfreq));
9165 goto out_remove_scsi_host;
9166 }
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009167 hba->clk_scaling.is_suspended = false;
9168
9169 INIT_WORK(&hba->clk_scaling.suspend_work,
9170 ufshcd_clk_scaling_suspend_work);
9171 INIT_WORK(&hba->clk_scaling.resume_work,
9172 ufshcd_clk_scaling_resume_work);
9173
9174 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clkscaling_%d",
9175 host->host_no);
9176 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
9177
Sahitya Tummala856b3482014-09-25 15:32:34 +03009178 /* Suspend devfreq until the UFS device is detected */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009179 ufshcd_suspend_clkscaling(hba);
9180 ufshcd_clkscaling_init_sysfs(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009181 }
9182
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009183 /*
9184 * If rpm_lvl and and spm_lvl are not already set to valid levels,
9185 * set the default power management level for UFS runtime and system
9186 * suspend. Default power saving mode selected is keeping UFS link in
9187 * Hibern8 state and UFS device in sleep.
9188 */
9189 if (!ufshcd_is_valid_pm_lvl(hba->rpm_lvl))
9190 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9191 UFS_SLEEP_PWR_MODE,
9192 UIC_LINK_HIBERN8_STATE);
9193 if (!ufshcd_is_valid_pm_lvl(hba->spm_lvl))
9194 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9195 UFS_SLEEP_PWR_MODE,
9196 UIC_LINK_HIBERN8_STATE);
9197
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05309198 /* Hold auto suspend until async scan completes */
9199 pm_runtime_get_sync(dev);
9200
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009201 /*
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009202 * We are assuming that device wasn't put in sleep/power-down
9203 * state exclusively during the boot stage before kernel.
9204 * This assumption helps avoid doing link startup twice during
9205 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009206 */
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009207 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009208
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309209 async_schedule(ufshcd_async_scan, hba);
9210
Subhash Jadavanicce6fbc2016-08-11 11:35:26 -07009211 ufsdbg_add_debugfs(hba);
9212
9213 ufshcd_add_sysfs_nodes(hba);
9214
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309215 return 0;
9216
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309217out_remove_scsi_host:
9218 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009219exit_gating:
9220 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309221out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009222 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009223 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309224out_error:
9225 return err;
9226}
9227EXPORT_SYMBOL_GPL(ufshcd_init);
9228
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309229MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9230MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05309231MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309232MODULE_LICENSE("GPL");
9233MODULE_VERSION(UFSHCD_DRIVER_VERSION);