Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Carsten Langgaard, carstenl@mips.com |
| 3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. |
| 4 | * |
| 5 | * ######################################################################## |
| 6 | * |
| 7 | * This program is free software; you can distribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License (Version 2) as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 14 | * for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along |
| 17 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 19 | * |
| 20 | * ######################################################################## |
| 21 | * |
| 22 | * Routines for generic manipulation of the interrupts found on the MIPS |
| 23 | * Atlas board. |
| 24 | * |
| 25 | */ |
| 26 | #include <linux/compiler.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/sched.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <linux/interrupt.h> |
| 31 | #include <linux/kernel_stat.h> |
| 32 | |
| 33 | #include <asm/irq.h> |
| 34 | #include <asm/io.h> |
| 35 | #include <asm/mips-boards/atlas.h> |
| 36 | #include <asm/mips-boards/atlasint.h> |
| 37 | #include <asm/gdb-stub.h> |
| 38 | |
| 39 | |
| 40 | static struct atlas_ictrl_regs *atlas_hw0_icregs; |
| 41 | |
| 42 | extern asmlinkage void mipsIRQ(void); |
| 43 | |
| 44 | #if 0 |
| 45 | #define DEBUG_INT(x...) printk(x) |
| 46 | #else |
| 47 | #define DEBUG_INT(x...) |
| 48 | #endif |
| 49 | |
| 50 | void disable_atlas_irq(unsigned int irq_nr) |
| 51 | { |
| 52 | atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE)); |
| 53 | iob(); |
| 54 | } |
| 55 | |
| 56 | void enable_atlas_irq(unsigned int irq_nr) |
| 57 | { |
| 58 | atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE)); |
| 59 | iob(); |
| 60 | } |
| 61 | |
| 62 | static unsigned int startup_atlas_irq(unsigned int irq) |
| 63 | { |
| 64 | enable_atlas_irq(irq); |
| 65 | return 0; /* never anything pending */ |
| 66 | } |
| 67 | |
| 68 | #define shutdown_atlas_irq disable_atlas_irq |
| 69 | |
| 70 | #define mask_and_ack_atlas_irq disable_atlas_irq |
| 71 | |
| 72 | static void end_atlas_irq(unsigned int irq) |
| 73 | { |
| 74 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
| 75 | enable_atlas_irq(irq); |
| 76 | } |
| 77 | |
| 78 | static struct hw_interrupt_type atlas_irq_type = { |
Ralf Baechle | 8ab00b9 | 2005-02-28 13:39:57 +0000 | [diff] [blame] | 79 | .typename = "Atlas", |
| 80 | .startup = startup_atlas_irq, |
| 81 | .shutdown = shutdown_atlas_irq, |
| 82 | .enable = enable_atlas_irq, |
| 83 | .disable = disable_atlas_irq, |
| 84 | .ack = mask_and_ack_atlas_irq, |
| 85 | .end = end_atlas_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | static inline int ls1bit32(unsigned int x) |
| 89 | { |
| 90 | int b = 31, s; |
| 91 | |
| 92 | s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; |
| 93 | s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; |
| 94 | s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; |
| 95 | s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; |
| 96 | s = 1; if (x << 1 == 0) s = 0; b -= s; |
| 97 | |
| 98 | return b; |
| 99 | } |
| 100 | |
| 101 | void atlas_hw0_irqdispatch(struct pt_regs *regs) |
| 102 | { |
| 103 | unsigned long int_status; |
| 104 | int irq; |
| 105 | |
| 106 | int_status = atlas_hw0_icregs->intstatus; |
| 107 | |
| 108 | /* if int_status == 0, then the interrupt has already been cleared */ |
| 109 | if (unlikely(int_status == 0)) |
| 110 | return; |
| 111 | |
| 112 | irq = ATLASINT_BASE + ls1bit32(int_status); |
| 113 | |
| 114 | DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq); |
| 115 | |
| 116 | do_IRQ(irq, regs); |
| 117 | } |
| 118 | |
| 119 | void __init arch_init_irq(void) |
| 120 | { |
| 121 | int i; |
| 122 | |
| 123 | atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 124 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | /* |
| 126 | * Mask out all interrupt by writing "1" to all bit position in |
| 127 | * the interrupt reset reg. |
| 128 | */ |
| 129 | atlas_hw0_icregs->intrsten = 0xffffffff; |
| 130 | |
| 131 | /* Now safe to set the exception vector. */ |
| 132 | set_except_vector(0, mipsIRQ); |
| 133 | |
| 134 | for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) { |
| 135 | irq_desc[i].status = IRQ_DISABLED; |
| 136 | irq_desc[i].action = 0; |
| 137 | irq_desc[i].depth = 1; |
| 138 | irq_desc[i].handler = &atlas_irq_type; |
| 139 | spin_lock_init(&irq_desc[i].lock); |
| 140 | } |
| 141 | } |